diff --git a/SabreTools.Models/COFF/Enums.cs b/SabreTools.Models/COFF/Enums.cs new file mode 100644 index 0000000..5897daa --- /dev/null +++ b/SabreTools.Models/COFF/Enums.cs @@ -0,0 +1,1484 @@ +using System; + +namespace SabreTools.Models.COFF +{ + [Flags] + public enum Characteristics : ushort + { + /// + /// Image only, Windows CE, and Microsoft Windows NT and later. + /// This indicates that the file does not contain base relocations + /// and must therefore be loaded at its preferred base address. + /// If the base address is not available, the loader reports an + /// error. The default behavior of the linker is to strip base + /// relocations from executable (EXE) files. + /// + IMAGE_FILE_RELOCS_STRIPPED = 0x0001, + + /// + /// Image only. This indicates that the image file is valid and + /// can be run. If this flag is not set, it indicates a linker error. + /// + IMAGE_FILE_EXECUTABLE_IMAGE = 0x0002, + + /// + /// COFF line numbers have been removed. This flag is deprecated + /// and should be zero. + /// + IMAGE_FILE_LINE_NUMS_STRIPPED = 0x0004, + + /// + /// COFF symbol table entries for local symbols have been removed. + /// This flag is deprecated and should be zero. + /// + IMAGE_FILE_LOCAL_SYMS_STRIPPED = 0x0008, + + /// + /// Obsolete. Aggressively trim working set. This flag is deprecated + /// for Windows 2000 and later and must be zero. + /// + IMAGE_FILE_AGGRESSIVE_WS_TRIM = 0x0010, + + /// + /// Application can handle > 2-GB addresses. + /// + IMAGE_FILE_LARGE_ADDRESS_AWARE = 0x0020, + + /// + /// This flag is reserved for future use. + /// + RESERVED = 0x0040, + + /// + /// Little endian: the least significant bit (LSB) precedes the most + /// significant bit (MSB) in memory. This flag is deprecated and + /// should be zero. + /// + IMAGE_FILE_BYTES_REVERSED_LO = 0x0080, + + /// + /// Machine is based on a 32-bit-word architecture. + /// + IMAGE_FILE_32BIT_MACHINE = 0x0100, + + /// + /// Debugging information is removed from the image file. + /// + IMAGE_FILE_DEBUG_STRIPPED = 0x0200, + + /// + /// If the image is on removable media, fully load it and + /// copy it to the swap file. + /// + IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP = 0x0400, + + /// + /// If the image is on network media, fully load it and copy + /// it to the swap file. + /// + IMAGE_FILE_NET_RUN_FROM_SWAP = 0x0800, + + /// + /// The image file is a system file, not a user program. + /// + IMAGE_FILE_SYSTEM = 0x1000, + + /// + /// The image file is a dynamic-link library (DLL). Such files + /// are considered executable files for almost all purposes, + /// although they cannot be directly run. + /// + IMAGE_FILE_DLL = 0x2000, + + /// + /// The file should be run only on a uniprocessor machine. + /// + IMAGE_FILE_UP_SYSTEM_ONLY = 0x4000, + + /// + /// Big endian: the MSB precedes the LSB in memory. This flag + /// is deprecated and should be zero. + /// + IMAGE_FILE_BYTES_REVERSED_HI = 0x8000, + } + + public enum MachineType : ushort + { + /// + /// The content of this field is assumed to be applicable to any machine type + /// + IMAGE_FILE_MACHINE_UNKNOWN = 0x0000, + + /// + /// Matsushita AM33 + /// + IMAGE_FILE_MACHINE_AM33 = 0x01D3, + + /// + /// x64 + /// + IMAGE_FILE_MACHINE_AMD64 = 0x8664, + + /// + /// ARM little endian + /// + IMAGE_FILE_MACHINE_ARM = 0x01C0, + + /// + /// ARM64 little endian + /// + IMAGE_FILE_MACHINE_ARM64 = 0xAA64, + + /// + /// ARM Thumb-2 little endian + /// + IMAGE_FILE_MACHINE_ARMNT = 0x01C4, + + /// + /// EFI byte code + /// + IMAGE_FILE_MACHINE_EBC = 0x0EBC, + + /// + /// Intel 386 or later processors and compatible processors + /// + IMAGE_FILE_MACHINE_I386 = 0x014C, + + /// + /// Intel Itanium processor family + /// + IMAGE_FILE_MACHINE_IA64 = 0x0200, + + /// + /// LoongArch 32-bit processor family + /// + IMAGE_FILE_MACHINE_LOONGARCH32 = 0x6232, + + /// + /// LoongArch 64-bit processor family + /// + IMAGE_FILE_MACHINE_LOONGARCH64 = 0x6264, + + /// + /// Mitsubishi M32R little endian + /// + IMAGE_FILE_MACHINE_M32R = 0x9041, + + /// + /// MIPS16 + /// + IMAGE_FILE_MACHINE_MIPS16 = 0x0266, + + /// + /// MIPS with FPU + /// + IMAGE_FILE_MACHINE_MIPSFPU = 0x0366, + + /// + /// MIPS16 with FPU + /// + IMAGE_FILE_MACHINE_MIPSFPU16 = 0x0466, + + /// + /// Power PC little endian + /// + IMAGE_FILE_MACHINE_POWERPC = 0x01F0, + + /// + /// Power PC with floating point support + /// + IMAGE_FILE_MACHINE_POWERPCFP = 0x01F1, + + /// + /// MIPS little endian + /// + IMAGE_FILE_MACHINE_R4000 = 0x0166, + + /// + /// RISC-V 32-bit address space + /// + IMAGE_FILE_MACHINE_RISCV32 = 0x5032, + + /// + /// RISC-V 64-bit address space + /// + IMAGE_FILE_MACHINE_RISCV64 = 0x5064, + + /// + /// RISC-V 128-bit address space + /// + IMAGE_FILE_MACHINE_RISCV128 = 0x5128, + + /// + /// Hitachi SH3 + /// + IMAGE_FILE_MACHINE_SH3 = 0x01A2, + + /// + /// Hitachi SH3 DSP + /// + IMAGE_FILE_MACHINE_SH3DSP = 0x01A3, + + /// + /// Hitachi SH4 + /// + IMAGE_FILE_MACHINE_SH4 = 0x01A6, + + /// + /// Hitachi SH5 + /// + IMAGE_FILE_MACHINE_SH5 = 0x01A8, + + /// + /// Thumb + /// + IMAGE_FILE_MACHINE_THUMB = 0x01C2, + + /// + /// MIPS little-endian WCE v2 + /// + IMAGE_FILE_MACHINE_WCEMIPSV2 = 0x0169, + } + + public enum RelocationType : ushort + { + #region x64 Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_AMD64_ABSOLUTE = 0x0000, + + /// + /// The 64-bit VA of the relocation target. + /// + IMAGE_REL_AMD64_ADDR64 = 0x0001, + + /// + /// The 32-bit VA of the relocation target. + /// + IMAGE_REL_AMD64_ADDR32 = 0x0002, + + /// + /// The 32-bit address without an image base (RVA). + /// + IMAGE_REL_AMD64_ADDR32NB = 0x0003, + + /// + /// The 32-bit relative address from the byte following the relocation. + /// + IMAGE_REL_AMD64_REL32 = 0x0004, + + /// + /// The 32-bit address relative to byte distance 1 from the relocation. + /// + IMAGE_REL_AMD64_REL32_1 = 0x0005, + + /// + /// The 32-bit address relative to byte distance 2 from the relocation. + /// + IMAGE_REL_AMD64_REL32_2 = 0x0006, + + /// + /// The 32-bit address relative to byte distance 3 from the relocation. + /// + IMAGE_REL_AMD64_REL32_3 = 0x0007, + + /// + /// The 32-bit address relative to byte distance 4 from the relocation. + /// + IMAGE_REL_AMD64_REL32_4 = 0x0008, + + /// + /// The 32-bit address relative to byte distance 5 from the relocation. + /// + IMAGE_REL_AMD64_REL32_5 = 0x0009, + + /// + /// The 16-bit section index of the section that contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_AMD64_SECTION = 0x000A, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread + /// local storage. + /// + IMAGE_REL_AMD64_SECREL = 0x000B, + + /// + /// A 7-bit unsigned offset from the base of the section that contains + /// the target. + /// + IMAGE_REL_AMD64_SECREL7 = 0x000C, + + /// + /// CLR tokens. + /// + IMAGE_REL_AMD64_TOKEN = 0x000D, + + /// + /// A 32-bit signed span-dependent value emitted into the object. + /// + IMAGE_REL_AMD64_SREL32 = 0x000E, + + /// + /// A pair that must immediately follow every span-dependent value. + /// + IMAGE_REL_AMD64_PAIR = 0x000F, + + /// + /// A 32-bit signed span-dependent value that is applied at link time. + /// + IMAGE_REL_AMD64_SSPAN32 = 0x0010, + + #endregion + + #region ARM Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_ARM_ABSOLUTE = 0x0000, + + /// + /// The 32-bit VA of the target. + /// + IMAGE_REL_ARM_ADDR32 = 0x0001, + + /// + /// The 32-bit RVA of the target. + /// + IMAGE_REL_ARM_ADDR32NB = 0x0002, + + /// + /// The 24-bit relative displacement to the target. + /// + IMAGE_REL_ARM_BRANCH24 = 0x0003, + + /// + /// The reference to a subroutine call. The reference + /// consists of two 16-bit instructions with 11-bit offsets. + /// + IMAGE_REL_ARM_BRANCH11 = 0x0004, + + /// + /// The 32-bit relative address from the byte following the relocation. + /// + IMAGE_REL_ARM_REL32 = 0x000A, + + /// + /// The 16-bit section index of the section that contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_ARM_SECTION = 0x000E, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread + /// local storage. + /// + IMAGE_REL_ARM_SECREL = 0x000F, + + /// + /// The 32-bit VA of the target.This relocation is applied using a MOVW + /// instruction for the low 16 bits followed by a MOVT for the high 16 bits. + /// + IMAGE_REL_ARM_MOV32 = 0x0010, + + /// + /// The 32-bit VA of the target.This relocation is applied using a MOVW + /// instruction for the low 16 bits followed by a MOVT for the high 16 bits. + /// + IMAGE_REL_THUMB_MOV32 = 0x0011, + + /// + /// The instruction is fixed up with the 21 - bit relative displacement to + /// the 2-byte aligned target. The least significant bit of the displacement + /// is always zero and is not stored. This relocation corresponds to a + /// Thumb-2 32-bit conditional B instruction. + /// + IMAGE_REL_THUMB_BRANCH20 = 0x0012, + + Unused = 0x0013, + + /// + /// The instruction is fixed up with the 25-bit relative displacement to + /// the 2-byte aligned target. The least significant bit of the displacement + /// is zero and is not stored. This relocation corresponds to a Thumb-2 B + /// instruction. + /// + IMAGE_REL_THUMB_BRANCH24 = 0x0014, + + /// + /// The instruction is fixed up with the 25-bit relative displacement to + /// the 4-byte aligned target. The low 2 bits of the displacement are zero + /// and are not stored. This relocation corresponds to a Thumb-2 BLX instruction. + /// + IMAGE_REL_THUMB_BLX23 = 0x0015, + + /// + /// The relocation is valid only when it immediately follows a ARM_REFHI or + /// THUMB_REFHI. Its SymbolTableIndex contains a displacement and not an index + /// into the symbol table. + /// + IMAGE_REL_ARM_PAIR = 0x0016, + + #endregion + + #region ARM64 Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_ARM64_ABSOLUTE = 0x0000, + + /// + /// The 32-bit VA of the target. + /// + IMAGE_REL_ARM64_ADDR32 = 0x0001, + + /// + /// The 32-bit RVA of the target. + /// + IMAGE_REL_ARM64_ADDR32NB = 0x0002, + + /// + /// The 26-bit relative displacement to the target, for B and BL instructions. + /// + IMAGE_REL_ARM64_BRANCH26 = 0x0003, + + /// + /// The page base of the target, for ADRP instruction. + /// + IMAGE_REL_ARM64_PAGEBASE_REL21 = 0x0004, + + /// + /// The 12-bit relative displacement to the target, for instruction ADR + /// + IMAGE_REL_ARM64_REL21 = 0x0005, + + /// + /// The 12-bit page offset of the target, for instructions ADD/ADDS (immediate) + /// with zero shift. + /// + IMAGE_REL_ARM64_PAGEOFFSET_12A = 0x0006, + + /// + /// The 12-bit page offset of the target, for instruction LDR (indexed, + /// unsigned immediate). + /// + IMAGE_REL_ARM64_PAGEOFFSET_12L = 0x0007, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread local storage. + /// + IMAGE_REL_ARM64_SECREL = 0x0008, + + /// + /// Bit 0:11 of section offset of the target, for instructions ADD/ADDS(immediate) + /// with zero shift. + /// + IMAGE_REL_ARM64_SECREL_LOW12A = 0x0009, + + /// + /// Bit 12:23 of section offset of the target, for instructions ADD/ADDS(immediate) + /// with zero shift. + /// + IMAGE_REL_ARM64_SECREL_HIGH12A = 0x000A, + + /// + /// Bit 0:11 of section offset of the target, for instruction LDR(indexed, + /// unsigned immediate). + /// + IMAGE_REL_ARM64_SECREL_LOW12L = 0x000B, + + /// + /// CLR token. + /// + IMAGE_REL_ARM64_TOKEN = 0x000C, + + /// + /// The 16-bit section index of the section that contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_ARM64_SECTION = 0x000D, + + /// + /// The 64-bit VA of the relocation target. + /// + IMAGE_REL_ARM64_ADDR64 = 0x000E, + + /// + /// The 19-bit offset to the relocation target, for conditional B instruction. + /// + IMAGE_REL_ARM64_BRANCH19 = 0x000F, + + /// + /// The 14-bit offset to the relocation target, for instructions TBZ and TBNZ. + /// + IMAGE_REL_ARM64_BRANCH14 = 0x0010, + + /// + /// The 32-bit relative address from the byte following the relocation. + /// + IMAGE_REL_ARM64_REL32 = 0x0011, + + #endregion + + #region Hitachi SuperH Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_SH3_ABSOLUTE = 0x0000, + + /// + /// A reference to the 16-bit location that contains the VA of + /// the target symbol. + /// + IMAGE_REL_SH3_DIRECT16 = 0x0001, + + /// + /// The 32-bit VA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT32 = 0x0002, + + /// + /// A reference to the 8-bit location that contains the VA of + /// the target symbol. + /// + IMAGE_REL_SH3_DIRECT8 = 0x0003, + + /// + /// A reference to the 8-bit instruction that contains the + /// effective 16-bit VA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT8_WORD = 0x0004, + + /// + /// A reference to the 8-bit instruction that contains the + /// effective 32-bit VA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT8_LONG = 0x0005, + + /// + /// A reference to the 8-bit location whose low 4 bits contain + /// the VA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT4 = 0x0006, + + /// + /// A reference to the 8-bit instruction whose low 4 bits contain + /// the effective 16-bit VA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT4_WORD = 0x0007, + + /// + /// A reference to the 8-bit instruction whose low 4 bits contain + /// the effective 32-bit VA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT4_LONG = 0x0008, + + /// + /// A reference to the 8-bit instruction that contains the + /// effective 16-bit relative offset of the target symbol. + /// + IMAGE_REL_SH3_PCREL8_WORD = 0x0009, + + /// + /// A reference to the 8-bit instruction that contains the + /// effective 32-bit relative offset of the target symbol. + /// + IMAGE_REL_SH3_PCREL8_LONG = 0x000A, + + /// + /// A reference to the 16-bit instruction whose low 12 bits contain + /// the effective 16-bit relative offset of the target symbol. + /// + IMAGE_REL_SH3_PCREL12_WORD = 0x000B, + + /// + /// A reference to a 32-bit location that is the VA of the + /// section that contains the target symbol. + /// + IMAGE_REL_SH3_STARTOF_SECTION = 0x000C, + + /// + /// A reference to the 32-bit location that is the size of the + /// section that contains the target symbol. + /// + IMAGE_REL_SH3_SIZEOF_SECTION = 0x000D, + + /// + /// The 16-bit section index of the section that contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_SH3_SECTION = 0x000E, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread + /// local storage. + /// + IMAGE_REL_SH3_SECREL = 0x000F, + + /// + /// The 32-bit RVA of the target symbol. + /// + IMAGE_REL_SH3_DIRECT32_NB = 0x0010, + + /// + /// GP relative. + /// + IMAGE_REL_SH3_GPREL4_LONG = 0x0011, + + /// + /// CLR token. + /// + IMAGE_REL_SH3_TOKEN = 0x0012, + + /// + /// The offset from the current instruction in longwords. If the NOMODE + /// bit is not set, insert the inverse of the low bit at bit 32 to + /// select PTA or PTB. + /// + IMAGE_REL_SHM_PCRELPT = 0x0013, + + /// + /// The low 16 bits of the 32-bit address. + /// + IMAGE_REL_SHM_REFLO = 0x0014, + + /// + /// The high 16 bits of the 32-bit address. + /// + IMAGE_REL_SHM_REFHALF = 0x0015, + + /// + /// The low 16 bits of the relative address. + /// + IMAGE_REL_SHM_RELLO = 0x0016, + + /// + /// The high 16 bits of the relative address. + /// + IMAGE_REL_SHM_RELHALF = 0x0017, + + /// + /// The relocation is valid only when it immediately follows a REFHALF, + /// RELHALF, or RELLO relocation. The SymbolTableIndex field of the + /// relocation contains a displacement and not an index into the symbol table. + /// + IMAGE_REL_SHM_PAIR = 0x0018, + + /// + /// The relocation ignores section mode. + /// + IMAGE_REL_SHM_NOMODE = 0x8000, + + #endregion + + #region IBM PowerPC Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_PPC_ABSOLUTE = 0x0000, + + /// + /// The 64-bit VA of the target. + /// + IMAGE_REL_PPC_ADDR64 = 0x0001, + + /// + /// The 32-bit VA of the target. + /// + IMAGE_REL_PPC_ADDR32 = 0x0002, + + /// + /// The low 24 bits of the VA of the target. This is valid only when + /// the target symbol is absolute and can be sign-extended to its + /// original value. + /// + IMAGE_REL_PPC_ADDR24 = 0x0003, + + /// + /// The low 16 bits of the target's VA. + /// + IMAGE_REL_PPC_ADDR16 = 0x0004, + + /// + /// The low 14 bits of the target's VA. This is valid only when the + /// target symbol is absolute and can be sign-extended to its original + /// value. + /// + IMAGE_REL_PPC_ADDR14 = 0x0005, + + /// + /// A 24-bit PC-relative offset to the symbol's location. + /// + IMAGE_REL_PPC_REL24 = 0x0006, + + /// + /// A 14-bit PC-relative offset to the symbol's location. + /// + IMAGE_REL_PPC_REL14 = 0x0007, + + /// + /// The 32-bit RVA of the target. + /// + IMAGE_REL_PPC_ADDR32NB = 0x000A, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread + /// local storage. + /// + IMAGE_REL_PPC_SECREL = 0x000B, + + /// + /// The 16-bit section index of the section that contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_PPC_SECTION = 0x000C, + + /// + /// The 16-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread + /// local storage. + /// + IMAGE_REL_PPC_SECREL16 = 0x000F, + + /// + /// The high 16 bits of the target's 32-bit VA. This is used for the + /// first instruction in a two-instruction sequence that loads a full + /// address. This relocation must be immediately followed by a PAIR + /// relocation whose SymbolTableIndex contains a signed 16-bit + /// displacement that is added to the upper 16 bits that was taken + /// from the location that is being relocated. + /// + IMAGE_REL_PPC_REFHI = 0x0010, + + /// + /// The low 16 bits of the target's VA. + /// + IMAGE_REL_PPC_REFLO = 0x0011, + + /// + /// A relocation that is valid only when it immediately follows a REFHI + /// or SECRELHI relocation. Its SymbolTableIndex contains a displacement + /// and not an index into the symbol table. + /// + IMAGE_REL_PPC_PAIR = 0x0012, + + /// + /// The low 16 bits of the 32-bit offset of the target from the beginning + /// of its section. + /// + IMAGE_REL_PPC_SECRELLO = 0x0013, + + /// + /// The 16-bit signed displacement of the target relative to the GP register. + /// + IMAGE_REL_PPC_GPREL = 0x0015, + + /// + /// The CLR token. + /// + IMAGE_REL_PPC_TOKEN = 0x0016, + + #endregion + + #region Intel 386 Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_I386_ABSOLUTE = 0x0000, + + /// + /// Not supported. + /// + IMAGE_REL_I386_DIR16 = 0x0001, + + /// + /// Not supported. + /// + IMAGE_REL_I386_REL16 = 0x0002, + + /// + /// The target's 32-bit VA. + /// + IMAGE_REL_I386_DIR32 = 0x0006, + + /// + /// The target's 32-bit RVA. + /// + IMAGE_REL_I386_DIR32NB = 0x0007, + + /// + /// Not supported. + /// + IMAGE_REL_I386_SEG12 = 0x0009, + + /// + /// The 16-bit section index of the section that contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_I386_SECTION = 0x000A, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread + /// local storage. + /// + IMAGE_REL_I386_SECREL = 0x000B, + + /// + /// The CLR token. + /// + IMAGE_REL_I386_TOKEN = 0x000C, + + /// + /// A 7-bit offset from the base of the section that contains the target. + /// + IMAGE_REL_I386_SECREL7 = 0x000D, + + /// + /// The 32-bit relative displacement to the target.This supports the x86 relative branch and call instructions. + /// + IMAGE_REL_I386_REL32 = 0x0014, + + #endregion + + #region Intel Itanium Processor Family (IPF) + + /// + /// The relocation is ignored. + /// + IMAGE_REL_IA64_ABSOLUTE = 0x0000, + + /// + /// The instruction relocation can be followed by an ADDEND relocation whose value is + /// added to the target address before it is inserted into the specified slot in the + /// IMM14 bundle. The relocation target must be absolute or the image must be fixed. + /// + IMAGE_REL_IA64_IMM14 = 0x0001, + + /// + /// The instruction relocation can be followed by an ADDEND relocation whose value is + /// added to the target address before it is inserted into the specified slot in the + /// IMM22 bundle. The relocation target must be absolute or the image must be fixed. + /// + IMAGE_REL_IA64_IMM22 = 0x0002, + + /// + /// The slot number of this relocation must be one (1). The relocation can be followed + /// by an ADDEND relocation whose value is added to the target address before it is + /// stored in all three slots of the IMM64 bundle. + /// + IMAGE_REL_IA64_IMM64 = 0x0003, + + /// + /// The target's 32-bit VA. This is supported only for /LARGEADDRESSAWARE:NO images. + /// + IMAGE_REL_IA64_DIR32 = 0x0004, + + /// + /// The target's 64-bit VA. + /// + IMAGE_REL_IA64_DIR64 = 0x0005, + + /// + /// The instruction is fixed up with the 25-bit relative displacement to the 16-bit + /// aligned target. The low 4 bits of the displacement are zero and are not stored. + /// + IMAGE_REL_IA64_PCREL21B = 0x0006, + + /// + /// The instruction is fixed up with the 25-bit relative displacement to the 16-bit + /// aligned target. The low 4 bits of the displacement, which are zero, are not stored. + /// + IMAGE_REL_IA64_PCREL21M = 0x0007, + + /// + /// The LSBs of this relocation's offset must contain the slot number whereas the rest + /// is the bundle address. The bundle is fixed up with the 25-bit relative displacement + /// to the 16-bit aligned target. The low 4 bits of the displacement are zero and are + /// not stored. + /// + IMAGE_REL_IA64_PCREL21F = 0x0008, + + /// + /// The instruction relocation can be followed by an ADDEND relocation whose value is + /// added to the target address and then a 22-bit GP-relative offset that is calculated + /// and applied to the GPREL22 bundle. + /// + IMAGE_REL_IA64_GPREL22 = 0x0009, + + /// + /// The instruction is fixed up with the 22-bit GP-relative offset to the target symbol's + /// literal table entry. The linker creates this literal table entry based on this + /// relocation and the ADDEND relocation that might follow. + /// + IMAGE_REL_IA64_LTOFF22 = 0x000A, + + /// + /// The 16-bit section index of the section contains the target. This is used to support + /// debugging information. + /// + IMAGE_REL_IA64_SECTION = 0x000B, + + /// + /// The instruction is fixed up with the 22-bit offset of the target from the beginning of + /// its section.This relocation can be followed immediately by an ADDEND relocation, + /// whose Value field contains the 32-bit unsigned offset of the target from the beginning + /// of the section. + /// + IMAGE_REL_IA64_SECREL22 = 0x000C, + + /// + /// The slot number for this relocation must be one (1). The instruction is fixed up with + /// the 64-bit offset of the target from the beginning of its section. This relocation can + /// be followed immediately by an ADDEND relocation whose Value field contains the 32-bit + /// unsigned offset of the target from the beginning of the section. + /// + IMAGE_REL_IA64_SECREL64I = 0x000D, + + /// + /// The address of data to be fixed up with the 32-bit offset of the target from the beginning + /// of its section. + /// + IMAGE_REL_IA64_SECREL32 = 0x000E, + + /// + /// The target's 32-bit RVA. + /// + IMAGE_REL_IA64_DIR32NB = 0x0010, + + /// + /// This is applied to a signed 14-bit immediate that contains the difference between two + /// relocatable targets. This is a declarative field for the linker that indicates that the + /// compiler has already emitted this value. + /// + IMAGE_REL_IA64_SREL14 = 0x0011, + + /// + /// This is applied to a signed 22-bit immediate that contains the difference between two + /// relocatable targets. This is a declarative field for the linker that indicates that the + /// compiler has already emitted this value. + /// + IMAGE_REL_IA64_SREL22 = 0x0012, + + /// + /// This is applied to a signed 32-bit immediate that contains the difference between two + /// relocatable values.This is a declarative field for the linker that indicates that the + /// compiler has already emitted this value. + /// + IMAGE_REL_IA64_SREL32 = 0x0013, + + /// + /// This is applied to an unsigned 32-bit immediate that contains the difference between + /// two relocatable values. This is a declarative field for the linker that indicates that + /// the compiler has already emitted this value. + /// + IMAGE_REL_IA64_UREL32 = 0x0014, + + /// + /// A 60-bit PC-relative fixup that always stays as a BRL instruction of an MLX bundle. + /// + IMAGE_REL_IA64_PCREL60X = 0x0015, + + /// + /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, + /// convert the entire bundle to an MBB bundle with NOP. B in slot 1 and a 25-bit BR + /// instruction (with the 4 lowest bits all zero and dropped) in slot 2. + /// + IMAGE_REL_IA64_PCREL60B = 0x0016, + + /// + /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, + /// convert the entire bundle to an MFB bundle with NOP. F in slot 1 and a 25-bit + /// (4 lowest bits all zero and dropped) BR instruction in slot 2. + /// + IMAGE_REL_IA64_PCREL60F = 0x0017, + + /// + /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, + /// convert the entire bundle to an MIB bundle with NOP. I in slot 1 and a 25-bit + /// (4 lowest bits all zero and dropped) BR instruction in slot 2. + /// + IMAGE_REL_IA64_PCREL60I = 0x0018, + + /// + /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, + /// convert the entire bundle to an MMB bundle with NOP. M in slot 1 and a 25-bit + /// (4 lowest bits all zero and dropped) BR instruction in slot 2. + /// + IMAGE_REL_IA64_PCREL60M = 0x0019, + + /// + /// A 64-bit GP-relative fixup. + /// + IMAGE_REL_IA64_IMMGPREL64 = 0x001a, + + /// + /// A CLR token. + /// + IMAGE_REL_IA64_TOKEN = 0x001b, + + /// + /// A 32-bit GP-relative fixup. + /// + IMAGE_REL_IA64_GPREL32 = 0x001c, + + /// + /// The relocation is valid only when it immediately follows one of the following relocations: + /// IMM14, IMM22, IMM64, GPREL22, LTOFF22, LTOFF64, SECREL22, SECREL64I, or SECREL32. + /// Its value contains the addend to apply to instructions within a bundle, not for data. + /// + IMAGE_REL_IA64_ADDEND = 0x001F, + + #endregion + + #region MIPS Processors + + /// + /// The relocation is ignored. + /// + IMAGE_REL_MIPS_ABSOLUTE = 0x0000, + + /// + /// The high 16 bits of the target's 32-bit VA. + /// + IMAGE_REL_MIPS_REFHALF = 0x0001, + + /// + /// The target's 32-bit VA. + /// + IMAGE_REL_MIPS_REFWORD = 0x0002, + + /// + /// The low 26 bits of the target's VA. This supports the MIPS J and JAL instructions. + /// + IMAGE_REL_MIPS_JMPADDR = 0x0003, + + /// + /// The high 16 bits of the target's 32-bit VA. This is used for the first instruction in a + /// two-instruction sequence that loads a full address. This relocation must be immediately + /// followed by a PAIR relocation whose SymbolTableIndex contains a signed 16-bit displacement + /// that is added to the upper 16 bits that are taken from the location that is being relocated. + /// + IMAGE_REL_MIPS_REFHI = 0x0004, + + /// + /// The low 16 bits of the target's VA. + /// + IMAGE_REL_MIPS_REFLO = 0x0005, + + /// + /// A 16-bit signed displacement of the target relative to the GP register. + /// + IMAGE_REL_MIPS_GPREL = 0x0006, + + /// + /// The same as IMAGE_REL_MIPS_GPREL. + /// + IMAGE_REL_MIPS_LITERAL = 0x0007, + + /// + /// The 16-bit section index of the section contains the target. + /// This is used to support debugging information. + /// + IMAGE_REL_MIPS_SECTION = 0x000A, + + /// + /// The 32-bit offset of the target from the beginning of its section. + /// This is used to support debugging information and static thread local storage. + /// + IMAGE_REL_MIPS_SECREL = 0x000B, + + /// + /// The low 16 bits of the 32-bit offset of the target from the beginning of its section. + /// + IMAGE_REL_MIPS_SECRELLO = 0x000C, + + /// + /// The high 16 bits of the 32-bit offset of the target from the beginning of its section. + /// An IMAGE_REL_MIPS_PAIR relocation must immediately follow this one. The SymbolTableIndex + /// of the PAIR relocation contains a signed 16-bit displacement that is added to the upper + /// 16 bits that are taken from the location that is being relocated. + /// + IMAGE_REL_MIPS_SECRELHI = 0x000D, + + /// + /// The low 26 bits of the target's VA. This supports the MIPS16 JAL instruction. + /// + IMAGE_REL_MIPS_JMPADDR16 = 0x0010, + + /// + /// The target's 32-bit RVA. + /// + IMAGE_REL_MIPS_REFWORDNB = 0x0022, + + /// + /// The relocation is valid only when it immediately follows a REFHI or SECRELHI relocation. + /// Its SymbolTableIndex contains a displacement and not an index into the symbol table. + /// + IMAGE_REL_MIPS_PAIR = 0x0025, + + #endregion + + #region Mitsubishi M32R + + /// + /// The relocation is ignored. + /// + IMAGE_REL_M32R_ABSOLUTE = 0x0000, + + /// + /// The target's 32-bit VA. + /// + IMAGE_REL_M32R_ADDR32 = 0x0001, + + /// + /// The target's 32-bit RVA. + /// + IMAGE_REL_M32R_ADDR32NB = 0x0002, + + /// + /// The target's 24-bit VA. + /// + IMAGE_REL_M32R_ADDR24 = 0x0003, + + /// + /// The target's 16-bit offset from the GP register. + /// + IMAGE_REL_M32R_GPREL16 = 0x0004, + + /// + /// The target's 24-bit offset from the program counter (PC), shifted left by + /// 2 bits and sign-extended + /// + IMAGE_REL_M32R_PCREL24 = 0x0005, + + /// + /// The target's 16-bit offset from the PC, shifted left by 2 bits and + /// sign-extended + /// + IMAGE_REL_M32R_PCREL16 = 0x0006, + + /// + /// The target's 8-bit offset from the PC, shifted left by 2 bits and + /// sign-extended + /// + IMAGE_REL_M32R_PCREL8 = 0x0007, + + /// + /// The 16 MSBs of the target VA. + /// + IMAGE_REL_M32R_REFHALF = 0x0008, + + /// + /// The 16 MSBs of the target VA, adjusted for LSB sign extension. This is used for + /// the first instruction in a two-instruction sequence that loads a full 32-bit address. + /// This relocation must be immediately followed by a PAIR relocation whose SymbolTableIndex + /// contains a signed 16-bit displacement that is added to the upper 16 bits that are + /// taken from the location that is being relocated. + /// + IMAGE_REL_M32R_REFHI = 0x0009, + + /// + /// The 16 LSBs of the target VA. + /// + IMAGE_REL_M32R_REFLO = 0x000A, + + /// + /// The relocation must follow the REFHI relocation.Its SymbolTableIndex contains a displacement + /// and not an index into the symbol table. + /// + IMAGE_REL_M32R_PAIR = 0x000B, + + /// + /// The 16-bit section index of the section that contains the target. This is used to support + /// debugging information. + /// + IMAGE_REL_M32R_SECTION = 0x000C, + + /// + /// The 32-bit offset of the target from the beginning of its section.This is used to support + /// debugging information and static thread local storage. + /// + IMAGE_REL_M32R_SECREL = 0x000D, + + /// + /// The CLR token. + /// + IMAGE_REL_M32R_TOKEN = 0x000E, + + #endregion + } + + public enum StorageClass : byte + { + /// + /// A special symbol that represents the end of function, for debugging purposes. + /// + IMAGE_SYM_CLASS_END_OF_FUNCTION = 0xFF, + + /// + /// No assigned storage class. + /// + IMAGE_SYM_CLASS_NULL = 0x00, + + /// + /// The automatic (stack) variable.The Value field specifies the stack frame offset. + /// + IMAGE_SYM_CLASS_AUTOMATIC = 0x01, + + /// + /// A value that Microsoft tools use for external symbols. The Value field indicates + /// the size if the section number is IMAGE_SYM_UNDEFINED (0). If the section number + /// is not zero, then the Value field specifies the offset within the section. + /// + IMAGE_SYM_CLASS_EXTERNAL = 0x02, + + /// + /// The offset of the symbol within the section. If the Value field is zero, then + /// the symbol represents a section name. + /// + IMAGE_SYM_CLASS_STATIC = 0x03, + + /// + /// A register variable.The Value field specifies the register number. + /// + IMAGE_SYM_CLASS_REGISTER = 0x04, + + /// + /// A symbol that is defined externally. + /// + IMAGE_SYM_CLASS_EXTERNAL_DEF = 0x05, + + /// + /// A code label that is defined within the module. The Value field specifies the + /// offset of the symbol within the section. + /// + IMAGE_SYM_CLASS_LABEL = 0x06, + + /// + /// A reference to a code label that is not defined. + /// + IMAGE_SYM_CLASS_UNDEFINED_LABEL = 0x07, + + /// + /// The structure member. The Value field specifies the n th member. + /// + IMAGE_SYM_CLASS_MEMBER_OF_STRUCT = 0x08, + + /// + /// A formal argument (parameter) of a function. The Value field specifies the + /// n th argument. + /// + IMAGE_SYM_CLASS_ARGUMENT = 0x09, + + /// + /// The structure tag-name entry. + /// + IMAGE_SYM_CLASS_STRUCT_TAG = 0x0A, + + /// + /// A union member. The Value field specifies the n th member. + /// + IMAGE_SYM_CLASS_MEMBER_OF_UNION = 0x0B, + + /// + /// The Union tag-name entry. + /// + IMAGE_SYM_CLASS_UNION_TAG = 0x0C, + + /// + /// A Typedef entry. + /// + IMAGE_SYM_CLASS_TYPE_DEFINITION = 0x0D, + + /// + /// A static data declaration. + /// + IMAGE_SYM_CLASS_UNDEFINED_STATIC = 0x0E, + + /// + /// An enumerated type tagname entry. + /// + IMAGE_SYM_CLASS_ENUM_TAG = 0x0F, + + /// + /// A member of an enumeration. The Value field specifies the + /// n th member. + /// + IMAGE_SYM_CLASS_MEMBER_OF_ENUM = 0x10, + + /// + /// A register parameter. + /// + IMAGE_SYM_CLASS_REGISTER_PARAM = 0x11, + + /// + /// A bit-field reference. The Value field specifies the + /// n th bit in the bit field. + /// + IMAGE_SYM_CLASS_BIT_FIELD = 0x12, + + /// + /// A .bb (beginning of block) or .eb (end of block) record. + /// The Value field is the relocatable address of the code location. + /// + IMAGE_SYM_CLASS_BLOCK = 0x64, + + /// + /// A value that Microsoft tools use for symbol records that define the extent + /// of a function: begin function (.bf ), end function (.ef), and lines in + /// function (.lf). For .lf records, the Value field gives the number of source + /// lines in the function. For .ef records, the Value field gives the size of + /// the function code. + /// + IMAGE_SYM_CLASS_FUNCTION = 0x65, + + /// + /// An end-of-structure entry. + /// + IMAGE_SYM_CLASS_END_OF_STRUCT = 0x66, + + /// + /// A value that Microsoft tools, as well as traditional COFF format, use for the + /// source-file symbol record. The symbol is followed by auxiliary records that + /// name the file. + /// + IMAGE_SYM_CLASS_FILE = 0x67, + + /// + /// A definition of a section (Microsoft tools use STATIC storage class instead). + /// + IMAGE_SYM_CLASS_SECTION = 0x68, + + /// + /// A weak external.For more information, see Auxiliary Format 3: Weak Externals. + /// + IMAGE_SYM_CLASS_WEAK_EXTERNAL = 0x69, + + /// + /// A CLR token symbol. The name is an ASCII string that consists of the hexadecimal + /// value of the token. For more information, see CLR Token Definition (Object Only). + /// + IMAGE_SYM_CLASS_CLR_TOKEN = 0x6A, + } + + [Flags] + public enum SymbolType : ushort + { + #region Simple (Base) Data Type + + /// + /// No type information or unknown base type. Microsoft tools use this setting + /// + IMAGE_SYM_TYPE_NULL = 0x00, + + /// + /// No valid type; used with void pointers and functions + /// + IMAGE_SYM_TYPE_VOID = 0x01, + + /// + /// A character (signed byte) + /// + IMAGE_SYM_TYPE_CHAR = 0x02, + + /// + /// A 2-byte signed integer + /// + IMAGE_SYM_TYPE_SHORT = 0x03, + + /// + /// A natural integer type (normally 4 bytes in Windows) + /// + IMAGE_SYM_TYPE_INT = 0x04, + + /// + /// A 4-byte signed integer + /// + IMAGE_SYM_TYPE_LONG = 0x05, + + /// + /// A 4-byte floating-point number + /// + IMAGE_SYM_TYPE_FLOAT = 0x06, + + /// + /// An 8-byte floating-point number + /// + IMAGE_SYM_TYPE_DOUBLE = 0x07, + + /// + /// A structure + /// + IMAGE_SYM_TYPE_STRUCT = 0x08, + + /// + /// A union + /// + IMAGE_SYM_TYPE_UNION = 0x09, + + /// + /// An enumerated type + /// + IMAGE_SYM_TYPE_ENUM = 0x0A, + + /// + /// A member of enumeration (a specific value) + /// + IMAGE_SYM_TYPE_MOE = 0x0B, + + /// + /// A byte; unsigned 1-byte integer + /// + IMAGE_SYM_TYPE_BYTE = 0x0C, + + /// + /// A word; unsigned 2-byte integer + /// + IMAGE_SYM_TYPE_WORD = 0x0D, + + /// + /// An unsigned integer of natural size (normally, 4 bytes) + /// + IMAGE_SYM_TYPE_UINT = 0x0E, + + /// + /// An unsigned 4-byte integer + /// + IMAGE_SYM_TYPE_DWORD = 0x0F, + + #endregion + + #region Complex Type + + /// + /// The symbol is a pointer to base type + /// + IMAGE_SYM_DTYPE_POINTER = 0x10, + + /// + /// The symbol is a function that returns a base type + /// + IMAGE_SYM_DTYPE_FUNCTION = 0x20, + + /// + /// The symbol is an array of base type + /// + IMAGE_SYM_DTYPE_ARRAY = 0x30, + + #endregion + } +} diff --git a/SabreTools.Models/PortableExecutable/COFFFileHeader.cs b/SabreTools.Models/COFF/FileHeader.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFFileHeader.cs rename to SabreTools.Models/COFF/FileHeader.cs index 972a860..af2ccbb 100644 --- a/SabreTools.Models/PortableExecutable/COFFFileHeader.cs +++ b/SabreTools.Models/COFF/FileHeader.cs @@ -1,6 +1,6 @@ using System.Runtime.InteropServices; -namespace SabreTools.Models.PortableExecutable +namespace SabreTools.Models.COFF { /// /// At the beginning of an object file, or immediately after the signature @@ -9,7 +9,7 @@ namespace SabreTools.Models.PortableExecutable /// /// [StructLayout(LayoutKind.Sequential)] - public sealed class COFFFileHeader + public sealed class FileHeader { /// /// The number that identifies the type of target machine. diff --git a/SabreTools.Models/PortableExecutable/COFFLineNumber.cs b/SabreTools.Models/COFF/LineNumber.cs similarity index 95% rename from SabreTools.Models/PortableExecutable/COFFLineNumber.cs rename to SabreTools.Models/COFF/LineNumber.cs index ed4becd..56fed00 100644 --- a/SabreTools.Models/PortableExecutable/COFFLineNumber.cs +++ b/SabreTools.Models/COFF/LineNumber.cs @@ -1,6 +1,6 @@ using System.Runtime.InteropServices; -namespace SabreTools.Models.PortableExecutable +namespace SabreTools.Models.COFF { /// /// COFF line numbers are no longer produced and, in the future, will @@ -17,7 +17,7 @@ namespace SabreTools.Models.PortableExecutable /// /// [StructLayout(LayoutKind.Explicit)] - public sealed class COFFLineNumber + public sealed class LineNumber { /// /// Used when Linenumber is zero: index to symbol table entry for a function. diff --git a/SabreTools.Models/PortableExecutable/COFFRelocation.cs b/SabreTools.Models/COFF/Relocation.cs similarity index 95% rename from SabreTools.Models/PortableExecutable/COFFRelocation.cs rename to SabreTools.Models/COFF/Relocation.cs index da1116c..bd8f2e3 100644 --- a/SabreTools.Models/PortableExecutable/COFFRelocation.cs +++ b/SabreTools.Models/COFF/Relocation.cs @@ -1,6 +1,6 @@ using System.Runtime.InteropServices; -namespace SabreTools.Models.PortableExecutable +namespace SabreTools.Models.COFF { /// /// Object files contain COFF relocations, which specify how the section data @@ -18,7 +18,7 @@ namespace SabreTools.Models.PortableExecutable /// /// [StructLayout(LayoutKind.Sequential)] - public sealed class COFFRelocation + public sealed class Relocation { /// /// The address of the item to which relocation is applied. This is the diff --git a/SabreTools.Models/PortableExecutable/COFFStringTable.cs b/SabreTools.Models/COFF/StringTable.cs similarity index 91% rename from SabreTools.Models/PortableExecutable/COFFStringTable.cs rename to SabreTools.Models/COFF/StringTable.cs index 2e1735c..4bf92ca 100644 --- a/SabreTools.Models/PortableExecutable/COFFStringTable.cs +++ b/SabreTools.Models/COFF/StringTable.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable +namespace SabreTools.Models.COFF { /// /// Immediately following the COFF symbol table is the COFF string table. The @@ -6,7 +6,7 @@ /// COFF header and adding the number of symbols multiplied by the size of a symbol. /// /// - public sealed class COFFStringTable + public sealed class StringTable { /// /// At the beginning of the COFF string table are 4 bytes that contain the diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/BaseEntry.cs b/SabreTools.Models/COFF/SymbolTableEntries/BaseEntry.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/BaseEntry.cs rename to SabreTools.Models/COFF/SymbolTableEntries/BaseEntry.cs index 7694621..96fcf8c 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/BaseEntry.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/BaseEntry.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// The symbol table in this section is inherited from the traditional diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/CLRTokenDefinition.cs b/SabreTools.Models/COFF/SymbolTableEntries/CLRTokenDefinition.cs similarity index 93% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/CLRTokenDefinition.cs rename to SabreTools.Models/COFF/SymbolTableEntries/CLRTokenDefinition.cs index c8098c9..3684f88 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/CLRTokenDefinition.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/CLRTokenDefinition.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// Auxiliary Format 6: CLR Token Definition (Object Only) diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/Descriptor.cs b/SabreTools.Models/COFF/SymbolTableEntries/Descriptor.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/Descriptor.cs rename to SabreTools.Models/COFF/SymbolTableEntries/Descriptor.cs index 4d18142..43de268 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/Descriptor.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/Descriptor.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// Auxiliary Format 2: .bf and .ef Symbols diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/FileRecord.cs b/SabreTools.Models/COFF/SymbolTableEntries/FileRecord.cs similarity index 91% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/FileRecord.cs rename to SabreTools.Models/COFF/SymbolTableEntries/FileRecord.cs index a3e61f1..94d37ff 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/FileRecord.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/FileRecord.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// Auxiliary Format 4: Files diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/FunctionDefinition.cs b/SabreTools.Models/COFF/SymbolTableEntries/FunctionDefinition.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/FunctionDefinition.cs rename to SabreTools.Models/COFF/SymbolTableEntries/FunctionDefinition.cs index acb2205..9356c4e 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/FunctionDefinition.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/FunctionDefinition.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// Auxiliary Format 1: Function Definitions diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/SectionDefinition.cs b/SabreTools.Models/COFF/SymbolTableEntries/SectionDefinition.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/SectionDefinition.cs rename to SabreTools.Models/COFF/SymbolTableEntries/SectionDefinition.cs index f09b6a9..5e168b7 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/SectionDefinition.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/SectionDefinition.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// Auxiliary Format 5: Section Definitions diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/StandardRecord.cs b/SabreTools.Models/COFF/SymbolTableEntries/StandardRecord.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/StandardRecord.cs rename to SabreTools.Models/COFF/SymbolTableEntries/StandardRecord.cs index f7ad845..4d03490 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/StandardRecord.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/StandardRecord.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// A standard record defines a symbol or name. diff --git a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/WeakExternal.cs b/SabreTools.Models/COFF/SymbolTableEntries/WeakExternal.cs similarity index 96% rename from SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/WeakExternal.cs rename to SabreTools.Models/COFF/SymbolTableEntries/WeakExternal.cs index a5aae9f..6729180 100644 --- a/SabreTools.Models/PortableExecutable/COFFSymbolTableEntries/WeakExternal.cs +++ b/SabreTools.Models/COFF/SymbolTableEntries/WeakExternal.cs @@ -1,4 +1,4 @@ -namespace SabreTools.Models.PortableExecutable.COFFSymbolTableEntries +namespace SabreTools.Models.COFF.SymbolTableEntries { /// /// Auxiliary Format 3: Weak Externals diff --git a/SabreTools.Models/PortableExecutable/Enums.cs b/SabreTools.Models/PortableExecutable/Enums.cs index cce2c86..44d85f5 100644 --- a/SabreTools.Models/PortableExecutable/Enums.cs +++ b/SabreTools.Models/PortableExecutable/Enums.cs @@ -172,106 +172,6 @@ namespace SabreTools.Models.PortableExecutable DLL_PROCESS_DETACH = 0, } - [Flags] - public enum Characteristics : ushort - { - /// - /// Image only, Windows CE, and Microsoft Windows NT and later. - /// This indicates that the file does not contain base relocations - /// and must therefore be loaded at its preferred base address. - /// If the base address is not available, the loader reports an - /// error. The default behavior of the linker is to strip base - /// relocations from executable (EXE) files. - /// - IMAGE_FILE_RELOCS_STRIPPED = 0x0001, - - /// - /// Image only. This indicates that the image file is valid and - /// can be run. If this flag is not set, it indicates a linker error. - /// - IMAGE_FILE_EXECUTABLE_IMAGE = 0x0002, - - /// - /// COFF line numbers have been removed. This flag is deprecated - /// and should be zero. - /// - IMAGE_FILE_LINE_NUMS_STRIPPED = 0x0004, - - /// - /// COFF symbol table entries for local symbols have been removed. - /// This flag is deprecated and should be zero. - /// - IMAGE_FILE_LOCAL_SYMS_STRIPPED = 0x0008, - - /// - /// Obsolete. Aggressively trim working set. This flag is deprecated - /// for Windows 2000 and later and must be zero. - /// - IMAGE_FILE_AGGRESSIVE_WS_TRIM = 0x0010, - - /// - /// Application can handle > 2-GB addresses. - /// - IMAGE_FILE_LARGE_ADDRESS_AWARE = 0x0020, - - /// - /// This flag is reserved for future use. - /// - RESERVED = 0x0040, - - /// - /// Little endian: the least significant bit (LSB) precedes the most - /// significant bit (MSB) in memory. This flag is deprecated and - /// should be zero. - /// - IMAGE_FILE_BYTES_REVERSED_LO = 0x0080, - - /// - /// Machine is based on a 32-bit-word architecture. - /// - IMAGE_FILE_32BIT_MACHINE = 0x0100, - - /// - /// Debugging information is removed from the image file. - /// - IMAGE_FILE_DEBUG_STRIPPED = 0x0200, - - /// - /// If the image is on removable media, fully load it and - /// copy it to the swap file. - /// - IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP = 0x0400, - - /// - /// If the image is on network media, fully load it and copy - /// it to the swap file. - /// - IMAGE_FILE_NET_RUN_FROM_SWAP = 0x0800, - - /// - /// The image file is a system file, not a user program. - /// - IMAGE_FILE_SYSTEM = 0x1000, - - /// - /// The image file is a dynamic-link library (DLL). Such files - /// are considered executable files for almost all purposes, - /// although they cannot be directly run. - /// - IMAGE_FILE_DLL = 0x2000, - - /// - /// The file should be run only on a uniprocessor machine. - /// - IMAGE_FILE_UP_SYSTEM_ONLY = 0x4000, - - /// - /// Big endian: the MSB precedes the LSB in memory. This flag - /// is deprecated and should be zero. - /// - IMAGE_FILE_BYTES_REVERSED_HI = 0x8000, - } - public enum COMDATSelect : byte { /// @@ -1044,144 +944,6 @@ namespace SabreTools.Models.PortableExecutable IMPORT_NAME_UNDECORATE = 3, } - public enum MachineType : ushort - { - /// - /// The content of this field is assumed to be applicable to any machine type - /// - IMAGE_FILE_MACHINE_UNKNOWN = 0x0000, - - /// - /// Matsushita AM33 - /// - IMAGE_FILE_MACHINE_AM33 = 0x01D3, - - /// - /// x64 - /// - IMAGE_FILE_MACHINE_AMD64 = 0x8664, - - /// - /// ARM little endian - /// - IMAGE_FILE_MACHINE_ARM = 0x01C0, - - /// - /// ARM64 little endian - /// - IMAGE_FILE_MACHINE_ARM64 = 0xAA64, - - /// - /// ARM Thumb-2 little endian - /// - IMAGE_FILE_MACHINE_ARMNT = 0x01C4, - - /// - /// EFI byte code - /// - IMAGE_FILE_MACHINE_EBC = 0x0EBC, - - /// - /// Intel 386 or later processors and compatible processors - /// - IMAGE_FILE_MACHINE_I386 = 0x014C, - - /// - /// Intel Itanium processor family - /// - IMAGE_FILE_MACHINE_IA64 = 0x0200, - - /// - /// LoongArch 32-bit processor family - /// - IMAGE_FILE_MACHINE_LOONGARCH32 = 0x6232, - - /// - /// LoongArch 64-bit processor family - /// - IMAGE_FILE_MACHINE_LOONGARCH64 = 0x6264, - - /// - /// Mitsubishi M32R little endian - /// - IMAGE_FILE_MACHINE_M32R = 0x9041, - - /// - /// MIPS16 - /// - IMAGE_FILE_MACHINE_MIPS16 = 0x0266, - - /// - /// MIPS with FPU - /// - IMAGE_FILE_MACHINE_MIPSFPU = 0x0366, - - /// - /// MIPS16 with FPU - /// - IMAGE_FILE_MACHINE_MIPSFPU16 = 0x0466, - - /// - /// Power PC little endian - /// - IMAGE_FILE_MACHINE_POWERPC = 0x01F0, - - /// - /// Power PC with floating point support - /// - IMAGE_FILE_MACHINE_POWERPCFP = 0x01F1, - - /// - /// MIPS little endian - /// - IMAGE_FILE_MACHINE_R4000 = 0x0166, - - /// - /// RISC-V 32-bit address space - /// - IMAGE_FILE_MACHINE_RISCV32 = 0x5032, - - /// - /// RISC-V 64-bit address space - /// - IMAGE_FILE_MACHINE_RISCV64 = 0x5064, - - /// - /// RISC-V 128-bit address space - /// - IMAGE_FILE_MACHINE_RISCV128 = 0x5128, - - /// - /// Hitachi SH3 - /// - IMAGE_FILE_MACHINE_SH3 = 0x01A2, - - /// - /// Hitachi SH3 DSP - /// - IMAGE_FILE_MACHINE_SH3DSP = 0x01A3, - - /// - /// Hitachi SH4 - /// - IMAGE_FILE_MACHINE_SH4 = 0x01A6, - - /// - /// Hitachi SH5 - /// - IMAGE_FILE_MACHINE_SH5 = 0x01A8, - - /// - /// Thumb - /// - IMAGE_FILE_MACHINE_THUMB = 0x01C2, - - /// - /// MIPS little-endian WCE v2 - /// - IMAGE_FILE_MACHINE_WCEMIPSV2 = 0x0169, - } - [Flags] public enum MemoryFlags : ushort { @@ -1268,988 +1030,6 @@ namespace SabreTools.Models.PortableExecutable PE32Plus = 0x020B, } - public enum RelocationType : ushort - { - #region x64 Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_AMD64_ABSOLUTE = 0x0000, - - /// - /// The 64-bit VA of the relocation target. - /// - IMAGE_REL_AMD64_ADDR64 = 0x0001, - - /// - /// The 32-bit VA of the relocation target. - /// - IMAGE_REL_AMD64_ADDR32 = 0x0002, - - /// - /// The 32-bit address without an image base (RVA). - /// - IMAGE_REL_AMD64_ADDR32NB = 0x0003, - - /// - /// The 32-bit relative address from the byte following the relocation. - /// - IMAGE_REL_AMD64_REL32 = 0x0004, - - /// - /// The 32-bit address relative to byte distance 1 from the relocation. - /// - IMAGE_REL_AMD64_REL32_1 = 0x0005, - - /// - /// The 32-bit address relative to byte distance 2 from the relocation. - /// - IMAGE_REL_AMD64_REL32_2 = 0x0006, - - /// - /// The 32-bit address relative to byte distance 3 from the relocation. - /// - IMAGE_REL_AMD64_REL32_3 = 0x0007, - - /// - /// The 32-bit address relative to byte distance 4 from the relocation. - /// - IMAGE_REL_AMD64_REL32_4 = 0x0008, - - /// - /// The 32-bit address relative to byte distance 5 from the relocation. - /// - IMAGE_REL_AMD64_REL32_5 = 0x0009, - - /// - /// The 16-bit section index of the section that contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_AMD64_SECTION = 0x000A, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread - /// local storage. - /// - IMAGE_REL_AMD64_SECREL = 0x000B, - - /// - /// A 7-bit unsigned offset from the base of the section that contains - /// the target. - /// - IMAGE_REL_AMD64_SECREL7 = 0x000C, - - /// - /// CLR tokens. - /// - IMAGE_REL_AMD64_TOKEN = 0x000D, - - /// - /// A 32-bit signed span-dependent value emitted into the object. - /// - IMAGE_REL_AMD64_SREL32 = 0x000E, - - /// - /// A pair that must immediately follow every span-dependent value. - /// - IMAGE_REL_AMD64_PAIR = 0x000F, - - /// - /// A 32-bit signed span-dependent value that is applied at link time. - /// - IMAGE_REL_AMD64_SSPAN32 = 0x0010, - - #endregion - - #region ARM Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_ARM_ABSOLUTE = 0x0000, - - /// - /// The 32-bit VA of the target. - /// - IMAGE_REL_ARM_ADDR32 = 0x0001, - - /// - /// The 32-bit RVA of the target. - /// - IMAGE_REL_ARM_ADDR32NB = 0x0002, - - /// - /// The 24-bit relative displacement to the target. - /// - IMAGE_REL_ARM_BRANCH24 = 0x0003, - - /// - /// The reference to a subroutine call. The reference - /// consists of two 16-bit instructions with 11-bit offsets. - /// - IMAGE_REL_ARM_BRANCH11 = 0x0004, - - /// - /// The 32-bit relative address from the byte following the relocation. - /// - IMAGE_REL_ARM_REL32 = 0x000A, - - /// - /// The 16-bit section index of the section that contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_ARM_SECTION = 0x000E, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread - /// local storage. - /// - IMAGE_REL_ARM_SECREL = 0x000F, - - /// - /// The 32-bit VA of the target.This relocation is applied using a MOVW - /// instruction for the low 16 bits followed by a MOVT for the high 16 bits. - /// - IMAGE_REL_ARM_MOV32 = 0x0010, - - /// - /// The 32-bit VA of the target.This relocation is applied using a MOVW - /// instruction for the low 16 bits followed by a MOVT for the high 16 bits. - /// - IMAGE_REL_THUMB_MOV32 = 0x0011, - - /// - /// The instruction is fixed up with the 21 - bit relative displacement to - /// the 2-byte aligned target. The least significant bit of the displacement - /// is always zero and is not stored. This relocation corresponds to a - /// Thumb-2 32-bit conditional B instruction. - /// - IMAGE_REL_THUMB_BRANCH20 = 0x0012, - - Unused = 0x0013, - - /// - /// The instruction is fixed up with the 25-bit relative displacement to - /// the 2-byte aligned target. The least significant bit of the displacement - /// is zero and is not stored. This relocation corresponds to a Thumb-2 B - /// instruction. - /// - IMAGE_REL_THUMB_BRANCH24 = 0x0014, - - /// - /// The instruction is fixed up with the 25-bit relative displacement to - /// the 4-byte aligned target. The low 2 bits of the displacement are zero - /// and are not stored. This relocation corresponds to a Thumb-2 BLX instruction. - /// - IMAGE_REL_THUMB_BLX23 = 0x0015, - - /// - /// The relocation is valid only when it immediately follows a ARM_REFHI or - /// THUMB_REFHI. Its SymbolTableIndex contains a displacement and not an index - /// into the symbol table. - /// - IMAGE_REL_ARM_PAIR = 0x0016, - - #endregion - - #region ARM64 Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_ARM64_ABSOLUTE = 0x0000, - - /// - /// The 32-bit VA of the target. - /// - IMAGE_REL_ARM64_ADDR32 = 0x0001, - - /// - /// The 32-bit RVA of the target. - /// - IMAGE_REL_ARM64_ADDR32NB = 0x0002, - - /// - /// The 26-bit relative displacement to the target, for B and BL instructions. - /// - IMAGE_REL_ARM64_BRANCH26 = 0x0003, - - /// - /// The page base of the target, for ADRP instruction. - /// - IMAGE_REL_ARM64_PAGEBASE_REL21 = 0x0004, - - /// - /// The 12-bit relative displacement to the target, for instruction ADR - /// - IMAGE_REL_ARM64_REL21 = 0x0005, - - /// - /// The 12-bit page offset of the target, for instructions ADD/ADDS (immediate) - /// with zero shift. - /// - IMAGE_REL_ARM64_PAGEOFFSET_12A = 0x0006, - - /// - /// The 12-bit page offset of the target, for instruction LDR (indexed, - /// unsigned immediate). - /// - IMAGE_REL_ARM64_PAGEOFFSET_12L = 0x0007, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread local storage. - /// - IMAGE_REL_ARM64_SECREL = 0x0008, - - /// - /// Bit 0:11 of section offset of the target, for instructions ADD/ADDS(immediate) - /// with zero shift. - /// - IMAGE_REL_ARM64_SECREL_LOW12A = 0x0009, - - /// - /// Bit 12:23 of section offset of the target, for instructions ADD/ADDS(immediate) - /// with zero shift. - /// - IMAGE_REL_ARM64_SECREL_HIGH12A = 0x000A, - - /// - /// Bit 0:11 of section offset of the target, for instruction LDR(indexed, - /// unsigned immediate). - /// - IMAGE_REL_ARM64_SECREL_LOW12L = 0x000B, - - /// - /// CLR token. - /// - IMAGE_REL_ARM64_TOKEN = 0x000C, - - /// - /// The 16-bit section index of the section that contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_ARM64_SECTION = 0x000D, - - /// - /// The 64-bit VA of the relocation target. - /// - IMAGE_REL_ARM64_ADDR64 = 0x000E, - - /// - /// The 19-bit offset to the relocation target, for conditional B instruction. - /// - IMAGE_REL_ARM64_BRANCH19 = 0x000F, - - /// - /// The 14-bit offset to the relocation target, for instructions TBZ and TBNZ. - /// - IMAGE_REL_ARM64_BRANCH14 = 0x0010, - - /// - /// The 32-bit relative address from the byte following the relocation. - /// - IMAGE_REL_ARM64_REL32 = 0x0011, - - #endregion - - #region Hitachi SuperH Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_SH3_ABSOLUTE = 0x0000, - - /// - /// A reference to the 16-bit location that contains the VA of - /// the target symbol. - /// - IMAGE_REL_SH3_DIRECT16 = 0x0001, - - /// - /// The 32-bit VA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT32 = 0x0002, - - /// - /// A reference to the 8-bit location that contains the VA of - /// the target symbol. - /// - IMAGE_REL_SH3_DIRECT8 = 0x0003, - - /// - /// A reference to the 8-bit instruction that contains the - /// effective 16-bit VA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT8_WORD = 0x0004, - - /// - /// A reference to the 8-bit instruction that contains the - /// effective 32-bit VA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT8_LONG = 0x0005, - - /// - /// A reference to the 8-bit location whose low 4 bits contain - /// the VA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT4 = 0x0006, - - /// - /// A reference to the 8-bit instruction whose low 4 bits contain - /// the effective 16-bit VA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT4_WORD = 0x0007, - - /// - /// A reference to the 8-bit instruction whose low 4 bits contain - /// the effective 32-bit VA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT4_LONG = 0x0008, - - /// - /// A reference to the 8-bit instruction that contains the - /// effective 16-bit relative offset of the target symbol. - /// - IMAGE_REL_SH3_PCREL8_WORD = 0x0009, - - /// - /// A reference to the 8-bit instruction that contains the - /// effective 32-bit relative offset of the target symbol. - /// - IMAGE_REL_SH3_PCREL8_LONG = 0x000A, - - /// - /// A reference to the 16-bit instruction whose low 12 bits contain - /// the effective 16-bit relative offset of the target symbol. - /// - IMAGE_REL_SH3_PCREL12_WORD = 0x000B, - - /// - /// A reference to a 32-bit location that is the VA of the - /// section that contains the target symbol. - /// - IMAGE_REL_SH3_STARTOF_SECTION = 0x000C, - - /// - /// A reference to the 32-bit location that is the size of the - /// section that contains the target symbol. - /// - IMAGE_REL_SH3_SIZEOF_SECTION = 0x000D, - - /// - /// The 16-bit section index of the section that contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_SH3_SECTION = 0x000E, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread - /// local storage. - /// - IMAGE_REL_SH3_SECREL = 0x000F, - - /// - /// The 32-bit RVA of the target symbol. - /// - IMAGE_REL_SH3_DIRECT32_NB = 0x0010, - - /// - /// GP relative. - /// - IMAGE_REL_SH3_GPREL4_LONG = 0x0011, - - /// - /// CLR token. - /// - IMAGE_REL_SH3_TOKEN = 0x0012, - - /// - /// The offset from the current instruction in longwords. If the NOMODE - /// bit is not set, insert the inverse of the low bit at bit 32 to - /// select PTA or PTB. - /// - IMAGE_REL_SHM_PCRELPT = 0x0013, - - /// - /// The low 16 bits of the 32-bit address. - /// - IMAGE_REL_SHM_REFLO = 0x0014, - - /// - /// The high 16 bits of the 32-bit address. - /// - IMAGE_REL_SHM_REFHALF = 0x0015, - - /// - /// The low 16 bits of the relative address. - /// - IMAGE_REL_SHM_RELLO = 0x0016, - - /// - /// The high 16 bits of the relative address. - /// - IMAGE_REL_SHM_RELHALF = 0x0017, - - /// - /// The relocation is valid only when it immediately follows a REFHALF, - /// RELHALF, or RELLO relocation. The SymbolTableIndex field of the - /// relocation contains a displacement and not an index into the symbol table. - /// - IMAGE_REL_SHM_PAIR = 0x0018, - - /// - /// The relocation ignores section mode. - /// - IMAGE_REL_SHM_NOMODE = 0x8000, - - #endregion - - #region IBM PowerPC Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_PPC_ABSOLUTE = 0x0000, - - /// - /// The 64-bit VA of the target. - /// - IMAGE_REL_PPC_ADDR64 = 0x0001, - - /// - /// The 32-bit VA of the target. - /// - IMAGE_REL_PPC_ADDR32 = 0x0002, - - /// - /// The low 24 bits of the VA of the target. This is valid only when - /// the target symbol is absolute and can be sign-extended to its - /// original value. - /// - IMAGE_REL_PPC_ADDR24 = 0x0003, - - /// - /// The low 16 bits of the target's VA. - /// - IMAGE_REL_PPC_ADDR16 = 0x0004, - - /// - /// The low 14 bits of the target's VA. This is valid only when the - /// target symbol is absolute and can be sign-extended to its original - /// value. - /// - IMAGE_REL_PPC_ADDR14 = 0x0005, - - /// - /// A 24-bit PC-relative offset to the symbol's location. - /// - IMAGE_REL_PPC_REL24 = 0x0006, - - /// - /// A 14-bit PC-relative offset to the symbol's location. - /// - IMAGE_REL_PPC_REL14 = 0x0007, - - /// - /// The 32-bit RVA of the target. - /// - IMAGE_REL_PPC_ADDR32NB = 0x000A, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread - /// local storage. - /// - IMAGE_REL_PPC_SECREL = 0x000B, - - /// - /// The 16-bit section index of the section that contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_PPC_SECTION = 0x000C, - - /// - /// The 16-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread - /// local storage. - /// - IMAGE_REL_PPC_SECREL16 = 0x000F, - - /// - /// The high 16 bits of the target's 32-bit VA. This is used for the - /// first instruction in a two-instruction sequence that loads a full - /// address. This relocation must be immediately followed by a PAIR - /// relocation whose SymbolTableIndex contains a signed 16-bit - /// displacement that is added to the upper 16 bits that was taken - /// from the location that is being relocated. - /// - IMAGE_REL_PPC_REFHI = 0x0010, - - /// - /// The low 16 bits of the target's VA. - /// - IMAGE_REL_PPC_REFLO = 0x0011, - - /// - /// A relocation that is valid only when it immediately follows a REFHI - /// or SECRELHI relocation. Its SymbolTableIndex contains a displacement - /// and not an index into the symbol table. - /// - IMAGE_REL_PPC_PAIR = 0x0012, - - /// - /// The low 16 bits of the 32-bit offset of the target from the beginning - /// of its section. - /// - IMAGE_REL_PPC_SECRELLO = 0x0013, - - /// - /// The 16-bit signed displacement of the target relative to the GP register. - /// - IMAGE_REL_PPC_GPREL = 0x0015, - - /// - /// The CLR token. - /// - IMAGE_REL_PPC_TOKEN = 0x0016, - - #endregion - - #region Intel 386 Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_I386_ABSOLUTE = 0x0000, - - /// - /// Not supported. - /// - IMAGE_REL_I386_DIR16 = 0x0001, - - /// - /// Not supported. - /// - IMAGE_REL_I386_REL16 = 0x0002, - - /// - /// The target's 32-bit VA. - /// - IMAGE_REL_I386_DIR32 = 0x0006, - - /// - /// The target's 32-bit RVA. - /// - IMAGE_REL_I386_DIR32NB = 0x0007, - - /// - /// Not supported. - /// - IMAGE_REL_I386_SEG12 = 0x0009, - - /// - /// The 16-bit section index of the section that contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_I386_SECTION = 0x000A, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread - /// local storage. - /// - IMAGE_REL_I386_SECREL = 0x000B, - - /// - /// The CLR token. - /// - IMAGE_REL_I386_TOKEN = 0x000C, - - /// - /// A 7-bit offset from the base of the section that contains the target. - /// - IMAGE_REL_I386_SECREL7 = 0x000D, - - /// - /// The 32-bit relative displacement to the target.This supports the x86 relative branch and call instructions. - /// - IMAGE_REL_I386_REL32 = 0x0014, - - #endregion - - #region Intel Itanium Processor Family (IPF) - - /// - /// The relocation is ignored. - /// - IMAGE_REL_IA64_ABSOLUTE = 0x0000, - - /// - /// The instruction relocation can be followed by an ADDEND relocation whose value is - /// added to the target address before it is inserted into the specified slot in the - /// IMM14 bundle. The relocation target must be absolute or the image must be fixed. - /// - IMAGE_REL_IA64_IMM14 = 0x0001, - - /// - /// The instruction relocation can be followed by an ADDEND relocation whose value is - /// added to the target address before it is inserted into the specified slot in the - /// IMM22 bundle. The relocation target must be absolute or the image must be fixed. - /// - IMAGE_REL_IA64_IMM22 = 0x0002, - - /// - /// The slot number of this relocation must be one (1). The relocation can be followed - /// by an ADDEND relocation whose value is added to the target address before it is - /// stored in all three slots of the IMM64 bundle. - /// - IMAGE_REL_IA64_IMM64 = 0x0003, - - /// - /// The target's 32-bit VA. This is supported only for /LARGEADDRESSAWARE:NO images. - /// - IMAGE_REL_IA64_DIR32 = 0x0004, - - /// - /// The target's 64-bit VA. - /// - IMAGE_REL_IA64_DIR64 = 0x0005, - - /// - /// The instruction is fixed up with the 25-bit relative displacement to the 16-bit - /// aligned target. The low 4 bits of the displacement are zero and are not stored. - /// - IMAGE_REL_IA64_PCREL21B = 0x0006, - - /// - /// The instruction is fixed up with the 25-bit relative displacement to the 16-bit - /// aligned target. The low 4 bits of the displacement, which are zero, are not stored. - /// - IMAGE_REL_IA64_PCREL21M = 0x0007, - - /// - /// The LSBs of this relocation's offset must contain the slot number whereas the rest - /// is the bundle address. The bundle is fixed up with the 25-bit relative displacement - /// to the 16-bit aligned target. The low 4 bits of the displacement are zero and are - /// not stored. - /// - IMAGE_REL_IA64_PCREL21F = 0x0008, - - /// - /// The instruction relocation can be followed by an ADDEND relocation whose value is - /// added to the target address and then a 22-bit GP-relative offset that is calculated - /// and applied to the GPREL22 bundle. - /// - IMAGE_REL_IA64_GPREL22 = 0x0009, - - /// - /// The instruction is fixed up with the 22-bit GP-relative offset to the target symbol's - /// literal table entry. The linker creates this literal table entry based on this - /// relocation and the ADDEND relocation that might follow. - /// - IMAGE_REL_IA64_LTOFF22 = 0x000A, - - /// - /// The 16-bit section index of the section contains the target. This is used to support - /// debugging information. - /// - IMAGE_REL_IA64_SECTION = 0x000B, - - /// - /// The instruction is fixed up with the 22-bit offset of the target from the beginning of - /// its section.This relocation can be followed immediately by an ADDEND relocation, - /// whose Value field contains the 32-bit unsigned offset of the target from the beginning - /// of the section. - /// - IMAGE_REL_IA64_SECREL22 = 0x000C, - - /// - /// The slot number for this relocation must be one (1). The instruction is fixed up with - /// the 64-bit offset of the target from the beginning of its section. This relocation can - /// be followed immediately by an ADDEND relocation whose Value field contains the 32-bit - /// unsigned offset of the target from the beginning of the section. - /// - IMAGE_REL_IA64_SECREL64I = 0x000D, - - /// - /// The address of data to be fixed up with the 32-bit offset of the target from the beginning - /// of its section. - /// - IMAGE_REL_IA64_SECREL32 = 0x000E, - - /// - /// The target's 32-bit RVA. - /// - IMAGE_REL_IA64_DIR32NB = 0x0010, - - /// - /// This is applied to a signed 14-bit immediate that contains the difference between two - /// relocatable targets. This is a declarative field for the linker that indicates that the - /// compiler has already emitted this value. - /// - IMAGE_REL_IA64_SREL14 = 0x0011, - - /// - /// This is applied to a signed 22-bit immediate that contains the difference between two - /// relocatable targets. This is a declarative field for the linker that indicates that the - /// compiler has already emitted this value. - /// - IMAGE_REL_IA64_SREL22 = 0x0012, - - /// - /// This is applied to a signed 32-bit immediate that contains the difference between two - /// relocatable values.This is a declarative field for the linker that indicates that the - /// compiler has already emitted this value. - /// - IMAGE_REL_IA64_SREL32 = 0x0013, - - /// - /// This is applied to an unsigned 32-bit immediate that contains the difference between - /// two relocatable values. This is a declarative field for the linker that indicates that - /// the compiler has already emitted this value. - /// - IMAGE_REL_IA64_UREL32 = 0x0014, - - /// - /// A 60-bit PC-relative fixup that always stays as a BRL instruction of an MLX bundle. - /// - IMAGE_REL_IA64_PCREL60X = 0x0015, - - /// - /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, - /// convert the entire bundle to an MBB bundle with NOP. B in slot 1 and a 25-bit BR - /// instruction (with the 4 lowest bits all zero and dropped) in slot 2. - /// - IMAGE_REL_IA64_PCREL60B = 0x0016, - - /// - /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, - /// convert the entire bundle to an MFB bundle with NOP. F in slot 1 and a 25-bit - /// (4 lowest bits all zero and dropped) BR instruction in slot 2. - /// - IMAGE_REL_IA64_PCREL60F = 0x0017, - - /// - /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, - /// convert the entire bundle to an MIB bundle with NOP. I in slot 1 and a 25-bit - /// (4 lowest bits all zero and dropped) BR instruction in slot 2. - /// - IMAGE_REL_IA64_PCREL60I = 0x0018, - - /// - /// A 60-bit PC-relative fixup. If the target displacement fits in a signed 25-bit field, - /// convert the entire bundle to an MMB bundle with NOP. M in slot 1 and a 25-bit - /// (4 lowest bits all zero and dropped) BR instruction in slot 2. - /// - IMAGE_REL_IA64_PCREL60M = 0x0019, - - /// - /// A 64-bit GP-relative fixup. - /// - IMAGE_REL_IA64_IMMGPREL64 = 0x001a, - - /// - /// A CLR token. - /// - IMAGE_REL_IA64_TOKEN = 0x001b, - - /// - /// A 32-bit GP-relative fixup. - /// - IMAGE_REL_IA64_GPREL32 = 0x001c, - - /// - /// The relocation is valid only when it immediately follows one of the following relocations: - /// IMM14, IMM22, IMM64, GPREL22, LTOFF22, LTOFF64, SECREL22, SECREL64I, or SECREL32. - /// Its value contains the addend to apply to instructions within a bundle, not for data. - /// - IMAGE_REL_IA64_ADDEND = 0x001F, - - #endregion - - #region MIPS Processors - - /// - /// The relocation is ignored. - /// - IMAGE_REL_MIPS_ABSOLUTE = 0x0000, - - /// - /// The high 16 bits of the target's 32-bit VA. - /// - IMAGE_REL_MIPS_REFHALF = 0x0001, - - /// - /// The target's 32-bit VA. - /// - IMAGE_REL_MIPS_REFWORD = 0x0002, - - /// - /// The low 26 bits of the target's VA. This supports the MIPS J and JAL instructions. - /// - IMAGE_REL_MIPS_JMPADDR = 0x0003, - - /// - /// The high 16 bits of the target's 32-bit VA. This is used for the first instruction in a - /// two-instruction sequence that loads a full address. This relocation must be immediately - /// followed by a PAIR relocation whose SymbolTableIndex contains a signed 16-bit displacement - /// that is added to the upper 16 bits that are taken from the location that is being relocated. - /// - IMAGE_REL_MIPS_REFHI = 0x0004, - - /// - /// The low 16 bits of the target's VA. - /// - IMAGE_REL_MIPS_REFLO = 0x0005, - - /// - /// A 16-bit signed displacement of the target relative to the GP register. - /// - IMAGE_REL_MIPS_GPREL = 0x0006, - - /// - /// The same as IMAGE_REL_MIPS_GPREL. - /// - IMAGE_REL_MIPS_LITERAL = 0x0007, - - /// - /// The 16-bit section index of the section contains the target. - /// This is used to support debugging information. - /// - IMAGE_REL_MIPS_SECTION = 0x000A, - - /// - /// The 32-bit offset of the target from the beginning of its section. - /// This is used to support debugging information and static thread local storage. - /// - IMAGE_REL_MIPS_SECREL = 0x000B, - - /// - /// The low 16 bits of the 32-bit offset of the target from the beginning of its section. - /// - IMAGE_REL_MIPS_SECRELLO = 0x000C, - - /// - /// The high 16 bits of the 32-bit offset of the target from the beginning of its section. - /// An IMAGE_REL_MIPS_PAIR relocation must immediately follow this one. The SymbolTableIndex - /// of the PAIR relocation contains a signed 16-bit displacement that is added to the upper - /// 16 bits that are taken from the location that is being relocated. - /// - IMAGE_REL_MIPS_SECRELHI = 0x000D, - - /// - /// The low 26 bits of the target's VA. This supports the MIPS16 JAL instruction. - /// - IMAGE_REL_MIPS_JMPADDR16 = 0x0010, - - /// - /// The target's 32-bit RVA. - /// - IMAGE_REL_MIPS_REFWORDNB = 0x0022, - - /// - /// The relocation is valid only when it immediately follows a REFHI or SECRELHI relocation. - /// Its SymbolTableIndex contains a displacement and not an index into the symbol table. - /// - IMAGE_REL_MIPS_PAIR = 0x0025, - - #endregion - - #region Mitsubishi M32R - - /// - /// The relocation is ignored. - /// - IMAGE_REL_M32R_ABSOLUTE = 0x0000, - - /// - /// The target's 32-bit VA. - /// - IMAGE_REL_M32R_ADDR32 = 0x0001, - - /// - /// The target's 32-bit RVA. - /// - IMAGE_REL_M32R_ADDR32NB = 0x0002, - - /// - /// The target's 24-bit VA. - /// - IMAGE_REL_M32R_ADDR24 = 0x0003, - - /// - /// The target's 16-bit offset from the GP register. - /// - IMAGE_REL_M32R_GPREL16 = 0x0004, - - /// - /// The target's 24-bit offset from the program counter (PC), shifted left by - /// 2 bits and sign-extended - /// - IMAGE_REL_M32R_PCREL24 = 0x0005, - - /// - /// The target's 16-bit offset from the PC, shifted left by 2 bits and - /// sign-extended - /// - IMAGE_REL_M32R_PCREL16 = 0x0006, - - /// - /// The target's 8-bit offset from the PC, shifted left by 2 bits and - /// sign-extended - /// - IMAGE_REL_M32R_PCREL8 = 0x0007, - - /// - /// The 16 MSBs of the target VA. - /// - IMAGE_REL_M32R_REFHALF = 0x0008, - - /// - /// The 16 MSBs of the target VA, adjusted for LSB sign extension. This is used for - /// the first instruction in a two-instruction sequence that loads a full 32-bit address. - /// This relocation must be immediately followed by a PAIR relocation whose SymbolTableIndex - /// contains a signed 16-bit displacement that is added to the upper 16 bits that are - /// taken from the location that is being relocated. - /// - IMAGE_REL_M32R_REFHI = 0x0009, - - /// - /// The 16 LSBs of the target VA. - /// - IMAGE_REL_M32R_REFLO = 0x000A, - - /// - /// The relocation must follow the REFHI relocation.Its SymbolTableIndex contains a displacement - /// and not an index into the symbol table. - /// - IMAGE_REL_M32R_PAIR = 0x000B, - - /// - /// The 16-bit section index of the section that contains the target. This is used to support - /// debugging information. - /// - IMAGE_REL_M32R_SECTION = 0x000C, - - /// - /// The 32-bit offset of the target from the beginning of its section.This is used to support - /// debugging information and static thread local storage. - /// - IMAGE_REL_M32R_SECREL = 0x000D, - - /// - /// The CLR token. - /// - IMAGE_REL_M32R_TOKEN = 0x000E, - - #endregion - } - public enum ResourceType : uint { RT_NEWRESOURCE = 0x2000, @@ -2601,266 +1381,6 @@ namespace SabreTools.Models.PortableExecutable IMAGE_SYM_DEBUG = -2, } - public enum StorageClass : byte - { - /// - /// A special symbol that represents the end of function, for debugging purposes. - /// - IMAGE_SYM_CLASS_END_OF_FUNCTION = 0xFF, - - /// - /// No assigned storage class. - /// - IMAGE_SYM_CLASS_NULL = 0x00, - - /// - /// The automatic (stack) variable.The Value field specifies the stack frame offset. - /// - IMAGE_SYM_CLASS_AUTOMATIC = 0x01, - - /// - /// A value that Microsoft tools use for external symbols. The Value field indicates - /// the size if the section number is IMAGE_SYM_UNDEFINED (0). If the section number - /// is not zero, then the Value field specifies the offset within the section. - /// - IMAGE_SYM_CLASS_EXTERNAL = 0x02, - - /// - /// The offset of the symbol within the section. If the Value field is zero, then - /// the symbol represents a section name. - /// - IMAGE_SYM_CLASS_STATIC = 0x03, - - /// - /// A register variable.The Value field specifies the register number. - /// - IMAGE_SYM_CLASS_REGISTER = 0x04, - - /// - /// A symbol that is defined externally. - /// - IMAGE_SYM_CLASS_EXTERNAL_DEF = 0x05, - - /// - /// A code label that is defined within the module. The Value field specifies the - /// offset of the symbol within the section. - /// - IMAGE_SYM_CLASS_LABEL = 0x06, - - /// - /// A reference to a code label that is not defined. - /// - IMAGE_SYM_CLASS_UNDEFINED_LABEL = 0x07, - - /// - /// The structure member. The Value field specifies the n th member. - /// - IMAGE_SYM_CLASS_MEMBER_OF_STRUCT = 0x08, - - /// - /// A formal argument (parameter) of a function. The Value field specifies the - /// n th argument. - /// - IMAGE_SYM_CLASS_ARGUMENT = 0x09, - - /// - /// The structure tag-name entry. - /// - IMAGE_SYM_CLASS_STRUCT_TAG = 0x0A, - - /// - /// A union member. The Value field specifies the n th member. - /// - IMAGE_SYM_CLASS_MEMBER_OF_UNION = 0x0B, - - /// - /// The Union tag-name entry. - /// - IMAGE_SYM_CLASS_UNION_TAG = 0x0C, - - /// - /// A Typedef entry. - /// - IMAGE_SYM_CLASS_TYPE_DEFINITION = 0x0D, - - /// - /// A static data declaration. - /// - IMAGE_SYM_CLASS_UNDEFINED_STATIC = 0x0E, - - /// - /// An enumerated type tagname entry. - /// - IMAGE_SYM_CLASS_ENUM_TAG = 0x0F, - - /// - /// A member of an enumeration. The Value field specifies the - /// n th member. - /// - IMAGE_SYM_CLASS_MEMBER_OF_ENUM = 0x10, - - /// - /// A register parameter. - /// - IMAGE_SYM_CLASS_REGISTER_PARAM = 0x11, - - /// - /// A bit-field reference. The Value field specifies the - /// n th bit in the bit field. - /// - IMAGE_SYM_CLASS_BIT_FIELD = 0x12, - - /// - /// A .bb (beginning of block) or .eb (end of block) record. - /// The Value field is the relocatable address of the code location. - /// - IMAGE_SYM_CLASS_BLOCK = 0x64, - - /// - /// A value that Microsoft tools use for symbol records that define the extent - /// of a function: begin function (.bf ), end function (.ef), and lines in - /// function (.lf). For .lf records, the Value field gives the number of source - /// lines in the function. For .ef records, the Value field gives the size of - /// the function code. - /// - IMAGE_SYM_CLASS_FUNCTION = 0x65, - - /// - /// An end-of-structure entry. - /// - IMAGE_SYM_CLASS_END_OF_STRUCT = 0x66, - - /// - /// A value that Microsoft tools, as well as traditional COFF format, use for the - /// source-file symbol record. The symbol is followed by auxiliary records that - /// name the file. - /// - IMAGE_SYM_CLASS_FILE = 0x67, - - /// - /// A definition of a section (Microsoft tools use STATIC storage class instead). - /// - IMAGE_SYM_CLASS_SECTION = 0x68, - - /// - /// A weak external.For more information, see Auxiliary Format 3: Weak Externals. - /// - IMAGE_SYM_CLASS_WEAK_EXTERNAL = 0x69, - - /// - /// A CLR token symbol. The name is an ASCII string that consists of the hexadecimal - /// value of the token. For more information, see CLR Token Definition (Object Only). - /// - IMAGE_SYM_CLASS_CLR_TOKEN = 0x6A, - } - - [Flags] - public enum SymbolType : ushort - { - #region Simple (Base) Data Type - - /// - /// No type information or unknown base type. Microsoft tools use this setting - /// - IMAGE_SYM_TYPE_NULL = 0x00, - - /// - /// No valid type; used with void pointers and functions - /// - IMAGE_SYM_TYPE_VOID = 0x01, - - /// - /// A character (signed byte) - /// - IMAGE_SYM_TYPE_CHAR = 0x02, - - /// - /// A 2-byte signed integer - /// - IMAGE_SYM_TYPE_SHORT = 0x03, - - /// - /// A natural integer type (normally 4 bytes in Windows) - /// - IMAGE_SYM_TYPE_INT = 0x04, - - /// - /// A 4-byte signed integer - /// - IMAGE_SYM_TYPE_LONG = 0x05, - - /// - /// A 4-byte floating-point number - /// - IMAGE_SYM_TYPE_FLOAT = 0x06, - - /// - /// An 8-byte floating-point number - /// - IMAGE_SYM_TYPE_DOUBLE = 0x07, - - /// - /// A structure - /// - IMAGE_SYM_TYPE_STRUCT = 0x08, - - /// - /// A union - /// - IMAGE_SYM_TYPE_UNION = 0x09, - - /// - /// An enumerated type - /// - IMAGE_SYM_TYPE_ENUM = 0x0A, - - /// - /// A member of enumeration (a specific value) - /// - IMAGE_SYM_TYPE_MOE = 0x0B, - - /// - /// A byte; unsigned 1-byte integer - /// - IMAGE_SYM_TYPE_BYTE = 0x0C, - - /// - /// A word; unsigned 2-byte integer - /// - IMAGE_SYM_TYPE_WORD = 0x0D, - - /// - /// An unsigned integer of natural size (normally, 4 bytes) - /// - IMAGE_SYM_TYPE_UINT = 0x0E, - - /// - /// An unsigned 4-byte integer - /// - IMAGE_SYM_TYPE_DWORD = 0x0F, - - #endregion - - #region Complex Type - - /// - /// The symbol is a pointer to base type - /// - IMAGE_SYM_DTYPE_POINTER = 0x10, - - /// - /// The symbol is a function that returns a base type - /// - IMAGE_SYM_DTYPE_FUNCTION = 0x20, - - /// - /// The symbol is an array of base type - /// - IMAGE_SYM_DTYPE_ARRAY = 0x30, - - #endregion - } - public enum SymbolDerivedType : byte { /// diff --git a/SabreTools.Models/PortableExecutable/Executable.cs b/SabreTools.Models/PortableExecutable/Executable.cs index 5814097..445ec5b 100644 --- a/SabreTools.Models/PortableExecutable/Executable.cs +++ b/SabreTools.Models/PortableExecutable/Executable.cs @@ -24,7 +24,7 @@ namespace SabreTools.Models.PortableExecutable /// /// COFF file header /// - public COFFFileHeader? COFFFileHeader { get; set; } + public COFF.FileHeader? COFFFileHeader { get; set; } /// /// Optional header @@ -45,12 +45,12 @@ namespace SabreTools.Models.PortableExecutable /// /// COFF symbol table /// - public COFFSymbolTableEntries.BaseEntry[]? COFFSymbolTable { get; set; } + public COFF.SymbolTableEntries.BaseEntry[]? COFFSymbolTable { get; set; } /// /// COFF string table /// - public COFFStringTable? COFFStringTable { get; set; } + public COFF.StringTable? COFFStringTable { get; set; } /// /// Attribute certificate table diff --git a/SabreTools.Models/PortableExecutable/SectionHeader.cs b/SabreTools.Models/PortableExecutable/SectionHeader.cs index 59e9307..4a3d82f 100644 --- a/SabreTools.Models/PortableExecutable/SectionHeader.cs +++ b/SabreTools.Models/PortableExecutable/SectionHeader.cs @@ -100,11 +100,11 @@ /// /// COFF Relocations (Object Only) /// - public COFFRelocation[]? COFFRelocations { get; set; } + public COFF.Relocation[]? COFFRelocations { get; set; } /// /// COFF Line Numbers (Deprecated) /// - public COFFLineNumber[]? COFFLineNumbers { get; set; } + public COFF.LineNumber[]? COFFLineNumbers { get; set; } } }