mirror of
https://github.com/aaru-dps/Aaru.Checksums.Native.git
synced 2025-12-16 11:14:29 +00:00
Implement Fletcher-16 using SSSE3 instructions
This commit is contained in:
JosJuice
@@ -71,6 +71,6 @@ if("${CMAKE_BUILD_TYPE}" MATCHES "Release")
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endif()
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endif()
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add_library("Aaru.Checksums.Native" SHARED adler32.h adler32.c crc16.h crc16.c crc16_ccitt.h crc16_ccitt.c crc32.c crc32.h crc64.c crc64.h fletcher16.h fletcher16.c fletcher32.h fletcher32.c fletcher32_avx2.c fletcher32_neon.c fletcher32_ssse3.c library.h spamsum.c spamsum.h crc32_clmul.c crc64_clmul.c simd.c simd.h adler32_ssse3.c adler32_avx2.c adler32_neon.c crc32_arm_simd.c crc32_vmull.c crc32_simd.h arm_vmull.c arm_vmull.h crc64_vmull.c library.c)
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add_library("Aaru.Checksums.Native" SHARED adler32.h adler32.c crc16.h crc16.c crc16_ccitt.h crc16_ccitt.c crc32.c crc32.h crc64.c crc64.h fletcher16.h fletcher16.c fletcher16_ssse3.c fletcher32.h fletcher32.c fletcher32_avx2.c fletcher32_neon.c fletcher32_ssse3.c library.h spamsum.c spamsum.h crc32_clmul.c crc64_clmul.c simd.c simd.h adler32_ssse3.c adler32_avx2.c adler32_neon.c crc32_arm_simd.c crc32_vmull.c crc32_simd.h arm_vmull.c arm_vmull.h crc64_vmull.c library.c)
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add_subdirectory(tests)
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10
fletcher16.c
10
fletcher16.c
@@ -66,6 +66,16 @@ AARU_EXPORT int AARU_CALL fletcher16_update(fletcher16_ctx *ctx, const uint8_t *
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{
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if(!ctx || !data) return -1;
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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if(have_ssse3())
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{
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fletcher16_ssse3(&ctx->sum1, &ctx->sum2, data, len);
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return 0;
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}
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#endif
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uint32_t sum1 = ctx->sum1;
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uint32_t sum2 = ctx->sum2;
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unsigned n;
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@@ -34,4 +34,11 @@ AARU_EXPORT int AARU_CALL fletcher16_update(fletcher16_ctx *ctx, const uint8_t *
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AARU_EXPORT int AARU_CALL fletcher16_final(fletcher16_ctx *ctx, uint16_t *checksum);
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AARU_EXPORT void AARU_CALL fletcher16_free(fletcher16_ctx *ctx);
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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AARU_EXPORT TARGET_WITH_SSSE3 void AARU_CALL fletcher16_ssse3(uint8_t* sum1, uint8_t* sum2, const uint8_t* data, long len);
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#endif
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#endif // AARU_CHECKSUMS_NATIVE_FLETCHER16_H
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161
fletcher16_ssse3.c
Normal file
161
fletcher16_ssse3.c
Normal file
@@ -0,0 +1,161 @@
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/*
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* This file is part of the Aaru Data Preservation Suite.
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* Copyright (c) 2019-2023 Natalia Portillo.
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* Copyright 2017 The Chromium Authors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Google Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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#include <stdint.h>
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#include <tmmintrin.h>
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#include "library.h"
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#include "fletcher16.h"
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/**
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* @brief Calculate Fletcher-16 checksum for a given data using SSSE3 instructions.
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*
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* This function calculates the Fletcher-16 checksum for a block of data using SSSE3 vector instructions.
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*
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* @param sum1 Pointer to the variable where the first 8-bit checksum value is stored.
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* @param sum2 Pointer to the variable where the second 8-bit checksum value is stored.
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* @param data Pointer to the data buffer.
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* @param len Length of the data buffer in bytes.
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*/
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AARU_EXPORT TARGET_WITH_SSSE3 void AARU_CALL
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fletcher16_ssse3(uint8_t *sum1, uint8_t *sum2, const uint8_t *data, long len)
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{
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uint32_t s1 = *sum1;
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uint32_t s2 = *sum2;
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/*
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* Process the data in blocks.
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*/
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const unsigned BLOCK_SIZE = 1 << 5;
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long blocks = len / BLOCK_SIZE;
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len -= blocks * BLOCK_SIZE;
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while(blocks)
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{
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unsigned n = NMAX / BLOCK_SIZE; /* The NMAX constraint. */
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if(n > blocks) n = (unsigned)blocks;
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blocks -= n;
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const __m128i tap1 = _mm_setr_epi8(32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17);
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const __m128i tap2 = _mm_setr_epi8(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1);
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const __m128i zero = _mm_setr_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
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const __m128i ones = _mm_set_epi16(1, 1, 1, 1, 1, 1, 1, 1);
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/*
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* Process n blocks of data. At most NMAX data bytes can be
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* processed before s2 must be reduced modulo BASE.
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*/
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__m128i v_ps = _mm_set_epi32(0, 0, 0, s1 * n);
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__m128i v_s2 = _mm_set_epi32(0, 0, 0, s2);
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__m128i v_s1 = _mm_set_epi32(0, 0, 0, 0);
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do
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{
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/*
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* Load 32 input bytes.
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*/
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const __m128i bytes1 = _mm_loadu_si128((__m128i *)(data));
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const __m128i bytes2 = _mm_loadu_si128((__m128i *)(data + 16));
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/*
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* Add previous block byte sum to v_ps.
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*/
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v_ps = _mm_add_epi32(v_ps, v_s1);
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/*
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* Horizontally add the bytes for s1, multiply-adds the
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* bytes by [ 32, 31, 30, ... ] for s2.
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*/
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v_s1 = _mm_add_epi32(v_s1, _mm_sad_epu8(bytes1, zero));
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const __m128i mad1 = _mm_maddubs_epi16(bytes1, tap1);
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v_s2 = _mm_add_epi32(v_s2, _mm_madd_epi16(mad1, ones));
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v_s1 = _mm_add_epi32(v_s1, _mm_sad_epu8(bytes2, zero));
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const __m128i mad2 = _mm_maddubs_epi16(bytes2, tap2);
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v_s2 = _mm_add_epi32(v_s2, _mm_madd_epi16(mad2, ones));
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data += BLOCK_SIZE;
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}
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while(--n);
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v_s2 = _mm_add_epi32(v_s2, _mm_slli_epi32(v_ps, 5));
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/*
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* Sum epi32 ints v_s1(s2) and accumulate in s1(s2).
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*/
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#define S23O1 _MM_SHUFFLE(2, 3, 0, 1) /* A B C D -> B A D C */
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#define S1O32 _MM_SHUFFLE(1, 0, 3, 2) /* A B C D -> C D A B */
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v_s1 = _mm_add_epi32(v_s1, _mm_shuffle_epi32(v_s1, S23O1));
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v_s1 = _mm_add_epi32(v_s1, _mm_shuffle_epi32(v_s1, S1O32));
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s1 += _mm_cvtsi128_si32(v_s1);
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v_s2 = _mm_add_epi32(v_s2, _mm_shuffle_epi32(v_s2, S23O1));
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v_s2 = _mm_add_epi32(v_s2, _mm_shuffle_epi32(v_s2, S1O32));
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s2 = _mm_cvtsi128_si32(v_s2);
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#undef S23O1
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#undef S1O32
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/*
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* Reduce.
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*/
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s1 %= FLETCHER16_MODULE;
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s2 %= FLETCHER16_MODULE;
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}
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/*
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* Handle leftover data.
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*/
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if(len)
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{
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if(len >= 16)
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{
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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s2 += (s1 += *data++);
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len -= 16;
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}
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while(len--)
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{ s2 += (s1 += *data++); }
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s1 %= FLETCHER16_MODULE;
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s2 %= FLETCHER16_MODULE;
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}
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/*
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* Return the recombined sums.
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*/
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*sum1 = s1 & 0xFF;
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*sum2 = s2 & 0xFF;
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}
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#endif
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@@ -179,3 +179,151 @@ TEST_F(fletcher16Fixture, fletcher16_auto_2352bytes)
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EXPECT_EQ(fletcher, EXPECTED_FLETCHER16_2352BYTES);
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}
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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TEST_F(fletcher16Fixture, fletcher16_ssse3)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 1048576);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_misaligned)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer_misaligned + 1, 1048576);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_1byte)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 1);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_1BYTE);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_7bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 7);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_7BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_15bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 15);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_15BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_31bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 31);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_31BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_63bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 63);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_63BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_2352bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_ssse3(&sum1, &sum2, buffer, 2352);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_2352BYTES);
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}
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#endif
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