From 6c10f3e58dbc28d520c5ea6b15c8c0f67040eba3 Mon Sep 17 00:00:00 2001 From: Natalia Portillo Date: Tue, 12 Oct 2021 23:26:48 +0100 Subject: [PATCH] Fix compilation in MSVC (x86). --- adler32.c | 2 +- adler32.h | 4 ++-- adler32_avx2.c | 2 +- adler32_ssse3.c | 2 +- crc32.c | 2 +- crc32_clmul.c | 3 +-- crc64.h | 2 +- crc64_clmul.c | 2 +- 8 files changed, 9 insertions(+), 10 deletions(-) diff --git a/adler32.c b/adler32.c index 9a831b8..5c6dbbd 100644 --- a/adler32.c +++ b/adler32.c @@ -78,7 +78,7 @@ AARU_EXPORT int AARU_CALL adler32_update(adler32_ctx* ctx, const uint8_t* data, return 0; } -void adler32_slicing(uint16_t* sum1, uint16_t* sum2, const unsigned char* data, long len) +AARU_EXPORT void AARU_CALL adler32_slicing(uint16_t* sum1, uint16_t* sum2, const unsigned char* data, long len) { uint32_t s1 = *sum1; uint32_t s2 = *sum2; diff --git a/adler32.h b/adler32.h index 49094b3..4751be7 100644 --- a/adler32.h +++ b/adler32.h @@ -38,8 +38,8 @@ AARU_EXPORT void AARU_CALL adler32_slicing(uint16_t* sum1, uint16_t* sum #if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \ defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86) -AARU_EXPORT void AARU_CALL adler32_ssse3(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len); -AARU_EXPORT void AARU_CALL adler32_avx2(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len); +AARU_EXPORT SSSE3 void AARU_CALL adler32_ssse3(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len); +AARU_EXPORT AVX2 void AARU_CALL adler32_avx2(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len); #endif diff --git a/adler32_avx2.c b/adler32_avx2.c index f3f3536..e0ba068 100644 --- a/adler32_avx2.c +++ b/adler32_avx2.c @@ -12,7 +12,7 @@ #include "adler32.h" #include "simd.h" -AVX2 void adler32_avx2(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len) +AARU_EXPORT AVX2 void AARU_CALL adler32_avx2(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len) { uint32_t s1 = *sum1; uint32_t s2 = *sum2; diff --git a/adler32_ssse3.c b/adler32_ssse3.c index 93b1d7f..8117f7d 100644 --- a/adler32_ssse3.c +++ b/adler32_ssse3.c @@ -51,7 +51,7 @@ #include "library.h" #include "adler32.h" -SSSE3 void adler32_ssse3(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len) +AARU_EXPORT SSSE3 void AARU_CALL adler32_ssse3(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, long len) { uint32_t s1 = *sum1; uint32_t s2 = *sum2; diff --git a/crc32.c b/crc32.c index 4566015..60bbd1d 100644 --- a/crc32.c +++ b/crc32.c @@ -67,7 +67,7 @@ AARU_EXPORT int AARU_CALL crc32_update(crc32_ctx* ctx, const uint8_t* data, uint return 0; } -void crc32_slicing(uint32_t* crc, const unsigned char* data, long len) +AARU_EXPORT void AARU_CALL crc32_slicing(uint32_t* crc, const unsigned char* data, long len) { // Unroll according to Intel slicing by uint8_t // http://www.intel.com/technology/comms/perfnet/download/CRC_generators.pdf diff --git a/crc32_clmul.c b/crc32_clmul.c index 12c7c95..303f4fa 100644 --- a/crc32_clmul.c +++ b/crc32_clmul.c @@ -237,8 +237,7 @@ static void partial_fold(const size_t len, */ #define XOR_INITIAL(where) ONCE(where = _mm_xor_si128(where, xmm_initial)) -CLMUL -uint32_t crc32_clmul(const uint8_t* src, long len, uint32_t initial_crc) +AARU_EXPORT CLMUL uint32_t AARU_CALL crc32_clmul(const uint8_t* src, long len, uint32_t initial_crc) { unsigned long algn_diff; __m128i xmm_t0, xmm_t1, xmm_t2, xmm_t3; diff --git a/crc64.h b/crc64.h index 96aacd1..d122076 100644 --- a/crc64.h +++ b/crc64.h @@ -242,7 +242,7 @@ AARU_EXPORT void AARU_CALL crc64_slicing(uint64_t* crc, const uint8_t* dat #if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \ defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86) -AARU_EXPORT uint64_t AARU_CALL crc64_clmul(uint64_t crc, const uint8_t* data, long length); +AARU_EXPORT CLMUL uint64_t AARU_CALL crc64_clmul(uint64_t crc, const uint8_t* data, long length); #endif #if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM) diff --git a/crc64_clmul.c b/crc64_clmul.c index 90bdc62..ef89a06 100644 --- a/crc64_clmul.c +++ b/crc64_clmul.c @@ -64,7 +64,7 @@ CLMUL static __m128i fold(__m128i in, __m128i foldConstants) return _mm_xor_si128(_mm_clmulepi64_si128(in, foldConstants, 0x00), _mm_clmulepi64_si128(in, foldConstants, 0x11)); } -CLMUL uint64_t crc64_clmul(uint64_t crc, const uint8_t* data, long length) +AARU_EXPORT CLMUL uint64_t AARU_CALL crc64_clmul(uint64_t crc, const uint8_t* data, long length) { const uint64_t k1 = 0xe05dd497ca393ae4; // bitReflect(expMod65(128 + 64, poly, 1)) << 1; const uint64_t k2 = 0xdabe95afc7875f40; // bitReflect(expMod65(128, poly, 1)) << 1;