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https://github.com/aaru-dps/Aaru.Checksums.Native.git
synced 2025-12-16 19:24:29 +00:00
Implement Fletcher-16 using AVX2 instructions
This commit is contained in:
@@ -329,6 +329,24 @@ TEST_F(fletcher16Fixture, fletcher16_neon_2352bytes)
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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TEST_F(fletcher16Fixture, fletcher16_avx2)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 1048576);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3)
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{
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if(!have_ssse3()) return;
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@@ -347,12 +365,30 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_misaligned)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer_misaligned + 1, 1048576);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_misaligned)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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@@ -365,6 +401,24 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3_misaligned)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_1byte)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 1);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_1BYTE);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_1byte)
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{
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if(!have_ssse3()) return;
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@@ -383,6 +437,24 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3_1byte)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_1BYTE);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_7bytes)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 7);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_7BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_7bytes)
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{
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if(!have_ssse3()) return;
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@@ -401,12 +473,30 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3_7bytes)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_7BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_15bytes)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 15);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_15BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_15bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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@@ -419,12 +509,30 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3_15bytes)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_15BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_31bytes)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 31);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_31BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_31bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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@@ -437,12 +545,30 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3_31bytes)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_31BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_63bytes)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 63);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_63BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_63bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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@@ -455,12 +581,30 @@ TEST_F(fletcher16Fixture, fletcher16_ssse3_63bytes)
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_63BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_avx2_2352bytes)
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{
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if(!have_avx2()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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sum2 = 0xFF;
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fletcher16_avx2(&sum1, &sum2, buffer, 2352);
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fletcher16 = (sum2 << 8) | sum1;
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EXPECT_EQ(fletcher16, EXPECTED_FLETCHER16_2352BYTES);
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}
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TEST_F(fletcher16Fixture, fletcher16_ssse3_2352bytes)
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{
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if(!have_ssse3()) return;
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uint8_t sum1;
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uint8_t sum2;
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uint8_t sum1;
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uint8_t sum2;
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uint32_t fletcher16;
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sum1 = 0xFF;
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