14 Commits

Author	SHA1	Message	Date
Natalia Portillo	bd5051ce18	General refactor and cleanup.	2024-04-30 15:12:48 +01:00
JosJuice	89382334ec	Implement Fletcher-16 using AVX2 instructions	2023-09-24 18:46:45 +01:00
JosJuice	712281aba5	Implement Fletcher-16 using ARM NEON instructions	2023-09-24 18:46:45 +01:00
JosJuice	2878dea20d	Implement Fletcher-16 using SSSE3 instructions	2023-09-24 18:46:45 +01:00
JosJuice	a9b6c4868b	Expand Fletcher-16 NMAX ... The limit when calculating the value of NMAX is 2^16-1 only when sum1 and sum2 are represented as 16-bit. We're representing them as 32-bit. This will be helpful for SIMD implementations of Fletcher-16, because the old limit of 22 bytes would have meant that we could only process 16 bytes at a time before having to compute modulo.	2023-09-24 18:46:45 +01:00
JosJuice	d6d1c8dae5	Fix Fletcher-16 for small lengths ... For Fletcher-32, the conditional subtract approach works for lengths up to 514 bytes, but for Fletcher-16 it only works up to 2 bytes due to FLETCHER16_MODULE being much smaller than FLETCHER32_MODULE.	2023-09-24 18:46:45 +01:00
Natalia Portillo	1905cb0d43	Refactor and reformat.	2023-09-23 18:55:52 +01:00
Natalia Portillo	33f021fd54	Add documentation.	2023-09-23 18:10:44 +01:00
Natalia Portillo	7e9f26e2df	Update copyright year.	2022-12-01 23:06:20 +00:00
Natalia Portillo	134709f90f	Set file headers.	2021-10-13 03:25:16 +01:00
Natalia Portillo	bf1b026a7e	Use multiple sum algorithm from zlib for Adler and Fletcher checksums.	2021-09-22 23:49:32 +01:00
Natalia Portillo	c17752dbf0	Fix C89.	2021-09-22 04:09:21 +01:00
Natalia Portillo	4002cca010	Reformat.	2021-09-22 01:27:28 +01:00
Natalia Portillo	4e7fbac91b	Add Fletcher-16.	2021-09-21 23:59:19 +01:00