mirror of
https://github.com/aaru-dps/Aaru.Checksums.Native.git
synced 2025-12-16 11:14:29 +00:00
106 lines
2.3 KiB
C
106 lines
2.3 KiB
C
#include "simd.h"
|
|
|
|
#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
|
|
defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
|
|
|
|
#ifdef _MSC_VER
|
|
#include <intrin.h>
|
|
#else
|
|
/*
|
|
* Newer versions of GCC and clang come with cpuid.h
|
|
* (ftr GCC 4.7 in Debian Wheezy has this)
|
|
*/
|
|
#include <cpuid.h>
|
|
|
|
#endif
|
|
|
|
static void cpuid(int info, unsigned* eax, unsigned* ebx, unsigned* ecx, unsigned* edx)
|
|
{
|
|
#ifdef _MSC_VER
|
|
unsigned int registers[4];
|
|
__cpuid(registers, info);
|
|
*eax = registers[0];
|
|
*ebx = registers[1];
|
|
*ecx = registers[2];
|
|
*edx = registers[3];
|
|
#else
|
|
/* GCC, clang */
|
|
unsigned int _eax;
|
|
unsigned int _ebx;
|
|
unsigned int _ecx;
|
|
unsigned int _edx;
|
|
__cpuid(info, _eax, _ebx, _ecx, _edx);
|
|
*eax = _eax;
|
|
*ebx = _ebx;
|
|
*ecx = _ecx;
|
|
*edx = _edx;
|
|
#endif
|
|
}
|
|
|
|
static void cpuidex(int info, int count, unsigned* eax, unsigned* ebx, unsigned* ecx, unsigned* edx)
|
|
{
|
|
#ifdef _MSC_VER
|
|
unsigned int registers[4];
|
|
__cpuidex(registers, info, count);
|
|
*eax = registers[0];
|
|
*ebx = registers[1];
|
|
*ecx = registers[2];
|
|
*edx = registers[3];
|
|
#else
|
|
/* GCC, clang */
|
|
unsigned int _eax;
|
|
unsigned int _ebx;
|
|
unsigned int _ecx;
|
|
unsigned int _edx;
|
|
__cpuid_count(info, count, _eax, _ebx, _ecx, _edx);
|
|
*eax = _eax;
|
|
*ebx = _ebx;
|
|
*ecx = _ecx;
|
|
*edx = _edx;
|
|
#endif
|
|
}
|
|
|
|
int have_clmul(void)
|
|
{
|
|
unsigned eax, ebx, ecx, edx;
|
|
int has_pclmulqdq;
|
|
int has_sse41;
|
|
cpuid(1 /* feature bits */, &eax, &ebx, &ecx, &edx);
|
|
|
|
has_pclmulqdq = ecx & 0x2; /* bit 1 */
|
|
has_sse41 = ecx & 0x80000; /* bit 19 */
|
|
|
|
return has_pclmulqdq && has_sse41;
|
|
}
|
|
|
|
int have_ssse3(void)
|
|
{
|
|
unsigned eax, ebx, ecx, edx;
|
|
cpuid(1 /* feature bits */, &eax, &ebx, &ecx, &edx);
|
|
|
|
return ecx & 0x200;
|
|
}
|
|
|
|
int have_avx2(void)
|
|
{
|
|
unsigned eax, ebx, ecx, edx;
|
|
cpuidex(7 /* extended feature bits */, 0, &eax, &ebx, &ecx, &edx);
|
|
|
|
return ebx & 0x20;
|
|
}
|
|
#endif
|
|
|
|
#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
|
|
#include <sys/auxv.h>
|
|
#endif
|
|
|
|
#if defined(__aarch64__) || defined(_M_ARM64)
|
|
int have_neon(void)
|
|
{
|
|
return 1; // ARMv8-A made it mandatory
|
|
}
|
|
#endif
|
|
|
|
#if defined(__arm__) || defined(_M_ARM)
|
|
int have_neon(void) { return getauxval(AT_HWCAP) & HWCAP_NEON; }
|
|
#endif |