aaru-dps/Aaru.Checksums
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Code restyling.

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This commit is contained in:
Natalia Portillo
2020-02-29 18:03:33 +00:00
parent 2d5bc1f8ed
commit 5f2ddad918
15 changed files with 690 additions and 739 deletions
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74
CDChecksums.cs
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@@ -169,8 +169,8 @@ namespace Aaru.Checksums
if(channel[i] != 0x00)
{
AaruConsole.DebugWriteLine("CD checksums",
"Mode 0 sector with error at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Mode 0 sector with error at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
return false;
}
@@ -193,8 +193,8 @@ namespace Aaru.Checksums
channel[0x81B] != 0x00)
{
AaruConsole.DebugWriteLine("CD checksums",
"Mode 1 sector with data in reserved bytes at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Mode 1 sector with data in reserved bytes at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
return false;
}
@@ -216,23 +216,23 @@ namespace Aaru.Checksums
if(failedEccP)
AaruConsole.DebugWriteLine("CD checksums",
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC P check",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC P check",
channel[0x00C], channel[0x00D], channel[0x00E]);
if(failedEccQ)
AaruConsole.DebugWriteLine("CD checksums",
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC Q check",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC Q check",
channel[0x00C], channel[0x00D], channel[0x00E]);
uint storedEdc = BitConverter.ToUInt32(channel, 0x810);
uint calculatedEdc = ComputeEdc(0, channel, 0x810);
if(calculatedEdc == storedEdc)
return!failedEccP && !failedEccQ;
return !failedEccP && !failedEccQ;
AaruConsole.DebugWriteLine("CD checksums",
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, got CRC 0x{3:X8} expected 0x{4:X8}",
channel[0x00C], channel[0x00D], channel[0x00E], calculatedEdc, storedEdc);
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, got CRC 0x{3:X8} expected 0x{4:X8}",
channel[0x00C], channel[0x00D], channel[0x00E], calculatedEdc, storedEdc);
return false;
}
@@ -251,8 +251,8 @@ namespace Aaru.Checksums
channel[0x012] != channel[0x016] ||
channel[0x013] != channel[0x017])
AaruConsole.DebugWriteLine("CD checksums",
"Subheader copies differ in mode 2 form 2 sector at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Subheader copies differ in mode 2 form 2 sector at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
uint storedEdc = BitConverter.ToUInt32(mode2Sector, 0x91C);
@@ -267,8 +267,9 @@ namespace Aaru.Checksums
return true;
AaruConsole.DebugWriteLine("CD checksums",
"Mode 2 form 2 sector at address: {0:X2}:{1:X2}:{2:X2}, got CRC 0x{3:X8} expected 0x{4:X8}",
channel[0x00C], channel[0x00D], channel[0x00E], calculatedEdc, storedEdc);
"Mode 2 form 2 sector at address: {0:X2}:{1:X2}:{2:X2}, got CRC 0x{3:X8} expected 0x{4:X8}",
channel[0x00C], channel[0x00D], channel[0x00E], calculatedEdc,
storedEdc);
return false;
}
@@ -279,8 +280,8 @@ namespace Aaru.Checksums
channel[0x012] != channel[0x016] ||
channel[0x013] != channel[0x017])
AaruConsole.DebugWriteLine("CD checksums",
"Subheader copies differ in mode 2 form 1 sector at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Subheader copies differ in mode 2 form 1 sector at address: {0:X2}:{1:X2}:{2:X2}",
channel[0x00C], channel[0x00D], channel[0x00E]);
byte[] address = new byte[4];
byte[] eccP = new byte[172];
@@ -294,30 +295,31 @@ namespace Aaru.Checksums
if(failedEccP)
AaruConsole.DebugWriteLine("CD checksums",
"Mode 2 form 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC P check",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Mode 2 form 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC P check",
channel[0x00C], channel[0x00D], channel[0x00E]);
if(failedEccQ)
AaruConsole.DebugWriteLine("CD checksums",
"Mode 2 form 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC Q check",
channel[0x00C], channel[0x00D], channel[0x00E]);
"Mode 2 form 1 sector at address: {0:X2}:{1:X2}:{2:X2}, fails ECC Q check",
channel[0x00C], channel[0x00D], channel[0x00E]);
uint storedEdc = BitConverter.ToUInt32(mode2Sector, 0x808);
uint calculatedEdc = ComputeEdc(0, mode2Sector, 0x808);
if(calculatedEdc == storedEdc)
return!failedEccP && !failedEccQ;
return !failedEccP && !failedEccQ;
AaruConsole.DebugWriteLine("CD checksums",
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, got CRC 0x{3:X8} expected 0x{4:X8}",
channel[0x00C], channel[0x00D], channel[0x00E], calculatedEdc, storedEdc);
"Mode 1 sector at address: {0:X2}:{1:X2}:{2:X2}, got CRC 0x{3:X8} expected 0x{4:X8}",
channel[0x00C], channel[0x00D], channel[0x00E], calculatedEdc,
storedEdc);
return false;
}
}
AaruConsole.DebugWriteLine("CD checksums", "Unknown mode {0} sector at address: {1:X2}:{2:X2}:{3:X2}",
channel[0x00F], channel[0x00C], channel[0x00D], channel[0x00E]);
channel[0x00F], channel[0x00C], channel[0x00D], channel[0x00E]);
return null;
}
@@ -510,9 +512,9 @@ namespace Aaru.Checksums
break;
default:
AaruConsole.DebugWriteLine("CD checksums",
"Detected unknown Pack type in subchannel: mode {0}, item {1}",
Convert.ToString(cdSubRwPack1[0] & 0x38, 2),
Convert.ToString(cdSubRwPack1[0] & 0x07, 2));
"Detected unknown Pack type in subchannel: mode {0}, item {1}",
Convert.ToString(cdSubRwPack1[0] & 0x38, 2),
Convert.ToString(cdSubRwPack1[0] & 0x07, 2));
break;
}
@@ -525,7 +527,7 @@ namespace Aaru.Checksums
if(qSubChannelCrc != calculatedQcrc)
{
AaruConsole.DebugWriteLine("CD checksums", "Q subchannel CRC 0x{0:X4}, expected 0x{1:X4}",
calculatedQcrc, qSubChannelCrc);
calculatedQcrc, qSubChannelCrc);
status = false;
}
@@ -541,7 +543,7 @@ namespace Aaru.Checksums
cdTextPack1Crc != 0)
{
AaruConsole.DebugWriteLine("CD checksums", "CD-Text Pack 1 CRC 0x{0:X4}, expected 0x{1:X4}",
cdTextPack1Crc, calculatedCdtp1Crc);
cdTextPack1Crc, calculatedCdtp1Crc);
status = false;
}
@@ -555,13 +557,13 @@ namespace Aaru.Checksums
ushort calculatedCdtp2Crc = CRC16CCITTContext.Calculate(cdTextPack2ForCrc);
AaruConsole.DebugWriteLine("CD checksums", "Cyclic CDTP2 0x{0:X4}, Calc CDTP2 0x{1:X4}", cdTextPack2Crc,
calculatedCdtp2Crc);
calculatedCdtp2Crc);
if(cdTextPack2Crc != calculatedCdtp2Crc &&
cdTextPack2Crc != 0)
{
AaruConsole.DebugWriteLine("CD checksums", "CD-Text Pack 2 CRC 0x{0:X4}, expected 0x{1:X4}",
cdTextPack2Crc, calculatedCdtp2Crc);
cdTextPack2Crc, calculatedCdtp2Crc);
status = false;
}
@@ -575,13 +577,13 @@ namespace Aaru.Checksums
ushort calculatedCdtp3Crc = CRC16CCITTContext.Calculate(cdTextPack3ForCrc);
AaruConsole.DebugWriteLine("CD checksums", "Cyclic CDTP3 0x{0:X4}, Calc CDTP3 0x{1:X4}", cdTextPack3Crc,
calculatedCdtp3Crc);
calculatedCdtp3Crc);
if(cdTextPack3Crc != calculatedCdtp3Crc &&
cdTextPack3Crc != 0)
{
AaruConsole.DebugWriteLine("CD checksums", "CD-Text Pack 3 CRC 0x{0:X4}, expected 0x{1:X4}",
cdTextPack3Crc, calculatedCdtp3Crc);
cdTextPack3Crc, calculatedCdtp3Crc);
status = false;
}
@@ -596,14 +598,14 @@ namespace Aaru.Checksums
ushort calculatedCdtp4Crc = CRC16CCITTContext.Calculate(cdTextPack4ForCrc);
AaruConsole.DebugWriteLine("CD checksums", "Cyclic CDTP4 0x{0:X4}, Calc CDTP4 0x{1:X4}", cdTextPack4Crc,
calculatedCdtp4Crc);
calculatedCdtp4Crc);
if(cdTextPack4Crc == calculatedCdtp4Crc ||
cdTextPack4Crc == 0)
return status;
AaruConsole.DebugWriteLine("CD checksums", "CD-Text Pack 4 CRC 0x{0:X4}, expected 0x{1:X4}", cdTextPack4Crc,
calculatedCdtp4Crc);
calculatedCdtp4Crc);
return false;
}