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https://github.com/aaru-dps/Aaru.Checksums.git
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Fix SIMD implementations for partial CRC blocks.
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@@ -352,23 +352,34 @@ namespace Aaru.Checksums
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static void Step(ref ulong previousCrc, ulong[][] table, byte[] data, uint len, bool useEcma)
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{
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int dataOff = 0;
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if(useEcma &&
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Pclmulqdq.IsSupported &&
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Sse41.IsSupported &&
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Ssse3.IsSupported &&
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Sse2.IsSupported)
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{
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previousCrc = ~Clmul.Step(~previousCrc, data, len);
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// Only works in blocks of 32 bytes
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uint blocks = len / 32;
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return;
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if(blocks > 0)
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{
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previousCrc = ~Clmul.Step(~previousCrc, data, blocks * 32);
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dataOff = (int)(blocks * 32);
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len -= blocks * 32;
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}
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if(len == 0)
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return;
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}
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// Unroll according to Intel slicing by uint8_t
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// http://www.intel.com/technology/comms/perfnet/download/CRC_generators.pdf
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// http://sourceforge.net/projects/slicing-by-8/
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ulong crc = previousCrc;
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int dataOff = 0;
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ulong crc = previousCrc;
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if(len > 4)
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{
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