mirror of
https://github.com/aaru-dps/Aaru.git
synced 2025-12-16 19:24:25 +00:00
Refactor: Formatting.
This commit is contained in:
@@ -5,8 +5,6 @@
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#ifndef DISCIMAGECHEF_DEVICE_REPORT_ATA_H
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#define DISCIMAGECHEF_DEVICE_REPORT_ATA_H
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#include <stdint.h>
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#pragma pack(1)
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typedef struct
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{
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@@ -28,7 +26,7 @@ typedef struct
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uint8_t lbaHigh;
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uint8_t deviceHead;
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uint8_t command;
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}AtaRegistersLBA28;
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} AtaRegistersLBA28;
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typedef struct
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{
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@@ -37,8 +35,8 @@ typedef struct
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uint16_t lbaLow;
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uint16_t lbaMid;
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uint16_t lbaHigh;
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uint8_t deviceHead;
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uint8_t command;
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uint8_t deviceHead;
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uint8_t command;
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} AtaRegistersLBA48;
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typedef struct
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@@ -51,7 +49,7 @@ typedef struct
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uint8_t cylinderHigh;
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uint8_t deviceHead;
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uint8_t command;
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}AtaErrorRegistersCHS;
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} AtaErrorRegistersCHS;
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typedef struct
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{
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@@ -67,53 +65,51 @@ typedef struct
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typedef struct
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{
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uint8_t status;
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uint8_t error;
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uint8_t status;
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uint8_t error;
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uint16_t sectorCount;
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uint16_t lbaLow;
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uint16_t lbaMid;
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uint16_t lbaHigh;
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uint8_t deviceHead;
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uint8_t command;
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uint8_t deviceHead;
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uint8_t command;
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} AtaErrorRegistersLBA48;
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typedef enum
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{
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ATA_TRANSFER_NONE = 0,
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ATA_TRANSFER_FEATURE,
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ATA_TRANSFER_SECTORCOUNT,
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ATA_TRANSFTER_SPTSIU
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ATA_TRANSFER_NONE = 0, ATA_TRANSFER_FEATURE, ATA_TRANSFER_SECTORCOUNT, ATA_TRANSFTER_SPTSIU
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} AtaTransferRegister;
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typedef enum {
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ATA_PROTOCOL_HARD_RESET = 0,
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ATA_PROTOCOL_SOFT_RESET = 1,
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ATA_PROTOCOL_NO_DATA = 3,
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ATA_PROTOCOL_PIO_IN = 4,
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ATA_PROTOCOL_PIO_OUT = 5,
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ATA_PROTOCOL_DMA = 6,
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ATA_PROTOCOL_DMA_QUEUED = 7,
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typedef enum
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{
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ATA_PROTOCOL_HARD_RESET = 0,
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ATA_PROTOCOL_SOFT_RESET = 1,
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ATA_PROTOCOL_NO_DATA = 3,
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ATA_PROTOCOL_PIO_IN = 4,
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ATA_PROTOCOL_PIO_OUT = 5,
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ATA_PROTOCOL_DMA = 6,
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ATA_PROTOCOL_DMA_QUEUED = 7,
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ATA_PROTOCOL_DEVICE_DIAGNOSTICS = 8,
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ATA_PROTOCOL_DEVICE_RESET = 9,
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ATA_PROTOCOL_UDMA_IN = 10,
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ATA_PROTOCOL_UDMA_OUT = 11,
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ATA_PROTOCOL_FPDMA = 12,
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ATA_PROTOCOL_RETURN_RESPONSE = 15
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ATA_PROTOCOL_DEVICE_RESET = 9,
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ATA_PROTOCOL_UDMA_IN = 10,
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ATA_PROTOCOL_UDMA_OUT = 11,
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ATA_PROTOCOL_FPDMA = 12,
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ATA_PROTOCOL_RETURN_RESPONSE = 15
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} AtaProtocol;
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typedef enum
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{
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ATA_READ_RETRY = 0x20,
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ATA_READ_SECTORS = 0x21,
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ATA_READ_LONG_RETRY = 0x22,
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ATA_READ_LONG = 0x23,
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ATA_READ_EXT = 0x24,
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ATA_READ_DMA_EXT = 0x25,
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ATA_SEEK = 0x70,
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ATA_READ_DMA_RETRY = 0xC8,
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ATA_READ_DMA = 0xC9,
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ATA_READ_RETRY = 0x20,
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ATA_READ_SECTORS = 0x21,
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ATA_READ_LONG_RETRY = 0x22,
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ATA_READ_LONG = 0x23,
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ATA_READ_EXT = 0x24,
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ATA_READ_DMA_EXT = 0x25,
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ATA_SEEK = 0x70,
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ATA_READ_DMA_RETRY = 0xC8,
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ATA_READ_DMA = 0xC9,
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ATA_IDENTIFY_PACKET_DEVICE = 0xA1,
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ATA_IDENTIFY_DEVICE = 0xEC
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ATA_IDENTIFY_DEVICE = 0xEC
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} AtaCommands;
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typedef struct
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@@ -143,7 +139,7 @@ typedef struct
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Word 2
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Specific configuration
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*/
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uint16_t SpecificConfiguration;
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uint16_t SpecificConfiguration;
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/*
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Word 3
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Heads in default translation mode
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@@ -183,7 +179,7 @@ typedef struct
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Words 10 to 19
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Device serial number, right justified, padded with spaces
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*/
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uint8_t SerialNumber[20];
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uint8_t SerialNumber[20];
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/*
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Word 20
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Manufacturer defined
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@@ -209,75 +205,75 @@ typedef struct
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Words 23 to 26
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Firmware revision, left justified, padded with spaces
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*/
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uint8_t FirmwareRevision[8];
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uint8_t FirmwareRevision[8];
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/*
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Words 27 to 46
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Model number, left justified, padded with spaces
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*/
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uint8_t Model[40];
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uint8_t Model[40];
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/*
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Word 47 bits 7 to 0
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Maximum number of sectors that can be transferred per
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interrupt on read and write multiple commands
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*/
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uint8_t MultipleMaxSectors;
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uint8_t MultipleMaxSectors;
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/*
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Word 47 bits 15 to 8
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Vendor unique
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ATA/ATAPI-4 says it must be 0x80
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*/
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uint8_t VendorWord47;
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uint8_t VendorWord47;
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/*
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Word 48
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ATA-1: Set to 1 if it can perform doubleword I/O
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ATA-2 to ATA/ATAPI-7: Reserved
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ATA8-ACS: Trusted Computing feature set
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*/
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uint16_t TrustedComputing;
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uint16_t TrustedComputing;
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/*
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Word 49
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Capabilities
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*/
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uint16_t Capabilities;
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uint16_t Capabilities;
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/*
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Word 50
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Capabilities
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*/
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uint16_t Capabilities2;
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uint16_t Capabilities2;
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/*
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Word 51 bits 7 to 0
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Vendor unique
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Obsoleted in ATA/ATAPI-4
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*/
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uint8_t VendorWord51;
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uint8_t VendorWord51;
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/*
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Word 51 bits 15 to 8
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Transfer timing mode in PIO
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Obsoleted in ATA/ATAPI-4
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*/
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uint8_t PIOTransferTimingMode;
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uint8_t PIOTransferTimingMode;
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/*
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Word 52 bits 7 to 0
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Vendor unique
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Obsoleted in ATA/ATAPI-4
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*/
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uint8_t VendorWord52;
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uint8_t VendorWord52;
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/*
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Word 52 bits 15 to 8
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Transfer timing mode in DMA
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Obsoleted in ATA/ATAPI-4
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*/
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uint8_t DMATransferTimingMode;
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uint8_t DMATransferTimingMode;
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/*
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Word 53 bits 7 to 0
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Reports if words 54 to 58 are valid
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*/
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uint8_t ExtendedIdentify;
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uint8_t ExtendedIdentify;
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/*
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Word 53 bits 15 to 8
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Free-fall Control Sensitivity
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*/
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uint8_t FreeFallSensitivity;
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uint8_t FreeFallSensitivity;
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/*
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Word 54
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Cylinders in current translation mode
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@@ -306,12 +302,12 @@ typedef struct
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Word 59 bits 7 to 0
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Number of sectors currently set to transfer on a READ/WRITE MULTIPLE command
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*/
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uint8_t MultipleSectorNumber;
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uint8_t MultipleSectorNumber;
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/*
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Word 59 bits 15 to 8
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Indicates if <see cref="MultipleSectorNumber"/> is valid
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*/
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uint8_t Capabilities3;
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uint8_t Capabilities3;
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/*
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Words 60 to 61
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If drive supports LBA, how many sectors are addressable using LBA
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@@ -323,7 +319,7 @@ typedef struct
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Obsoleted in ATA/ATAPI-4
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In ATAPI it's not obsolete, indicates UDMA mode (UDMA7 is instead MDMA0)
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*/
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uint8_t DMASupported;
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uint8_t DMASupported;
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/*
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Word 62 bits 15 to 8
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Single word DMA mode currently active
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@@ -332,28 +328,28 @@ typedef struct
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bit 10 indicates DMA is supported and bit 15 indicates DMADIR bit
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in PACKET is required for DMA transfers
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*/
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uint8_t DMAActive;
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uint8_t DMAActive;
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/*
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Word 63 bits 7 to 0
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Multiword DMA modes available
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*/
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uint8_t MDMASupported;
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uint8_t MDMASupported;
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/*
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Word 63 bits 15 to 8
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Multiword DMA mode currently active
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*/
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uint8_t MDMAActive;
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uint8_t MDMAActive;
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/*
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Word 64 bits 7 to 0
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Supported Advanced PIO transfer modes
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*/
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uint8_t APIOSupported;
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uint8_t APIOSupported;
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/*
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Word 64 bits 15 to 8
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Reserved
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*/
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uint8_t ReservedWord64;
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uint8_t ReservedWord64;
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/*
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Word 65
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Minimum MDMA transfer cycle time per word in nanoseconds
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@@ -481,12 +477,12 @@ typedef struct
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Word 88 bits 7 to 0
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Supported Ultra DMA transfer modes
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*/
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uint8_t UDMASupported;
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uint8_t UDMASupported;
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/*
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Word 88 bits 15 to 8
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Selected Ultra DMA transfer modes
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*/
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uint8_t UDMAActive;
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uint8_t UDMAActive;
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/*
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Word 89
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@@ -680,7 +676,7 @@ typedef struct
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Words 170 to 173
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Additional product identifier
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*/
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uint8_t AdditionalPID[8];
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uint8_t AdditionalPID[8];
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/*
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Word 174
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@@ -774,12 +770,12 @@ typedef struct
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Word 219 bits 7 to 0
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Estimated device spin up in seconds
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*/
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uint8_t NVEstimatedSpinUp;
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uint8_t NVEstimatedSpinUp;
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/*
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Word 219 bits 15 to 8
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NV Cache reserved
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*/
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uint8_t NVReserved;
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uint8_t NVReserved;
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/*
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Word 220 bits 7 to 0
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@@ -851,19 +847,44 @@ typedef struct
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uint8_t Checksum;
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} IdentifyDevice;
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unsigned char *AtaToCString(unsigned char* string, int len);
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int SendAtaCommandChs(int fd, AtaRegistersCHS registers, AtaErrorRegistersCHS **errorRegisters, int protocol, int transferRegister, unsigned char *buffer, unsigned int buffer_len, int transferBlocks);
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int SendAtaCommandLba28(int fd, AtaRegistersLBA28 registers, AtaErrorRegistersLBA28 **errorRegisters, int protocol, int transferRegister, unsigned char *buffer, unsigned int buffer_len, int transferBlocks);
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int SendAtaCommandLba48(int fd, AtaRegistersLBA48 registers, AtaErrorRegistersLBA48 **errorRegisters, int protocol, int transferRegister, unsigned char *buffer, unsigned int buffer_len, int transferBlocks);
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int Identify(int fd, unsigned char **buffer, AtaErrorRegistersCHS **errorRegisters);
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int Read(int fd, unsigned char **buffer, AtaErrorRegistersCHS **statusRegisters, int retry, uint16_t cylinder, uint8_t head, uint8_t sector, uint8_t count);
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int ReadLong(int fd, unsigned char **buffer, AtaErrorRegistersCHS **statusRegisters, int retry, uint16_t cylinder, uint8_t head, uint8_t sector, uint32_t blockSize);
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int Seek(int fd, AtaErrorRegistersCHS **statusRegisters, uint16_t cylinder, uint8_t head, uint8_t sector);
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int ReadDma(int fd, unsigned char **buffer, AtaErrorRegistersCHS **statusRegisters, int retry, uint16_t cylinder, uint8_t head, uint8_t sector, uint8_t count);
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int ReadDmaLba(int fd, unsigned char **buffer, AtaErrorRegistersLBA28 **statusRegisters, int retry, uint32_t lba, uint8_t count);
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int ReadLba(int fd, unsigned char **buffer, AtaErrorRegistersLBA28 **statusRegisters, int retry, uint32_t lba, uint8_t count);
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int ReadLongLba(int fd, unsigned char **buffer, AtaErrorRegistersLBA28 **statusRegisters, int retry, uint32_t lba, uint32_t blockSize);
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int SeekLba(int fd, AtaErrorRegistersLBA28 **statusRegisters, uint32_t lba);
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int ReadDmaLba48(int fd, unsigned char **buffer, AtaErrorRegistersLBA48 **statusRegisters, uint64_t lba, uint16_t count);
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int ReadLba48(int fd, unsigned char **buffer, AtaErrorRegistersLBA48 **statusRegisters, uint64_t lba, uint16_t count);
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unsigned char *AtaToCString (unsigned char *string, int len);
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int SendAtaCommandChs (int fd, AtaRegistersCHS registers, AtaErrorRegistersCHS **errorRegisters, int protocol,
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int transferRegister, unsigned char *buffer, unsigned int buffer_len, int transferBlocks);
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int SendAtaCommandLba28 (int fd, AtaRegistersLBA28 registers, AtaErrorRegistersLBA28 **errorRegisters, int protocol,
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int transferRegister, unsigned char *buffer, unsigned int buffer_len, int transferBlocks);
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int SendAtaCommandLba48 (int fd, AtaRegistersLBA48 registers, AtaErrorRegistersLBA48 **errorRegisters, int protocol,
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int transferRegister, unsigned char *buffer, unsigned int buffer_len, int transferBlocks);
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int Identify (int fd, unsigned char **buffer, AtaErrorRegistersCHS **errorRegisters);
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int Read (int fd, unsigned char **buffer, AtaErrorRegistersCHS **statusRegisters, int retry, uint16_t cylinder,
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uint8_t head, uint8_t sector, uint8_t count);
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int ReadLong (int fd, unsigned char **buffer, AtaErrorRegistersCHS **statusRegisters, int retry, uint16_t cylinder,
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uint8_t head, uint8_t sector, uint32_t blockSize);
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int Seek (int fd, AtaErrorRegistersCHS **statusRegisters, uint16_t cylinder, uint8_t head, uint8_t sector);
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int ReadDma (int fd, unsigned char **buffer, AtaErrorRegistersCHS **statusRegisters, int retry, uint16_t cylinder,
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uint8_t head, uint8_t sector, uint8_t count);
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int ReadDmaLba (int fd, unsigned char **buffer, AtaErrorRegistersLBA28 **statusRegisters, int retry, uint32_t lba,
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uint8_t count);
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int ReadLba (int fd, unsigned char **buffer, AtaErrorRegistersLBA28 **statusRegisters, int retry, uint32_t lba,
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uint8_t count);
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int ReadLongLba (int fd, unsigned char **buffer, AtaErrorRegistersLBA28 **statusRegisters, int retry, uint32_t lba,
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uint32_t blockSize);
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int SeekLba (int fd, AtaErrorRegistersLBA28 **statusRegisters, uint32_t lba);
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int
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ReadDmaLba48 (int fd, unsigned char **buffer, AtaErrorRegistersLBA48 **statusRegisters, uint64_t lba, uint16_t count);
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int ReadLba48 (int fd, unsigned char **buffer, AtaErrorRegistersLBA48 **statusRegisters, uint64_t lba, uint16_t count);
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#endif //DISCIMAGECHEF_DEVICE_REPORT_ATA_H
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