2017-11-05 20:43:01 -05:00
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the IBM PS/1 models 2011, 2121 and 2133.
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*
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2017-11-08 16:29:54 -05:00
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* Model 2011: The initial model, using a 10MHz 80286.
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*
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2017-11-05 20:43:01 -05:00
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* Model 2121: This is similar to model 2011 but some of the functionality
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* has moved to a chip at ports 0xe0 (index)/0xe1 (data). The
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* only functions I have identified are enables for the first
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* 512K and next 128K of RAM, in bits 0 of registers 0 and 1
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* respectively.
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*
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* Port 0x105 has bit 7 forced high. Without this 128K of
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* memory will be missed by the BIOS on cold boots.
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*
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* The reserved 384K is remapped to the top of extended memory.
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* If this is not done then you get an error on startup.
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*
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2017-11-08 17:49:19 -05:00
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* NOTES: Floppy does not seem to work. --FvK
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* The "ROM DOS" shell does not seem to work. We do have the
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* correct BIOS images now, and they do load, but they do not
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* boot. Sometimes, they do, and then it shows an "Incorrect
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* DOS" error message?? --FvK
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*
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2018-04-26 13:33:29 +02:00
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* Version: @(#)m_ps1.c 1.0.9 2018/04/26
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2017-11-05 20:43:01 -05:00
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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*
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2018-01-04 07:44:33 +01:00
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* Copyright 2008-2018 Sarah Walker.
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2018-01-17 18:43:36 +01:00
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* Copyright 2016-2018 Miran Grca.
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* Copyright 2017,2018 Fred N. van Kempen.
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2017-11-05 20:43:01 -05:00
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*/
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2017-09-25 04:31:20 -04:00
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#include <stdio.h>
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#include <stdint.h>
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2017-11-05 20:43:01 -05:00
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#include <stdlib.h>
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2017-09-25 04:31:20 -04:00
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#include <string.h>
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#include <wchar.h>
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2017-10-17 01:59:09 -04:00
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#include "../86box.h"
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2017-09-02 20:39:57 +02:00
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#include "../cpu/cpu.h"
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#include "../io.h"
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2017-09-04 01:52:29 -04:00
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#include "../dma.h"
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2017-09-02 20:39:57 +02:00
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#include "../pic.h"
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#include "../pit.h"
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2017-09-04 01:52:29 -04:00
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#include "../mem.h"
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2017-12-10 15:16:24 +01:00
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#include "../nmi.h"
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2017-09-02 20:39:57 +02:00
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#include "../rom.h"
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2017-11-08 17:49:19 -05:00
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#include "../timer.h"
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2017-09-04 01:52:29 -04:00
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#include "../device.h"
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#include "../nvr.h"
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2017-10-01 17:30:02 -04:00
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#include "../game/gameport.h"
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2017-09-04 01:52:29 -04:00
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#include "../lpt.h"
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2017-09-02 20:39:57 +02:00
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#include "../serial.h"
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2017-11-05 01:57:04 -05:00
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#include "../keyboard.h"
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2017-10-02 02:15:35 -04:00
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#include "../disk/hdc.h"
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#include "../disk/hdc_ide.h"
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2017-09-04 01:52:29 -04:00
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#include "../floppy/fdd.h"
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#include "../floppy/fdc.h"
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2017-11-08 17:49:19 -05:00
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#include "../sound/sound.h"
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#include "../sound/snd_sn76489.h"
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2017-11-05 20:43:01 -05:00
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#include "../video/video.h"
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#include "../video/vid_vga.h"
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#include "../video/vid_ti_cf62011.h"
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2017-10-07 22:18:30 -04:00
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#include "machine.h"
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2016-06-26 00:34:39 +02:00
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2017-06-16 16:00:44 -04:00
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2017-11-08 17:49:19 -05:00
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typedef struct {
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sn76489_t sn76489;
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uint8_t status, ctrl;
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int64_t timer_latch, timer_count, timer_enable;
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uint8_t fifo[2048];
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int fifo_read_idx, fifo_write_idx;
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int fifo_threshold;
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uint8_t dac_val;
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int16_t buffer[SOUNDBUFLEN];
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int pos;
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} ps1snd_t;
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2017-11-05 20:43:01 -05:00
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typedef struct {
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int model;
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2016-06-26 00:34:39 +02:00
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2017-11-05 20:43:01 -05:00
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rom_t high_rom;
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2017-06-16 16:00:44 -04:00
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2018-04-25 23:51:13 +02:00
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uint8_t ps1_91,
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ps1_92,
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2017-11-05 20:43:01 -05:00
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ps1_94,
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ps1_102,
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ps1_103,
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ps1_104,
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ps1_105,
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ps1_190;
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int ps1_e0_addr;
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uint8_t ps1_e0_regs[256];
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} ps1_t;
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2016-06-26 00:34:39 +02:00
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2017-06-16 16:00:44 -04:00
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2017-11-08 17:49:19 -05:00
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static void
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update_irq_status(ps1snd_t *snd)
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{
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if (((snd->status & snd->ctrl) & 0x12) && (snd->ctrl & 0x01))
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picint(1 << 7);
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else
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picintc(1 << 7);
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}
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static uint8_t
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snd_read(uint16_t port, void *priv)
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{
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ps1snd_t *snd = (ps1snd_t *)priv;
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uint8_t ret = 0xff;
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switch (port & 7) {
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case 0: /* ADC data */
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snd->status &= ~0x10;
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update_irq_status(snd);
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ret = 0;
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break;
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case 2: /* status */
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ret = snd->status;
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ret |= (snd->ctrl & 0x01);
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if ((snd->fifo_write_idx - snd->fifo_read_idx) >= 2048)
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ret |= 0x08; /* FIFO full */
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if (snd->fifo_read_idx == snd->fifo_write_idx)
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ret |= 0x04; /* FIFO empty */
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break;
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case 3: /* FIFO timer */
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/*
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* The PS/1 Technical Reference says this should return
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* thecurrent value, but the PS/1 BIOS and Stunt Island
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* expect it not to change.
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*/
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ret = snd->timer_latch;
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break;
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case 4:
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case 5:
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case 6:
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case 7:
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ret = 0;
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}
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return(ret);
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}
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static void
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snd_write(uint16_t port, uint8_t val, void *priv)
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{
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ps1snd_t *snd = (ps1snd_t *)priv;
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switch (port & 7) {
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case 0: /* DAC output */
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if ((snd->fifo_write_idx - snd->fifo_read_idx) < 2048) {
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snd->fifo[snd->fifo_write_idx & 2047] = val;
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snd->fifo_write_idx++;
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}
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break;
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case 2: /* control */
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snd->ctrl = val;
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if (! (val & 0x02))
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snd->status &= ~0x02;
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update_irq_status(snd);
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break;
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case 3: /* timer reload value */
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snd->timer_latch = val;
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snd->timer_count = (int64_t) ((0xff-val) * TIMER_USEC);
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snd->timer_enable = (val != 0);
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break;
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case 4: /* almost empty */
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snd->fifo_threshold = val * 4;
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break;
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}
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}
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static void
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snd_update(ps1snd_t *snd)
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{
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for (; snd->pos < sound_pos_global; snd->pos++)
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snd->buffer[snd->pos] = (int8_t)(snd->dac_val ^ 0x80) * 0x20;
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}
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static void
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snd_callback(void *priv)
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{
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ps1snd_t *snd = (ps1snd_t *)priv;
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snd_update(snd);
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if (snd->fifo_read_idx != snd->fifo_write_idx) {
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snd->dac_val = snd->fifo[snd->fifo_read_idx & 2047];
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snd->fifo_read_idx++;
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}
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if ((snd->fifo_write_idx - snd->fifo_read_idx) == snd->fifo_threshold)
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snd->status |= 0x02; /*FIFO almost empty*/
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snd->status |= 0x10; /*ADC data ready*/
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update_irq_status(snd);
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snd->timer_count += snd->timer_latch * TIMER_USEC;
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}
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static void
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snd_get_buffer(int32_t *buffer, int len, void *priv)
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{
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ps1snd_t *snd = (ps1snd_t *)priv;
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int c;
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snd_update(snd);
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for (c = 0; c < len * 2; c++)
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buffer[c] += snd->buffer[c >> 1];
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snd->pos = 0;
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}
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static void *
|
2018-03-19 01:02:04 +01:00
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snd_init(const device_t *info)
|
2017-11-08 17:49:19 -05:00
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{
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ps1snd_t *snd;
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snd = malloc(sizeof(ps1snd_t));
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memset(snd, 0x00, sizeof(ps1snd_t));
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sn76489_init(&snd->sn76489, 0x0205, 0x0001, SN76496, 4000000);
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io_sethandler(0x0200, 1, snd_read,NULL,NULL, snd_write,NULL,NULL, snd);
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io_sethandler(0x0202, 6, snd_read,NULL,NULL, snd_write,NULL,NULL, snd);
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timer_add(snd_callback, &snd->timer_count, &snd->timer_enable, snd);
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sound_add_handler(snd_get_buffer, snd);
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return(snd);
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}
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static void
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snd_close(void *priv)
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{
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ps1snd_t *snd = (ps1snd_t *)priv;
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free(snd);
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}
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|
2018-03-19 01:02:04 +01:00
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static const device_t snd_device = {
|
2017-11-08 17:49:19 -05:00
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"PS/1 Audio Card",
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0, 0,
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snd_init, snd_close, NULL,
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NULL,
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NULL,
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NULL
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};
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|
2017-11-05 20:43:01 -05:00
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static void
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recalc_memory(ps1_t *ps)
|
2016-06-26 00:34:39 +02:00
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{
|
2017-11-05 20:43:01 -05:00
|
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/* Enable first 512K */
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mem_set_mem_state(0x00000, 0x80000,
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(ps->ps1_e0_regs[0] & 0x01) ?
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(MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) :
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(MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
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/* Enable 512-640K */
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mem_set_mem_state(0x80000, 0x20000,
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(ps->ps1_e0_regs[1] & 0x01) ?
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(MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) :
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(MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
|
2016-06-26 00:34:39 +02:00
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}
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|
2017-06-16 16:00:44 -04:00
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|
2017-11-05 20:43:01 -05:00
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static void
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ps1_write(uint16_t port, uint8_t val, void *priv)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
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ps1_t *ps = (ps1_t *)priv;
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switch (port) {
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case 0x0092:
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|
if (ps->model != 2011) {
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|
if (val & 1) {
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|
softresetx86();
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cpu_set_edx();
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}
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|
ps->ps1_92 = val & ~1;
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|
} else {
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|
ps->ps1_92 = val;
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}
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|
|
mem_a20_alt = val & 2;
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|
|
mem_a20_recalc();
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|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
case 0x0094:
|
|
|
|
|
ps->ps1_94 = val;
|
|
|
|
|
break;
|
2017-06-16 16:00:44 -04:00
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
case 0x00e0:
|
|
|
|
|
if (ps->model != 2011) {
|
|
|
|
|
ps->ps1_e0_addr = val;
|
|
|
|
|
}
|
|
|
|
|
break;
|
2017-09-25 04:31:20 -04:00
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
case 0x00e1:
|
|
|
|
|
if (ps->model != 2011) {
|
|
|
|
|
ps->ps1_e0_regs[ps->ps1_e0_addr] = val;
|
|
|
|
|
recalc_memory(ps);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0102:
|
|
|
|
|
lpt1_remove();
|
|
|
|
|
if (val & 0x04)
|
|
|
|
|
serial_setup(1, SERIAL1_ADDR, SERIAL1_IRQ);
|
2018-04-25 23:51:13 +02:00
|
|
|
else
|
2017-11-05 20:43:01 -05:00
|
|
|
serial_remove(1);
|
|
|
|
|
if (val & 0x10) {
|
|
|
|
|
switch ((val >> 5) & 3) {
|
|
|
|
|
case 0:
|
|
|
|
|
lpt1_init(0x03bc);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
lpt1_init(0x0378);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
lpt1_init(0x0278);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
ps->ps1_102 = val;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0103:
|
|
|
|
|
ps->ps1_103 = val;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0104:
|
|
|
|
|
ps->ps1_104 = val;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0105:
|
|
|
|
|
ps->ps1_105 = val;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0190:
|
|
|
|
|
ps->ps1_190 = val;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
static uint8_t
|
|
|
|
|
ps1_read(uint16_t port, void *priv)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_t *ps = (ps1_t *)priv;
|
|
|
|
|
uint8_t ret = 0xff;
|
|
|
|
|
|
|
|
|
|
switch (port) {
|
|
|
|
|
case 0x0091:
|
2018-04-25 23:51:13 +02:00
|
|
|
ret = ps->ps1_91;
|
|
|
|
|
ps->ps1_91 = 0;
|
2017-11-05 20:43:01 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0092:
|
|
|
|
|
ret = ps->ps1_92;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0094:
|
|
|
|
|
ret = ps->ps1_94;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x00e1:
|
|
|
|
|
if (ps->model != 2011) {
|
|
|
|
|
ret = ps->ps1_e0_regs[ps->ps1_e0_addr];
|
2016-12-23 03:16:24 +01:00
|
|
|
}
|
2017-11-05 20:43:01 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0102:
|
|
|
|
|
if (ps->model == 2011)
|
|
|
|
|
ret = ps->ps1_102 | 0x08;
|
|
|
|
|
else
|
|
|
|
|
ret = ps->ps1_102;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0103:
|
|
|
|
|
ret = ps->ps1_103;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0104:
|
|
|
|
|
ret = ps->ps1_104;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0105:
|
|
|
|
|
if (ps->model == 2011)
|
|
|
|
|
ret = ps->ps1_105;
|
|
|
|
|
else
|
|
|
|
|
ret = ps->ps1_105 | 0x80;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0190:
|
|
|
|
|
ret = ps->ps1_190;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return(ret);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-29 01:18:32 +02:00
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ps1_setup(int model)
|
2017-05-29 01:18:32 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_t *ps;
|
2018-04-25 23:51:13 +02:00
|
|
|
void *priv;
|
2017-11-05 20:43:01 -05:00
|
|
|
|
|
|
|
|
ps = (ps1_t *)malloc(sizeof(ps1_t));
|
|
|
|
|
memset(ps, 0x00, sizeof(ps1_t));
|
|
|
|
|
ps->model = model;
|
|
|
|
|
|
|
|
|
|
io_sethandler(0x0091, 1,
|
|
|
|
|
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
|
|
|
|
|
io_sethandler(0x0092, 1,
|
|
|
|
|
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
|
|
|
|
|
io_sethandler(0x0094, 1,
|
|
|
|
|
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
|
|
|
|
|
io_sethandler(0x0102, 4,
|
|
|
|
|
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
|
|
|
|
|
io_sethandler(0x0190, 1,
|
|
|
|
|
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
|
|
|
|
|
|
2018-04-25 23:51:13 +02:00
|
|
|
lpt1_remove();
|
|
|
|
|
lpt1_init(0x3bc);
|
2017-11-05 20:43:01 -05:00
|
|
|
|
2018-04-25 23:51:13 +02:00
|
|
|
if (model == 2011) {
|
2017-11-05 20:43:01 -05:00
|
|
|
rom_init(&ps->high_rom,
|
2018-04-25 23:51:13 +02:00
|
|
|
L"roms/machines/ibmps1es/f80000.bin",
|
2017-11-05 20:43:01 -05:00
|
|
|
0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL);
|
|
|
|
|
|
|
|
|
|
lpt2_remove();
|
|
|
|
|
|
|
|
|
|
serial_remove(1);
|
|
|
|
|
serial_remove(2);
|
|
|
|
|
|
|
|
|
|
/* Enable the PS/1 VGA controller. */
|
2017-12-04 20:35:05 +01:00
|
|
|
if (model == 2011)
|
|
|
|
|
device_add(&ps1vga_device);
|
|
|
|
|
else
|
2018-01-21 14:54:26 +01:00
|
|
|
device_add(&ibm_ps1_2121_device);
|
2018-04-25 23:51:13 +02:00
|
|
|
|
|
|
|
|
device_add(&snd_device);
|
|
|
|
|
|
|
|
|
|
device_add(&fdc_at_actlow_device);
|
|
|
|
|
|
|
|
|
|
/* Enable the builtin HDC. */
|
|
|
|
|
if (hdc_current == 1) {
|
|
|
|
|
priv = device_add(&ps1_hdc_device);
|
|
|
|
|
|
|
|
|
|
ps1_hdc_inform(priv, ps);
|
|
|
|
|
}
|
2017-11-05 20:43:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (model == 2121) {
|
|
|
|
|
io_sethandler(0x00e0, 2,
|
|
|
|
|
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
|
|
|
|
|
|
2018-04-25 23:51:13 +02:00
|
|
|
#if 0
|
2017-11-08 16:29:54 -05:00
|
|
|
rom_init(&ps->high_rom,
|
|
|
|
|
L"roms/machines/ibmps1_2121/fc0000.bin",
|
|
|
|
|
0xfc0000, 0x20000, 0x1ffff, 0, MEM_MAPPING_EXTERNAL);
|
2017-11-05 20:43:01 -05:00
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/* Initialize the video controller. */
|
|
|
|
|
if (gfxcard == GFX_INTERNAL)
|
|
|
|
|
device_add(&ibm_ps1_2121_device);
|
2018-04-25 23:51:13 +02:00
|
|
|
|
|
|
|
|
device_add(&fdc_at_ps1_device);
|
|
|
|
|
|
|
|
|
|
device_add(&ide_isa_device);
|
|
|
|
|
|
|
|
|
|
device_add(&snd_device);
|
2017-11-05 20:43:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (model == 2133) {
|
2018-04-25 23:51:13 +02:00
|
|
|
device_add(&fdc_at_device);
|
|
|
|
|
|
|
|
|
|
device_add(&ide_isa_device);
|
2017-11-05 20:43:01 -05:00
|
|
|
}
|
2017-05-29 01:18:32 +02:00
|
|
|
}
|
2017-09-02 20:39:57 +02:00
|
|
|
|
2017-10-07 22:18:30 -04:00
|
|
|
|
|
|
|
|
static void
|
2018-03-19 01:02:04 +01:00
|
|
|
ps1_common_init(const machine_t *model)
|
2017-09-02 20:39:57 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
|
|
machine_common_init(model);
|
|
|
|
|
|
|
|
|
|
mem_remap_top_384k();
|
|
|
|
|
|
|
|
|
|
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
|
|
|
|
|
|
|
|
|
|
dma16_init();
|
|
|
|
|
pic2_init();
|
|
|
|
|
|
2018-04-25 23:51:13 +02:00
|
|
|
device_add(&ps_nvr_device);
|
2017-11-05 20:43:01 -05:00
|
|
|
|
2018-01-04 07:44:33 +01:00
|
|
|
device_add(&keyboard_ps2_device);
|
2017-11-05 20:43:01 -05:00
|
|
|
|
|
|
|
|
/* Audio uses ports 200h and 202-207h, so only initialize gameport on 201h. */
|
|
|
|
|
if (joystick_type != 7)
|
|
|
|
|
device_add(&gameport_201_device);
|
2017-09-02 20:39:57 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-07 22:18:30 -04:00
|
|
|
|
2018-04-25 23:51:13 +02:00
|
|
|
/* Set the Card Selected Flag */
|
|
|
|
|
void
|
|
|
|
|
ps1_set_feedback(void *priv)
|
|
|
|
|
{
|
|
|
|
|
ps1_t *ps = (ps1_t *)priv;
|
|
|
|
|
|
|
|
|
|
ps->ps1_91 |= 0x01;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2017-10-07 22:18:30 -04:00
|
|
|
void
|
2018-03-19 01:02:04 +01:00
|
|
|
machine_ps1_m2011_init(const machine_t *model)
|
2017-09-02 20:39:57 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_common_init(model);
|
2017-10-07 22:18:30 -04:00
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_setup(2011);
|
2017-09-02 20:39:57 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-07 22:18:30 -04:00
|
|
|
|
|
|
|
|
void
|
2018-03-19 01:02:04 +01:00
|
|
|
machine_ps1_m2121_init(const machine_t *model)
|
2017-09-02 20:39:57 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_common_init(model);
|
|
|
|
|
|
|
|
|
|
ps1_setup(2121);
|
2017-09-02 20:39:57 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-07 22:18:30 -04:00
|
|
|
|
|
|
|
|
void
|
2018-03-19 01:02:04 +01:00
|
|
|
machine_ps1_m2133_init(const machine_t *model)
|
2017-09-02 20:39:57 +02:00
|
|
|
{
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_common_init(model);
|
2017-10-07 22:18:30 -04:00
|
|
|
|
2017-11-05 20:43:01 -05:00
|
|
|
ps1_setup(2133);
|
2017-12-10 15:16:24 +01:00
|
|
|
|
|
|
|
|
nmi_mask = 0x80;
|
2017-09-02 20:39:57 +02:00
|
|
|
}
|