2017-05-05 01:49:42 +02:00
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/*
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2017-05-30 03:38:38 +02:00
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the SMC FDC37C669 Super I/O Chip.
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*
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2017-08-25 02:21:26 -04:00
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* Version: @(#)fdc37c669.c 1.0.1 2017/08/24
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2017-05-30 03:38:38 +02:00
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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2017-08-25 02:21:26 -04:00
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* Copyright 2016,2017 Miran Grca.
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2017-05-30 03:38:38 +02:00
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*/
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2017-05-05 01:49:42 +02:00
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#include "ibm.h"
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#include "disc.h"
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#include "fdc.h"
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#include "fdd.h"
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#include "io.h"
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#include "lpt.h"
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#include "serial.h"
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2017-08-27 04:33:47 +01:00
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#include "hdd/hdd_ide_at.h"
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2017-05-05 01:49:42 +02:00
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#include "fdc37c669.h"
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static int fdc37c669_locked;
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static int fdc37c669_rw_locked = 0;
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static int fdc37c669_curreg = 0;
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static uint8_t fdc37c669_regs[42];
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static uint8_t tries;
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static uint16_t fdc_valid_ports[2] = {0x3F0, 0x370};
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static uint16_t ide_valid_ports[2] = {0x1F0, 0x170};
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static uint16_t ide_as_valid_ports[2] = {0x3F6, 0x376};
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static uint16_t lpt1_valid_ports[3] = {0x3BC, 0x378, 0x278};
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static uint16_t com1_valid_ports[9] = {0x3F8, 0x2F8, 0x338, 0x3E8, 0x2E8, 0x220, 0x238, 0x2E0, 0x228};
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static uint16_t com2_valid_ports[9] = {0x3F8, 0x2F8, 0x338, 0x3E8, 0x2E8, 0x220, 0x238, 0x2E0, 0x228};
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static uint8_t is_in_array(uint16_t *port_array, uint8_t max, uint16_t port)
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{
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uint8_t i = 0;
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for (i = 0; i < max; i++)
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{
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if (port_array[i] == port) return 1;
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}
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return 0;
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}
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static uint16_t make_port(uint8_t reg)
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{
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uint16_t p = 0;
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switch(reg)
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{
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case 0x20:
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p = ((uint16_t) (fdc37c669_regs[reg] & 0xfc)) << 2;
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p &= 0xFF0;
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if ((p < 0x100) || (p > 0x3F0)) p = 0x3F0;
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if (!(is_in_array(fdc_valid_ports, 2, p))) p = 0x3F0;
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fdc37c669_regs[reg] = ((p >> 2) & 0xfc) | (fdc37c669_regs[reg] & 3);
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break;
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case 0x21:
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p = ((uint16_t) (fdc37c669_regs[reg] & 0xfc)) << 2;
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p &= 0xFF0;
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if ((p < 0x100) || (p > 0x3F0)) p = 0x1F0;
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if (!(is_in_array(ide_valid_ports, 2, p))) p = 0x1F0;
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fdc37c669_regs[reg] = ((p >> 2) & 0xfc) | (fdc37c669_regs[reg] & 3);
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break;
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case 0x22:
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p = ((uint16_t) (fdc37c669_regs[reg] & 0xfc)) << 2;
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p &= 0xFF0;
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if ((p < 0x106) || (p > 0x3F6)) p = 0x3F6;
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if (!(is_in_array(ide_as_valid_ports, 2, p))) p = 0x3F6;
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fdc37c669_regs[reg] = ((p >> 2) & 0xfc) | (fdc37c669_regs[reg] & 3);
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break;
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case 0x23:
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p = ((uint16_t) (fdc37c669_regs[reg] & 0xff)) << 2;
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p &= 0xFFC;
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if ((p < 0x100) || (p > 0x3F8)) p = 0x378;
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if (!(is_in_array(lpt1_valid_ports, 3, p))) p = 0x378;
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fdc37c669_regs[reg] = (p >> 2);
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break;
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case 0x24:
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p = ((uint16_t) (fdc37c669_regs[reg] & 0xfe)) << 2;
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p &= 0xFF8;
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if ((p < 0x100) || (p > 0x3F8)) p = 0x3F8;
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if (!(is_in_array(com1_valid_ports, 9, p))) p = 0x3F8;
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fdc37c669_regs[reg] = ((p >> 2) & 0xfe) | (fdc37c669_regs[reg] & 1);
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break;
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case 0x25:
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p = ((uint16_t) (fdc37c669_regs[reg] & 0xfe)) << 2;
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p &= 0xFF8;
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if ((p < 0x100) || (p > 0x3F8)) p = 0x2F8;
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if (!(is_in_array(com2_valid_ports, 9, p))) p = 0x2F8;
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fdc37c669_regs[reg] = ((p >> 2) & 0xfe) | (fdc37c669_regs[reg] & 1);
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break;
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}
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return p;
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}
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void fdc37c669_write(uint16_t port, uint8_t val, void *priv)
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{
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uint8_t index = (port & 1) ? 0 : 1;
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uint8_t valxor = 0;
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uint8_t max = 42;
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pclog("fdc37c669_write : port=%04x reg %02X = %02X locked=%i\n", port, fdc37c669_curreg, val, fdc37c669_locked);
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if (index)
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{
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if ((val == 0x55) && !fdc37c669_locked)
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{
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if (tries)
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{
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fdc37c669_locked = 1;
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tries = 0;
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}
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else
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{
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tries++;
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}
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}
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else
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{
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if (fdc37c669_locked)
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{
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if (val < max) fdc37c669_curreg = val;
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if (val == 0xaa) fdc37c669_locked = 0;
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}
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else
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{
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if (tries)
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tries = 0;
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}
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}
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}
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else
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{
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if (fdc37c669_locked)
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{
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if ((fdc37c669_curreg < 0x18) && (fdc37c669_rw_locked)) return;
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if ((fdc37c669_curreg >= 0x26) && (fdc37c669_curreg <= 0x27)) return;
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if (fdc37c669_curreg == 0x29) return;
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valxor = val ^ fdc37c669_regs[fdc37c669_curreg];
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fdc37c669_regs[fdc37c669_curreg] = val;
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goto process_value;
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}
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}
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return;
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process_value:
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switch(fdc37c669_curreg)
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{
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case 0:
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if (valxor & 3)
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{
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ide_pri_disable();
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if ((fdc37c669_regs[0] & 3) == 2) ide_pri_enable_ex();
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break;
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}
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if (valxor & 8)
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{
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fdc_remove();
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if ((fdc37c669_regs[0] & 8) && (fdc37c669_regs[0x20] & 0xc0)) fdc_set_base(make_port(0x20), 1);
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}
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break;
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case 1:
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if (valxor & 4)
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{
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lpt1_remove();
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if ((fdc37c669_regs[1] & 4) && (fdc37c669_regs[0x23] & 0xc0)) lpt1_init(make_port(0x23));
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}
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if (valxor & 7)
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{
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fdc37c669_rw_locked = (val & 8) ? 0 : 1;
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}
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break;
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case 2:
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if (valxor & 8)
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{
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2017-05-07 02:14:44 -04:00
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serial_remove(1);
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if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] & 0xc0)) serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 8);
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2017-05-05 01:49:42 +02:00
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}
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if (valxor & 0x80)
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{
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2017-05-07 02:14:44 -04:00
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serial_remove(2);
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if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] & 0xc0)) serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0xF);
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2017-05-05 01:49:42 +02:00
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}
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break;
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case 3:
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if (valxor & 2) fdc_update_enh_mode((val & 2) ? 1 : 0);
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break;
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case 5:
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if (valxor & 0x18) fdc_update_densel_force((val & 0x18) >> 3);
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if (valxor & 0x20) fdd_swap = ((val & 0x20) >> 5);
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break;
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case 0xB:
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if (valxor & 3) fdc_update_rwc(0, val & 3);
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if (valxor & 0xC) fdc_update_rwc(1, (val & 0xC) >> 2);
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break;
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case 0x20:
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if (valxor & 0xfc)
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{
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fdc_remove();
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if ((fdc37c669_regs[0] & 8) && (fdc37c669_regs[0x20] & 0xc0)) fdc_set_base(make_port(0x20), 1);
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}
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break;
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case 0x21:
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case 0x22:
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if (valxor & 0xfc)
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{
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ide_pri_disable();
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switch (fdc37c669_curreg)
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{
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case 0x21:
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ide_set_base(0, make_port(0x21));
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break;
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case 0x22:
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ide_set_side(0, make_port(0x22));
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break;
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}
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if ((fdc37c669_regs[0] & 3) == 2) ide_pri_enable_ex();
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}
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break;
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case 0x23:
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if (valxor)
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{
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lpt1_remove();
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if ((fdc37c669_regs[1] & 4) && (fdc37c669_regs[0x23] & 0xc0)) lpt1_init(make_port(0x23));
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}
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break;
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case 0x24:
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if (valxor & 0xfe)
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{
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2017-05-07 02:14:44 -04:00
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serial_remove(1);
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if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] & 0xc0)) serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 8);
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2017-05-05 01:49:42 +02:00
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}
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break;
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case 0x25:
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if (valxor & 0xfe)
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{
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2017-05-07 02:14:44 -04:00
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serial_remove(2);
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if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] & 0xc0)) serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0xF);
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2017-05-05 01:49:42 +02:00
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}
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break;
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case 0x28:
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if (valxor & 0xf)
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{
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2017-05-07 02:14:44 -04:00
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serial_remove(2);
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2017-05-05 01:49:42 +02:00
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if ((fdc37c669_regs[0x28] & 0xf) == 0) fdc37c669_regs[0x28] |= 0x3;
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2017-05-07 02:14:44 -04:00
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if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] & 0xc0)) serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0xF);
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2017-05-05 01:49:42 +02:00
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}
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if (valxor & 0xf0)
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{
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2017-05-07 02:14:44 -04:00
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serial_remove(1);
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2017-05-05 01:49:42 +02:00
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if ((fdc37c669_regs[0x28] & 0xf0) == 0) fdc37c669_regs[0x28] |= 0x40;
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2017-05-07 02:14:44 -04:00
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if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] & 0xc0)) serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 8);
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2017-05-05 01:49:42 +02:00
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}
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break;
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}
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}
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uint8_t fdc37c669_read(uint16_t port, void *priv)
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{
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uint8_t index = (port & 1) ? 0 : 1;
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pclog("fdc37c669_read : port=%04x reg %02X locked=%i\n", port, fdc37c669_curreg, fdc37c669_locked);
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if (!fdc37c669_locked)
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{
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return 0xFF;
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}
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if (index)
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return fdc37c669_curreg;
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else
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{
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pclog("0x03F1: %02X\n", fdc37c669_regs[fdc37c669_curreg]);
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if ((fdc37c669_curreg < 0x18) && (fdc37c669_rw_locked)) return 0xff;
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return fdc37c669_regs[fdc37c669_curreg];
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}
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}
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void fdc37c669_reset(void)
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{
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fdc_remove();
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fdc_add_for_superio();
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fdc_update_is_nsc(0);
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2017-05-07 02:14:44 -04:00
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serial_remove(1);
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serial_setup(1, SERIAL1_ADDR, SERIAL1_IRQ);
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2017-05-05 01:49:42 +02:00
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2017-05-07 02:14:44 -04:00
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serial_remove(2);
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serial_setup(2, SERIAL2_ADDR, SERIAL2_IRQ);
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2017-05-05 01:49:42 +02:00
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lpt2_remove();
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lpt1_remove();
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lpt1_init(0x378);
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memset(fdc37c669_regs, 0, 42);
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fdc37c669_regs[0] = 0x28;
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fdc37c669_regs[1] = 0x9C;
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fdc37c669_regs[2] = 0x88;
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fdc37c669_regs[3] = 0x78;
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fdc37c669_regs[4] = 0;
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fdc37c669_regs[5] = 0;
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fdc37c669_regs[6] = 0xFF;
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fdc37c669_regs[7] = 0;
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fdc37c669_regs[8] = 0;
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fdc37c669_regs[9] = 0;
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fdc37c669_regs[0xA] = 0;
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fdc37c669_regs[0xB] = 0;
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fdc37c669_regs[0xC] = 0;
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fdc37c669_regs[0xD] = 3;
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fdc37c669_regs[0xE] = 2;
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fdc37c669_regs[0x1E] = 0x80; /* Gameport controller. */
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fdc37c669_regs[0x20] = (0x3f0 >> 2) & 0xfc;
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fdc37c669_regs[0x21] = (0x1f0 >> 2) & 0xfc;
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fdc37c669_regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
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fdc37c669_regs[0x23] = (0x378 >> 2);
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fdc37c669_regs[0x24] = (0x3f8 >> 2) & 0xfe;
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|
|
fdc37c669_regs[0x25] = (0x2f8 >> 2) & 0xfe;
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|
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fdc37c669_regs[0x26] = (2 << 4) | 3;
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fdc37c669_regs[0x27] = (6 << 4) | 7;
|
|
|
|
|
fdc37c669_regs[0x28] = (4 << 4) | 3;
|
|
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|
|
fdc_update_densel_polarity(1);
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|
|
fdc_update_densel_force(0);
|
|
|
|
|
fdd_swap = 0;
|
|
|
|
|
fdc37c669_locked = 0;
|
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|
|
|
fdc37c669_rw_locked = 0;
|
|
|
|
|
}
|
|
|
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|
|
|
|
|
|
void fdc37c669_init()
|
|
|
|
|
{
|
|
|
|
|
io_sethandler(0x3f0, 0x0002, fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, NULL);
|
|
|
|
|
|
|
|
|
|
fdc37c669_reset();
|
|
|
|
|
|
|
|
|
|
pci_reset_handler.super_io_reset = fdc37c669_reset;
|
|
|
|
|
}
|
