298 lines
12 KiB
C
298 lines
12 KiB
C
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static int opBT_w_r_a16(uint32_t fetchdat)
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{
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int tempc;
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uint16_t temp;
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fetch_ea_16(fetchdat);
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eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = 0;
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temp = geteaw(); if (abrt) return 1;
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flags_rebuild();
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if (temp & (1 << (cpu_state.regs[reg].w & 15))) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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}
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static int opBT_w_r_a32(uint32_t fetchdat)
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{
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uint16_t temp;
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fetch_ea_32(fetchdat);
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eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = 0;
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temp = geteaw(); if (abrt) return 1;
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flags_rebuild();
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if (temp & (1 << (cpu_state.regs[reg].w & 15))) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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}
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static int opBT_l_r_a16(uint32_t fetchdat)
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{
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uint32_t temp;
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fetch_ea_16(fetchdat);
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eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = 0;
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temp = geteal(); if (abrt) return 1;
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flags_rebuild();
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if (temp & (1 << (cpu_state.regs[reg].l & 31))) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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}
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static int opBT_l_r_a32(uint32_t fetchdat)
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{
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uint32_t temp;
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fetch_ea_32(fetchdat);
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eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = 0;
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temp = geteal(); if (abrt) return 1;
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flags_rebuild();
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if (temp & (1 << (cpu_state.regs[reg].l & 31))) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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}
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#define opBT(name, operation) \
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static int opBT ## name ## _w_r_a16(uint32_t fetchdat) \
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{ \
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int tempc; \
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uint16_t temp; \
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\
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fetch_ea_16(fetchdat); \
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eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = eal_w = 0; \
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temp = geteaw(); if (abrt) return 1; \
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tempc = (temp & (1 << (cpu_state.regs[reg].w & 15))) ? 1 : 0; \
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temp operation (1 << (cpu_state.regs[reg].w & 15)); \
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seteaw(temp); if (abrt) return 1; \
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flags_rebuild(); \
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if (tempc) flags |= C_FLAG; \
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else flags &= ~C_FLAG; \
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\
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CLOCK_CYCLES(6); \
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return 0; \
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} \
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static int opBT ## name ## _w_r_a32(uint32_t fetchdat) \
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{ \
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int tempc; \
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uint16_t temp; \
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\
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fetch_ea_32(fetchdat); \
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eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = eal_w = 0; \
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temp = geteaw(); if (abrt) return 1; \
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tempc = (temp & (1 << (cpu_state.regs[reg].w & 15))) ? 1 : 0; \
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temp operation (1 << (cpu_state.regs[reg].w & 15)); \
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seteaw(temp); if (abrt) return 1; \
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flags_rebuild(); \
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if (tempc) flags |= C_FLAG; \
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else flags &= ~C_FLAG; \
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\
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CLOCK_CYCLES(6); \
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return 0; \
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} \
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static int opBT ## name ## _l_r_a16(uint32_t fetchdat) \
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{ \
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int tempc; \
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uint32_t temp; \
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\
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fetch_ea_16(fetchdat); \
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eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = eal_w = 0; \
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temp = geteal(); if (abrt) return 1; \
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tempc = (temp & (1 << (cpu_state.regs[reg].l & 31))) ? 1 : 0; \
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temp operation (1 << (cpu_state.regs[reg].l & 31)); \
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seteal(temp); if (abrt) return 1; \
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flags_rebuild(); \
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if (tempc) flags |= C_FLAG; \
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else flags &= ~C_FLAG; \
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\
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CLOCK_CYCLES(6); \
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return 0; \
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} \
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static int opBT ## name ## _l_r_a32(uint32_t fetchdat) \
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{ \
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int tempc; \
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uint32_t temp; \
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\
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fetch_ea_32(fetchdat); \
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eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = eal_w = 0; \
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temp = geteal(); if (abrt) return 1; \
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tempc = (temp & (1 << (cpu_state.regs[reg].l & 31))) ? 1 : 0; \
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temp operation (1 << (cpu_state.regs[reg].l & 31)); \
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seteal(temp); if (abrt) return 1; \
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flags_rebuild(); \
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if (tempc) flags |= C_FLAG; \
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else flags &= ~C_FLAG; \
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\
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CLOCK_CYCLES(6); \
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return 0; \
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}
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opBT(C, ^=)
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opBT(R, &=~)
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opBT(S, |=)
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static int opBA_w_a16(uint32_t fetchdat)
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{
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int tempc, count;
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uint16_t temp;
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fetch_ea_16(fetchdat);
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temp = geteaw();
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count = getbyte(); if (abrt) return 1;
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tempc = temp & (1 << count);
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flags_rebuild();
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switch (rmdat & 0x38)
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{
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case 0x20: /*BT w,imm*/
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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case 0x28: /*BTS w,imm*/
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temp |= (1 << count);
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break;
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case 0x30: /*BTR w,imm*/
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temp &= ~(1 << count);
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break;
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case 0x38: /*BTC w,imm*/
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temp ^= (1 << count);
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = oldpc;
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x86illegal();
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break;
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}
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seteaw(temp); if (abrt) return 1;
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opBA_w_a32(uint32_t fetchdat)
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{
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int tempc, count;
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uint16_t temp;
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fetch_ea_32(fetchdat);
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temp = geteaw();
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count = getbyte(); if (abrt) return 1;
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tempc = temp & (1 << count);
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flags_rebuild();
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switch (rmdat & 0x38)
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{
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case 0x20: /*BT w,imm*/
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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case 0x28: /*BTS w,imm*/
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temp |= (1 << count);
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break;
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case 0x30: /*BTR w,imm*/
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temp &= ~(1 << count);
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break;
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case 0x38: /*BTC w,imm*/
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temp ^= (1 << count);
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = oldpc;
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x86illegal();
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break;
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}
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seteaw(temp); if (abrt) return 1;
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opBA_l_a16(uint32_t fetchdat)
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{
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int tempc, count;
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uint32_t temp;
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fetch_ea_16(fetchdat);
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temp = geteal();
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count = getbyte(); if (abrt) return 1;
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tempc = temp & (1 << count);
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flags_rebuild();
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switch (rmdat & 0x38)
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{
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case 0x20: /*BT w,imm*/
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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case 0x28: /*BTS w,imm*/
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temp |= (1 << count);
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break;
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case 0x30: /*BTR w,imm*/
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temp &= ~(1 << count);
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break;
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case 0x38: /*BTC w,imm*/
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temp ^= (1 << count);
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = oldpc;
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x86illegal();
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break;
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}
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seteal(temp); if (abrt) return 1;
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opBA_l_a32(uint32_t fetchdat)
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{
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int tempc, count;
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uint32_t temp;
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fetch_ea_32(fetchdat);
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temp = geteal();
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count = getbyte(); if (abrt) return 1;
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tempc = temp & (1 << count);
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flags_rebuild();
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switch (rmdat & 0x38)
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{
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case 0x20: /*BT w,imm*/
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(3);
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return 0;
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case 0x28: /*BTS w,imm*/
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temp |= (1 << count);
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break;
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case 0x30: /*BTR w,imm*/
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temp &= ~(1 << count);
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break;
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case 0x38: /*BTC w,imm*/
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temp ^= (1 << count);
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = oldpc;
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x86illegal();
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break;
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}
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seteal(temp); if (abrt) return 1;
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if (tempc) flags |= C_FLAG;
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else flags &= ~C_FLAG;
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CLOCK_CYCLES(6);
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return 0;
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}
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