461 lines
12 KiB
C
461 lines
12 KiB
C
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Winbond W83769F controller.
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2020 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/cdrom.h>
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#include <86box/scsi_device.h>
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#include <86box/scsi_cdrom.h>
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#include <86box/dma.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/keyboard.h>
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#include <86box/mem.h>
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#include <86box/pci.h>
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#include <86box/pic.h>
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#include <86box/timer.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/hdc_ide_sff8038i.h>
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#include <86box/zip.h>
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#include <86box/mo.h>
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typedef struct w83769f_t {
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uint8_t vlb_idx;
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uint8_t id;
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uint8_t in_cfg;
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uint8_t channels;
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uint8_t pci;
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uint8_t pci_slot;
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uint8_t pad;
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uint8_t pad0;
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uint8_t regs[256];
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} w83769f_t;
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static int next_id = 0;
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#ifdef ENABLE_W83769F_LOG
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int w83769f_do_log = ENABLE_W83769F_LOG;
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static void
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w83769f_log(const char *fmt, ...)
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{
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va_list ap;
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if (cmd640_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define w83769f_log(fmt, ...)
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#endif
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void
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w83769f_set_irq_0(uint8_t status, void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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int irq = !!(status & 0x04);
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if (!(dev->regs[0x50] & 0x04) || (status & 0x04))
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dev->regs[0x50] = (dev->regs[0x50] & ~0x04) | status;
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if (!(dev->channels & 1))
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return;
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if (irq)
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picint(1 << 14);
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else
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picintc(1 << 14);
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}
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void
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w83769f_set_irq_1(uint8_t status, void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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int irq = !!(status & 0x04);
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if (!(dev->regs[0x50] & 0x04) || (status & 0x04))
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dev->regs[0x50] = (dev->regs[0x50] & ~0x04) | status;
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if (!(dev->channels & 2))
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return;
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if (irq)
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picint(1 << 15);
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else
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picintc(1 << 15);
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}
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static void
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w83769f_ide_handlers(w83769f_t *dev)
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{
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if (dev->channels & 0x01) {
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ide_pri_disable();
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if (!dev->pci || (dev->regs[0x04] & 0x01))
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ide_pri_enable();
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}
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if (dev->channels & 0x02) {
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ide_sec_disable();
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if ((!dev->pci || (dev->regs[0x04] & 0x01)) && (dev->regs[0x57] & 0x01))
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ide_sec_enable();
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}
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}
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static void
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w83769f_common_write(int addr, uint8_t val, w83769f_t *dev)
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{
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switch (addr) {
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case 0x50:
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case 0x57:
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dev->regs[0x57] = val & 0x01;
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w83769f_ide_handlers(dev);
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break;
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case 0x51:
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dev->regs[addr] = val & 0x7f;
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break;
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case 0x52:
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case 0x54:
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case 0x56:
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case 0x58 ... 0x59:
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dev->regs[addr] = val;
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break;
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case 0x53:
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case 0x55:
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dev->regs[addr] = val & 0xcf;
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break;
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default:
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break;
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}
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}
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static void
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w83769f_vlb_write(uint16_t addr, uint8_t val, void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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switch (addr) {
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case 0x0034:
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case 0x00b4:
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dev->vlb_idx = val;
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break;
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case 0x0038:
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case 0x00b8:
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w83769f_common_write(dev->vlb_idx, val, dev);
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break;
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default:
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break;
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}
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}
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static void
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w83769f_vlb_writew(uint16_t addr, uint16_t val, void *priv)
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{
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w83769f_vlb_write(addr, val & 0xff, priv);
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w83769f_vlb_write(addr + 1, val >> 8, priv);
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}
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static void
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w83769f_vlb_writel(uint16_t addr, uint32_t val, void *priv)
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{
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w83769f_vlb_writew(addr, val & 0xffff, priv);
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w83769f_vlb_writew(addr + 2, val >> 16, priv);
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}
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static uint8_t
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w83769f_vlb_read(uint16_t addr, void *priv)
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{
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uint8_t ret = 0xff;
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w83769f_t *dev = (w83769f_t *) priv;
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switch (addr) {
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case 0x0034:
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case 0x00b4:
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ret = dev->vlb_idx;
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break;
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case 0x0038:
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case 0x00b8:
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ret = dev->regs[dev->vlb_idx];
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if (dev->vlb_idx == 0x50)
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dev->regs[0x50] &= ~0x04;
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break;
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default:
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break;
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}
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return ret;
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}
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static uint16_t
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w83769f_vlb_readw(uint16_t addr, void *priv)
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{
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uint16_t ret = 0xffff;
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ret = w83769f_vlb_read(addr, priv);
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ret |= (w83769f_vlb_read(addr + 1, priv) << 8);
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return ret;
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}
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static uint32_t
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w83769f_vlb_readl(uint16_t addr, void *priv)
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{
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uint32_t ret = 0xffffffff;
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ret = w83769f_vlb_readw(addr, priv);
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ret |= (w83769f_vlb_readw(addr + 2, priv) << 16);
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return ret;
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}
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static void
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w83769f_pci_write(int func, int addr, uint8_t val, void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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w83769f_log("w83769f_pci_write(%i, %02X, %02X)\n", func, addr, val);
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if (func == 0x00)
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switch (addr) {
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case 0x04:
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dev->regs[addr] = (dev->regs[addr] & 0xbf) | (val & 0x40);
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w83769f_ide_handlers(dev);
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break;
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case 0x07:
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dev->regs[addr] &= ~(val & 0x80);
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break;
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}
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}
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static uint8_t
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w83769f_pci_read(int func, int addr, void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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uint8_t ret = 0xff;
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if (func == 0x00)
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ret = dev->regs[addr];
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w83769f_log("w83769f_pci_read(%i, %02X, %02X)\n", func, addr, ret);
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return ret;
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}
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static void
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w83769f_reset(void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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int i = 0;
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int min_channel;
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int max_channel;
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switch (dev->channels) {
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default:
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case 0x00:
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min_channel = max_channel = 0;
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break;
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case 0x01:
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min_channel = 0;
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max_channel = 1;
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break;
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case 0x02:
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min_channel = 2;
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max_channel = 3;
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break;
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case 0x03:
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min_channel = 0;
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max_channel = 3;
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break;
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}
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for (i = 0; i < CDROM_NUM; i++) {
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if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel >= min_channel) &&
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(cdrom[i].ide_channel <= max_channel) && cdrom[i].priv)
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scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv);
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}
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for (i = 0; i < ZIP_NUM; i++) {
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if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel >= min_channel) &&
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(zip_drives[i].ide_channel <= max_channel) && zip_drives[i].priv)
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zip_reset((scsi_common_t *) zip_drives[i].priv);
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}
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for (i = 0; i < MO_NUM; i++) {
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if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel >= min_channel) &&
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(mo_drives[i].ide_channel <= max_channel) && mo_drives[i].priv)
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mo_reset((scsi_common_t *) mo_drives[i].priv);
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}
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if (dev->channels & 0x01)
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w83769f_set_irq_0(0x00, priv);
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if (dev->channels & 0x02)
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w83769f_set_irq_1(0x00, priv);
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memset(dev->regs, 0x00, sizeof(dev->regs));
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dev->regs[0x50] = (dev->id << 3); /* Device ID: 00 = 60h, 01 = 61h, 10 = 62h, 11 = 63h */
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dev->regs[0x51] = 0x40;
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dev->regs[0x57] = 0x01; /* Required by the MSI MS-5109 */
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dev->regs[0x59] = 0x40;
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if (dev->pci) {
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dev->regs[0x00] = 0xad; /* Winbond */
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dev->regs[0x01] = 0x10;
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dev->regs[0x02] = 0x01; /* W83769 */
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dev->regs[0x03] = 0x00;
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dev->regs[0x04] = 0x01;
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dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */
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dev->regs[0x08] = 0x02; /* 00h for Rev BB, 02h for Rev A3C */
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dev->regs[0x09] = 0x00; /* Programming interface */
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dev->regs[0x0a] = 0x01; /* IDE controller */
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dev->regs[0x0b] = 0x01; /* Mass storage controller */
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dev->regs[0x3c] = 0x0e; /* IRQ 14 */
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dev->regs[0x3d] = 0x01; /* INTA */
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} else
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dev->regs[0x04] = 0x01; /* To make sure the two channels get enabled. */
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w83769f_ide_handlers(dev);
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}
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static void
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w83769f_close(void *priv)
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{
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w83769f_t *dev = (w83769f_t *) priv;
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free(dev);
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next_id = 0;
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}
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static void *
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w83769f_init(const device_t *info)
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{
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w83769f_t *dev = (w83769f_t *) malloc(sizeof(w83769f_t));
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memset(dev, 0x00, sizeof(w83769f_t));
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dev->id = next_id | 0x60;
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dev->pci = !!(info->flags & DEVICE_PCI);
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dev->channels = ((info->local & 0x60000) >> 17) & 0x03;
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if (info->flags & DEVICE_PCI) {
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device_add(&ide_pci_2ch_device);
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if (info->local & 0x80000)
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pci_add_card(PCI_ADD_NORMAL, w83769f_pci_read, w83769f_pci_write, dev, &dev->pci_slot);
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else
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pci_add_card(PCI_ADD_IDE, w83769f_pci_read, w83769f_pci_write, dev, &dev->pci_slot);
|
||
|
|
} else if (info->flags & DEVICE_VLB)
|
||
|
|
device_add(&ide_vlb_2ch_device);
|
||
|
|
|
||
|
|
if (dev->channels & 0x01)
|
||
|
|
ide_set_bus_master(0, NULL, w83769f_set_irq_0, dev);
|
||
|
|
|
||
|
|
if (dev->channels & 0x02)
|
||
|
|
ide_set_bus_master(1, NULL, w83769f_set_irq_1, dev);
|
||
|
|
|
||
|
|
/* The CMD PCI-0640B IDE controller has no DMA capability,
|
||
|
|
so set our devices IDE devices to force ATA-3 (no DMA). */
|
||
|
|
if (dev->channels & 0x01)
|
||
|
|
ide_board_set_force_ata3(0, 1);
|
||
|
|
|
||
|
|
if (dev->channels & 0x02)
|
||
|
|
ide_board_set_force_ata3(1, 1);
|
||
|
|
|
||
|
|
io_sethandler(info->local & 0xffff, 0x0001,
|
||
|
|
w83769f_vlb_read, w83769f_vlb_readw, w83769f_vlb_readl,
|
||
|
|
w83769f_vlb_write, w83769f_vlb_writew, w83769f_vlb_writel,
|
||
|
|
dev);
|
||
|
|
io_sethandler((info->local & 0xffff) + 0x0004, 0x0001,
|
||
|
|
w83769f_vlb_read, w83769f_vlb_readw, w83769f_vlb_readl,
|
||
|
|
w83769f_vlb_write, w83769f_vlb_writew, w83769f_vlb_writel,
|
||
|
|
dev);
|
||
|
|
|
||
|
|
next_id++;
|
||
|
|
|
||
|
|
w83769f_reset(dev);
|
||
|
|
|
||
|
|
return dev;
|
||
|
|
}
|
||
|
|
|
||
|
|
const device_t ide_w83769f_vlb_device = {
|
||
|
|
.name = "Winbond W83769F VLB",
|
||
|
|
.internal_name = "ide_w83769f_vlb",
|
||
|
|
.flags = DEVICE_VLB,
|
||
|
|
.local = 0x600b4,
|
||
|
|
.init = w83769f_init,
|
||
|
|
.close = w83769f_close,
|
||
|
|
.reset = w83769f_reset,
|
||
|
|
{ .available = NULL },
|
||
|
|
.speed_changed = NULL,
|
||
|
|
.force_redraw = NULL,
|
||
|
|
.config = NULL
|
||
|
|
};
|
||
|
|
|
||
|
|
const device_t ide_w83769f_vlb_34_device = {
|
||
|
|
.name = "Winbond W83769F VLB (Port 34h)",
|
||
|
|
.internal_name = "ide_w83769f_vlb_34",
|
||
|
|
.flags = DEVICE_VLB,
|
||
|
|
.local = 0x60034,
|
||
|
|
.init = w83769f_init,
|
||
|
|
.close = w83769f_close,
|
||
|
|
.reset = w83769f_reset,
|
||
|
|
{ .available = NULL },
|
||
|
|
.speed_changed = NULL,
|
||
|
|
.force_redraw = NULL,
|
||
|
|
.config = NULL
|
||
|
|
};
|
||
|
|
|
||
|
|
const device_t ide_w83769f_pci_device = {
|
||
|
|
.name = "Winbond W83769F PCI",
|
||
|
|
.internal_name = "ide_w83769f_pci",
|
||
|
|
.flags = DEVICE_PCI,
|
||
|
|
.local = 0x600b4,
|
||
|
|
.init = w83769f_init,
|
||
|
|
.close = w83769f_close,
|
||
|
|
.reset = w83769f_reset,
|
||
|
|
{ .available = NULL },
|
||
|
|
.speed_changed = NULL,
|
||
|
|
.force_redraw = NULL,
|
||
|
|
.config = NULL
|
||
|
|
};
|
||
|
|
|
||
|
|
const device_t ide_w83769f_pci_34_device = {
|
||
|
|
.name = "Winbond W83769F PCI (Port 34h)",
|
||
|
|
.internal_name = "ide_w83769f_pci_34",
|
||
|
|
.flags = DEVICE_PCI,
|
||
|
|
.local = 0x60034,
|
||
|
|
.init = w83769f_init,
|
||
|
|
.close = w83769f_close,
|
||
|
|
.reset = w83769f_reset,
|
||
|
|
{ .available = NULL },
|
||
|
|
.speed_changed = NULL,
|
||
|
|
.force_redraw = NULL,
|
||
|
|
.config = NULL
|
||
|
|
};
|
||
|
|
|