Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
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void host_arm64_ADD_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
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void host_arm64_ADD_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_ADD_REG_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_ADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ADDX_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint64_t imm_data);
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void host_arm64_ADDP_V4S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ADR(codeblock_t *block, int dst_reg, int offset);
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void host_arm64_AND_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
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void host_arm64_AND_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_AND_REG_ASR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_AND_REG_ROR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_AND_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ANDS_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
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void host_arm64_ASR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
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void host_arm64_B(codeblock_t *block, void *dest);
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void host_arm64_BFI(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
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void host_arm64_BLR(codeblock_t *block, int addr_reg);
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void host_arm64_BEQ(codeblock_t *block, void *dest);
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uint32_t *host_arm64_BCC_(codeblock_t *block);
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uint32_t *host_arm64_BCS_(codeblock_t *block);
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uint32_t *host_arm64_BEQ_(codeblock_t *block);
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uint32_t *host_arm64_BGE_(codeblock_t *block);
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uint32_t *host_arm64_BGT_(codeblock_t *block);
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uint32_t *host_arm64_BHI_(codeblock_t *block);
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uint32_t *host_arm64_BLE_(codeblock_t *block);
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uint32_t *host_arm64_BLS_(codeblock_t *block);
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uint32_t *host_arm64_BLT_(codeblock_t *block);
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uint32_t *host_arm64_BMI_(codeblock_t *block);
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uint32_t *host_arm64_BNE_(codeblock_t *block);
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uint32_t *host_arm64_BPL_(codeblock_t *block);
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uint32_t *host_arm64_BVC_(codeblock_t *block);
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uint32_t *host_arm64_BVS_(codeblock_t *block);
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void host_arm64_branch_set_offset(uint32_t *opcode, void *dest);
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void host_arm64_BR(codeblock_t *block, int addr_reg);
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void host_arm64_BIC_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CBNZ(codeblock_t *block, int reg, uintptr_t dest);
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void host_arm64_CMEQ_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CMEQ_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CMGT_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CMGT_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CMN_IMM(codeblock_t *block, int src_n_reg, uint32_t imm_data);
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void host_arm64_CMNX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data);
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void host_arm64_CMP_IMM(codeblock_t *block, int src_n_reg, uint32_t imm_data);
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void host_arm64_CMPX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data);
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#define host_arm64_CMP_REG(block, src_n_reg, src_m_reg) host_arm64_CMP_REG_LSL(block, src_n_reg, src_m_reg, 0)
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void host_arm64_CMP_REG_LSL(codeblock_t *block, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_CSEL_CC(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CSEL_EQ(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_CSEL_VS(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_DUP_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int element);
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void host_arm64_EOR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
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void host_arm64_EOR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_EOR_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FABS_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FADD_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FCMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FCMGE_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FCMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FCMP_D(codeblock_t *block, int src_n_reg, int src_m_reg);
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void host_arm64_FDIV_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FDIV_S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FMAX_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FMIN_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FMUL_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FMUL_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FSUB_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FSUB_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_FCVT_D_S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVT_S_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTMS_W_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTMS_X_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTNS_W_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTNS_X_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTPS_W_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTPS_X_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTZS_W_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTZS_X_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FCVTZS_V2S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FMOV_D_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FMOV_D_Q(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FMOV_Q_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FMOV_S_W(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FMOV_W_S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FMOV_S_ONE(codeblock_t *block, int dst_reg);
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void host_arm64_FNEG_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FRINTX_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FSQRT_D(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_FSQRT_S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_LDP_POSTIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset);
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void host_arm64_LDR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_LDR_IMM_X(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_LDR_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDR_REG_X(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDR_REG_F32(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDR_IMM_F64(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_LDR_REG_F64(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDR_REG_F64_S(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDRB_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_LDRB_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDRH_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_LDRH_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LDRX_REG_LSL3(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
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void host_arm64_LSL(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
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void host_arm64_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
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void host_arm64_MOV_REG_ASR(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
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void host_arm64_MOV_REG(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
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void host_arm64_MOV_REG_LSR(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
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void host_arm64_MOV_REG_ROR(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
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void host_arm64_MOVX_IMM(codeblock_t *block, int reg, uint64_t imm_data);
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void host_arm64_MOVX_REG(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
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void host_arm64_MOVZ_IMM(codeblock_t *block, int reg, uint32_t imm_data);
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void host_arm64_MOVK_IMM(codeblock_t *block, int reg, uint32_t imm_data);
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void host_arm64_MSR_FPCR(codeblock_t *block, int src_reg);
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void host_arm64_MUL_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_NOP(codeblock_t *block);
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void host_arm64_ORR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
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void host_arm64_ORR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_ORR_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_RET(codeblock_t *block, int reg);
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void host_arm64_ROR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
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void host_arm64_SADDLP_V2S_4H(codeblock_t *block, int dst_reg, int src_n_reg);
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void host_arm64_SBFX(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
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void host_arm64_SCVTF_D_Q(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_SCVTF_D_W(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_SCVTF_V2S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_SQADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SQADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_SQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_SHL_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_SHL_V2S(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_SHL_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_SHRN_V4H_4S(codeblock_t *block, int dst_reg, int src_n_reg, int shift);
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void host_arm64_SMULL_V4S_4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SSHR_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_SSHR_V2S(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_SSHR_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_STP_PREIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset);
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void host_arm64_STR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_STR_IMM_Q(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_STR_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
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void host_arm64_STR_REG_F32(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
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void host_arm64_STR_IMM_F64(codeblock_t *block, int src_reg, int base_reg, int offset);
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void host_arm64_STR_REG_F64(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
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void host_arm64_STR_REG_F64_S(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
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void host_arm64_STRB_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_STRB_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
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void host_arm64_STRH_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset);
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void host_arm64_STRH_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
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void host_arm64_SUB_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
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void host_arm64_SUB_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_SUB_REG_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
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void host_arm64_SUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_SUB_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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uint32_t *host_arm64_TBNZ(codeblock_t *block, int reg, int bit);
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#define host_arm64_TST_IMM(block, src_n_reg, imm_data) host_arm64_ANDS_IMM(block, REG_XZR, src_n_reg, imm_data)
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void host_arm64_UBFX(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
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void host_arm64_UQADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_UQADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_UQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_UQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_UQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_UQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg);
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void host_arm64_USHR_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_USHR_V2S(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_USHR_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift);
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void host_arm64_ZIP1_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ZIP1_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ZIP1_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ZIP2_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ZIP2_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_ZIP2_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
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void host_arm64_call(codeblock_t *block, void *dst_addr);
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void host_arm64_jump(codeblock_t *block, uintptr_t dst_addr);
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void host_arm64_mov_imm(codeblock_t *block, int reg, uint32_t imm_data);
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#define in_range7_x(offset) (((offset) >= -0x200) && ((offset) < (0x200)) && !((offset) & 7))
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#define in_range12_b(offset) (((offset) >= 0) && ((offset) < 0x1000))
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#define in_range12_h(offset) (((offset) >= 0) && ((offset) < 0x2000) && !((offset) & 1))
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#define in_range12_w(offset) (((offset) >= 0) && ((offset) < 0x4000) && !((offset) & 3))
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#define in_range12_q(offset) (((offset) >= 0) && ((offset) < 0x8000) && !((offset) & 7))
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void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p);
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2022-02-18 21:38:51 -05:00
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void codegen_alloc(codeblock_t *block, int size);
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