2017-05-30 03:38:38 +02:00
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the IDE emulation for hard disks and ATAPI
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* CD-ROM devices.
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*
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2017-08-25 02:21:26 -04:00
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* Version: @(#)hdd_ide_at.c 1.0.5 2017/08/24
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2017-05-30 03:38:38 +02:00
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*
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2017-06-04 02:11:19 -04:00
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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2017-05-30 03:38:38 +02:00
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* Miran Grca, <mgrca8@gmail.com>
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* TheCollector1995, <mariogplayer8@gmail.com>
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* Copyright 2008-2017 Sarah Walker.
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2017-08-25 02:21:26 -04:00
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* Copyright 2016,2017 Miran Grca.
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2017-05-30 03:38:38 +02:00
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*/
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2016-06-26 00:34:39 +02:00
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#include <stdint.h>
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#include <sys/types.h>
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2017-06-16 14:09:40 -04:00
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#include <stdarg.h>
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2017-05-05 22:36:10 +02:00
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#include <wchar.h>
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2016-06-26 00:34:39 +02:00
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2017-08-27 00:58:44 +02:00
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#include "../86box.h"
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#include "../cdrom.h"
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#include "../ibm.h"
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2017-06-16 03:18:59 +02:00
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#include "hdd_image.h"
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2017-08-27 00:58:44 +02:00
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#include "../io.h"
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#include "../pic.h"
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2017-08-28 06:58:51 +02:00
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#include "../pci.h"
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2017-08-27 00:58:44 +02:00
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#include "../timer.h"
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#include "../cdrom.h"
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2017-08-27 04:33:47 +01:00
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#include "../scsi/scsi.h"
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2017-08-25 02:21:26 -04:00
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#include "hdd_ide_at.h"
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2016-06-26 00:34:39 +02:00
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/* Bits of 'atastat' */
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#define ERR_STAT 0x01
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#define DRQ_STAT 0x08 /* Data request */
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#define DSC_STAT 0x10
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#define SERVICE_STAT 0x10
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#define READY_STAT 0x40
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#define BUSY_STAT 0x80
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/* Bits of 'error' */
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#define ABRT_ERR 0x04 /* Command aborted */
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#define MCR_ERR 0x08 /* Media change request */
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/* ATA Commands */
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2016-08-10 01:14:22 +02:00
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#define WIN_NOP 0x00
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2016-06-26 00:34:39 +02:00
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#define WIN_SRST 0x08 /* ATAPI Device Reset */
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#define WIN_RECAL 0x10
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#define WIN_RESTORE WIN_RECAL
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#define WIN_READ 0x20 /* 28-Bit Read */
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#define WIN_READ_NORETRY 0x21 /* 28-Bit Read - no retry*/
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#define WIN_WRITE 0x30 /* 28-Bit Write */
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#define WIN_WRITE_NORETRY 0x31 /* 28-Bit Write */
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#define WIN_VERIFY 0x40 /* 28-Bit Verify */
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2017-05-05 01:49:42 +02:00
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#define WIN_VERIFY_ONCE 0x41 /* Added by OBattler - deprected older ATA command, according to the specification I found, it is identical to 0x40 */
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2016-06-26 00:34:39 +02:00
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#define WIN_FORMAT 0x50
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#define WIN_SEEK 0x70
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#define WIN_DRIVE_DIAGNOSTICS 0x90 /* Execute Drive Diagnostics */
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#define WIN_SPECIFY 0x91 /* Initialize Drive Parameters */
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#define WIN_PACKETCMD 0xA0 /* Send a packet command. */
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#define WIN_PIDENTIFY 0xA1 /* Identify ATAPI device */
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#define WIN_READ_MULTIPLE 0xC4
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#define WIN_WRITE_MULTIPLE 0xC5
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#define WIN_SET_MULTIPLE_MODE 0xC6
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#define WIN_READ_DMA 0xC8
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#define WIN_WRITE_DMA 0xCA
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2016-08-10 00:46:56 +02:00
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#define WIN_STANDBYNOW1 0xE0
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2017-01-17 19:41:42 +01:00
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#define WIN_IDLENOW1 0xE1
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2016-06-26 00:34:39 +02:00
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#define WIN_SETIDLE1 0xE3
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2016-08-10 00:46:56 +02:00
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#define WIN_CHECKPOWERMODE1 0xE5
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2017-05-05 01:49:42 +02:00
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#define WIN_SLEEP1 0xE6
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2016-06-26 00:34:39 +02:00
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#define WIN_IDENTIFY 0xEC /* Ask drive to identify itself */
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2016-08-10 00:46:56 +02:00
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#define WIN_SET_FEATURES 0xEF
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#define WIN_READ_NATIVE_MAX 0xF8
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2016-06-26 00:34:39 +02:00
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enum
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{
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IDE_NONE = 0,
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IDE_HDD,
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IDE_CDROM
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};
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2016-09-25 21:39:21 +02:00
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uint64_t hdt[128][3] = { { 306, 4, 17 }, { 615, 2, 17 }, { 306, 4, 26 }, { 1024, 2, 17 }, { 697, 3, 17 }, { 306, 8, 17 }, { 614, 4, 17 }, { 615, 4, 17 }, /* 000-007 */
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{ 670, 4, 17 }, { 697, 4, 17 }, { 987, 3, 17 }, { 820, 4, 17 }, { 670, 5, 17 }, { 697, 5, 17 }, { 733, 5, 17 }, { 615, 6, 17 }, /* 008-015 */
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{ 462, 8, 17 }, { 306, 8, 26 }, { 615, 4, 26 }, { 1024, 4, 17 }, { 855, 5, 17 }, { 925, 5, 17 }, { 932, 5, 17 }, { 1024, 2, 40 }, /* 016-023 */
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{ 809, 6, 17 }, { 976, 5, 17 }, { 977, 5, 17 }, { 698, 7, 17 }, { 699, 7, 17 }, { 981, 5, 17 }, { 615, 8, 17 }, { 989, 5, 17 }, /* 024-031 */
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{ 820, 4, 26 }, { 1024, 5, 17 }, { 733, 7, 17 }, { 754, 7, 17 }, { 733, 5, 26 }, { 940, 6, 17 }, { 615, 6, 26 }, { 462, 8, 26 }, /* 032-039 */
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{ 830, 7, 17 }, { 855, 7, 17 }, { 751, 8, 17 }, { 1024, 4, 26 }, { 918, 7, 17 }, { 925, 7, 17 }, { 855, 5, 26 }, { 977, 7, 17 }, /* 040-047 */
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{ 987, 7, 17 }, { 1024, 7, 17 }, { 823, 4, 38 }, { 925, 8, 17 }, { 809, 6, 26 }, { 976, 5, 26 }, { 977, 5, 26 }, { 698, 7, 26 }, /* 048-055 */
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{ 699, 7, 26 }, { 940, 8, 17 }, { 615, 8, 26 }, { 1024, 5, 26 }, { 733, 7, 26 }, { 1024, 8, 17 }, { 823, 10, 17 }, { 754, 11, 17 }, /* 056-063 */
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{ 830, 10, 17 }, { 925, 9, 17 }, { 1224, 7, 17 }, { 940, 6, 26 }, { 855, 7, 26 }, { 751, 8, 26 }, { 1024, 9, 17 }, { 965, 10, 17 }, /* 064-071 */
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{ 969, 5, 34 }, { 980, 10, 17 }, { 960, 5, 35 }, { 918, 11, 17 }, { 1024, 10, 17 }, { 977, 7, 26 }, { 1024, 7, 26 }, { 1024, 11, 17 }, /* 072-079 */
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{ 940, 8, 26 }, { 776, 8, 33 }, { 755, 16, 17 }, { 1024, 12, 17 }, { 1024, 8, 26 }, { 823, 10, 26 }, { 830, 10, 26 }, { 925, 9, 26 }, /* 080-087 */
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{ 960, 9, 26 }, { 1024, 13, 17 }, { 1224, 11, 17 }, { 900, 15, 17 }, { 969, 7, 34 }, { 917, 15, 17 }, { 918, 15, 17 }, { 1524, 4, 39 }, /* 088-095 */
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{ 1024, 9, 26 }, { 1024, 14, 17 }, { 965, 10, 26 }, { 980, 10, 26 }, { 1020, 15, 17 }, { 1023, 15, 17 }, { 1024, 15, 17 }, { 1024, 16, 17 }, /* 096-103 */
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{ 1224, 15, 17 }, { 755, 16, 26 }, { 903, 8, 46 }, { 984, 10, 34 }, { 900, 15, 26 }, { 917, 15, 26 }, { 1023, 15, 26 }, { 684, 16, 38 }, /* 104-111 */
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{ 1930, 4, 62 }, { 967, 16, 31 }, { 1013, 10, 63 }, { 1218, 15, 36 }, { 654, 16, 63 }, { 659, 16, 63 }, { 702, 16, 63 }, { 1002, 13, 63 }, /* 112-119 */
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{ 854, 16, 63 }, { 987, 16, 63 }, { 995, 16, 63 }, { 1024, 16, 63 }, { 1036, 16, 63 }, { 1120, 16, 59 }, { 1054, 16, 63 }, { 0, 0, 0 } }; /* 119-127 */
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2017-05-27 03:53:32 +02:00
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IDE ide_drives[IDE_NUM + XTIDE_NUM];
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2016-06-26 00:34:39 +02:00
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IDE *ext_ide;
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2017-01-16 01:49:19 +01:00
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int (*ide_bus_master_read)(int channel, uint8_t *data, int transfer_length);
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int (*ide_bus_master_write)(int channel, uint8_t *data, int transfer_length);
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2016-06-26 00:34:39 +02:00
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void (*ide_bus_master_set_irq)(int channel);
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2017-05-27 03:53:32 +02:00
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int idecallback[5] = {0, 0, 0, 0, 0};
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2016-06-26 00:34:39 +02:00
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2017-05-27 03:53:32 +02:00
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int cur_ide[5];
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2016-06-26 00:34:39 +02:00
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2017-01-21 17:52:27 +01:00
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int ide_do_log = 0;
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2016-11-12 15:06:38 +01:00
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2017-01-16 01:49:19 +01:00
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void ide_log(const char *format, ...)
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{
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2017-01-21 17:52:27 +01:00
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#ifdef ENABLE_IDE_LOG
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2017-01-16 01:49:19 +01:00
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if (ide_do_log)
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{
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va_list ap;
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va_start(ap, format);
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vprintf(format, ap);
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va_end(ap);
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fflush(stdout);
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}
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2017-01-21 17:52:27 +01:00
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#endif
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2017-01-16 01:49:19 +01:00
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}
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2016-11-12 15:06:38 +01:00
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2016-06-26 00:34:39 +02:00
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uint8_t getstat(IDE *ide) { return ide->atastat; }
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2017-01-16 01:49:19 +01:00
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int ide_drive_is_cdrom(IDE *ide)
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{
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2017-06-01 22:26:56 +02:00
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if (ide->channel >= 8)
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{
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return 0;
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}
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2017-01-16 01:49:19 +01:00
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if (atapi_cdrom_drives[ide->channel] >= CDROM_NUM)
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{
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return 0;
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}
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else
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{
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2017-05-27 03:53:32 +02:00
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if ((cdrom_drives[atapi_cdrom_drives[ide->channel]].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) || (cdrom_drives[atapi_cdrom_drives[ide->channel]].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA))
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2017-01-16 01:49:19 +01:00
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{
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return 1;
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}
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else
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{
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return 0;
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}
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}
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}
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2017-05-27 03:53:32 +02:00
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int ide_enable[5] = { 1, 1, 0, 0, 1 };
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2017-06-01 22:26:56 +02:00
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int ide_irq[5] = { 14, 15, 10, 11, 0 };
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2016-12-28 23:34:00 +01:00
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2017-01-20 23:53:19 +01:00
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void ide_irq_raise(IDE *ide)
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2016-06-26 00:34:39 +02:00
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{
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2016-12-29 20:40:24 +01:00
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if ((ide->board > 3) || ide->irqstat)
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{
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2017-06-01 22:26:56 +02:00
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ide->irqstat=1;
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ide->service=1;
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2016-12-29 20:40:24 +01:00
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return;
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}
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2017-02-08 18:42:20 +01:00
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ide_log("Raising IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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2016-12-29 20:40:24 +01:00
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if (!(ide->fdisk&2))
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{
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2017-08-28 16:53:53 +02:00
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if (PCI && (ide->board < 2) && ide_bus_master_set_irq)
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2017-08-28 06:58:51 +02:00
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{
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2017-08-28 16:53:53 +02:00
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pci_ide_set_irq(ide->board, ide_irq[ide->board]);
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2017-08-28 06:58:51 +02:00
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}
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else
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{
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picint(1 << ide_irq[ide->board]);
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}
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2016-12-29 20:40:24 +01:00
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if (ide->board < 2)
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{
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if (ide_bus_master_set_irq)
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{
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ide_bus_master_set_irq(ide->board);
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}
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}
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2016-06-26 00:34:39 +02:00
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}
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2016-12-29 20:40:24 +01:00
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2016-06-26 00:34:39 +02:00
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ide->irqstat=1;
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2016-12-29 20:40:24 +01:00
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ide->service=1;
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2016-06-26 00:34:39 +02:00
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}
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2017-01-16 01:49:19 +01:00
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void ide_irq_lower(IDE *ide)
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2016-06-26 00:34:39 +02:00
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{
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2016-12-29 20:40:24 +01:00
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if ((ide->board > 3) || !(ide->irqstat))
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{
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2017-06-01 22:26:56 +02:00
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ide->irqstat=0;
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2016-12-29 20:40:24 +01:00
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return;
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}
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2017-02-08 18:42:20 +01:00
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ide_log("Lowering IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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2016-12-29 20:40:24 +01:00
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2017-08-28 16:53:53 +02:00
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if (PCI && (ide->board < 2) && ide_bus_master_set_irq)
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{
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pci_ide_clear_irq(ide->board, ide_irq[ide->board]);
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}
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else
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{
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picintc(1 << ide_irq[ide->board]);
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}
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2016-06-26 00:34:39 +02:00
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ide->irqstat=0;
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}
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2016-12-29 20:40:24 +01:00
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void ide_irq_update(IDE *ide)
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2016-06-26 00:34:39 +02:00
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{
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2016-12-29 20:40:24 +01:00
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int pending = 0;
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int mask = 0;
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if (ide->board > 3)
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{
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return;
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}
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2016-06-26 00:34:39 +02:00
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2016-12-29 20:40:24 +01:00
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mask = ide_irq[ide->board];
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mask &= 7;
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2016-12-23 03:16:24 +01:00
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2016-12-29 20:40:24 +01:00
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pending = (pic2.pend | pic2.ins);
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pending &= (1 << mask);
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if (ide->irqstat && !pending && !(ide->fdisk & 2))
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{
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2017-08-28 16:53:53 +02:00
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if (PCI && (ide->board < 2) && ide_bus_master_set_irq)
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{
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pci_ide_set_irq(ide->board, ide_irq[ide->board]);
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}
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else
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{
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picint(1 << ide_irq[ide->board]);
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}
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2016-12-29 20:40:24 +01:00
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}
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else if (pending)
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{
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2017-08-28 16:53:53 +02:00
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if (PCI && (ide->board < 2) && ide_bus_master_set_irq)
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|
|
{
|
|
|
|
|
pci_ide_clear_irq(ide->board, ide_irq[ide->board]);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
picintc(1 << ide_irq[ide->board]);
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
/**
|
|
|
|
|
* Copy a string into a buffer, padding with spaces, and placing characters as
|
|
|
|
|
* if they were packed into 16-bit values, stored little-endian.
|
|
|
|
|
*
|
|
|
|
|
* @param str Destination buffer
|
|
|
|
|
* @param src Source string
|
|
|
|
|
* @param len Length of destination buffer to fill in. Strings shorter than
|
|
|
|
|
* this length will be padded with spaces.
|
|
|
|
|
*/
|
|
|
|
|
static void
|
|
|
|
|
ide_padstr(char *str, const char *src, int len)
|
|
|
|
|
{
|
|
|
|
|
int i, v;
|
|
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
for (i = 0; i < len; i++)
|
|
|
|
|
{
|
|
|
|
|
if (*src != '\0')
|
|
|
|
|
{
|
2016-06-26 00:34:39 +02:00
|
|
|
v = *src++;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2016-06-26 00:34:39 +02:00
|
|
|
v = ' ';
|
|
|
|
|
}
|
|
|
|
|
str[i ^ 1] = v;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* Copy a string into a buffer, padding with spaces. Does not add string
|
|
|
|
|
* terminator.
|
|
|
|
|
*
|
|
|
|
|
* @param buf Destination buffer
|
|
|
|
|
* @param buf_size Size of destination buffer to fill in. Strings shorter than
|
|
|
|
|
* this length will be padded with spaces.
|
|
|
|
|
* @param src Source string
|
|
|
|
|
*/
|
2017-01-16 01:49:19 +01:00
|
|
|
void ide_padstr8(uint8_t *buf, int buf_size, const char *src)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
for (i = 0; i < buf_size; i++)
|
|
|
|
|
{
|
|
|
|
|
if (*src != '\0')
|
|
|
|
|
{
|
2016-06-26 00:34:39 +02:00
|
|
|
buf[i] = *src++;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2016-06-26 00:34:39 +02:00
|
|
|
buf[i] = ' ';
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* Fill in ide->buffer with the output of the "IDENTIFY DEVICE" command
|
|
|
|
|
*/
|
|
|
|
|
static void ide_identify(IDE *ide)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
uint32_t c, h, s;
|
2017-05-27 03:53:32 +02:00
|
|
|
char device_identify[9] = { '8', '6', 'B', '_', 'H', 'D', '0', '0', 0 };
|
|
|
|
|
#if 0
|
2017-05-15 03:21:40 +02:00
|
|
|
uint64_t full_size = (hdc[ide->hdc_num].tracks * hdc[ide->hdc_num].hpc * hdc[ide->hdc_num].spt);
|
2017-05-27 03:53:32 +02:00
|
|
|
#endif
|
2017-06-16 03:18:59 +02:00
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
device_identify[6] = (ide->hdc_num / 10) + 0x30;
|
|
|
|
|
device_identify[7] = (ide->hdc_num % 10) + 0x30;
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_log("IDE Identify: %s\n", device_identify);
|
2016-12-23 03:16:24 +01:00
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
memset(ide->buffer, 0, 512);
|
2016-12-23 03:16:24 +01:00
|
|
|
|
2017-05-15 03:21:40 +02:00
|
|
|
c = hdc[ide->hdc_num].tracks; /* Cylinders */
|
|
|
|
|
h = hdc[ide->hdc_num].hpc; /* Heads */
|
|
|
|
|
s = hdc[ide->hdc_num].spt; /* Sectors */
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 03:21:40 +02:00
|
|
|
if (hdc[ide->hdc_num].tracks <= 16383)
|
2017-02-15 18:19:00 +01:00
|
|
|
{
|
2017-05-15 03:21:40 +02:00
|
|
|
ide->buffer[1] = hdc[ide->hdc_num].tracks; /* Cylinders */
|
2017-02-15 18:19:00 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->buffer[1] = 16383; /* Cylinders */
|
|
|
|
|
}
|
2017-05-15 03:21:40 +02:00
|
|
|
ide->buffer[3] = hdc[ide->hdc_num].hpc; /* Heads */
|
|
|
|
|
ide->buffer[6] = hdc[ide->hdc_num].spt; /* Sectors */
|
2016-06-26 00:34:39 +02:00
|
|
|
ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
|
2017-06-04 02:11:19 -04:00
|
|
|
ide_padstr((char *) (ide->buffer + 23), EMU_VERSION, 8); /* Firmware */
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */
|
2016-11-12 15:06:38 +01:00
|
|
|
ide->buffer[20] = 3; /*Buffer type*/
|
|
|
|
|
ide->buffer[21] = 512; /*Buffer size*/
|
|
|
|
|
ide->buffer[47] = 16; /*Max sectors on multiple transfer command*/
|
|
|
|
|
ide->buffer[48] = 1; /*Dword transfers supported*/
|
2017-05-27 03:53:32 +02:00
|
|
|
if (PCI && (ide->board < 2) && (hdc[ide->hdc_num].bus == HDD_BUS_IDE_PIO_AND_DMA))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
ide->buffer[49] = (1 << 8); /* LBA and DMA supported */
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->buffer[49] = 0;
|
|
|
|
|
}
|
2016-12-23 03:16:24 +01:00
|
|
|
if ((c > 1024) || (h > 16) || (s > 63))
|
|
|
|
|
{
|
|
|
|
|
ide->buffer[49] |= (1 << 9);
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
ide->buffer[50] = 0x4000; /* Capabilities */
|
|
|
|
|
ide->buffer[51] = 2 << 8; /*PIO timing mode*/
|
2017-05-05 22:36:10 +02:00
|
|
|
#if 0
|
2017-05-05 01:49:42 +02:00
|
|
|
ide->buffer[53] = 1;
|
2017-02-15 18:19:00 +01:00
|
|
|
ide->buffer[55] = ide->hpc;
|
|
|
|
|
ide->buffer[56] = ide->spt;
|
|
|
|
|
if (((full_size / ide->hpc) / ide->spt) <= 16383)
|
|
|
|
|
{
|
|
|
|
|
ide->buffer[54] = (full_size / ide->hpc) / ide->spt;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->buffer[54] = 16383;
|
|
|
|
|
}
|
|
|
|
|
full_size = ((uint64_t) ide->hpc) * ((uint64_t) ide->spt) * ((uint64_t) ide->buffer[54]);
|
|
|
|
|
ide->buffer[57] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */
|
2017-05-05 01:49:42 +02:00
|
|
|
ide->buffer[58] = (full_size >> 16) & 0x0FFF;
|
2017-05-05 22:36:10 +02:00
|
|
|
#endif
|
2016-06-26 00:34:39 +02:00
|
|
|
ide->buffer[59] = ide->blocksize ? (ide->blocksize | 0x100) : 0;
|
2017-02-15 18:19:00 +01:00
|
|
|
if (ide->buffer[49] & (1 << 9))
|
|
|
|
|
{
|
2017-05-15 03:21:40 +02:00
|
|
|
ide->buffer[60] = (hdc[ide->hdc_num].tracks * hdc[ide->hdc_num].hpc * hdc[ide->hdc_num].spt) & 0xFFFF; /* Total addressable sectors (LBA) */
|
|
|
|
|
ide->buffer[61] = ((hdc[ide->hdc_num].tracks * hdc[ide->hdc_num].hpc * hdc[ide->hdc_num].spt) >> 16) & 0x0FFF;
|
2017-02-15 18:19:00 +01:00
|
|
|
}
|
2017-05-27 03:53:32 +02:00
|
|
|
if (PCI && (ide->board < 2) && (hdc[ide->hdc_num].bus == HDD_BUS_IDE_PIO_AND_DMA))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-05-10 02:46:01 +02:00
|
|
|
ide->buffer[52] = 2 << 8; /*DMA timing mode*/
|
2017-05-14 18:37:32 +02:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
ide->buffer[63] = 7;
|
2017-05-14 18:37:32 +02:00
|
|
|
if (ide->mdma_mode != -1)
|
|
|
|
|
{
|
|
|
|
|
ide->buffer[63] = (ide->mdma_mode << 8);
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
ide->buffer[80] = 0xe; /*ATA-1 to ATA-3 supported*/
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* Fill in ide->buffer with the output of the "IDENTIFY PACKET DEVICE" command
|
|
|
|
|
*/
|
|
|
|
|
static void ide_atapi_identify(IDE *ide)
|
|
|
|
|
{
|
2017-05-27 03:53:32 +02:00
|
|
|
char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 };
|
2017-05-05 01:49:42 +02:00
|
|
|
uint8_t cdrom_id;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
memset(ide->buffer, 0, 512);
|
|
|
|
|
cdrom_id = atapi_cdrom_drives[ide->channel];
|
|
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
device_identify[7] = cdrom_id + 0x30;
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_log("ATAPI Identify: %s\n", device_identify);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
ide->buffer[0] = 0x8000 | (5<<8) | 0x80 | (2<<5); /* ATAPI device, CD-ROM drive, removable media, accelerated DRQ */
|
|
|
|
|
ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
|
2017-06-04 02:11:19 -04:00
|
|
|
ide_padstr((char *) (ide->buffer + 23), EMU_VERSION, 8); /* Firmware */
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */
|
2016-11-17 20:41:27 +01:00
|
|
|
ide->buffer[49] = 0x200; /* LBA supported */
|
2017-01-16 01:49:19 +01:00
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
if (PCI && (ide->board < 2) && (cdrom_drives[cdrom_id].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA))
|
2017-01-16 01:49:19 +01:00
|
|
|
{
|
2017-05-10 02:46:01 +02:00
|
|
|
ide->buffer[48] = 1; /*Dword transfers supported*/
|
2017-01-16 01:49:19 +01:00
|
|
|
ide->buffer[49] |= 0x100; /* DMA supported */
|
2017-05-05 01:49:42 +02:00
|
|
|
ide->buffer[63] = 7;
|
2017-05-10 02:46:01 +02:00
|
|
|
ide->buffer[73] = 6;
|
|
|
|
|
ide->buffer[74] = 9;
|
|
|
|
|
ide->buffer[80] = 0x10; /*ATA/ATAPI-4 supported*/
|
2017-01-16 01:49:19 +01:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Return the sector offset for the current register values
|
|
|
|
|
*/
|
|
|
|
|
static off64_t ide_get_sector(IDE *ide)
|
|
|
|
|
{
|
|
|
|
|
if (ide->lba)
|
|
|
|
|
{
|
|
|
|
|
return (off64_t)ide->lba_addr + ide->skip512;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
uint32_t heads = ide->hpc;
|
|
|
|
|
uint32_t sectors = ide->spt;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
return ((((off64_t) ide->cylinder * heads) + ide->head) *
|
|
|
|
|
sectors) + (ide->sector - 1) + ide->skip512;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* Move to the next sector using CHS addressing
|
|
|
|
|
*/
|
|
|
|
|
static void ide_next_sector(IDE *ide)
|
|
|
|
|
{
|
|
|
|
|
if (ide->lba)
|
|
|
|
|
{
|
|
|
|
|
ide->lba_addr++;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->sector++;
|
2016-12-29 20:40:24 +01:00
|
|
|
if (ide->sector == (ide->spt + 1))
|
|
|
|
|
{
|
2016-06-26 00:34:39 +02:00
|
|
|
ide->sector = 1;
|
|
|
|
|
ide->head++;
|
2016-12-29 20:40:24 +01:00
|
|
|
if (ide->head == ide->hpc)
|
|
|
|
|
{
|
2016-06-26 00:34:39 +02:00
|
|
|
ide->head = 0;
|
|
|
|
|
ide->cylinder++;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-05 22:36:10 +02:00
|
|
|
static void loadhd(IDE *ide, int d, const wchar_t *fn)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-06-16 03:18:59 +02:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
|
|
ret = hdd_image_load(d);
|
|
|
|
|
|
|
|
|
|
if (!ret)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-06-16 03:18:59 +02:00
|
|
|
ide->type = IDE_NONE;
|
|
|
|
|
return;
|
2016-09-25 21:39:21 +02:00
|
|
|
}
|
2017-06-16 03:18:59 +02:00
|
|
|
|
|
|
|
|
ide->spt = hdc[d].spt;
|
|
|
|
|
ide->hpc = hdc[d].hpc;
|
|
|
|
|
ide->tracks = hdc[d].tracks;
|
|
|
|
|
ide->type = IDE_HDD;
|
2016-09-29 21:54:34 +02:00
|
|
|
ide->hdc_num = d;
|
2017-06-16 03:18:59 +02:00
|
|
|
ide->hdi = hdd_image_get_type(d);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_set_signature(IDE *ide)
|
|
|
|
|
{
|
2017-02-13 20:21:57 +01:00
|
|
|
uint8_t cdrom_id = atapi_cdrom_drives[ide->channel];
|
2016-06-26 00:34:39 +02:00
|
|
|
ide->sector=1;
|
|
|
|
|
ide->head=0;
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom_set_signature(cdrom_id);
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->secount = cdrom[cdrom_id].phase;
|
|
|
|
|
ide->cylinder = cdrom[cdrom_id].request_length;
|
2017-01-16 01:49:19 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->secount=1;
|
|
|
|
|
ide->cylinder=((ide->type == IDE_HDD) ? 0 : 0xFFFF);
|
|
|
|
|
if (ide->type == IDE_HDD)
|
|
|
|
|
{
|
|
|
|
|
ide->drive = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int ide_cdrom_is_pio_only(IDE *ide)
|
|
|
|
|
{
|
|
|
|
|
uint8_t cdrom_id = atapi_cdrom_drives[cur_ide[ide->board]];
|
|
|
|
|
if (!ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-05-27 03:53:32 +02:00
|
|
|
if (cdrom_drives[cdrom_id].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
return 0;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
return 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
static int ide_set_features(IDE *ide)
|
2016-08-10 00:46:56 +02:00
|
|
|
{
|
2017-05-14 18:37:32 +02:00
|
|
|
uint8_t features, features_data;
|
|
|
|
|
uint8_t mode, submode;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
features = ide->cylprecomp;
|
|
|
|
|
features_data = ide->secount;
|
|
|
|
|
|
2017-06-01 22:26:56 +02:00
|
|
|
ide_log("Features code %02X\n", features);
|
2016-08-10 00:46:56 +02:00
|
|
|
|
2017-01-17 19:41:42 +01:00
|
|
|
switch(features)
|
2016-08-10 00:46:56 +02:00
|
|
|
{
|
2017-05-14 18:37:32 +02:00
|
|
|
case 0x03: /* Set transfer mode. */
|
2017-06-01 22:26:56 +02:00
|
|
|
ide_log("Transfer mode %02X\n", features_data >> 3);
|
2017-05-14 18:37:32 +02:00
|
|
|
|
|
|
|
|
mode = (features_data >> 3);
|
|
|
|
|
submode = features_data & 7;
|
|
|
|
|
|
|
|
|
|
switch(mode)
|
2016-08-10 00:46:56 +02:00
|
|
|
{
|
2017-05-14 18:37:32 +02:00
|
|
|
case 0x00: /* PIO default */
|
2017-05-14 18:39:58 +02:00
|
|
|
if (submode != 0)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-05-14 18:37:32 +02:00
|
|
|
ide->mdma_mode = -1;
|
2016-08-10 00:46:56 +02:00
|
|
|
break;
|
2017-05-14 18:37:32 +02:00
|
|
|
|
|
|
|
|
case 0x01: /* PIO mode */
|
2017-05-14 18:39:58 +02:00
|
|
|
if (submode > 2)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-05-14 18:37:32 +02:00
|
|
|
ide->mdma_mode = -1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x04: /* Multiword DMA mode */
|
2017-05-27 03:53:32 +02:00
|
|
|
if (!PCI || (hdc[ide->hdc_num].bus != HDD_BUS_IDE_PIO_AND_DMA) || (ide->board >= 2) || (submode > 2))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-05-14 18:41:58 +02:00
|
|
|
return 0;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-05-14 18:37:32 +02:00
|
|
|
ide->mdma_mode = (1 << submode);
|
2016-08-10 00:46:56 +02:00
|
|
|
break;
|
2017-05-14 18:37:32 +02:00
|
|
|
|
2016-08-10 00:46:56 +02:00
|
|
|
default:
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-05-14 18:37:32 +02:00
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
return 0;
|
2016-08-10 00:46:56 +02:00
|
|
|
}
|
2017-05-14 18:37:32 +02:00
|
|
|
|
2016-08-10 00:46:56 +02:00
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_set_sector(IDE *ide, int64_t sector_num)
|
|
|
|
|
{
|
|
|
|
|
unsigned int cyl, r;
|
2016-08-10 06:15:52 +02:00
|
|
|
if (ide->lba)
|
2016-08-10 00:46:56 +02:00
|
|
|
{
|
2016-08-10 01:04:08 +02:00
|
|
|
ide->head = (sector_num >> 24);
|
2016-08-10 00:54:09 +02:00
|
|
|
ide->cylinder = (sector_num >> 8);
|
2016-08-10 00:46:56 +02:00
|
|
|
ide->sector = (sector_num);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-05-15 03:21:40 +02:00
|
|
|
cyl = sector_num / (hdc[ide->hdc_num].hpc * hdc[ide->hdc_num].spt);
|
|
|
|
|
r = sector_num % (hdc[ide->hdc_num].hpc * hdc[ide->hdc_num].spt);
|
2016-08-10 00:54:09 +02:00
|
|
|
ide->cylinder = cyl;
|
2017-05-15 03:21:40 +02:00
|
|
|
ide->head = ((r / hdc[ide->hdc_num].spt) & 0x0f);
|
|
|
|
|
ide->sector = (r % hdc[ide->hdc_num].spt) + 1;
|
2016-08-10 00:46:56 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
void ide_ter_disable_cond();
|
|
|
|
|
void ide_qua_disable_cond();
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
void resetide(void)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
int c, d;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
build_atapi_cdrom_map();
|
2016-12-29 20:40:24 +01:00
|
|
|
|
|
|
|
|
/* Close hard disk image files (if previously open) */
|
2017-05-27 03:53:32 +02:00
|
|
|
for (d = 0; d < (IDE_NUM + XTIDE_NUM); d++)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_drives[d].channel = d;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_drives[d].type = IDE_NONE;
|
2017-06-16 03:18:59 +02:00
|
|
|
hdd_image_close(ide_drives[d].hdc_num);
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(&ide_drives[d]))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[d]].status = READY_STAT | DSC_STAT;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_drives[d].atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_drives[d].service = 0;
|
|
|
|
|
ide_drives[d].board = d >> 1;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-11-12 15:06:38 +01:00
|
|
|
idecallback[0]=idecallback[1]=0;
|
2016-12-28 23:34:00 +01:00
|
|
|
idecallback[2]=idecallback[3]=0;
|
2017-05-29 01:18:32 +02:00
|
|
|
idecallback[4]=0;
|
2016-11-12 15:06:38 +01:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
c = 0;
|
|
|
|
|
for (d = 0; d < HDC_NUM; d++)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-27 03:53:32 +02:00
|
|
|
if (((hdc[d].bus == HDD_BUS_IDE_PIO_ONLY) || (hdc[d].bus == HDD_BUS_IDE_PIO_AND_DMA)) && (hdc[d].ide_channel < IDE_NUM))
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-06-01 22:26:56 +02:00
|
|
|
ide_log("Found IDE hard disk on channel %i\n", hdc[d].ide_channel);
|
2017-05-27 03:53:32 +02:00
|
|
|
loadhd(&ide_drives[hdc[d].ide_channel], d, hdc[d].fn);
|
|
|
|
|
c++;
|
|
|
|
|
if (c >= (IDE_NUM + XTIDE_NUM)) break;
|
|
|
|
|
}
|
|
|
|
|
if ((hdc[d].bus == HDD_BUS_XTIDE) && (hdc[d].xtide_channel < XTIDE_NUM))
|
|
|
|
|
{
|
2017-06-01 22:26:56 +02:00
|
|
|
ide_log("Found XT IDE hard disk on channel %i\n", hdc[d].xtide_channel);
|
2017-05-27 03:53:32 +02:00
|
|
|
loadhd(&ide_drives[hdc[d].xtide_channel | 8], d, hdc[d].fn);
|
2017-05-05 01:49:42 +02:00
|
|
|
c++;
|
2017-05-27 03:53:32 +02:00
|
|
|
if (c >= (IDE_NUM + XTIDE_NUM)) break;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (d = 0; d < IDE_NUM; d++)
|
|
|
|
|
{
|
|
|
|
|
if (ide_drive_is_cdrom(&ide_drives[d]) && (ide_drives[d].type != IDE_HDD))
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
ide_drives[d].type = IDE_CDROM;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ide_set_signature(&ide_drives[d]);
|
2016-08-10 01:04:08 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
if (ide_drives[d].type == IDE_HDD)
|
2016-08-10 01:04:08 +02:00
|
|
|
{
|
2017-05-14 18:37:32 +02:00
|
|
|
ide_drives[d].mdma_mode = 0;
|
2016-08-10 01:04:08 +02:00
|
|
|
}
|
2016-08-10 01:14:22 +02:00
|
|
|
|
2016-12-23 03:16:24 +01:00
|
|
|
ide_drives[d].error = 1;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
for (d = 0; d < XTIDE_NUM; d++)
|
|
|
|
|
{
|
|
|
|
|
ide_set_signature(&ide_drives[d | 8]);
|
|
|
|
|
|
2017-05-29 01:18:32 +02:00
|
|
|
if (ide_drives[d | 8].type == IDE_HDD)
|
2017-05-27 03:53:32 +02:00
|
|
|
{
|
2017-05-29 01:18:32 +02:00
|
|
|
ide_drives[d | 8].mdma_mode = 0;
|
2017-05-27 03:53:32 +02:00
|
|
|
}
|
|
|
|
|
|
2017-05-29 01:18:32 +02:00
|
|
|
ide_drives[d | 8].error = 1;
|
2017-05-27 03:53:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (d = 0; d < 5; d++)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
cur_ide[d] = d << 1;
|
|
|
|
|
}
|
2017-01-17 19:41:42 +01:00
|
|
|
|
|
|
|
|
ide_ter_disable_cond();
|
|
|
|
|
ide_qua_disable_cond();
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
int idetimes = 0;
|
|
|
|
|
|
2017-01-18 21:51:03 +01:00
|
|
|
void ide_write_data(int ide_board, uint32_t val, int length)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2016-12-29 20:40:24 +01:00
|
|
|
IDE *ide = &ide_drives[cur_ide[ide_board]];
|
2017-01-17 00:01:59 +01:00
|
|
|
|
|
|
|
|
uint8_t *idebufferb = (uint8_t *) ide->buffer;
|
2017-01-18 21:51:03 +01:00
|
|
|
uint16_t *idebufferw = ide->buffer;
|
|
|
|
|
uint32_t *idebufferl = (uint32_t *) ide->buffer;
|
2017-01-04 20:37:31 +01:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide->command == WIN_PACKETCMD)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-18 21:51:03 +01:00
|
|
|
ide->pos = 0;
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (!ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
return;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
|
2017-01-18 21:51:03 +01:00
|
|
|
cdrom_write(cur_ide[ide_board], val, length);
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
if (cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback)
|
|
|
|
|
{
|
|
|
|
|
idecallback[ide_board] = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
else
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-18 21:51:03 +01:00
|
|
|
switch(length)
|
|
|
|
|
{
|
|
|
|
|
case 1:
|
|
|
|
|
idebufferb[ide->pos] = val & 0xff;
|
|
|
|
|
ide->pos++;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
idebufferw[ide->pos >> 1] = val & 0xffff;
|
|
|
|
|
ide->pos += 2;
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
idebufferl[ide->pos >> 2] = val;
|
|
|
|
|
ide->pos += 4;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return;
|
|
|
|
|
}
|
2017-01-17 19:41:42 +01:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide->pos>=512)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
ide->pos=0;
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide->command == WIN_WRITE_MULTIPLE)
|
|
|
|
|
{
|
|
|
|
|
callbackide(ide_board);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
idecallback[ide_board]=6*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
timer_update_outstanding();
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-01-17 00:01:59 +01:00
|
|
|
void writeidew(int ide_board, uint16_t val)
|
|
|
|
|
{
|
2017-01-18 21:51:03 +01:00
|
|
|
ide_write_data(ide_board, val, 2);
|
2017-01-17 00:01:59 +01:00
|
|
|
}
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
void writeidel(int ide_board, uint32_t val)
|
|
|
|
|
{
|
2017-01-20 23:53:19 +01:00
|
|
|
writeidew(ide_board, val);
|
|
|
|
|
writeidew(ide_board, val >> 16);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void writeide(int ide_board, uint16_t addr, uint8_t val)
|
|
|
|
|
{
|
2016-12-29 20:40:24 +01:00
|
|
|
IDE *ide = &ide_drives[cur_ide[ide_board]];
|
|
|
|
|
IDE *ide_other = &ide_drives[cur_ide[ide_board] ^ 1];
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_log("WriteIDE %04X %02X from %04X(%08X):%08X %i\n", addr, val, CS, cs, cpu_state.pc, ins);
|
2016-12-29 20:40:24 +01:00
|
|
|
addr|=0x90;
|
|
|
|
|
addr&=0xFFF7;
|
|
|
|
|
|
|
|
|
|
if (ide->type == IDE_NONE && (addr == 0x1f0 || addr == 0x1f7)) return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
switch (addr)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F0: /* Data */
|
2017-01-18 21:51:03 +01:00
|
|
|
writeidew(ide_board, val | (val << 8));
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
/* Note to self: for ATAPI, bit 0 of this is DMA if set, PIO if clear. */
|
|
|
|
|
case 0x1F1: /* Features */
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].features = val;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->cylprecomp = val;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
if (ide_drive_is_cdrom(ide_other))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board] ^ 1]].features = val;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide_other->cylprecomp = val;
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F2: /* Sector count */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
ide_log("Sector count write: %i\n", val);
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].phase = val;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->secount = val;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
if (ide_drive_is_cdrom(ide_other))
|
|
|
|
|
{
|
|
|
|
|
ide_log("Other sector count write: %i\n", val);
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board] ^ 1]].phase = val;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide_other->secount = val;
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F3: /* Sector */
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->sector = val;
|
|
|
|
|
ide->lba_addr = (ide->lba_addr & 0xFFFFF00) | val;
|
|
|
|
|
ide_other->sector = val;
|
|
|
|
|
ide_other->lba_addr = (ide_other->lba_addr & 0xFFFFF00) | val;
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F4: /* Cylinder low */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length &= 0xFF00;
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length |= val;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->cylinder = (ide->cylinder & 0xFF00) | val;
|
|
|
|
|
ide->lba_addr = (ide->lba_addr & 0xFFF00FF) | (val << 8);
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
if (ide_drive_is_cdrom(ide_other))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board] ^ 1]].request_length &= 0xFF00;
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board] ^ 1]].request_length |= val;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide_other->cylinder = (ide_other->cylinder&0xFF00) | val;
|
|
|
|
|
ide_other->lba_addr = (ide_other->lba_addr&0xFFF00FF) | (val << 8);
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F5: /* Cylinder high */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length &= 0xFF;
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length |= (val << 8);
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->cylinder = (ide->cylinder & 0xFF) | (val << 8);
|
|
|
|
|
ide->lba_addr = (ide->lba_addr & 0xF00FFFF) | (val << 16);
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
if (ide_drive_is_cdrom(ide_other))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board] ^ 1]].request_length &= 0xFF;
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board] ^ 1]].request_length |= (val << 8);
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
ide_other->cylinder = (ide_other->cylinder & 0xFF) | (val << 8);
|
|
|
|
|
ide_other->lba_addr = (ide_other->lba_addr & 0xF00FFFF) | (val << 16);
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F6: /* Drive/Head */
|
2016-12-29 20:40:24 +01:00
|
|
|
if (cur_ide[ide_board] != ((val>>4)&1)+(ide_board<<1))
|
|
|
|
|
{
|
|
|
|
|
cur_ide[ide_board]=((val>>4)&1)+(ide_board<<1);
|
|
|
|
|
|
|
|
|
|
if (ide->reset || ide_other->reset)
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = ide_other->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide->error = ide_other->error = 1;
|
|
|
|
|
ide->secount = ide_other->secount = 1;
|
|
|
|
|
ide->sector = ide_other->sector = 1;
|
|
|
|
|
ide->head = ide_other->head = 0;
|
|
|
|
|
ide->cylinder = ide_other->cylinder = 0;
|
|
|
|
|
ide->reset = ide_other->reset = 0;
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | DSC_STAT;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].error = 1;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].phase = 1;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].request_length = 0xEB14;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 0;
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->cylinder = 0xEB14;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide_other))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom[atapi_cdrom_drives[ide_other->channel]].status = READY_STAT | DSC_STAT;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide_other->channel]].error = 1;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide_other->channel]].phase = 1;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide_other->channel]].request_length = 0xEB14;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide_other->channel]].callback = 0;
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->cylinder = 0xEB14;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
idecallback[ide_board] = 0;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ide = &ide_drives[cur_ide[ide_board]];
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->head = val & 0xF;
|
|
|
|
|
ide->lba = val & 0x40;
|
|
|
|
|
ide_other->head = val & 0xF;
|
|
|
|
|
ide_other->lba = val & 0x40;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->lba_addr = (ide->lba_addr & 0x0FFFFFF) | ((val & 0xF) << 24);
|
|
|
|
|
ide_other->lba_addr = (ide_other->lba_addr & 0x0FFFFFF)|((val & 0xF) << 24);
|
2016-08-10 06:15:52 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_irq_update(ide);
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0x1F7: /* Command register */
|
2016-12-29 20:40:24 +01:00
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
return;
|
|
|
|
|
}
|
2017-01-21 17:48:45 +01:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
ide_irq_lower(ide);
|
|
|
|
|
ide->command=val;
|
2017-01-21 17:48:45 +01:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
ide->error=0;
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].error = 0;
|
|
|
|
|
}
|
|
|
|
|
switch (val)
|
|
|
|
|
{
|
|
|
|
|
case WIN_SRST: /* ATAPI Device Reset */
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 100*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=100*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_RESTORE:
|
|
|
|
|
case WIN_SEEK:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 100*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=100*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_READ_MULTIPLE:
|
|
|
|
|
/* Fatal removed in accordance with the official ATAPI reference:
|
|
|
|
|
If the Read Multiple command is attempted before the Set Multiple Mode
|
|
|
|
|
command has been executed or when Read Multiple commands are
|
|
|
|
|
disabled, the Read Multiple operation is rejected with an Aborted Com-
|
|
|
|
|
mand error. */
|
|
|
|
|
ide->blockcount = 0;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_READ:
|
|
|
|
|
case WIN_READ_NORETRY:
|
|
|
|
|
case WIN_READ_DMA:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=200*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
2017-06-19 06:46:08 +02:00
|
|
|
ide->do_initial_read = 1;
|
2017-05-15 00:35:26 +02:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_WRITE_MULTIPLE:
|
|
|
|
|
if (!ide->blocksize && !ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
fatal("Write_MULTIPLE - blocksize = 0\n");
|
|
|
|
|
}
|
|
|
|
|
ide->blockcount = 0;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_WRITE:
|
|
|
|
|
case WIN_WRITE_NORETRY:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = DRQ_STAT | DSC_STAT | READY_STAT;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].pos = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = DRQ_STAT | DSC_STAT | READY_STAT;
|
|
|
|
|
ide->pos=0;
|
|
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_WRITE_DMA:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=200*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case WIN_VERIFY:
|
|
|
|
|
case WIN_VERIFY_ONCE:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=200*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case WIN_FORMAT:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
goto ide_bad_command;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = DRQ_STAT;
|
|
|
|
|
ide->pos=0;
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case WIN_SPECIFY: /* Initialize Drive Parameters */
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 30*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=30*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case WIN_DRIVE_DIAGNOSTICS: /* Execute Drive Diagnostics */
|
|
|
|
|
case WIN_PIDENTIFY: /* Identify Packet Device */
|
|
|
|
|
case WIN_SET_MULTIPLE_MODE: /* Set Multiple Mode */
|
|
|
|
|
case WIN_SET_FEATURES: /* Set Features */
|
|
|
|
|
case WIN_NOP:
|
|
|
|
|
case WIN_STANDBYNOW1:
|
|
|
|
|
case WIN_IDLENOW1:
|
|
|
|
|
case WIN_SETIDLE1: /* Idle */
|
|
|
|
|
case WIN_CHECKPOWERMODE1:
|
|
|
|
|
case WIN_SLEEP1:
|
2017-06-11 17:40:34 +02:00
|
|
|
if (val == WIN_DRIVE_DIAGNOSTICS)
|
2017-05-15 00:35:26 +02:00
|
|
|
{
|
2017-06-20 06:23:05 +02:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
2017-06-19 22:37:17 -04:00
|
|
|
timer_process();
|
2017-06-11 17:40:34 +02:00
|
|
|
callbackide(ide_board);
|
2017-06-20 06:23:05 +02:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200 * IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board] = 200 * IDE_TIME;
|
2017-06-19 22:37:17 -04:00
|
|
|
timer_update_outstanding();
|
2017-05-15 00:35:26 +02:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-06-11 17:40:34 +02:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
2017-06-20 06:23:05 +02:00
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 30 * IDE_TIME;
|
2017-06-11 17:40:34 +02:00
|
|
|
}
|
2017-06-20 06:23:05 +02:00
|
|
|
idecallback[ide_board] = 30 * IDE_TIME;
|
2017-06-11 17:40:34 +02:00
|
|
|
timer_update_outstanding();
|
2017-05-15 00:35:26 +02:00
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case WIN_IDENTIFY: /* Identify Device */
|
|
|
|
|
case WIN_READ_NATIVE_MAX:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
}
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 200*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
idecallback[ide_board]=200*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case WIN_PACKETCMD: /* ATAPI Packet */
|
|
|
|
|
/* Skip the command callback wait, and process immediately. */
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].packet_status = CDROM_PHASE_IDLE;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].pos=0;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].phase = 1;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | DRQ_STAT | (cdrom[cur_ide[ide_board]].status & ERR_STAT);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
2016-12-29 20:40:24 +01:00
|
|
|
timer_process();
|
2017-05-15 00:35:26 +02:00
|
|
|
idecallback[ide_board]=1;
|
2016-12-29 20:40:24 +01:00
|
|
|
timer_update_outstanding();
|
2017-05-15 00:35:26 +02:00
|
|
|
ide->pos=0;
|
|
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
case 0xF0:
|
|
|
|
|
default:
|
2017-01-16 01:49:19 +01:00
|
|
|
ide_bad_command:
|
2017-05-15 00:35:26 +02:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = READY_STAT | ERR_STAT | DSC_STAT;
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].error = ABRT_ERR;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | ERR_STAT | DSC_STAT;
|
|
|
|
|
ide->error = ABRT_ERR;
|
|
|
|
|
}
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
case 0x3F6: /* Device control */
|
2016-12-29 20:40:24 +01:00
|
|
|
if ((ide->fdisk & 4) && !(val&4) && (ide->type != IDE_NONE || ide_other->type != IDE_NONE))
|
|
|
|
|
{
|
|
|
|
|
timer_process();
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
2017-01-21 17:48:45 +01:00
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].callback = 0;
|
2017-01-16 01:49:19 +01:00
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
idecallback[ide_board]=500*IDE_TIME;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
|
|
|
|
|
if (ide->type != IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
ide->reset = 1;
|
|
|
|
|
}
|
|
|
|
|
if (ide_other->type != IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
ide->reset = 1;
|
|
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[ide->channel]].status = BUSY_STAT;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->atastat = ide_other->atastat = BUSY_STAT;
|
|
|
|
|
}
|
2017-02-02 02:55:08 +01:00
|
|
|
if (val & 4)
|
|
|
|
|
{
|
|
|
|
|
/*Drive held in reset*/
|
|
|
|
|
timer_process();
|
|
|
|
|
idecallback[ide_board] = 0;
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
ide->atastat = ide_other->atastat = BUSY_STAT;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->fdisk = ide_other->fdisk = val;
|
|
|
|
|
ide_irq_update(ide);
|
|
|
|
|
return;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-01-18 21:51:03 +01:00
|
|
|
uint32_t ide_read_data(int ide_board, int length)
|
2017-01-17 00:01:59 +01:00
|
|
|
{
|
|
|
|
|
IDE *ide = &ide_drives[cur_ide[ide_board]];
|
2017-01-18 21:51:03 +01:00
|
|
|
uint32_t temp;
|
2017-01-17 00:01:59 +01:00
|
|
|
|
|
|
|
|
uint8_t *idebufferb = (uint8_t *) ide->buffer;
|
2017-01-18 21:51:03 +01:00
|
|
|
uint16_t *idebufferw = ide->buffer;
|
|
|
|
|
uint32_t *idebufferl = (uint32_t *) ide->buffer;
|
2017-01-17 00:01:59 +01:00
|
|
|
|
|
|
|
|
if (ide->command == WIN_PACKETCMD)
|
|
|
|
|
{
|
2017-01-18 21:51:03 +01:00
|
|
|
ide->pos = 0;
|
2017-01-17 00:01:59 +01:00
|
|
|
if (!ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
ide_log("Drive not CD-ROM (position: %i)\n", ide->pos);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-01-18 21:51:03 +01:00
|
|
|
temp = cdrom_read(cur_ide[ide_board], length);
|
2017-01-17 00:01:59 +01:00
|
|
|
if (cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback)
|
|
|
|
|
{
|
|
|
|
|
idecallback[ide_board] = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback;
|
|
|
|
|
}
|
|
|
|
|
}
|
2017-01-17 19:41:42 +01:00
|
|
|
else
|
|
|
|
|
{
|
2017-01-18 21:51:03 +01:00
|
|
|
switch (length)
|
|
|
|
|
{
|
|
|
|
|
case 1:
|
|
|
|
|
temp = idebufferb[ide->pos];
|
|
|
|
|
ide->pos++;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
temp = idebufferw[ide->pos >> 1];
|
|
|
|
|
ide->pos += 2;
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
2017-01-20 23:53:19 +01:00
|
|
|
temp = idebufferl[ide->pos >> 2];
|
2017-01-18 21:51:03 +01:00
|
|
|
ide->pos += 4;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-01-17 19:41:42 +01:00
|
|
|
}
|
2017-01-17 00:01:59 +01:00
|
|
|
if (ide->pos>=512 && ide->command != WIN_PACKETCMD)
|
|
|
|
|
{
|
|
|
|
|
ide->pos=0;
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].status = READY_STAT | DSC_STAT;
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].packet_status = CDROM_PHASE_IDLE;
|
|
|
|
|
}
|
|
|
|
|
if (ide->command == WIN_READ || ide->command == WIN_READ_NORETRY || ide->command == WIN_READ_MULTIPLE)
|
|
|
|
|
{
|
|
|
|
|
ide->secount = (ide->secount - 1) & 0xff;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
ide_next_sector(ide);
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
timer_process();
|
|
|
|
|
if (ide->command == WIN_READ_MULTIPLE)
|
|
|
|
|
{
|
|
|
|
|
callbackide(ide_board);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
idecallback[ide_board]=6*IDE_TIME;
|
|
|
|
|
}
|
|
|
|
|
timer_update_outstanding();
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
else
|
|
|
|
|
{
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 0);
|
2017-05-05 01:49:42 +02:00
|
|
|
}
|
2017-01-17 00:01:59 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return temp;
|
|
|
|
|
}
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
uint8_t readide(int ide_board, uint16_t addr)
|
|
|
|
|
{
|
2016-12-29 20:40:24 +01:00
|
|
|
IDE *ide = &ide_drives[cur_ide[ide_board]];
|
|
|
|
|
uint8_t temp;
|
|
|
|
|
uint16_t tempw;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
addr |= 0x90;
|
|
|
|
|
addr &= 0xFFF7;
|
2016-11-12 15:06:38 +01:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
switch (addr)
|
|
|
|
|
{
|
|
|
|
|
case 0x1F0: /* Data */
|
2017-01-18 21:51:03 +01:00
|
|
|
tempw = readidew(ide_board);
|
|
|
|
|
temp = tempw & 0xff;
|
2016-12-29 20:40:24 +01:00
|
|
|
break;
|
2017-01-16 01:49:19 +01:00
|
|
|
|
|
|
|
|
/* For ATAPI: Bits 7-4 = sense key, bit 3 = MCR (media change requested),
|
|
|
|
|
Bit 2 = ABRT (aborted command), Bit 1 = EOM (end of media),
|
2017-05-15 00:35:26 +02:00
|
|
|
and Bit 0 = ILI (illegal length indication). */
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F1: /* Error */
|
|
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
2017-01-17 19:41:42 +01:00
|
|
|
temp = 0;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
temp = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].error;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
temp = ide->error;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
/* For ATAPI:
|
|
|
|
|
Bit 0: Command or Data:
|
|
|
|
|
Data if clear, Command if set;
|
|
|
|
|
Bit 1: I/OB
|
|
|
|
|
Direction:
|
|
|
|
|
To device if set;
|
|
|
|
|
From device if clear.
|
|
|
|
|
IO DRQ CoD
|
|
|
|
|
0 1 1 Ready to accept command packet
|
|
|
|
|
1 1 1 Message - ready to send message to host
|
|
|
|
|
1 1 0 Data to host
|
|
|
|
|
0 1 0 Data from host
|
|
|
|
|
1 0 1 Status. */
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F2: /* Sector count */
|
2017-01-17 19:41:42 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-17 19:41:42 +01:00
|
|
|
temp = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].phase;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-01-17 19:41:42 +01:00
|
|
|
temp = ide->secount;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F3: /* Sector */
|
2017-01-17 19:41:42 +01:00
|
|
|
temp = (uint8_t)ide->sector;
|
2016-12-29 20:40:24 +01:00
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F4: /* Cylinder low */
|
|
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
temp = 0xFF;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
temp = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length & 0xff;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
temp = ide->cylinder & 0xff;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F5: /* Cylinder high */
|
|
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
temp = 0xFF;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
temp = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].request_length >> 8;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
temp = ide->cylinder >> 8;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F6: /* Drive/Head */
|
2017-01-21 17:48:45 +01:00
|
|
|
temp = (uint8_t)(ide->head | ((cur_ide[ide_board] & 1) ? 0x10 : 0) | (ide->lba ? 0x40 : 0) | 0xa0);
|
2016-12-29 20:40:24 +01:00
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
/* For ATAPI: Bit 5 is DMA ready, but without overlapped or interlaved DMA, it is
|
|
|
|
|
DF (drive fault). */
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x1F7: /* Status */
|
|
|
|
|
ide_irq_lower(ide);
|
2017-01-17 19:41:42 +01:00
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
temp = (cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].status & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
temp = ide->atastat;
|
|
|
|
|
}
|
|
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
case 0x3F6: /* Alternate Status */
|
|
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
2017-01-17 19:41:42 +01:00
|
|
|
return 0;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
temp = (cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].status & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
temp = ide->atastat;
|
|
|
|
|
}
|
|
|
|
|
break;
|
2017-05-05 01:49:42 +02:00
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
return 0xff;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
/* if (ide_board) */ ide_log("Read IDEb %04X %02X %02X %02X %i %04X:%04X %i\n", addr, temp, ide->atastat,(ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0),cur_ide[ide_board],CS,cpu_state.pc,ide_board);
|
2016-12-29 20:40:24 +01:00
|
|
|
return temp;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
uint8_t cdb[16];
|
|
|
|
|
|
|
|
|
|
int old_len = 0;
|
|
|
|
|
|
|
|
|
|
int total_read = 0;
|
|
|
|
|
|
|
|
|
|
int block_total = 0;
|
|
|
|
|
int all_blocks_total = 0;
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
uint16_t readidew(int ide_board)
|
|
|
|
|
{
|
2017-01-20 23:53:19 +01:00
|
|
|
return ide_read_data(ide_board, 2);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t readidel(int ide_board)
|
|
|
|
|
{
|
2016-12-29 20:40:24 +01:00
|
|
|
uint16_t temp;
|
2017-01-20 23:53:19 +01:00
|
|
|
temp = readidew(ide_board);
|
|
|
|
|
return temp | (readidew(ide_board) << 16);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int times30=0;
|
|
|
|
|
void callbackide(int ide_board)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
IDE *ide, *ide_other;
|
2016-12-29 20:40:24 +01:00
|
|
|
int64_t snum;
|
2017-01-16 01:49:19 +01:00
|
|
|
int cdrom_id;
|
2017-06-01 22:26:56 +02:00
|
|
|
uint64_t full_size = 0;
|
2017-05-05 01:49:42 +02:00
|
|
|
|
|
|
|
|
ide = &ide_drives[cur_ide[ide_board]];
|
|
|
|
|
ide_other = &ide_drives[cur_ide[ide_board] ^ 1];
|
2017-06-01 22:26:56 +02:00
|
|
|
if (ide->type == IDE_HDD)
|
|
|
|
|
{
|
|
|
|
|
full_size = (hdc[ide->hdc_num].tracks * hdc[ide->hdc_num].hpc * hdc[ide->hdc_num].spt);
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
ext_ide = ide;
|
2016-12-29 20:40:24 +01:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback = 0;
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
if (ide->command==0x30) times30++;
|
2017-01-16 01:49:19 +01:00
|
|
|
/*if (ide_board) */ide_log("CALLBACK %02X %i %i %i\n",ide->command,times30,ide->reset,cur_ide[ide_board]);
|
2016-12-29 20:40:24 +01:00
|
|
|
|
|
|
|
|
if (ide->reset)
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = ide_other->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide->error = ide_other->error = 1;
|
|
|
|
|
ide->secount = ide_other->secount = 1;
|
|
|
|
|
ide->sector = ide_other->sector = 1;
|
|
|
|
|
ide->head = ide_other->head = 0;
|
|
|
|
|
ide->cylinder = ide_other->cylinder = 0;
|
|
|
|
|
ide->reset = ide_other->reset = 0;
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom_id = atapi_cdrom_drives[cur_ide[ide_board]];
|
|
|
|
|
cdrom[cdrom_id].status = READY_STAT | DSC_STAT;
|
|
|
|
|
cdrom[cdrom_id].error = 1;
|
|
|
|
|
cdrom[cdrom_id].phase = 1;
|
|
|
|
|
cdrom[cdrom_id].request_length=0xEB14;
|
2017-01-21 17:48:45 +01:00
|
|
|
ide->cylinder = 0xEB14;
|
2017-01-16 01:49:19 +01:00
|
|
|
if (cdrom_drives[cdrom_id].handler->stop)
|
|
|
|
|
{
|
|
|
|
|
cdrom_drives[cdrom_id].handler->stop(cdrom_id);
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
ide->cylinder=0xFFFF;
|
|
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide_other))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom_id = atapi_cdrom_drives[cur_ide[ide_board] ^ 1];
|
|
|
|
|
cdrom[cdrom_id].status = READY_STAT | DSC_STAT;
|
|
|
|
|
cdrom[cdrom_id].error = 1;
|
|
|
|
|
cdrom[cdrom_id].phase = 1;
|
|
|
|
|
cdrom[cdrom_id].request_length=0xEB14;
|
2017-01-21 17:48:45 +01:00
|
|
|
ide_other->cylinder = 0xEB14;
|
2017-01-16 01:49:19 +01:00
|
|
|
if (cdrom_drives[cdrom_id].handler->stop)
|
|
|
|
|
{
|
|
|
|
|
cdrom_drives[cdrom_id].handler->stop(cdrom_id);
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
if (ide_other->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
ide_other->cylinder=0xFFFF;
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom_id = atapi_cdrom_drives[cur_ide[ide_board]];
|
|
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
switch (ide->command)
|
|
|
|
|
{
|
|
|
|
|
/* Initialize the Task File Registers as follows: Status = 00h, Error = 01h, Sector Count = 01h, Sector Number = 01h,
|
|
|
|
|
Cylinder Low = 14h, Cylinder High =EBh and Drive/Head = 00h. */
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_SRST: /*ATAPI Device Reset */
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide->error=1; /*Device passed*/
|
|
|
|
|
ide->secount = ide->sector = 1;
|
|
|
|
|
ide_set_signature(ide);
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-21 17:48:45 +01:00
|
|
|
cdrom[cdrom_id].status = READY_STAT | DSC_STAT;
|
|
|
|
|
cdrom[cdrom_id].error = 1;
|
|
|
|
|
cdrom[cdrom_id].phase = 1;
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom_reset(cdrom_id);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
ide_irq_raise(ide);
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
ide->service = 0;
|
|
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_RESTORE:
|
|
|
|
|
case WIN_SEEK:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2016-08-10 01:14:22 +02:00
|
|
|
case WIN_NOP:
|
2016-08-10 00:46:56 +02:00
|
|
|
case WIN_STANDBYNOW1:
|
2017-01-17 19:41:42 +01:00
|
|
|
case WIN_IDLENOW1:
|
2016-08-10 00:46:56 +02:00
|
|
|
case WIN_SETIDLE1:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[cdrom_id].status = READY_STAT | DSC_STAT;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-08-10 00:46:56 +02:00
|
|
|
case WIN_CHECKPOWERMODE1:
|
2017-01-17 19:41:42 +01:00
|
|
|
case WIN_SLEEP1:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-17 19:41:42 +01:00
|
|
|
cdrom[cdrom_id].phase = 0xFF;
|
|
|
|
|
cdrom[cdrom_id].status = READY_STAT | DSC_STAT;
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
ide->secount = 0xFF;
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
2016-08-10 00:46:56 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_READ:
|
|
|
|
|
case WIN_READ_NORETRY:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
ide_set_signature(ide);
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
|
2017-06-19 06:46:08 +02:00
|
|
|
if (ide->do_initial_read)
|
|
|
|
|
{
|
|
|
|
|
ide->do_initial_read = 0;
|
|
|
|
|
ide->sector_pos = 0;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
hdd_image_read(ide->hdc_num, ide_get_sector(ide), ide->secount, ide->sector_buffer);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
hdd_image_read(ide->hdc_num, ide_get_sector(ide), 256, ide->sector_buffer);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos*512], 512);
|
|
|
|
|
|
|
|
|
|
ide->sector_pos++;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->pos=0;
|
2017-06-19 06:46:08 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_READ_DMA:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide) || (ide->board >= 2))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2017-06-19 06:46:08 +02:00
|
|
|
|
|
|
|
|
if (ide->do_initial_read)
|
|
|
|
|
{
|
|
|
|
|
ide->do_initial_read = 0;
|
|
|
|
|
ide->sector_pos = 0;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
hdd_image_read(ide->hdc_num, ide_get_sector(ide), ide->secount, ide->sector_buffer);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
hdd_image_read(ide->hdc_num, ide_get_sector(ide), 256, ide->sector_buffer);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->pos=0;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_bus_master_read)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-06-19 06:46:08 +02:00
|
|
|
if (ide_bus_master_read(ide_board, &ide->sector_buffer[ide->sector_pos*512], 512))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
idecallback[ide_board]=6*IDE_TIME; /*DMA not performed, try again later*/
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/*DMA successful*/
|
2017-06-19 06:46:08 +02:00
|
|
|
ide->sector_pos++;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
|
|
|
|
|
ide->secount = (ide->secount - 1) & 0xff;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
ide_next_sector(ide);
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
idecallback[ide_board]=6*IDE_TIME;
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide_irq_raise(ide);
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 0);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_READ_MULTIPLE:
|
2016-12-29 20:40:24 +01:00
|
|
|
/* According to the official ATA reference:
|
|
|
|
|
|
|
|
|
|
If the Read Multiple command is attempted before the Set Multiple Mode
|
|
|
|
|
command has been executed or when Read Multiple commands are
|
|
|
|
|
disabled, the Read Multiple operation is rejected with an Aborted Com-
|
|
|
|
|
mand error. */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide) || !ide->blocksize)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
|
2017-06-19 06:46:08 +02:00
|
|
|
if (ide->do_initial_read)
|
|
|
|
|
{
|
|
|
|
|
ide->do_initial_read = 0;
|
|
|
|
|
ide->sector_pos = 0;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
hdd_image_read(ide->hdc_num, ide_get_sector(ide), ide->secount, ide->sector_buffer);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
hdd_image_read(ide->hdc_num, ide_get_sector(ide), 256, ide->sector_buffer);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos*512], 512);
|
|
|
|
|
|
|
|
|
|
ide->sector_pos++;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->pos=0;
|
2017-06-19 06:46:08 +02:00
|
|
|
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
if (!ide->blockcount)
|
|
|
|
|
{
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
}
|
|
|
|
|
ide->blockcount++;
|
|
|
|
|
if (ide->blockcount >= ide->blocksize)
|
|
|
|
|
{
|
|
|
|
|
ide->blockcount = 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_WRITE:
|
|
|
|
|
case WIN_WRITE_NORETRY:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2017-06-16 03:18:59 +02:00
|
|
|
hdd_image_write(ide->hdc_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer);
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
ide->secount = (ide->secount - 1) & 0xff;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
ide->pos=0;
|
|
|
|
|
ide_next_sector(ide);
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 0);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_WRITE_DMA:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide) || (ide_board >= 2))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_bus_master_write)
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_bus_master_write(ide_board, (uint8_t *)ide->buffer, 512))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
idecallback[ide_board]=6*IDE_TIME; /*DMA not performed, try again later*/
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/*DMA successful*/
|
2017-06-16 03:18:59 +02:00
|
|
|
hdd_image_write(ide->hdc_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer);
|
2016-12-29 20:40:24 +01:00
|
|
|
|
|
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
|
|
|
|
|
ide->secount = (ide->secount - 1) & 0xff;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
ide_next_sector(ide);
|
|
|
|
|
ide->atastat = BUSY_STAT;
|
|
|
|
|
idecallback[ide_board]=6*IDE_TIME;
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide_irq_raise(ide);
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 0);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_WRITE_MULTIPLE:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2017-06-16 03:18:59 +02:00
|
|
|
hdd_image_write(ide->hdc_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer);
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->blockcount++;
|
|
|
|
|
if (ide->blockcount >= ide->blocksize || ide->secount == 1)
|
|
|
|
|
{
|
|
|
|
|
ide->blockcount = 0;
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
}
|
|
|
|
|
ide->secount = (ide->secount - 1) & 0xff;
|
|
|
|
|
if (ide->secount)
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
ide->pos=0;
|
|
|
|
|
ide_next_sector(ide);
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 0);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
case WIN_VERIFY:
|
|
|
|
|
case WIN_VERIFY_ONCE:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->pos=0;
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
2017-05-27 03:53:32 +02:00
|
|
|
update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1);
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_FORMAT:
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-02-15 18:19:00 +01:00
|
|
|
if (!ide->specify_success)
|
|
|
|
|
{
|
|
|
|
|
goto id_not_found;
|
|
|
|
|
}
|
2017-06-16 03:18:59 +02:00
|
|
|
hdd_image_zero(ide->hdc_num, ide_get_sector(ide), ide->secount);
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
2016-12-29 20:40:24 +01:00
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
/* update_status_bar_icon(SB_HDD | hdc[ide->hdc_num].bus, 1); */
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
|
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_DRIVE_DIAGNOSTICS:
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_set_signature(ide);
|
|
|
|
|
ide->error=1; /*No error detected*/
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
2017-01-16 01:49:19 +01:00
|
|
|
cdrom[cdrom_id].status = 0;
|
2017-01-17 19:41:42 +01:00
|
|
|
cdrom[cdrom_id].error = 1;
|
|
|
|
|
ide_irq_raise(ide);
|
2016-12-29 20:40:24 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
2017-01-17 19:41:42 +01:00
|
|
|
ide->error = 1;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_SPECIFY: /* Initialize Drive Parameters */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
full_size /= (ide->head+1);
|
|
|
|
|
full_size /= ide->secount;
|
|
|
|
|
ide->specify_success = 1;
|
2017-06-16 03:18:59 +02:00
|
|
|
hdd_image_specify(ide->hdc_num, ide->head + 1, ide->secount);
|
2016-12-29 20:40:24 +01:00
|
|
|
ide->spt=ide->secount;
|
|
|
|
|
ide->hpc=ide->head+1;
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_PIDENTIFY: /* Identify Packet Device */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
ide_atapi_identify(ide);
|
2017-01-16 01:49:19 +01:00
|
|
|
ide->pos = 0;
|
|
|
|
|
cdrom[cdrom_id].pos = 0;
|
|
|
|
|
cdrom[cdrom_id].error = 0;
|
|
|
|
|
cdrom[cdrom_id].status = DRQ_STAT | READY_STAT | DSC_STAT;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
goto abort_cmd;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_SET_MULTIPLE_MODE:
|
|
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
|
|
|
|
ide->blocksize = ide->secount;
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
2016-08-10 00:46:56 +02:00
|
|
|
|
|
|
|
|
case WIN_SET_FEATURES:
|
2017-05-14 18:37:32 +02:00
|
|
|
if ((ide->type == IDE_NONE) || ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-05-14 18:37:32 +02:00
|
|
|
|
|
|
|
|
if (!ide_set_features(ide))
|
2017-01-16 01:49:19 +01:00
|
|
|
{
|
2017-05-14 18:37:32 +02:00
|
|
|
goto abort_cmd;
|
2017-01-16 01:49:19 +01:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
2017-05-14 18:37:32 +02:00
|
|
|
ide_irq_raise(ide);
|
2017-01-16 01:49:19 +01:00
|
|
|
}
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2017-05-14 18:37:32 +02:00
|
|
|
|
2016-08-10 00:46:56 +02:00
|
|
|
case WIN_READ_NATIVE_MAX:
|
2017-01-16 01:49:19 +01:00
|
|
|
if ((ide->type != IDE_HDD) || ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-05-15 03:21:40 +02:00
|
|
|
snum = hdc[ide->hdc_num].spt;
|
|
|
|
|
snum *= hdc[ide->hdc_num].hpc;
|
|
|
|
|
snum *= hdc[ide->hdc_num].tracks;
|
2016-12-29 20:40:24 +01:00
|
|
|
ide_set_sector(ide, snum - 1);
|
|
|
|
|
ide->atastat = READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
return;
|
2017-05-14 18:37:32 +02:00
|
|
|
|
|
|
|
|
case WIN_IDENTIFY: /* Identify Device */
|
2016-12-29 20:40:24 +01:00
|
|
|
if (ide->type == IDE_NONE)
|
|
|
|
|
{
|
|
|
|
|
ide_set_signature(ide);
|
2017-01-17 19:41:42 +01:00
|
|
|
cdrom[cdrom_id].status = READY_STAT | ERR_STAT | DSC_STAT;
|
|
|
|
|
cdrom[cdrom_id].pos = 0;
|
2016-12-29 20:40:24 +01:00
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
ide_set_signature(ide);
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide_identify(ide);
|
|
|
|
|
ide->pos=0;
|
|
|
|
|
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
|
|
|
|
|
ide_irq_raise(ide);
|
|
|
|
|
}
|
|
|
|
|
return;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-14 18:37:32 +02:00
|
|
|
case WIN_PACKETCMD: /* ATAPI Packet */
|
2017-01-16 01:49:19 +01:00
|
|
|
if (!ide_drive_is_cdrom(ide))
|
2016-12-29 20:40:24 +01:00
|
|
|
{
|
|
|
|
|
goto abort_cmd;
|
|
|
|
|
}
|
|
|
|
|
|
2017-01-20 23:53:19 +01:00
|
|
|
cdrom_phase_callback(atapi_cdrom_drives[cur_ide[ide_board]]);
|
2017-01-16 01:49:19 +01:00
|
|
|
idecallback[ide_board] = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback;
|
|
|
|
|
ide_log("IDE callback now: %i\n", idecallback[ide_board]);
|
2016-12-29 20:40:24 +01:00
|
|
|
return;
|
2017-01-17 19:41:42 +01:00
|
|
|
|
|
|
|
|
case 0xFF:
|
|
|
|
|
goto abort_cmd;
|
2017-05-14 18:37:32 +02:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
abort_cmd:
|
|
|
|
|
ide->command = 0;
|
2017-01-16 01:49:19 +01:00
|
|
|
if (ide_drive_is_cdrom(ide))
|
|
|
|
|
{
|
|
|
|
|
cdrom[cdrom_id].status = READY_STAT | ERR_STAT | DSC_STAT;
|
|
|
|
|
cdrom[cdrom_id].error = ABRT_ERR;
|
|
|
|
|
cdrom[cdrom_id].pos = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ide->atastat = READY_STAT | ERR_STAT | DSC_STAT;
|
|
|
|
|
ide->error = ABRT_ERR;
|
|
|
|
|
ide->pos = 0;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
ide_irq_raise(ide);
|
2017-02-15 18:19:00 +01:00
|
|
|
return;
|
2017-05-14 18:37:32 +02:00
|
|
|
|
2017-02-15 18:19:00 +01:00
|
|
|
id_not_found:
|
|
|
|
|
ide->atastat = READY_STAT | ERR_STAT | DSC_STAT;
|
|
|
|
|
ide->error = ABRT_ERR | 0x10;
|
|
|
|
|
ide->pos = 0;
|
|
|
|
|
ide_irq_raise(ide);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_callback_pri()
|
|
|
|
|
{
|
|
|
|
|
idecallback[0] = 0;
|
|
|
|
|
callbackide(0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_callback_sec()
|
|
|
|
|
{
|
|
|
|
|
idecallback[1] = 0;
|
|
|
|
|
callbackide(1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_callback_ter()
|
|
|
|
|
{
|
|
|
|
|
idecallback[2] = 0;
|
|
|
|
|
callbackide(2);
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-28 23:34:00 +01:00
|
|
|
void ide_callback_qua()
|
|
|
|
|
{
|
|
|
|
|
idecallback[3] = 0;
|
|
|
|
|
callbackide(3);
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
void ide_callback_xtide()
|
|
|
|
|
{
|
|
|
|
|
idecallback[4] = 0;
|
|
|
|
|
callbackide(4);
|
|
|
|
|
}
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
void ide_write_pri(uint16_t addr, uint8_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeide(0, addr, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
void ide_write_pri_w(uint16_t addr, uint16_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidew(0, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
void ide_write_pri_l(uint16_t addr, uint32_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidel(0, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint8_t ide_read_pri(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readide(0, addr);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint16_t ide_read_pri_w(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidew(0);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint32_t ide_read_pri_l(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidel(0);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_write_sec(uint16_t addr, uint8_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeide(1, addr, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
void ide_write_sec_w(uint16_t addr, uint16_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidew(1, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
void ide_write_sec_l(uint16_t addr, uint32_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidel(1, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint8_t ide_read_sec(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readide(1, addr);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint16_t ide_read_sec_w(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidew(1);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint32_t ide_read_sec_l(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidel(1);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_write_ter(uint16_t addr, uint8_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeide(2, addr, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
void ide_write_ter_w(uint16_t addr, uint16_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidew(2, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
void ide_write_ter_l(uint16_t addr, uint32_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidel(2, val);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint8_t ide_read_ter(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readide(2, addr);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint16_t ide_read_ter_w(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidew(2);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
uint32_t ide_read_ter_l(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidel(2);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2016-12-28 23:34:00 +01:00
|
|
|
|
|
|
|
|
void ide_write_qua(uint16_t addr, uint8_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeide(3, addr, val);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
void ide_write_qua_w(uint16_t addr, uint16_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidew(3, val);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
void ide_write_qua_l(uint16_t addr, uint32_t val, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
writeidel(3, val);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
uint8_t ide_read_qua(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readide(3, addr);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
uint16_t ide_read_qua_w(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidew(3);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
uint32_t ide_read_qua_l(uint16_t addr, void *priv)
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
return readidel(3);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
static uint16_t ide_base_main[2] = { 0x1f0, 0x170 };
|
|
|
|
|
static uint16_t ide_side_main[2] = { 0x3f6, 0x376 };
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
void ide_pri_enable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_sethandler(0x01f0, 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
|
|
|
|
io_sethandler(0x03f6, 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
|
|
|
|
ide_base_main[0] = 0x1f0;
|
|
|
|
|
ide_side_main[0] = 0x3f6;
|
2017-05-05 01:49:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_pri_enable_ex()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
if (ide_base_main[0] & 0x300)
|
|
|
|
|
{
|
2017-06-01 22:26:56 +02:00
|
|
|
ide_log("Enabling primary base (%04X)...\n", ide_base_main[0]);
|
2017-05-15 00:35:26 +02:00
|
|
|
io_sethandler(ide_base_main[0], 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
|
|
|
|
}
|
|
|
|
|
if (ide_side_main[0] & 0x300)
|
|
|
|
|
{
|
2017-06-01 22:26:56 +02:00
|
|
|
ide_log("Enabling primary side (%04X)...\n", ide_side_main[0]);
|
2017-05-15 00:35:26 +02:00
|
|
|
io_sethandler(ide_side_main[0], 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_pri_disable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_removehandler(ide_base_main[0], 0x0008, ide_read_pri, ide_read_pri_w, ide_read_pri_l, ide_write_pri, ide_write_pri_w, ide_write_pri_l, NULL);
|
|
|
|
|
io_removehandler(ide_side_main[0], 0x0001, ide_read_pri, NULL, NULL, ide_write_pri, NULL, NULL , NULL);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_sec_enable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_sethandler(0x0170, 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
|
|
|
|
io_sethandler(0x0376, 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
|
|
|
|
ide_base_main[1] = 0x170;
|
|
|
|
|
ide_side_main[1] = 0x376;
|
2017-05-05 01:49:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_sec_enable_ex()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
if (ide_base_main[1] & 0x300)
|
|
|
|
|
{
|
|
|
|
|
io_sethandler(ide_base_main[1], 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
|
|
|
|
}
|
|
|
|
|
if (ide_side_main[1] & 0x300)
|
|
|
|
|
{
|
|
|
|
|
io_sethandler(ide_side_main[1], 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_sec_disable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_removehandler(ide_base_main[1], 0x0008, ide_read_sec, ide_read_sec_w, ide_read_sec_l, ide_write_sec, ide_write_sec_w, ide_write_sec_l, NULL);
|
|
|
|
|
io_removehandler(ide_side_main[1], 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
|
2017-05-05 01:49:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_set_base(int controller, uint16_t port)
|
|
|
|
|
{
|
|
|
|
|
ide_base_main[controller] = port;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_set_side(int controller, uint16_t port)
|
|
|
|
|
{
|
|
|
|
|
ide_side_main[controller] = port;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_ter_enable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_sethandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL);
|
|
|
|
|
io_sethandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_ter_disable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_removehandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL);
|
|
|
|
|
io_removehandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-01-17 19:41:42 +01:00
|
|
|
void ide_ter_disable_cond()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
if ((ide_drives[4].type == IDE_NONE) && (ide_drives[5].type == IDE_NONE))
|
|
|
|
|
{
|
|
|
|
|
ide_ter_disable();
|
|
|
|
|
}
|
2017-01-17 19:41:42 +01:00
|
|
|
}
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
void ide_ter_init()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
ide_ter_enable();
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
timer_add(ide_callback_ter, &idecallback[2], &idecallback[2], NULL);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2016-12-28 23:34:00 +01:00
|
|
|
|
|
|
|
|
void ide_qua_enable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_sethandler(0x01e8, 0x0008, ide_read_qua, ide_read_qua_w, ide_read_qua_l, ide_write_qua, ide_write_qua_w, ide_write_qua_l, NULL);
|
|
|
|
|
io_sethandler(0x03ee, 0x0001, ide_read_qua, NULL, NULL, ide_write_qua, NULL, NULL , NULL);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
|
2017-01-17 19:41:42 +01:00
|
|
|
void ide_qua_disable_cond()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
if ((ide_drives[6].type == IDE_NONE) && (ide_drives[7].type == IDE_NONE))
|
|
|
|
|
{
|
|
|
|
|
ide_qua_disable();
|
|
|
|
|
}
|
2017-01-17 19:41:42 +01:00
|
|
|
}
|
|
|
|
|
|
2016-12-28 23:34:00 +01:00
|
|
|
void ide_qua_disable()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
io_removehandler(0x01e8, 0x0008, ide_read_qua, ide_read_qua_w, ide_read_qua_l, ide_write_qua, ide_write_qua_w, ide_write_qua_l, NULL);
|
|
|
|
|
io_removehandler(0x03ee, 0x0001, ide_read_qua, NULL, NULL, ide_write_qua, NULL, NULL , NULL);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ide_qua_init()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
ide_qua_enable();
|
2016-12-28 23:34:00 +01:00
|
|
|
|
2017-05-15 00:35:26 +02:00
|
|
|
timer_add(ide_callback_qua, &idecallback[3], &idecallback[3], NULL);
|
2016-12-28 23:34:00 +01:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
void ide_init()
|
|
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
ide_pri_enable();
|
|
|
|
|
ide_sec_enable();
|
|
|
|
|
ide_bus_master_read = ide_bus_master_write = NULL;
|
|
|
|
|
|
|
|
|
|
timer_add(ide_callback_pri, &idecallback[0], &idecallback[0], NULL);
|
|
|
|
|
timer_add(ide_callback_sec, &idecallback[1], &idecallback[1], NULL);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-05-27 03:53:32 +02:00
|
|
|
void ide_xtide_init()
|
|
|
|
|
{
|
|
|
|
|
ide_bus_master_read = ide_bus_master_write = NULL;
|
|
|
|
|
|
|
|
|
|
timer_add(ide_callback_xtide, &idecallback[4], &idecallback[4], NULL);
|
|
|
|
|
}
|
|
|
|
|
|
2017-01-16 01:49:19 +01:00
|
|
|
void ide_set_bus_master(int (*read)(int channel, uint8_t *data, int transfer_length), int (*write)(int channel, uint8_t *data, int transfer_length), void (*set_irq)(int channel))
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-15 00:35:26 +02:00
|
|
|
ide_bus_master_read = read;
|
|
|
|
|
ide_bus_master_write = write;
|
|
|
|
|
ide_bus_master_set_irq = set_irq;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-09-02 20:39:57 +02:00
|
|
|
|
|
|
|
|
void secondary_ide_check(void)
|
|
|
|
|
{
|
|
|
|
|
int i = 0;
|
|
|
|
|
int secondary_cdroms = 0;
|
|
|
|
|
|
|
|
|
|
for (i=0; i<CDROM_NUM; i++)
|
|
|
|
|
{
|
|
|
|
|
if ((cdrom_drives[i].ide_channel >= 2) && (cdrom_drives[i].ide_channel <= 3) && ((cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_ONLY) || (cdrom_drives[i].bus_type == CDROM_BUS_ATAPI_PIO_AND_DMA)))
|
|
|
|
|
{
|
|
|
|
|
secondary_cdroms++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (!secondary_cdroms) ide_sec_disable();
|
|
|
|
|
}
|