PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the SiS 85c401/85c402, 85c460, 85c461, and
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* 85c407/85c471 chipsets.
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2019,2020 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/keyboard.h>
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#include <86box/timer.h>
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#include <86box/port_92.h>
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#include <86box/mem.h>
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#include <86box/smram.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/pic.h>
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#include <86box/machine.h>
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#include <86box/chipset.h>
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typedef struct
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{
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uint8_t cur_reg, tries,
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reg_base, reg_last,
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is_471,
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regs[39], scratch[2];
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smram_t *smram;
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port_92_t *port_92;
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} sis_85c4xx_t;
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static void
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sis_85c4xx_recalcmapping(sis_85c4xx_t *dev)
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{
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uint32_t base;
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uint32_t i, shflags = 0;
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uint32_t readext, writeext;
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uint8_t romcs = 0xc0, cur_romcs;
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shadowbios = 0;
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shadowbios_write = 0;
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if (dev->regs[0x03] & 0x40)
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romcs |= 0x01;
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if (dev->regs[0x03] & 0x80)
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romcs |= 0x30;
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if (dev->regs[0x08] & 0x04)
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romcs |= 0x02;
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for (i = 0; i < 8; i++) {
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base = 0xc0000 + (i << 15);
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cur_romcs = romcs & (1 << i);
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readext = cur_romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL;
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writeext = cur_romcs ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL;
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if ((i > 5) || (dev->regs[0x02] & (1 << i))) {
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shadowbios |= (base >= 0xe0000) && (dev->regs[0x02] & 0x80);
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shadowbios_write |= (base >= 0xe0000) && !(dev->regs[0x02] & 0x40);
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shflags = (dev->regs[0x02] & 0x80) ? MEM_READ_INTERNAL : readext;
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shflags |= (dev->regs[0x02] & 0x40) ? writeext : MEM_WRITE_INTERNAL;
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mem_set_mem_state(base, 0x8000, shflags);
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} else
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mem_set_mem_state(base, 0x8000, readext | writeext);
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}
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flushmmucache();
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}
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static void
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sis_85c4xx_sw_smi_out(uint16_t port, uint8_t val, void *priv)
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{
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sis_85c4xx_t *dev = (sis_85c4xx_t *) priv;
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if (dev->regs[0x18] & 0x02) {
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if (dev->regs[0x0b] & 0x10)
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smi_line = 1;
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else
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picint(1 << ((dev->regs[0x0b] & 0x08) ? 15 : 12));
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soft_reset_mask = 1;
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dev->regs[0x19] |= 0x02;
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}
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}
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static void
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sis_85c4xx_sw_smi_handler(sis_85c4xx_t *dev)
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{
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uint16_t addr;
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if (!dev->is_471)
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return;
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addr = dev->regs[0x14] | (dev->regs[0x15] << 8);
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io_handler((dev->regs[0x0b] & 0x80) && (dev->regs[0x18] & 0x02), addr, 0x0001,
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NULL, NULL, NULL, sis_85c4xx_sw_smi_out, NULL, NULL, dev);
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}
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static void
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sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
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{
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sis_85c4xx_t *dev = (sis_85c4xx_t *) priv;
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uint8_t rel_reg = dev->cur_reg - dev->reg_base;
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uint8_t valxor = 0x00;
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uint32_t host_base = 0x000e0000, ram_base = 0x000a0000;
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switch (port) {
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case 0x22:
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dev->cur_reg = val;
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break;
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case 0x23:
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if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last)) {
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valxor = val ^ dev->regs[rel_reg];
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if (rel_reg == 0x19)
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dev->regs[rel_reg] &= ~val;
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else
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dev->regs[rel_reg] = val;
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switch (rel_reg) {
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case 0x01:
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cpu_cache_ext_enabled = ((val & 0x84) == 0x84);
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cpu_update_waitstates();
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break;
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case 0x02: case 0x03:
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case 0x08:
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sis_85c4xx_recalcmapping(dev);
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break;
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case 0x0b:
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sis_85c4xx_sw_smi_handler(dev);
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if (dev->is_471 && (valxor & 0x02)) {
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if (val & 0x02)
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mem_remap_top(0);
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else
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mem_remap_top(256);
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}
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break;
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case 0x13:
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if (dev->is_471 && (valxor & 0xf0)) {
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smram_disable(dev->smram);
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host_base = (val & 0x80) ? 0x00060000 : 0x000e0000;
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switch ((val >> 5) & 0x03) {
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case 0x00:
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ram_base = 0x000a0000;
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break;
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case 0x01:
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ram_base = 0x000b0000;
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break;
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case 0x02:
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ram_base = (val & 0x80) ? 0x00000000 : 0x000e0000;
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break;
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default:
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ram_base = 0x00000000;
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break;
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}
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if (ram_base != 0x00000000)
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smram_enable(dev->smram, host_base, ram_base, 0x00010000, (val & 0x10), 1);
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}
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break;
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case 0x14: case 0x15:
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case 0x18:
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sis_85c4xx_sw_smi_handler(dev);
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break;
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case 0x1c:
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if (dev->is_471)
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soft_reset_mask = 0;
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break;
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case 0x22:
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if (dev->is_471 && (valxor & 0x01)) {
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port_92_remove(dev->port_92);
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if (val & 0x01)
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port_92_add(dev->port_92);
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}
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break;
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}
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}
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dev->cur_reg = 0x00;
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break;
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case 0xe1: case 0xe2:
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dev->scratch[port - 0xe1] = val;
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return;
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}
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}
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static uint8_t
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sis_85c4xx_in(uint16_t port, void *priv)
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{
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sis_85c4xx_t *dev = (sis_85c4xx_t *) priv;
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uint8_t rel_reg = dev->cur_reg - dev->reg_base;
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uint8_t ret = 0xff;
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switch (port) {
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case 0x23:
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if (dev->is_471 && (dev->cur_reg == 0x1c))
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ret = inb(0x70);
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if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last))
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ret = dev->regs[rel_reg];
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dev->cur_reg = 0x00;
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break;
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case 0xe1: case 0xe2:
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ret = dev->scratch[port - 0xe1];
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}
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return ret;
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}
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static void
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sis_85c4xx_close(void *priv)
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{
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sis_85c4xx_t *dev = (sis_85c4xx_t *) priv;
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if (dev->is_471)
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smram_del(dev->smram);
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free(dev);
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}
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static void *
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sis_85c4xx_init(const device_t *info)
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{
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int mem_size_mb;
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sis_85c4xx_t *dev = (sis_85c4xx_t *) malloc(sizeof(sis_85c4xx_t));
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memset(dev, 0, sizeof(sis_85c4xx_t));
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dev->is_471 = (info->local >> 8) & 0xff;
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dev->reg_base = info->local & 0xff;
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mem_size_mb = mem_size >> 10;
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2020-11-18 01:09:17 -03:00
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|
|
if (cpu_s->rspeed < 25000000)
|
PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
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|
|
dev->regs[0x08] = 0x80;
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|
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if (dev->is_471) {
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dev->reg_last = dev->reg_base + 0x76;
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dev->regs[0x09] = 0x40;
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switch (mem_size_mb) {
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case 0: case 1:
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dev->regs[0x09] |= 0x00;
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break;
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case 2: case 3:
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dev->regs[0x09] |= 0x01;
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break;
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case 4:
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dev->regs[0x09] |= 0x02;
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break;
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case 5:
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dev->regs[0x09] |= 0x20;
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break;
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case 6: case 7:
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dev->regs[0x09] |= 0x09;
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break;
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case 8: case 9:
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|
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dev->regs[0x09] |= 0x04;
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|
break;
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case 10: case 11:
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|
|
dev->regs[0x09] |= 0x05;
|
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|
|
break;
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|
|
case 12: case 13: case 14: case 15:
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|
|
dev->regs[0x09] |= 0x0b;
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|
break;
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|
case 16:
|
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|
|
dev->regs[0x09] |= 0x13;
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|
break;
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|
|
case 17:
|
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|
|
dev->regs[0x09] |= 0x21;
|
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|
|
break;
|
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|
|
|
case 18: case 19:
|
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|
|
dev->regs[0x09] |= 0x06;
|
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|
|
|
break;
|
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|
|
|
case 20: case 21: case 22: case 23:
|
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|
|
|
dev->regs[0x09] |= 0x0d;
|
|
|
|
|
break;
|
|
|
|
|
case 24: case 25: case 26: case 27:
|
|
|
|
|
case 28: case 29: case 30: case 31:
|
|
|
|
|
dev->regs[0x09] |= 0x0e;
|
|
|
|
|
break;
|
|
|
|
|
case 32: case 33: case 34: case 35:
|
|
|
|
|
dev->regs[0x09] |= 0x1b;
|
|
|
|
|
break;
|
|
|
|
|
case 36: case 37: case 38: case 39:
|
|
|
|
|
dev->regs[0x09] |= 0x0f;
|
|
|
|
|
break;
|
|
|
|
|
case 40: case 41: case 42: case 43:
|
|
|
|
|
case 44: case 45: case 46: case 47:
|
|
|
|
|
dev->regs[0x09] |= 0x17;
|
|
|
|
|
break;
|
|
|
|
|
case 48:
|
|
|
|
|
dev->regs[0x09] |= 0x1e;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
if (mem_size_mb < 64)
|
|
|
|
|
dev->regs[0x09] |= 0x1e;
|
|
|
|
|
else if ((mem_size_mb >= 65) && (mem_size_mb < 68))
|
|
|
|
|
dev->regs[0x09] |= 0x22;
|
|
|
|
|
else
|
|
|
|
|
dev->regs[0x09] |= 0x24;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dev->regs[0x11] = 0x09;
|
|
|
|
|
dev->regs[0x12] = 0xff;
|
|
|
|
|
dev->regs[0x1f] = 0x20; /* Video access enabled. */
|
|
|
|
|
dev->regs[0x23] = 0xf0;
|
|
|
|
|
dev->regs[0x26] = 0x01;
|
|
|
|
|
|
|
|
|
|
dev->smram = smram_add();
|
|
|
|
|
smram_enable(dev->smram, 0x000e0000, 0x000a0000, 0x00010000, 0, 1);
|
|
|
|
|
|
|
|
|
|
dev->port_92 = device_add(&port_92_device);
|
|
|
|
|
port_92_remove(dev->port_92);
|
|
|
|
|
} else {
|
|
|
|
|
dev->reg_last = dev->reg_base + 0x11;
|
|
|
|
|
|
|
|
|
|
switch (mem_size_mb) {
|
|
|
|
|
case 1:
|
|
|
|
|
default:
|
|
|
|
|
dev->regs[0x00] = 0x00;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
dev->regs[0x00] = 0x01;
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
dev->regs[0x00] = 0x02;
|
|
|
|
|
break;
|
|
|
|
|
case 6:
|
|
|
|
|
dev->regs[0x00] = 0x03;
|
|
|
|
|
break;
|
|
|
|
|
case 8:
|
|
|
|
|
dev->regs[0x00] = 0x04;
|
|
|
|
|
break;
|
|
|
|
|
case 10:
|
|
|
|
|
dev->regs[0x00] = 0x05;
|
|
|
|
|
break;
|
|
|
|
|
case 12:
|
|
|
|
|
dev->regs[0x00] = 0x0b;
|
|
|
|
|
break;
|
|
|
|
|
case 16:
|
|
|
|
|
dev->regs[0x00] = 0x19;
|
|
|
|
|
break;
|
|
|
|
|
case 18:
|
|
|
|
|
dev->regs[0x00] = 0x06;
|
|
|
|
|
break;
|
|
|
|
|
case 20:
|
|
|
|
|
dev->regs[0x00] = 0x14;
|
|
|
|
|
break;
|
|
|
|
|
case 24:
|
|
|
|
|
dev->regs[0x00] = 0x15;
|
|
|
|
|
break;
|
|
|
|
|
case 32:
|
|
|
|
|
dev->regs[0x00] = 0x1b;
|
|
|
|
|
break;
|
|
|
|
|
case 36:
|
|
|
|
|
dev->regs[0x00] = 0x16;
|
|
|
|
|
break;
|
|
|
|
|
case 40:
|
|
|
|
|
dev->regs[0x00] = 0x17;
|
|
|
|
|
break;
|
|
|
|
|
case 48:
|
|
|
|
|
dev->regs[0x00] = 0x1e;
|
|
|
|
|
break;
|
|
|
|
|
case 64:
|
|
|
|
|
dev->regs[0x00] = 0x1f;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dev->regs[0x11] = 0x01;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
io_sethandler(0x0022, 0x0002,
|
|
|
|
|
sis_85c4xx_in, NULL, NULL, sis_85c4xx_out, NULL, NULL, dev);
|
|
|
|
|
|
|
|
|
|
dev->scratch[0] = dev->scratch[1] = 0xff;
|
|
|
|
|
|
|
|
|
|
io_sethandler(0x00e1, 0x0002,
|
|
|
|
|
sis_85c4xx_in, NULL, NULL, sis_85c4xx_out, NULL, NULL, dev);
|
|
|
|
|
|
|
|
|
|
sis_85c4xx_recalcmapping(dev);
|
|
|
|
|
|
|
|
|
|
return dev;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
const device_t sis_85c401_device = {
|
|
|
|
|
"SiS 85c401/85c402",
|
|
|
|
|
0,
|
|
|
|
|
0x060,
|
|
|
|
|
sis_85c4xx_init, sis_85c4xx_close, NULL,
|
2020-11-16 00:01:21 +01:00
|
|
|
{ NULL }, NULL, NULL,
|
PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
|
|
|
NULL
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t sis_85c460_device = {
|
|
|
|
|
"SiS 85c460",
|
|
|
|
|
0,
|
|
|
|
|
0x050,
|
|
|
|
|
sis_85c4xx_init, sis_85c4xx_close, NULL,
|
2020-11-16 00:01:21 +01:00
|
|
|
{ NULL }, NULL, NULL,
|
PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
|
|
|
NULL
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* TODO: Log to make sure the registers are correct. */
|
|
|
|
|
const device_t sis_85c461_device = {
|
|
|
|
|
"SiS 85c461",
|
|
|
|
|
0,
|
|
|
|
|
0x050,
|
|
|
|
|
sis_85c4xx_init, sis_85c4xx_close, NULL,
|
2020-11-16 00:01:21 +01:00
|
|
|
{ NULL }, NULL, NULL,
|
PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
|
|
|
NULL
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t sis_85c471_device = {
|
|
|
|
|
"SiS 85c407/85c471",
|
|
|
|
|
0,
|
|
|
|
|
0x150,
|
|
|
|
|
sis_85c4xx_init, sis_85c4xx_close, NULL,
|
2020-11-16 00:01:21 +01:00
|
|
|
{ NULL }, NULL, NULL,
|
PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
|
|
|
NULL
|
|
|
|
|
};
|