2022-11-19 10:40:32 -05:00
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static int
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opPAND_a16(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_16(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q &= src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPAND_a32(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_32(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q &= src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPANDN_a16(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_16(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPANDN_a32(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_32(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPOR_a16(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_16(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q |= src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPOR_a32(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_32(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q |= src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPXOR_a16(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_16(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q ^= src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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2022-11-19 10:40:32 -05:00
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static int
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opPXOR_a32(uint32_t fetchdat)
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2016-06-26 00:34:39 +02:00
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{
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2022-11-19 10:40:32 -05:00
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MMX_REG src;
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MMX_ENTER();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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fetch_ea_32(fetchdat);
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MMX_GETSRC();
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2022-02-20 02:26:27 -05:00
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2022-11-19 10:40:32 -05:00
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cpu_state.MM[cpu_reg].q ^= src.q;
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return 0;
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2016-06-26 00:34:39 +02:00
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}
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