2017-01-06 09:02:53 -06:00
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/* Copyright holders: Sarah Walker, Melissa Goad
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2016-08-14 22:07:17 -04:00
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see COPYING for more details
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*/
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2016-06-26 00:34:39 +02:00
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/*ATI 18800 emulation (VGA Edge-16)*/
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#include <stdlib.h>
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2017-05-06 17:48:33 +02:00
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#include "../ibm.h"
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#include "../io.h"
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#include "../mem.h"
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#include "../rom.h"
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#include "../device.h"
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2016-06-26 00:34:39 +02:00
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#include "video.h"
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#include "vid_ati18800.h"
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#include "vid_ati_eeprom.h"
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#include "vid_svga.h"
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2017-05-06 17:48:33 +02:00
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2016-06-26 00:34:39 +02:00
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typedef struct ati18800_t
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{
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svga_t svga;
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ati_eeprom_t eeprom;
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rom_t bios_rom;
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uint8_t regs[256];
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int index;
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} ati18800_t;
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void ati18800_out(uint16_t addr, uint8_t val, void *p)
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{
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ati18800_t *ati18800 = (ati18800_t *)p;
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svga_t *svga = &ati18800->svga;
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uint8_t old;
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2017-01-06 09:02:53 -06:00
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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addr ^= 0x60;
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2016-06-26 00:34:39 +02:00
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switch (addr)
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{
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case 0x1ce:
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ati18800->index = val;
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break;
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case 0x1cf:
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ati18800->regs[ati18800->index] = val;
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2017-01-06 09:02:53 -06:00
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pclog("ATI 18800 ATI register write %02x %02x\n", ati18800->index, val);
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2016-06-26 00:34:39 +02:00
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switch (ati18800->index)
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{
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2017-01-06 09:02:53 -06:00
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case 0xb0:
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svga_recalctimings(svga);
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2016-06-26 00:34:39 +02:00
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case 0xb2:
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case 0xbe:
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if (ati18800->regs[0xbe] & 8) /*Read/write bank mode*/
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{
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svga->read_bank = ((ati18800->regs[0xb2] >> 5) & 7) * 0x10000;
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svga->write_bank = ((ati18800->regs[0xb2] >> 1) & 7) * 0x10000;
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}
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else /*Single bank mode*/
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svga->read_bank = svga->write_bank = ((ati18800->regs[0xb2] >> 1) & 7) * 0x10000;
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break;
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case 0xb3:
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ati_eeprom_write(&ati18800->eeprom, val & 8, val & 2, val & 1);
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break;
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}
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break;
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case 0x3D4:
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svga->crtcreg = val & 0x3f;
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return;
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case 0x3D5:
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if (svga->crtcreg <= 0x18)
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val &= mask_crtc[svga->crtcreg];
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2017-01-06 09:02:53 -06:00
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80))
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2016-06-26 00:34:39 +02:00
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return;
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2017-01-06 09:02:53 -06:00
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80))
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2016-06-26 00:34:39 +02:00
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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2017-01-06 09:02:53 -06:00
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if ((ati18800->regs[0xb4] & 4) && (svga->crtcreg == 9))
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val = (svga->crtc[9] & ~0x60) | (val & 0x60);
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if ((ati18800->regs[0xb4] & 8) && ((svga->crtcreg == 6) || (svga->crtcreg == 0x10) || (svga->crtcreg == 0x12) || (svga->crtcreg == 0x15) || (svga->crtcreg == 0x16)))
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return;
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if ((ati18800->regs[0xb4] & 8) && (svga->crtcreg == 7))
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val = (svga->crtc[9] & ~0x10) | (val & 0x10);
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if ((ati18800->regs[0xb4] & 8) && (svga->crtcreg == 9))
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val = (svga->crtc[9] & ~0xdf) | (val & 0xdf);
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if ((ati18800->regs[0xb4] & 8) && (svga->crtcreg == 0x11))
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val = (svga->crtc[9] & ~0xf0) | (val & 0xf0);
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if ((ati18800->regs[0xb4] & 0x10) && ((svga->crtcreg == 0x0a) || (svga->crtcreg == 0x0b)))
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return;
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2016-06-26 00:34:39 +02:00
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old = svga->crtc[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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if (old != val)
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{
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if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
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{
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svga->fullchange = changeframecount;
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svga_recalctimings(svga);
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}
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}
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break;
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}
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svga_out(addr, val, svga);
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}
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uint8_t ati18800_in(uint16_t addr, void *p)
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{
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ati18800_t *ati18800 = (ati18800_t *)p;
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svga_t *svga = &ati18800->svga;
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uint8_t temp;
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;
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switch (addr)
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{
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case 0x1ce:
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temp = ati18800->index;
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break;
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case 0x1cf:
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switch (ati18800->index)
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{
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case 0xb7:
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temp = ati18800->regs[ati18800->index] & ~8;
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if (ati_eeprom_read(&ati18800->eeprom))
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temp |= 8;
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break;
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default:
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temp = ati18800->regs[ati18800->index];
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break;
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}
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break;
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case 0x3D4:
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temp = svga->crtcreg;
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break;
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case 0x3D5:
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temp = svga->crtc[svga->crtcreg];
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break;
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default:
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temp = svga_in(addr, svga);
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break;
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}
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#ifndef RELEASE_BUILD
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if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,cpu_state.pc);
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#endif
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return temp;
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}
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2017-01-06 09:02:53 -06:00
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void ati18800_recalctimings(svga_t *svga)
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{
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ati18800_t *ati18800 = (ati18800_t *)svga->p;
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svga->ma_latch += (ati18800->regs[0xb0] & 0xc0) << 10;
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if(ati18800->regs[0xb1] & 0x40)
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{
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svga->vtotal >>= 1;
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svga->dispend >>= 1;
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svga->vsyncstart >>= 1;
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svga->split >>= 1;
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svga->vblankstart >>= 1;
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}
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}
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2016-06-26 00:34:39 +02:00
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void *ati18800_init()
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{
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ati18800_t *ati18800 = malloc(sizeof(ati18800_t));
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memset(ati18800, 0, sizeof(ati18800_t));
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2017-07-16 15:28:09 +01:00
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rom_init(&ati18800->bios_rom, L"roms/video/ati18800/vga88.BIN", 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
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2016-06-26 00:34:39 +02:00
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svga_init(&ati18800->svga, ati18800, 1 << 19, /*512kb*/
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NULL,
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ati18800_in, ati18800_out,
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NULL,
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NULL);
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io_sethandler(0x01ce, 0x0002, ati18800_in, NULL, NULL, ati18800_out, NULL, NULL, ati18800);
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io_sethandler(0x03c0, 0x0020, ati18800_in, NULL, NULL, ati18800_out, NULL, NULL, ati18800);
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ati18800->svga.miscout = 1;
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2017-05-06 04:02:03 +02:00
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ati_eeprom_load(&ati18800->eeprom, L"ati18800.nvr", 0);
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2016-06-26 00:34:39 +02:00
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return ati18800;
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}
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static int ati18800_available()
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{
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2017-07-16 15:28:09 +01:00
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return rom_present(L"roms/video/ati18800/vga88.BIN");
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2016-06-26 00:34:39 +02:00
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}
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void ati18800_close(void *p)
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{
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ati18800_t *ati18800 = (ati18800_t *)p;
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svga_close(&ati18800->svga);
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free(ati18800);
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}
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void ati18800_speed_changed(void *p)
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{
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ati18800_t *ati18800 = (ati18800_t *)p;
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svga_recalctimings(&ati18800->svga);
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}
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void ati18800_force_redraw(void *p)
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{
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ati18800_t *ati18800 = (ati18800_t *)p;
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ati18800->svga.fullchange = changeframecount;
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}
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void ati18800_add_status_info(char *s, int max_len, void *p)
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{
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ati18800_t *ati18800 = (ati18800_t *)p;
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svga_add_status_info(s, max_len, &ati18800->svga);
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}
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device_t ati18800_device =
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{
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"ATI-18800",
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0,
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ati18800_init,
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ati18800_close,
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ati18800_available,
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ati18800_speed_changed,
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ati18800_force_redraw,
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ati18800_add_status_info
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};
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