2017-05-30 03:38:38 +02:00
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/*
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2022-11-13 16:37:58 -05:00
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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2017-05-30 03:38:38 +02:00
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*
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2022-11-13 16:37:58 -05:00
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* This file is part of the 86Box distribution.
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2017-05-30 03:38:38 +02:00
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*
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2022-11-13 16:37:58 -05:00
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* Generic SVGA handling.
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2017-05-30 03:38:38 +02:00
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*
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2020-03-25 00:46:02 +02:00
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*
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2017-05-30 03:38:38 +02:00
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*
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2023-01-06 15:36:29 -05:00
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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2022-11-13 16:37:58 -05:00
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* Miran Grca, <mgrca8@gmail.com>
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2017-11-05 01:57:04 -05:00
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*
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2022-11-13 16:37:58 -05:00
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* Copyright 2008-2020 Sarah Walker.
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* Copyright 2016-2020 Miran Grca.
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2017-05-30 03:38:38 +02:00
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*/
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2022-01-30 02:11:21 -05:00
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#ifndef VIDEO_SVGA_H
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2022-07-27 17:00:34 -04:00
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# define VIDEO_SVGA_H
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2017-05-30 03:38:38 +02:00
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2022-07-27 17:00:34 -04:00
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# define FLAG_EXTRA_BANKS 1
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# define FLAG_ADDR_BY8 2
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# define FLAG_EXT_WRITE 4
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# define FLAG_LATCH8 8
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# define FLAG_NOSKEW 16
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# define FLAG_ADDR_BY16 32
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# define FLAG_RAMDAC_SHIFT 64
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2023-07-30 19:22:43 -04:00
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# define FLAG_ATI 128
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2023-07-14 23:38:04 +02:00
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# define FLAG_S3_911_16BIT 256
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# define FLAG_512K_MASK 512
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2023-01-22 16:50:21 +06:00
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struct monitor_t;
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2023-06-09 23:46:54 -04:00
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typedef struct hwcursor_t {
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int ena;
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int x;
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int y;
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int xoff;
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int yoff;
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int cur_xsize;
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int cur_ysize;
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int v_acc;
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int h_acc;
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uint32_t addr;
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uint32_t pitch;
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2018-04-25 23:51:13 +02:00
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} hwcursor_t;
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2019-12-04 07:20:58 +01:00
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typedef union {
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2022-07-27 17:00:34 -04:00
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uint64_t q;
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uint32_t d[2];
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uint16_t w[4];
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uint8_t b[8];
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2019-12-04 07:20:58 +01:00
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} latch_t;
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2022-07-27 17:00:34 -04:00
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typedef struct svga_t {
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2018-04-25 23:51:13 +02:00
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mem_mapping_t mapping;
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2023-06-09 23:46:54 -04:00
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uint8_t fast;
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uint8_t chain4;
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uint8_t chain2_write;
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uint8_t chain2_read;
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uint8_t ext_overscan;
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uint8_t bus_size;
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uint8_t lowres;
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uint8_t interlace;
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uint8_t linedbl;
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uint8_t rowcount;
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uint8_t set_reset_disabled;
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uint8_t bpp;
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uint8_t ramdac_type;
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uint8_t fb_only;
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uint8_t readmode;
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uint8_t writemode;
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uint8_t readplane;
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uint8_t hwcursor_oddeven;
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uint8_t dac_hwcursor_oddeven;
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uint8_t overlay_oddeven;
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uint8_t fcr;
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uint8_t hblank_overscan;
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int dac_addr;
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int dac_pos;
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int dac_r;
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int dac_g;
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Video changes:
1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM).
2. Implemented the MCA behalf of the Mach32 and its corresponding reset function.
3. Properly implemented (more or less) true color, including 24-bit BGR rendering
4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color.
5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine.
6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT).
7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB.
8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI.
9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA.
10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode.
11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead.
12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
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int dac_b;
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2023-06-09 23:46:54 -04:00
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int vtotal;
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int dispend;
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int vsyncstart;
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int split;
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int vblankstart;
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int hdisp;
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int hdisp_old;
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int htotal;
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int hdisp_time;
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int rowoffset;
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int dispon;
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int hdisp_on;
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int vc;
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int sc;
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int linepos;
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int vslines;
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int linecountff;
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int oddeven;
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int con;
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int cursoron;
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int blink;
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int scrollcache;
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int char_width;
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int firstline;
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int lastline;
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int firstline_draw;
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int lastline_draw;
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int displine;
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int fullchange;
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int x_add;
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int y_add;
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int pan;
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int vram_display_mask;
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int vidclock;
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int dots_per_clock;
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int hblank_ext;
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int hwcursor_on;
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int dac_hwcursor_on;
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int overlay_on;
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int set_override;
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int hblankstart;
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int hblankend;
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int hblank_sub;
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int hblank_end_val;
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int hblank_end_len;
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2018-04-25 23:51:13 +02:00
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/*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 :
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0MB-1MB - VRAM
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1MB-2MB - VRAM mirror
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2MB-4MB - open bus
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4MB-xMB - mirror of above
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For the example memory map, decode_mask would be 4MB-1 (4MB address space), vram_max would be 2MB
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(present video memory only responds to first 2MB), vram_mask would be 1MB-1 (video memory wraps at 1MB)
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*/
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2023-07-30 19:22:43 -04:00
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uint32_t decode_mask;
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uint32_t vram_max;
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uint32_t vram_mask;
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uint32_t charseta;
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uint32_t charsetb;
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uint32_t adv_flags;
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uint32_t ma_latch;
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uint32_t ca_adj;
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uint32_t ma;
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uint32_t maback;
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uint32_t write_bank;
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uint32_t read_bank;
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uint32_t extra_banks[2];
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uint32_t banked_mask;
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uint32_t ca;
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uint32_t overscan_color;
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2023-06-09 23:46:54 -04:00
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uint32_t *map8;
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2023-07-30 19:22:43 -04:00
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uint32_t pallook[512];
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2018-04-25 23:51:13 +02:00
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PALETTE vgapal;
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2023-06-09 23:46:54 -04:00
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uint64_t dispontime;
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uint64_t dispofftime;
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2022-07-27 17:00:34 -04:00
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latch_t latch;
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2019-10-01 15:14:51 +02:00
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pc_timer_t timer;
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2018-04-25 23:51:13 +02:00
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2018-10-05 01:54:54 +02:00
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double clock;
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2023-06-09 23:46:54 -04:00
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hwcursor_t hwcursor;
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hwcursor_t hwcursor_latch;
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hwcursor_t dac_hwcursor;
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hwcursor_t dac_hwcursor_latch;
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hwcursor_t overlay;
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hwcursor_t overlay_latch;
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2018-04-25 23:51:13 +02:00
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void (*render)(struct svga_t *svga);
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2023-08-15 00:11:56 +02:00
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void (*render8514)(struct svga_t *svga);
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2018-04-25 23:51:13 +02:00
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void (*recalctimings_ex)(struct svga_t *svga);
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2023-07-30 19:22:43 -04:00
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void (*video_out)(uint16_t addr, uint8_t val, void *priv);
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uint8_t (*video_in)(uint16_t addr, void *priv);
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2018-04-25 23:51:13 +02:00
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void (*hwcursor_draw)(struct svga_t *svga, int displine);
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Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
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void (*dac_hwcursor_draw)(struct svga_t *svga, int displine);
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2018-04-25 23:51:13 +02:00
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void (*overlay_draw)(struct svga_t *svga, int displine);
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void (*vblank_start)(struct svga_t *svga);
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void (*ven_write)(struct svga_t *svga, uint8_t val, uint32_t addr);
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2023-07-30 19:22:43 -04:00
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float (*getclock)(int clock, void *priv);
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2018-04-25 23:51:13 +02:00
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2020-02-29 19:12:23 +01:00
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/* Called when VC=R18 and friends. If this returns zero then MA resetting
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is skipped. Matrox Mystique in Power mode reuses this counter for
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vertical line interrupt*/
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2022-02-20 02:26:27 -05:00
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int (*line_compare)(struct svga_t *svga);
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2020-01-17 00:24:18 +01:00
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2020-03-31 00:33:49 +02:00
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/*Called at the start of vertical sync*/
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void (*vsync_callback)(struct svga_t *svga);
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2023-07-30 19:22:43 -04:00
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uint32_t (*translate_address)(uint32_t addr, void *priv);
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2018-04-25 23:51:13 +02:00
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/*If set then another device is driving the monitor output and the SVGA
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card should not attempt to display anything */
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2022-07-27 17:00:34 -04:00
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int override;
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2023-06-09 23:46:54 -04:00
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void *priv;
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2023-07-30 19:22:43 -04:00
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uint8_t crtc[256];
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uint8_t gdcreg[256];
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uint8_t attrregs[32];
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uint8_t seqregs[256];
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uint8_t egapal[16];
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2023-06-09 23:46:54 -04:00
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uint8_t *vram;
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uint8_t *changedvram;
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uint8_t crtcreg;
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uint8_t gdcaddr;
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uint8_t attrff;
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uint8_t attr_palette_enable;
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uint8_t attraddr;
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uint8_t seqaddr;
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uint8_t miscout;
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uint8_t cgastat;
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uint8_t scrblank;
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uint8_t plane_mask;
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uint8_t writemask;
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uint8_t colourcompare;
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uint8_t colournocare;
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uint8_t dac_mask;
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uint8_t dac_status;
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uint8_t dpms;
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uint8_t dpms_ui;
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uint8_t ksc5601_sbyte_mask;
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uint8_t ksc5601_udc_area_msb[2];
|
2022-07-27 17:00:34 -04:00
|
|
|
|
|
|
|
|
int ksc5601_swap_mode;
|
2020-05-12 00:37:30 +02:00
|
|
|
uint16_t ksc5601_english_font_type;
|
2018-10-05 01:54:54 +02:00
|
|
|
|
2020-01-18 22:25:52 +01:00
|
|
|
int vertical_linedbl;
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2020-01-18 22:25:52 +01:00
|
|
|
/*Used to implement CRTC[0x17] bit 2 hsync divisor*/
|
|
|
|
|
int hsync_divisor;
|
|
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
/*Tseng-style chain4 mode - CRTC dword mode is the same as byte mode, chain4
|
|
|
|
|
addresses are shifted to match*/
|
|
|
|
|
int packed_chain4;
|
2021-05-30 02:01:16 +02:00
|
|
|
|
2023-12-17 08:46:12 +13:00
|
|
|
/*Disable 8bpp blink mode - some cards support it, some don't, it's a weird mode
|
|
|
|
|
If mode 13h appears in a reddish-brown background (0x88) with dark green text (0x8F),
|
|
|
|
|
you should set this flag when entering that mode*/
|
|
|
|
|
int disable_blink;
|
|
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
/*Force CRTC to dword mode, regardless of CR14/CR17. Required for S3 enhanced mode*/
|
|
|
|
|
int force_dword_mode;
|
2022-04-12 15:58:57 +05:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
int force_old_addr;
|
2021-05-30 02:01:16 +02:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
int remap_required;
|
|
|
|
|
uint32_t (*remap_func)(struct svga_t *svga, uint32_t in_addr);
|
2021-05-30 02:01:16 +02:00
|
|
|
|
2023-06-09 23:46:54 -04:00
|
|
|
void *ramdac;
|
|
|
|
|
void *clock_gen;
|
2023-01-22 16:50:21 +06:00
|
|
|
|
|
|
|
|
/* Monitor Index */
|
|
|
|
|
uint8_t monitor_index;
|
|
|
|
|
|
|
|
|
|
/* Pointer to monitor */
|
2023-07-30 19:22:43 -04:00
|
|
|
monitor_t *monitor;
|
2023-10-09 20:14:03 +02:00
|
|
|
|
|
|
|
|
void * dev8514;
|
|
|
|
|
void * xga;
|
2016-06-26 00:34:39 +02:00
|
|
|
} svga_t;
|
|
|
|
|
|
2023-05-11 03:02:36 -04:00
|
|
|
extern int vga_on;
|
2022-05-14 18:55:00 +02:00
|
|
|
|
2023-10-09 20:14:03 +02:00
|
|
|
extern void ibm8514_poll(void *priv, svga_t *svga);
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void ibm8514_recalctimings(svga_t *svga);
|
|
|
|
|
extern uint8_t ibm8514_ramdac_in(uint16_t port, void *priv);
|
|
|
|
|
extern void ibm8514_ramdac_out(uint16_t port, uint8_t val, void *priv);
|
|
|
|
|
extern int ibm8514_cpu_src(svga_t *svga);
|
|
|
|
|
extern int ibm8514_cpu_dest(svga_t *svga);
|
|
|
|
|
extern void ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint16_t val, int len);
|
|
|
|
|
extern void ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, uint8_t ssv, int len);
|
|
|
|
|
extern void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, int len);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2023-10-09 20:14:03 +02:00
|
|
|
extern void xga_poll(void *priv, svga_t *svga);
|
2022-06-17 21:26:26 +02:00
|
|
|
extern void xga_recalctimings(svga_t *svga);
|
|
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern int svga_init(const device_t *info, svga_t *svga, void *priv, int memsize,
|
2022-07-27 17:00:34 -04:00
|
|
|
void (*recalctimings_ex)(struct svga_t *svga),
|
2023-07-30 19:22:43 -04:00
|
|
|
uint8_t (*video_in)(uint16_t addr, void *priv),
|
|
|
|
|
void (*video_out)(uint16_t addr, uint8_t val, void *priv),
|
2022-07-27 17:00:34 -04:00
|
|
|
void (*hwcursor_draw)(struct svga_t *svga, int displine),
|
|
|
|
|
void (*overlay_draw)(struct svga_t *svga, int displine));
|
|
|
|
|
extern void svga_recalctimings(svga_t *svga);
|
|
|
|
|
extern void svga_close(svga_t *svga);
|
2018-04-25 23:51:13 +02:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
uint8_t svga_read(uint32_t addr, void *priv);
|
|
|
|
|
uint16_t svga_readw(uint32_t addr, void *priv);
|
|
|
|
|
uint32_t svga_readl(uint32_t addr, void *priv);
|
|
|
|
|
void svga_write(uint32_t addr, uint8_t val, void *priv);
|
|
|
|
|
void svga_writew(uint32_t addr, uint16_t val, void *priv);
|
|
|
|
|
void svga_writel(uint32_t addr, uint32_t val, void *priv);
|
|
|
|
|
uint8_t svga_read_linear(uint32_t addr, void *priv);
|
|
|
|
|
uint8_t svga_readb_linear(uint32_t addr, void *priv);
|
|
|
|
|
uint16_t svga_readw_linear(uint32_t addr, void *priv);
|
|
|
|
|
uint32_t svga_readl_linear(uint32_t addr, void *priv);
|
|
|
|
|
void svga_write_linear(uint32_t addr, uint8_t val, void *priv);
|
|
|
|
|
void svga_writeb_linear(uint32_t addr, uint8_t val, void *priv);
|
|
|
|
|
void svga_writew_linear(uint32_t addr, uint16_t val, void *priv);
|
|
|
|
|
void svga_writel_linear(uint32_t addr, uint32_t val, void *priv);
|
|
|
|
|
|
|
|
|
|
void svga_add_status_info(char *s, int max_len, void *priv);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
extern uint8_t svga_rotate[8][256];
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
void svga_out(uint16_t addr, uint8_t val, void *priv);
|
|
|
|
|
uint8_t svga_in(uint16_t addr, void *priv);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2022-11-17 22:44:06 +01:00
|
|
|
svga_t *svga_get_pri(void);
|
2022-07-27 17:00:34 -04:00
|
|
|
void svga_set_override(svga_t *svga, int val);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
void svga_set_ramdac_type(svga_t *svga, int type);
|
|
|
|
|
void svga_close(svga_t *svga);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
uint32_t svga_mask_addr(uint32_t addr, svga_t *svga);
|
|
|
|
|
uint32_t svga_mask_changedaddr(uint32_t addr, svga_t *svga);
|
2017-05-05 01:49:42 +02:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
void svga_doblit(int wx, int wy, svga_t *svga);
|
2018-04-25 23:51:13 +02:00
|
|
|
|
|
|
|
|
enum {
|
|
|
|
|
RAMDAC_6BIT = 0,
|
|
|
|
|
RAMDAC_8BIT
|
|
|
|
|
};
|
2020-02-29 19:12:23 +01:00
|
|
|
|
|
|
|
|
/* We need a way to add a device with a pointer to a parent device so it can attach itself to it, and
|
|
|
|
|
possibly also a second ATi 68860 RAM DAC type that auto-sets SVGA render on RAM DAC render change. */
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t ati68860_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
|
|
|
|
|
extern void ati68860_set_ramdac_type(void *priv, int type);
|
|
|
|
|
extern void ati68860_ramdac_set_render(void *priv, svga_t *svga);
|
|
|
|
|
extern void ati68860_ramdac_set_pallook(void *priv, int i, uint32_t col);
|
2022-07-27 17:00:34 -04:00
|
|
|
extern void ati68860_hwcursor_draw(svga_t *svga, int displine);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
Video changes:
1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM).
2. Implemented the MCA behalf of the Mach32 and its corresponding reset function.
3. Properly implemented (more or less) true color, including 24-bit BGR rendering
4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color.
5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine.
6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT).
7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB.
8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI.
9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA.
10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode.
11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead.
12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
|
|
|
extern void ati68875_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t ati68875_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
|
|
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
|
|
|
|
|
extern float av9194_getclock(int clock, void *priv);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
|
|
|
|
|
extern void bt48x_recalctimings(void *priv, svga_t *svga);
|
2022-07-27 17:00:34 -04:00
|
|
|
extern void bt48x_hwcursor_draw(svga_t *svga, int displine);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t ibm_rgb528_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
|
|
|
|
|
extern void ibm_rgb528_recalctimings(void *priv, svga_t *svga);
|
2022-07-27 17:00:34 -04:00
|
|
|
extern void ibm_rgb528_hwcursor_draw(svga_t *svga, int displine);
|
2020-12-08 22:56:45 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void icd2061_write(void *priv, int val);
|
|
|
|
|
extern float icd2061_getclock(int clock, void *priv);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
|
|
|
|
/* The code is the same, the #define's are so that the correct name can be used. */
|
2022-07-27 17:00:34 -04:00
|
|
|
# define ics9161_write icd2061_write
|
|
|
|
|
# define ics9161_getclock icd2061_getclock
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern float ics2494_getclock(int clock, void *priv);
|
2020-07-26 01:53:46 +02:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void ics2595_write(void *priv, int strobe, int dat);
|
|
|
|
|
extern double ics2595_getclock(void *priv);
|
|
|
|
|
extern void ics2595_setclock(void *priv, double clock);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void sc1148x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t sc1148x_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
|
2020-06-25 13:18:29 +02:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t sc1502x_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void sdac_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t sdac_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
|
|
|
|
|
extern float sdac_getclock(int clock, void *priv);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void stg_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t stg_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
|
|
|
|
|
extern float stg_getclock(int clock, void *priv);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2023-07-30 19:22:43 -04:00
|
|
|
extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
|
|
|
|
|
extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
|
|
|
|
|
extern void tvp3026_recalctimings(void *priv, svga_t *svga);
|
2022-07-27 17:00:34 -04:00
|
|
|
extern void tvp3026_hwcursor_draw(svga_t *svga, int displine);
|
2023-07-30 19:22:43 -04:00
|
|
|
extern float tvp3026_getclock(int clock, void *priv);
|
2023-12-16 18:26:39 -03:00
|
|
|
extern void tvp3026_gpio(uint8_t (*read)(uint8_t cntl, void *priv), void (*write)(uint8_t cntl, uint8_t data, void *priv), void *cb_priv, void *priv);
|
2020-02-29 19:12:23 +01:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
# ifdef EMU_DEVICE_H
|
2020-02-29 19:12:23 +01:00
|
|
|
extern const device_t ati68860_ramdac_device;
|
Video changes:
1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM).
2. Implemented the MCA behalf of the Mach32 and its corresponding reset function.
3. Properly implemented (more or less) true color, including 24-bit BGR rendering
4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color.
5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine.
6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT).
7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB.
8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI.
9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA.
10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode.
11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead.
12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
|
|
|
extern const device_t ati68875_ramdac_device;
|
2020-02-29 19:12:23 +01:00
|
|
|
extern const device_t att490_ramdac_device;
|
2021-05-12 18:51:02 +02:00
|
|
|
extern const device_t att491_ramdac_device;
|
2020-02-29 19:12:23 +01:00
|
|
|
extern const device_t att492_ramdac_device;
|
2021-11-18 23:58:04 +01:00
|
|
|
extern const device_t att498_ramdac_device;
|
2020-02-29 19:12:23 +01:00
|
|
|
extern const device_t av9194_device;
|
|
|
|
|
extern const device_t bt484_ramdac_device;
|
|
|
|
|
extern const device_t att20c504_ramdac_device;
|
|
|
|
|
extern const device_t bt485_ramdac_device;
|
|
|
|
|
extern const device_t att20c505_ramdac_device;
|
|
|
|
|
extern const device_t bt485a_ramdac_device;
|
|
|
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extern const device_t gendac_ramdac_device;
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2020-12-22 14:58:28 +01:00
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extern const device_t ibm_rgb528_ramdac_device;
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2020-07-26 01:53:46 +02:00
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extern const device_t ics2494an_305_device;
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Video changes:
1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM).
2. Implemented the MCA behalf of the Mach32 and its corresponding reset function.
3. Properly implemented (more or less) true color, including 24-bit BGR rendering
4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color.
5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine.
6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT).
7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB.
8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI.
9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA.
10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode.
11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead.
12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
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extern const device_t ati18810_device;
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extern const device_t ati18811_0_device;
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extern const device_t ati18811_1_device;
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2020-02-29 19:12:23 +01:00
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extern const device_t ics2595_device;
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extern const device_t icd2061_device;
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extern const device_t ics9161_device;
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2020-06-25 13:18:29 +02:00
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extern const device_t sc11483_ramdac_device;
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extern const device_t sc11487_ramdac_device;
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2021-10-24 19:06:05 +02:00
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extern const device_t sc11486_ramdac_device;
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2021-05-20 20:57:54 +02:00
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extern const device_t sc11484_nors2_ramdac_device;
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2020-02-29 19:12:23 +01:00
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extern const device_t sc1502x_ramdac_device;
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extern const device_t sdac_ramdac_device;
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extern const device_t stg_ramdac_device;
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extern const device_t tkd8001_ramdac_device;
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2021-03-24 03:51:56 +01:00
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extern const device_t tseng_ics5301_ramdac_device;
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extern const device_t tseng_ics5341_ramdac_device;
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2021-09-03 00:05:43 +02:00
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extern const device_t tvp3026_ramdac_device;
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2022-07-27 17:00:34 -04:00
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# endif
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2022-01-30 02:11:21 -05:00
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2022-07-27 17:00:34 -04:00
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#endif /*VIDEO_SVGA_H*/
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