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86Box/src/nvr.c

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/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* CMOS NVRAM emulation.
*
* Version: @(#)nvr.c 1.0.1 2017/06/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Mahod,
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
* Copyright 2016-2017 Mahod.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include "ibm.h"
#include "CPU/cpu.h"
#include "device.h"
#include "io.h"
#include "mem.h"
#include "model.h"
#include "nmi.h"
#include "nvr.h"
#include "pic.h"
#include "rom.h"
#include "timer.h"
#include "rtc.h"
int oldmodel;
int nvrmask=63;
char nvrram[128];
int nvraddr;
int nvr_dosave = 0;
static int nvr_onesec_time = 0, nvr_onesec_cnt = 0;
Applied all mainline PCem commits; Added experimental NVidia Riva TNT2 emulation (patch from MoochMcGee); ASUS P/I-P54TP4XE, ASUS P/I-P55T2P4, and ASUS P/I-P55TVP4 are back; National Semiconductor PC87306 Super I/O chip now correctly reenables devices after a chip power cycle; Several FDC improvements and the behavior is now a bit closer to real hardware (based on actual tests); Added MR Intel Advanced/ATX with Microid Research BIOS with support for 4 floppy drives and up to 4 IDE controllers; Added floppy drives 3 and 4, bringing the maximum to 4; You can now connect hard disks to the tertiary IDE controller; Correct undocumented behavior of the LEA instruction with register is back on 286 and later CPU's; Pentium-rea models with Intel chipsets now have port 92 (with alternate reset and alternate A20 toggle); Overhauled DMA channel read and write routines and fixed cascading; Improved IMG detection of a bad BPB (or complete lack of a BPB); Added preliminary emulation of PS/2 1.44 MB and PC-98 1.25 MB 3-mode drives (both have an inverted DENSEL pin); Removed the incorrect Amstrad mouse patch from TheCollector1995; Fixed ATAPI CD-ROM disk change detection; Windows IOCTL CD-ROM handler now tries to use direct SCSI passthrough for more things, including obtaining CD-ROM capacity; The Diamond Stealth32 (ET4000/W32p) now also works correctly on the two Award SiS 496/497 boxes; The (S)VGA handler now converts 6-bit RAMDAC RGB channels to standard 8-bit RGB using a lookup table generated at emulator start, calculated using the correct intensity conversion method and treating intensity 64 as equivalent to 63; Moved a few options from the Configuration dialog box to the menu; SIO, PIIX, and PIIX3 now have the reset control register on port CF9 as they should; Several bugfixes.
2016-12-23 03:16:24 +01:00
static int rtctime;
void getnvrtime(void)
{
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time_get(nvrram);
}
void nvr_recalc(void)
{
int c;
int newrtctime;
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c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
newrtctime=(int)(RTCCONST * c * (1 << TIMER_SHIFT));
if (rtctime>newrtctime) rtctime=newrtctime;
}
void nvr_rtc(void *p)
{
int c;
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if (!(nvrram[RTC_REGA] & RTC_RS))
{
rtctime=0x7fffffff;
return;
}
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c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
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nvrram[RTC_REGC] |= RTC_PF;
if (nvrram[RTC_REGB] & RTC_PIE)
{
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nvrram[RTC_REGC] |= RTC_IRQF;
if (AMSTRAD) picint(2);
else picint(0x100);
}
}
int nvr_update_status = 0;
#define ALARM_DONTCARE 0xc0
int nvr_check_alarm(int nvraddr)
{
return (nvrram[nvraddr + 1] == nvrram[nvraddr] || (nvrram[nvraddr + 1] & ALARM_DONTCARE) == ALARM_DONTCARE);
}
int nvr_update_end_count = 0;
void nvr_update_end(void *p)
{
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if (!(nvrram[RTC_REGB] & RTC_SET))
{
getnvrtime();
/* Clear update status. */
nvr_update_status = 0;
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if (nvr_check_alarm(RTC_SECONDS) && nvr_check_alarm(RTC_MINUTES) && nvr_check_alarm(RTC_HOURS))
{
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nvrram[RTC_REGC] |= RTC_AF;
if (nvrram[RTC_REGB] & RTC_AIE)
{
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nvrram[RTC_REGC] |= RTC_IRQF;
if (AMSTRAD) picint(2);
else picint(0x100);
}
}
/* The flag and interrupt should be issued on update ended, not started. */
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nvrram[RTC_REGC] |= RTC_UF;
if (nvrram[RTC_REGB] & RTC_UIE)
{
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nvrram[RTC_REGC] |= RTC_IRQF;
if (AMSTRAD) picint(2);
else picint(0x100);
}
}
nvr_update_end_count = 0;
}
void nvr_onesec(void *p)
{
nvr_onesec_cnt++;
if (nvr_onesec_cnt >= 100)
{
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if (!(nvrram[RTC_REGB] & RTC_SET))
{
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nvr_update_status = RTC_UIP;
rtc_tick();
nvr_update_end_count = (int)((244.0 + 1984.0) * TIMER_USEC);
}
nvr_onesec_cnt = 0;
}
nvr_onesec_time += (int)(10000 * TIMER_USEC);
}
void writenvr(uint16_t addr, uint8_t val, void *priv)
{
int c, old;
if (addr&1)
{
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if (nvraddr==RTC_REGC || nvraddr==RTC_REGD)
return; /* Registers C and D are read-only. There's no reason to continue. */
if (nvraddr > RTC_REGD && nvrram[nvraddr] != val)
nvr_dosave = 1;
old = nvrram[nvraddr];
nvrram[nvraddr]=val;
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if (nvraddr == RTC_REGA)
{
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if (val & RTC_RS)
{
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c = 1 << ((val & RTC_RS) - 1);
rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
}
else
rtctime = 0x7fffffff;
}
else
{
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if (nvraddr == RTC_REGB)
{
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if (((old ^ val) & RTC_SET) && (val & RTC_SET))
{
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nvrram[RTC_REGA] &= ~RTC_UIP; /* This has to be done according to the datasheet. */
nvrram[RTC_REGB] &= ~RTC_UIE; /* This also has to happen per the specification. */
}
}
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if ((nvraddr < RTC_REGA) || (nvraddr == RTC_CENTURY))
{
if ((nvraddr != 1) && (nvraddr != 3) && (nvraddr != 5))
{
if ((old != val) && !enable_sync)
{
time_update(nvrram, nvraddr);
nvr_dosave = 1;
}
}
}
}
}
else
{
nvraddr=val&nvrmask;
nmi_mask = ~val & 0x80;
}
}
uint8_t readnvr(uint16_t addr, void *priv)
{
uint8_t temp;
if (addr&1)
{
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if (nvraddr == RTC_REGA)
return ((nvrram[RTC_REGA] & 0x7F) | nvr_update_status);
if (nvraddr == RTC_REGD)
nvrram[RTC_REGD] |= RTC_VRT;
if (nvraddr == RTC_REGC)
{
if (AMSTRAD) picintc(2);
else picintc(0x100);
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temp = nvrram[RTC_REGC];
nvrram[RTC_REGC] = 0;
return temp;
}
return nvrram[nvraddr];
}
return nvraddr;
}
void loadnvr(void)
{
FILE *f = NULL;
int c;
nvrmask=63;
oldmodel = model;
wchar_t *model_name;
wchar_t *nvr_name;
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(model)) << 1) + 2);
mbstowcs(model_name, model_get_internal_name_ex(model), strlen(model_get_internal_name_ex(model)) + 1);
nvr_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8);
_swprintf(nvr_name, L"%s.nvr", model_name);
pclog_w(L"Opening NVR file: %s...\n", nvr_name);
if (model_get_nvrmask(model) != 0)
{
f = nvrfopen(nvr_name, L"rb");
nvrmask = model_get_nvrmask(model);
}
if (!f || (model_get_nvrmask(model) == 0))
{
if (f)
{
fclose(f);
}
memset(nvrram,0xFF,128);
if (!enable_sync)
{
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nvrram[RTC_SECONDS] = nvrram[RTC_MINUTES] = nvrram[RTC_HOURS] = 0;
nvrram[RTC_DOM] = nvrram[RTC_MONTH] = 1;
nvrram[RTC_YEAR] = BCD(80);
nvrram[RTC_CENTURY] = BCD(19);
nvrram[RTC_REGB] = RTC_2412;
}
free(nvr_name);
free(model_name);
return;
}
fread(nvrram,128,1,f);
if (enable_sync)
time_internal_sync(nvrram);
else
time_internal_set_nvrram(nvrram); /* Update the internal clock state based on the NVR registers. */
fclose(f);
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nvrram[RTC_REGA] = 6;
nvrram[RTC_REGB] = RTC_2412;
c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
free(nvr_name);
free(model_name);
}
void savenvr(void)
{
FILE *f = NULL;
wchar_t *model_name;
wchar_t *nvr_name;
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(oldmodel)) << 1) + 2);
mbstowcs(model_name, model_get_internal_name_ex(oldmodel), strlen(model_get_internal_name_ex(oldmodel)) + 1);
nvr_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8);
_swprintf(nvr_name, L"%s.nvr", model_name);
pclog_w(L"Saving NVR file: %s...\n", nvr_name);
if (model_get_nvrmask(oldmodel) != 0)
{
f = nvrfopen(nvr_name, L"wb");
}
if (!f || (model_get_nvrmask(oldmodel) == 0))
{
if (f)
{
fclose(f);
}
free(nvr_name);
free(model_name);
return;
}
fwrite(nvrram,128,1,f);
fclose(f);
free(nvr_name);
free(model_name);
}
void nvr_init(void)
{
io_sethandler(0x0070, 0x0002, readnvr, NULL, NULL, writenvr, NULL, NULL, NULL);
timer_add(nvr_rtc, &rtctime, TIMER_ALWAYS_ENABLED, NULL);
timer_add(nvr_onesec, &nvr_onesec_time, TIMER_ALWAYS_ENABLED, NULL);
timer_add(nvr_update_end, &nvr_update_end_count, &nvr_update_end_count, NULL);
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}