2017-10-11 05:40:44 -04:00
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the Tseng Labs ET4000.
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*
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2018-09-15 02:48:54 +02:00
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* Version: @(#)vid_et4000.c 1.0.16 2018/09/15
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2017-10-11 05:40:44 -04:00
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*
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2018-09-15 02:48:54 +02:00
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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2017-10-11 05:40:44 -04:00
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* Miran Grca, <mgrca8@gmail.com>
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2018-09-15 02:48:54 +02:00
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* GreatPsycho, <greatpsycho@yahoo.com>
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* Sarah Walker, <tommowalker@tommowalker.co.uk>
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2017-10-11 05:40:44 -04:00
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*
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2018-09-15 02:48:54 +02:00
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* Copyright 2017,2018 Fred N. van Kempen.
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2018-02-25 23:17:25 +01:00
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* Copyright 2016-2018 Miran Grca.
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2018-09-15 02:48:54 +02:00
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* Copyright 2008-2018 Sarah Walker.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the:
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*
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* Free Software Foundation, Inc.
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* 59 Temple Place - Suite 330
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* Boston, MA 02111-1307
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* USA.
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2017-10-11 05:40:44 -04:00
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*/
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2017-09-25 04:31:20 -04:00
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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2016-06-26 00:34:39 +02:00
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#include <stdlib.h>
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2017-09-25 04:31:20 -04:00
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#include <wchar.h>
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2017-10-17 01:59:09 -04:00
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#include "../86box.h"
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2017-05-06 17:48:33 +02:00
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#include "../io.h"
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2018-07-19 16:01:31 +02:00
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#include "../mca.h"
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2017-05-06 17:48:33 +02:00
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#include "../mem.h"
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#include "../rom.h"
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#include "../device.h"
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2016-06-26 00:34:39 +02:00
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#include "video.h"
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#include "vid_svga.h"
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2018-08-16 00:25:20 +02:00
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#include "vid_svga_render.h"
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2017-08-08 16:14:50 +02:00
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#include "vid_sc1502x_ramdac.h"
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2016-06-26 00:34:39 +02:00
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#include "vid_et4000.h"
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2017-05-06 17:48:33 +02:00
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2018-09-15 02:48:54 +02:00
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#define BIOS_ROM_PATH L"video/tseng/et4000/et4000.bin"
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#define KOREAN_BIOS_ROM_PATH L"video/tseng/et4000/tgkorvga.bin"
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#define KOREAN_FONT_ROM_PATH L"video/tseng/et4000/tg_ksc5601.rom"
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2017-11-01 01:51:19 -05:00
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2018-09-15 02:48:54 +02:00
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typedef struct {
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const char *name;
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int type;
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svga_t svga;
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sc1502x_ramdac_t ramdac;
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uint8_t pos_regs[8];
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rom_t bios_rom;
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uint8_t banking;
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uint32_t vram_size,
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vram_mask;
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uint8_t port_22cb_val;
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uint8_t port_32cb_val;
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int get_korean_font_enabled;
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int get_korean_font_index;
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uint16_t get_korean_font_base;
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2016-06-26 00:34:39 +02:00
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} et4000_t;
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2018-09-15 02:48:54 +02:00
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static const uint8_t crtc_mask[0x40] = {
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xff, 0xff, 0xff, 0x0f, 0xff, 0xff, 0xff, 0xff,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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2018-02-25 23:17:25 +01:00
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};
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2018-08-24 13:37:10 +02:00
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2018-09-15 02:48:54 +02:00
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static uint8_t
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et4000_in(uint16_t addr, void *priv)
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{
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et4000_t *dev = (et4000_t *)priv;
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svga_t *svga = &dev->svga;
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if (((addr & 0xfff0) == 0x3d0 ||
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(addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60;
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switch (addr) {
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case 0x3c2:
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if (dev->type == 1) {
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if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e)
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return 0;
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else
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return 0x10;
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}
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break;
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case 0x3c5:
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if ((svga->seqaddr & 0xf) == 7)
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return svga->seqregs[svga->seqaddr & 0xf] | 4;
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break;
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case 0x3c6:
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case 0x3c7:
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case 0x3c8:
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case 0x3c9:
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return sc1502x_ramdac_in(addr, &dev->ramdac, svga);
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case 0x3cd: /*Banking*/
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return dev->banking;
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case 0x3d4:
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return svga->crtcreg;
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case 0x3d5:
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return svga->crtc[svga->crtcreg];
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}
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return svga_in(addr, svga);
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}
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static uint8_t
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et4000k_in(uint16_t addr, void *priv)
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2016-06-26 00:34:39 +02:00
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{
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2018-09-15 02:48:54 +02:00
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et4000_t *dev = (et4000_t *)priv;
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uint8_t val = 0xff;
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// if (addr != 0x3da) pclog("IN ET4000 %04X\n", addr);
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2016-06-26 00:34:39 +02:00
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2018-09-15 02:48:54 +02:00
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switch (addr) {
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case 0x22cb:
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return dev->port_22cb_val;
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case 0x22cf:
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val = 0;
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switch(dev->get_korean_font_enabled) {
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case 3:
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if ((dev->port_32cb_val & 0x30) == 0x30) {
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val = fontdatksc5601[dev->get_korean_font_base].chr[dev->get_korean_font_index++];
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dev->get_korean_font_index &= 0x1f;
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} else
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if ((dev->port_32cb_val & 0x30) == 0x20 &&
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(dev->get_korean_font_base & 0x7f) > 0x20 &&
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(dev->get_korean_font_base & 0x7f) < 0x7f) {
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switch(dev->get_korean_font_base & 0x3f80) {
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case 0x2480:
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if (dev->get_korean_font_index < 16)
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val = fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index];
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else
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if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40)
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val = fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8];
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break;
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case 0x3f00:
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if (dev->get_korean_font_index < 16)
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val = fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index];
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else
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if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40)
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val = fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8];
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break;
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default:
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break;
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}
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dev->get_korean_font_index++;
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dev->get_korean_font_index %= 72;
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}
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break;
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case 4:
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val = 0x0f;
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break;
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default:
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break;
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}
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return val;
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case 0x32cb:
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return dev->port_32cb_val;
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default:
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return et4000_in(addr, priv);
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}
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}
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2016-06-26 00:34:39 +02:00
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2018-08-23 15:56:35 +02:00
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2018-09-15 02:48:54 +02:00
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static void
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et4000_out(uint16_t addr, uint8_t val, void *priv)
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{
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et4000_t *dev = (et4000_t *)priv;
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svga_t *svga = &dev->svga;
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uint8_t old;
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if (((addr & 0xfff0) == 0x3d0 ||
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(addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60;
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switch (addr) {
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case 0x3c6:
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case 0x3c7:
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case 0x3c8:
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case 0x3c9:
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sc1502x_ramdac_out(addr, val, &dev->ramdac, svga);
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return;
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case 0x3cd: /*Banking*/
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2018-08-25 09:43:33 +02:00
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if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) {
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2018-09-15 02:48:54 +02:00
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svga->write_bank = (val & 0xf) * 0x10000;
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svga->read_bank = ((val >> 4) & 0xf) * 0x10000;
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2018-08-23 15:56:35 +02:00
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}
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2018-09-15 02:48:54 +02:00
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dev->banking = val;
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return;
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case 0x3cf:
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2018-08-26 08:16:22 +02:00
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if ((svga->gdcaddr & 15) == 6) {
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if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) {
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2018-09-15 02:48:54 +02:00
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svga->write_bank = (dev->banking & 0x0f) * 0x10000;
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svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000;
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2018-08-26 08:16:22 +02:00
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} else
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svga->write_bank = svga->read_bank = 0;
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}
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break;
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2018-09-15 02:48:54 +02:00
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case 0x3d4:
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svga->crtcreg = val & 0x3f;
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return;
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case 0x3d5:
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
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return;
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if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80))
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return;
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2018-08-25 09:43:33 +02:00
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
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2018-09-15 02:48:54 +02:00
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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old = svga->crtc[svga->crtcreg];
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val &= crtc_mask[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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2018-08-22 18:08:31 +02:00
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2018-08-26 08:16:22 +02:00
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if (svga->crtcreg == 0x36) {
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if (!(val & 0x10) && !(svga->gdcreg[6] & 0x08)) {
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2018-09-15 02:48:54 +02:00
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svga->write_bank = (dev->banking & 0x0f) * 0x10000;
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svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000;
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2018-08-26 08:16:22 +02:00
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} else
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svga->write_bank = svga->read_bank = 0;
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}
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2018-09-15 02:48:54 +02:00
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if (old != val) {
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if (svga->crtcreg < 0x0e || svga->crtcreg > 0x10) {
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svga->fullchange = changeframecount;
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svga_recalctimings(svga);
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}
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}
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/*
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* Note - Silly hack to determine video memory
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* size automatically by ET4000 BIOS.
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*/
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if ((svga->crtcreg == 0x37) && (dev->type != 1)) {
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switch (val & 0x0b) {
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case 0x00:
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case 0x01:
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if (svga->vram_max == 64 * 1024)
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mem_mapping_enable(&svga->mapping);
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|
|
|
else
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x02:
|
|
|
|
|
if (svga->vram_max == 128 * 1024)
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
|
|
|
|
else
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x03:
|
|
|
|
|
case 0x08:
|
|
|
|
|
case 0x09:
|
|
|
|
|
if (svga->vram_max == 256 * 1024)
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
|
|
|
|
else
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0a:
|
|
|
|
|
if (svga->vram_max == 512 * 1024)
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
|
|
|
|
else
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0b:
|
|
|
|
|
if (svga->vram_max == 1024 * 1024)
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
|
|
|
|
else
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-08-22 18:08:31 +02:00
|
|
|
}
|
|
|
|
|
break;
|
2018-09-15 02:48:54 +02:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
svga_out(addr, val, svga);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
et4000k_out(uint16_t addr, uint8_t val, void *priv)
|
2018-08-16 00:25:20 +02:00
|
|
|
{
|
2018-09-15 02:48:54 +02:00
|
|
|
et4000_t *dev = (et4000_t *)priv;
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
// pclog("ET4000k out %04X %02X\n", addr, val);
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
switch (addr) {
|
|
|
|
|
case 0x22cb:
|
|
|
|
|
dev->port_22cb_val = (dev->port_22cb_val & 0xf0) | (val & 0x0f);
|
|
|
|
|
dev->get_korean_font_enabled = val & 7;
|
|
|
|
|
if (dev->get_korean_font_enabled == 3)
|
|
|
|
|
dev->get_korean_font_index = 0;
|
|
|
|
|
break;
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
case 0x22cf:
|
|
|
|
|
switch(dev->get_korean_font_enabled) {
|
|
|
|
|
case 1:
|
|
|
|
|
dev->get_korean_font_base = ((val & 0x7f) << 7) | (dev->get_korean_font_base & 0x7f);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
|
dev->get_korean_font_base = (dev->get_korean_font_base & 0x3f80) | (val & 0x7f) | (((val ^ 0x80) & 0x80) << 8);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 3:
|
|
|
|
|
if ((dev->port_32cb_val & 0x30) == 0x20 &&
|
|
|
|
|
(dev->get_korean_font_base & 0x7f) > 0x20 &&
|
|
|
|
|
(dev->get_korean_font_base & 0x7f) < 0x7f) {
|
|
|
|
|
switch (dev->get_korean_font_base & 0x3f80) {
|
|
|
|
|
case 0x2480:
|
|
|
|
|
if (dev->get_korean_font_index < 16)
|
|
|
|
|
fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index] = val;
|
|
|
|
|
else
|
|
|
|
|
if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40)
|
|
|
|
|
fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8] = val;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x3f00:
|
|
|
|
|
if (dev->get_korean_font_index < 16)
|
|
|
|
|
fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index] = val;
|
|
|
|
|
else
|
|
|
|
|
if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40)
|
|
|
|
|
fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8] = val;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
dev->get_korean_font_index++;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
case 0x32cb:
|
|
|
|
|
dev->port_32cb_val = val;
|
|
|
|
|
svga_recalctimings(&dev->svga);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
et4000_out(addr, val, priv);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
et4000_recalctimings(svga_t *svga)
|
2018-08-16 00:25:20 +02:00
|
|
|
{
|
2018-09-15 02:48:54 +02:00
|
|
|
et4000_t *dev = (et4000_t *)svga->p;
|
|
|
|
|
|
|
|
|
|
svga->ma_latch |= (svga->crtc[0x33]&3)<<16;
|
|
|
|
|
if (svga->crtc[0x35] & 1) svga->vblankstart += 0x400;
|
|
|
|
|
if (svga->crtc[0x35] & 2) svga->vtotal += 0x400;
|
|
|
|
|
if (svga->crtc[0x35] & 4) svga->dispend += 0x400;
|
|
|
|
|
if (svga->crtc[0x35] & 8) svga->vsyncstart += 0x400;
|
|
|
|
|
if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
|
|
|
|
|
if (!svga->rowoffset) svga->rowoffset = 0x100;
|
|
|
|
|
if (svga->crtc[0x3f] & 1) svga->htotal += 256;
|
|
|
|
|
if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1;
|
|
|
|
|
|
|
|
|
|
switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4)) {
|
|
|
|
|
case 0:
|
|
|
|
|
case 1:
|
|
|
|
|
break;
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
case 3:
|
|
|
|
|
svga->clock = cpuclock / 40000000.0;
|
|
|
|
|
break;
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
case 5:
|
|
|
|
|
svga->clock = cpuclock / 65000000.0;
|
|
|
|
|
break;
|
2018-08-16 00:25:20 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
default:
|
|
|
|
|
svga->clock = cpuclock / 36000000.0;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
switch (svga->bpp) {
|
|
|
|
|
case 15:
|
|
|
|
|
case 16:
|
|
|
|
|
svga->hdisp /= 2;
|
|
|
|
|
break;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
case 24:
|
|
|
|
|
svga->hdisp /= 3;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (dev->type == 2 || dev->type == 3) {
|
|
|
|
|
#if NOT_YET
|
|
|
|
|
if ((svga->render == svga_render_text_80) && ((svga->crtc[0x37] & 0x0A) == 0x0A)) {
|
|
|
|
|
if ((dev->port_32cb_val & 0xB4) == ((svga->crtc[0x37] & 3) == 2 ? 0xB4 : 0xB0)) {
|
|
|
|
|
svga->render = svga_render_text_80_ksc5601;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
}
|
2018-08-16 00:25:20 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
2018-07-19 16:01:31 +02:00
|
|
|
static uint8_t
|
|
|
|
|
et4000_mca_read(int port, void *priv)
|
|
|
|
|
{
|
|
|
|
|
et4000_t *et4000 = (et4000_t *)priv;
|
|
|
|
|
|
|
|
|
|
return(et4000->pos_regs[port & 7]);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
2018-07-19 16:01:31 +02:00
|
|
|
static void
|
|
|
|
|
et4000_mca_write(int port, uint8_t val, void *priv)
|
|
|
|
|
{
|
|
|
|
|
et4000_t *et4000 = (et4000_t *)priv;
|
|
|
|
|
|
|
|
|
|
/* MCA does not write registers below 0x0100. */
|
|
|
|
|
if (port < 0x0102) return;
|
|
|
|
|
|
|
|
|
|
/* Save the MCA register value. */
|
|
|
|
|
et4000->pos_regs[port & 7] = val;
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static void *
|
|
|
|
|
et4000_init(const device_t *info)
|
2018-07-19 16:01:31 +02:00
|
|
|
{
|
2018-09-15 02:48:54 +02:00
|
|
|
const wchar_t *fn;
|
|
|
|
|
et4000_t *dev;
|
|
|
|
|
|
|
|
|
|
dev = (et4000_t *)malloc(sizeof(et4000_t));
|
|
|
|
|
memset(dev, 0x00, sizeof(et4000_t));
|
|
|
|
|
dev->name = info->name;
|
|
|
|
|
dev->type = info->local;
|
|
|
|
|
fn = BIOS_ROM_PATH;
|
|
|
|
|
|
|
|
|
|
switch(dev->type) {
|
|
|
|
|
case 0: /* ISA ET4000AX */
|
|
|
|
|
dev->vram_size = device_get_config_int("memory") << 10;
|
|
|
|
|
svga_init(&dev->svga, dev, dev->vram_size,
|
|
|
|
|
et4000_recalctimings, et4000_in, et4000_out,
|
|
|
|
|
NULL, NULL);
|
|
|
|
|
io_sethandler(0x03c0, 32,
|
|
|
|
|
et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev);
|
|
|
|
|
break;
|
2018-08-16 02:22:23 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
case 1: /* MCA ET4000AX */
|
|
|
|
|
dev->vram_size = 1024 << 10;
|
|
|
|
|
svga_init(&dev->svga, dev, dev->vram_size,
|
|
|
|
|
et4000_recalctimings, et4000_in, et4000_out,
|
|
|
|
|
NULL, NULL);
|
|
|
|
|
io_sethandler(0x03c0, 32,
|
|
|
|
|
et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev);
|
|
|
|
|
dev->pos_regs[0] = 0xf2; /* ET4000 MCA board ID */
|
|
|
|
|
dev->pos_regs[1] = 0x80;
|
|
|
|
|
mca_add(et4000_mca_read, et4000_mca_write, dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 2: /* Korean ET4000 */
|
|
|
|
|
case 3: /* Trigem 286M ET4000 */
|
|
|
|
|
dev->vram_size = device_get_config_int("memory") << 10;
|
|
|
|
|
dev->port_22cb_val = 0x60;
|
|
|
|
|
dev->port_32cb_val = 0;
|
|
|
|
|
dev->svga.ksc5601_sbyte_mask = 0x80;
|
|
|
|
|
svga_init(&dev->svga, dev, dev->vram_size,
|
|
|
|
|
et4000_recalctimings, et4000k_in, et4000k_out,
|
|
|
|
|
NULL, NULL);
|
|
|
|
|
io_sethandler(0x03c0, 32,
|
|
|
|
|
et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev);
|
|
|
|
|
io_sethandler(0x22cb, 1,
|
|
|
|
|
et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev);
|
|
|
|
|
io_sethandler(0x22cf, 1,
|
|
|
|
|
et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev);
|
|
|
|
|
io_sethandler(0x32cb, 1,
|
|
|
|
|
et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev);
|
|
|
|
|
loadfont(KOREAN_FONT_ROM_PATH, 6);
|
|
|
|
|
fn = KOREAN_BIOS_ROM_PATH;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-08-16 02:22:23 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
dev->vram_mask = dev->vram_size - 1;
|
2018-08-16 02:22:23 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
rom_init(&dev->bios_rom, (wchar_t *) fn,
|
|
|
|
|
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
2018-08-16 02:22:23 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
pclog("VIDEO: %s (vram=%dKB)\n", dev->name, dev->vram_size>>10);
|
2018-08-16 02:22:23 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
return(dev);
|
2018-07-19 16:01:31 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
et4000_close(void *priv)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2018-09-15 02:48:54 +02:00
|
|
|
et4000_t *dev = (et4000_t *)priv;
|
|
|
|
|
|
|
|
|
|
svga_close(&dev->svga);
|
|
|
|
|
|
|
|
|
|
free(dev);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
et4000_speed_changed(void *priv)
|
2018-08-16 00:25:20 +02:00
|
|
|
{
|
2018-09-15 02:48:54 +02:00
|
|
|
et4000_t *dev = (et4000_t *)priv;
|
|
|
|
|
|
|
|
|
|
svga_recalctimings(&dev->svga);
|
2018-08-16 00:25:20 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
et4000_force_redraw(void *priv)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2018-09-15 02:48:54 +02:00
|
|
|
et4000_t *dev = (et4000_t *)priv;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
dev->svga.fullchange = changeframecount;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-15 02:48:54 +02:00
|
|
|
|
|
|
|
|
static int
|
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et4000_available(void)
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2016-06-26 00:34:39 +02:00
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{
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2018-09-15 02:48:54 +02:00
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return rom_present(BIOS_ROM_PATH);
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2016-06-26 00:34:39 +02:00
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}
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2018-09-15 02:48:54 +02:00
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static int
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et4000k_available(void)
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{
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return rom_present(KOREAN_BIOS_ROM_PATH) &&
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rom_present(KOREAN_FONT_ROM_PATH);
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2016-06-26 00:34:39 +02:00
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}
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2018-09-15 02:48:54 +02:00
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static const device_config_t et4000_config[] =
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2018-08-16 00:25:20 +02:00
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{
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2018-09-15 02:48:54 +02:00
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{
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"memory", "Memory size", CONFIG_SELECTION, "", 1024,
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2018-08-23 15:56:35 +02:00
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{
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2018-09-15 02:48:54 +02:00
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{
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"256 KB", 256
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},
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{
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"512 KB", 512
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},
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{
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"1 MB", 1024
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},
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{
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""
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}
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}
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},
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{
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"", "", -1
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}
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2018-08-16 00:25:20 +02:00
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};
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2018-09-15 02:48:54 +02:00
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const device_t et4000_isa_device = {
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"Tseng Labs ET4000AX (ISA)",
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DEVICE_ISA,
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0,
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et4000_init, et4000_close, NULL,
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et4000_available,
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et4000_speed_changed,
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et4000_force_redraw,
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et4000_config
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2018-08-16 00:25:20 +02:00
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};
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2018-09-15 02:48:54 +02:00
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const device_t et4000_mca_device = {
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"Tseng Labs ET4000AX (MCA)",
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DEVICE_MCA,
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1,
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et4000_init, et4000_close, NULL,
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et4000_available,
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et4000_speed_changed,
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et4000_force_redraw,
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et4000_config
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2018-08-16 02:22:23 +02:00
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};
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2018-09-15 02:48:54 +02:00
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const device_t et4000k_isa_device = {
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"Trigem Korean VGA (Tseng Labs ET4000AX Korean)",
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DEVICE_ISA,
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2,
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et4000_init, et4000_close, NULL,
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et4000k_available,
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et4000_speed_changed,
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et4000_force_redraw,
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et4000_config
|
2018-07-19 16:01:31 +02:00
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};
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2018-09-15 02:48:54 +02:00
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const device_t et4000k_tg286_isa_device = {
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"Trigem Korean VGA (Trigem 286M)",
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DEVICE_ISA,
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3,
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et4000_init, et4000_close, NULL,
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et4000k_available,
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et4000_speed_changed,
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et4000_force_redraw,
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et4000_config
|
2016-06-26 00:34:39 +02:00
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};
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