572 lines
34 KiB
C
572 lines
34 KiB
C
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#define OP_SHIFT_b(c) \
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{ \
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uint8_t temp_orig = temp; \
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if (!c) return 0; \
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flags_rebuild(); \
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switch (rmdat & 0x38) \
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{ \
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case 0x00: /*ROL b, c*/ \
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while (c > 0) \
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{ \
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temp2 = (temp & 0x80) ? 1 : 0; \
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temp = (temp << 1) | temp2; \
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c--; \
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} \
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seteab(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((flags & C_FLAG) ^ (temp >> 7)) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x08: /*ROR b,CL*/ \
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while (c > 0) \
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{ \
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temp2 = temp & 1; \
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temp >>= 1; \
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if (temp2) temp |= 0x80; \
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c--; \
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} \
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seteab(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((temp ^ (temp >> 1)) & 0x40) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x10: /*RCL b,CL*/ \
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temp2 = flags & C_FLAG; \
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if (is486) CLOCK_CYCLES_ALWAYS(c); \
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while (c > 0) \
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{ \
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tempc = temp2 ? 1 : 0; \
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temp2 = temp & 0x80; \
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temp = (temp << 1) | tempc; \
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c--; \
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} \
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seteab(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((flags & C_FLAG) ^ (temp >> 7)) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 9 : 10); \
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break; \
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case 0x18: /*RCR b,CL*/ \
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temp2 = flags & C_FLAG; \
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if (is486) CLOCK_CYCLES_ALWAYS(c); \
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while (c > 0) \
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{ \
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tempc = temp2 ? 0x80 : 0; \
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temp2 = temp & 1; \
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temp = (temp >> 1) | tempc; \
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c--; \
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} \
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seteab(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((temp ^ (temp >> 1)) & 0x40) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 9 : 10); \
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break; \
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case 0x20: case 0x30: /*SHL b,CL*/ \
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seteab(temp << c); if (abrt) return 1; \
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set_flags_shift(FLAGS_SHL8, temp_orig, c, (temp << c) & 0xff); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x28: /*SHR b,CL*/ \
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seteab(temp >> c); if (abrt) return 1; \
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set_flags_shift(FLAGS_SHR8, temp_orig, c, temp >> c); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x38: /*SAR b,CL*/ \
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temp = (int8_t)temp >> c; \
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seteab(temp); if (abrt) return 1; \
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set_flags_shift(FLAGS_SAR8, temp_orig, c, temp); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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} \
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}
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#define OP_SHIFT_w(c) \
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{ \
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uint16_t temp_orig = temp; \
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if (!c) return 0; \
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flags_rebuild(); \
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switch (rmdat & 0x38) \
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{ \
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case 0x00: /*ROL w, c*/ \
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while (c > 0) \
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{ \
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temp2 = (temp & 0x8000) ? 1 : 0; \
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temp = (temp << 1) | temp2; \
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c--; \
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} \
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seteaw(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((flags & C_FLAG) ^ (temp >> 15)) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x08: /*ROR w, c*/ \
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while (c > 0) \
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{ \
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temp2 = temp & 1; \
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temp >>= 1; \
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if (temp2) temp |= 0x8000; \
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c--; \
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} \
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seteaw(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((temp ^ (temp >> 1)) & 0x4000) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x10: /*RCL w, c*/ \
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temp2 = flags & C_FLAG; \
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if (is486) CLOCK_CYCLES_ALWAYS(c); \
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while (c > 0) \
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{ \
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tempc = temp2 ? 1 : 0; \
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temp2 = temp & 0x8000; \
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temp = (temp << 1) | tempc; \
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c--; \
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} \
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seteaw(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((flags & C_FLAG) ^ (temp >> 15)) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 9 : 10); \
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break; \
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case 0x18: /*RCR w, c*/ \
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temp2 = flags & C_FLAG; \
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if (is486) CLOCK_CYCLES_ALWAYS(c); \
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while (c > 0) \
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{ \
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tempc = temp2 ? 0x8000 : 0; \
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temp2 = temp & 1; \
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temp = (temp >> 1) | tempc; \
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c--; \
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} \
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seteaw(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((temp ^ (temp >> 1)) & 0x4000) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 9 : 10); \
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break; \
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case 0x20: case 0x30: /*SHL w, c*/ \
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seteaw(temp << c); if (abrt) return 1; \
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set_flags_shift(FLAGS_SHL16, temp_orig, c, (temp << c) & 0xffff); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x28: /*SHR w, c*/ \
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seteaw(temp >> c); if (abrt) return 1; \
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set_flags_shift(FLAGS_SHR16, temp_orig, c, temp >> c); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x38: /*SAR w, c*/ \
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temp = (int16_t)temp >> c; \
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seteaw(temp); if (abrt) return 1; \
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set_flags_shift(FLAGS_SAR16, temp_orig, c, temp); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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} \
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}
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#define OP_SHIFT_l(c) \
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{ \
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uint32_t temp_orig = temp; \
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if (!c) return 0; \
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flags_rebuild(); \
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switch (rmdat & 0x38) \
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{ \
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case 0x00: /*ROL l, c*/ \
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while (c > 0) \
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{ \
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temp2 = (temp & 0x80000000) ? 1 : 0; \
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temp = (temp << 1) | temp2; \
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c--; \
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} \
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seteal(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((flags & C_FLAG) ^ (temp >> 31)) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x08: /*ROR l, c*/ \
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while (c > 0) \
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{ \
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temp2 = temp & 1; \
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temp >>= 1; \
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if (temp2) temp |= 0x80000000; \
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c--; \
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} \
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seteal(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((temp ^ (temp >> 1)) & 0x40000000) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x10: /*RCL l, c*/ \
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temp2 = CF_SET(); \
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if (is486) CLOCK_CYCLES_ALWAYS(c); \
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while (c > 0) \
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{ \
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tempc = temp2 ? 1 : 0; \
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temp2 = temp & 0x80000000; \
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temp = (temp << 1) | tempc; \
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c--; \
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} \
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seteal(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((flags & C_FLAG) ^ (temp >> 31)) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 9 : 10); \
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break; \
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case 0x18: /*RCR l, c*/ \
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temp2 = flags & C_FLAG; \
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if (is486) CLOCK_CYCLES_ALWAYS(c); \
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while (c > 0) \
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{ \
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tempc = temp2 ? 0x80000000 : 0; \
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temp2 = temp & 1; \
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temp = (temp >> 1) | tempc; \
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c--; \
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} \
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seteal(temp); if (abrt) return 1; \
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flags &= ~(C_FLAG | V_FLAG); \
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if (temp2) flags |= C_FLAG; \
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if ((temp ^ (temp >> 1)) & 0x40000000) flags |= V_FLAG; \
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CLOCK_CYCLES((mod == 3) ? 9 : 10); \
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break; \
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case 0x20: case 0x30: /*SHL l, c*/ \
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seteal(temp << c); if (abrt) return 1; \
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set_flags_shift(FLAGS_SHL32, temp_orig, c, temp << c); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x28: /*SHR l, c*/ \
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seteal(temp >> c); if (abrt) return 1; \
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set_flags_shift(FLAGS_SHR32, temp_orig, c, temp >> c); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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case 0x38: /*SAR l, c*/ \
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temp = (int32_t)temp >> c; \
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seteal(temp); if (abrt) return 1; \
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set_flags_shift(FLAGS_SAR32, temp_orig, c, temp); \
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CLOCK_CYCLES((mod == 3) ? 3 : 7); \
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break; \
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} \
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}
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static int opC0_a16(uint32_t fetchdat)
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{
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int c;
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int tempc;
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uint8_t temp, temp2;
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fetch_ea_16(fetchdat);
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c = readmemb(cs, cpu_state.pc) & 31; cpu_state.pc++;
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temp = geteab(); if (abrt) return 1;
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OP_SHIFT_b(c);
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return 0;
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}
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static int opC0_a32(uint32_t fetchdat)
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{
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int c;
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int tempc;
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uint8_t temp, temp2;
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fetch_ea_32(fetchdat);
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c = readmemb(cs, cpu_state.pc) & 31; cpu_state.pc++;
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temp = geteab(); if (abrt) return 1;
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OP_SHIFT_b(c);
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return 0;
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}
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static int opC1_w_a16(uint32_t fetchdat)
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{
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int c;
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int tempc;
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uint16_t temp, temp2;
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fetch_ea_16(fetchdat);
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c = readmemb(cs, cpu_state.pc) & 31; cpu_state.pc++;
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temp = geteaw(); if (abrt) return 1;
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OP_SHIFT_w(c);
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return 0;
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}
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static int opC1_w_a32(uint32_t fetchdat)
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{
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int c;
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int tempc;
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uint16_t temp, temp2;
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fetch_ea_32(fetchdat);
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c = readmemb(cs, cpu_state.pc) & 31; cpu_state.pc++;
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temp = geteaw(); if (abrt) return 1;
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OP_SHIFT_w(c);
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return 0;
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}
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static int opC1_l_a16(uint32_t fetchdat)
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{
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int c;
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int tempc;
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uint32_t temp, temp2;
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fetch_ea_16(fetchdat);
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c = readmemb(cs, cpu_state.pc) & 31; cpu_state.pc++;
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temp = geteal(); if (abrt) return 1;
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OP_SHIFT_l(c);
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return 0;
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}
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static int opC1_l_a32(uint32_t fetchdat)
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{
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int c;
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int tempc;
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uint32_t temp, temp2;
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fetch_ea_32(fetchdat);
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c = readmemb(cs, cpu_state.pc) & 31; cpu_state.pc++;
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temp = geteal(); if (abrt) return 1;
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OP_SHIFT_l(c);
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return 0;
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}
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static int opD0_a16(uint32_t fetchdat)
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{
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int c = 1;
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int tempc;
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uint8_t temp, temp2;
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fetch_ea_16(fetchdat);
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temp = geteab(); if (abrt) return 1;
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OP_SHIFT_b(c);
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return 0;
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}
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static int opD0_a32(uint32_t fetchdat)
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{
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int c = 1;
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int tempc;
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uint8_t temp, temp2;
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fetch_ea_32(fetchdat);
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temp = geteab(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_b(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD1_w_a16(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c = 1;
|
||
|
|
int tempc;
|
||
|
|
uint16_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_16(fetchdat);
|
||
|
|
temp = geteaw(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_w(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD1_w_a32(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c = 1;
|
||
|
|
int tempc;
|
||
|
|
uint16_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_32(fetchdat);
|
||
|
|
temp = geteaw(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_w(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD1_l_a16(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c = 1;
|
||
|
|
int tempc;
|
||
|
|
uint32_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_16(fetchdat);
|
||
|
|
temp = geteal(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_l(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD1_l_a32(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c = 1;
|
||
|
|
int tempc;
|
||
|
|
uint32_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_32(fetchdat);
|
||
|
|
temp = geteal(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_l(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int opD2_a16(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c;
|
||
|
|
int tempc;
|
||
|
|
uint8_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_16(fetchdat);
|
||
|
|
c = CL & 31;
|
||
|
|
temp = geteab(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_b(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD2_a32(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c;
|
||
|
|
int tempc;
|
||
|
|
uint8_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_32(fetchdat);
|
||
|
|
c = CL & 31;
|
||
|
|
temp = geteab(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_b(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD3_w_a16(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c;
|
||
|
|
int tempc;
|
||
|
|
uint16_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_16(fetchdat);
|
||
|
|
c = CL & 31;
|
||
|
|
temp = geteaw(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_w(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD3_w_a32(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c;
|
||
|
|
int tempc;
|
||
|
|
uint16_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_32(fetchdat);
|
||
|
|
c = CL & 31;
|
||
|
|
temp = geteaw(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_w(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD3_l_a16(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c;
|
||
|
|
int tempc;
|
||
|
|
uint32_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_16(fetchdat);
|
||
|
|
c = CL & 31;
|
||
|
|
temp = geteal(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_l(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static int opD3_l_a32(uint32_t fetchdat)
|
||
|
|
{
|
||
|
|
int c;
|
||
|
|
int tempc;
|
||
|
|
uint32_t temp, temp2;
|
||
|
|
|
||
|
|
fetch_ea_32(fetchdat);
|
||
|
|
c = CL & 31;
|
||
|
|
temp = geteal(); if (abrt) return 1;
|
||
|
|
OP_SHIFT_l(c);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#define SHLD_w() \
|
||
|
|
if (count) \
|
||
|
|
{ \
|
||
|
|
uint16_t tempw = geteaw(); if (abrt) return 1; \
|
||
|
|
int tempc = ((tempw << (count - 1)) & (1 << 15)) ? 1 : 0; \
|
||
|
|
uint32_t templ = (tempw << 16) | cpu_state.regs[reg].w; \
|
||
|
|
if (count <= 16) tempw = templ >> (16 - count); \
|
||
|
|
else tempw = (templ << count) >> 16; \
|
||
|
|
seteaw(tempw); if (abrt) return 1; \
|
||
|
|
setznp16(tempw); \
|
||
|
|
flags_rebuild(); \
|
||
|
|
if (tempc) flags |= C_FLAG; \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SHLD_l() \
|
||
|
|
if (count) \
|
||
|
|
{ \
|
||
|
|
uint32_t templ = geteal(); if (abrt) return 1; \
|
||
|
|
int tempc = ((templ << (count - 1)) & (1 << 31)) ? 1 : 0; \
|
||
|
|
templ = (templ << count) | (cpu_state.regs[reg].l >> (32 - count)); \
|
||
|
|
seteal(templ); if (abrt) return 1; \
|
||
|
|
setznp32(templ); \
|
||
|
|
flags_rebuild(); \
|
||
|
|
if (tempc) flags |= C_FLAG; \
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#define SHRD_w() \
|
||
|
|
if (count) \
|
||
|
|
{ \
|
||
|
|
uint16_t tempw = geteaw(); if (abrt) return 1; \
|
||
|
|
int tempc = (tempw >> (count - 1)) & 1; \
|
||
|
|
uint32_t templ = tempw | (cpu_state.regs[reg].w << 16); \
|
||
|
|
tempw = templ >> count; \
|
||
|
|
seteaw(tempw); if (abrt) return 1; \
|
||
|
|
setznp16(tempw); \
|
||
|
|
flags_rebuild(); \
|
||
|
|
if (tempc) flags |= C_FLAG; \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SHRD_l() \
|
||
|
|
if (count) \
|
||
|
|
{ \
|
||
|
|
uint32_t templ = geteal(); if (abrt) return 1; \
|
||
|
|
int tempc = (templ >> (count - 1)) & 1; \
|
||
|
|
templ = (templ >> count) | (cpu_state.regs[reg].l << (32 - count)); \
|
||
|
|
seteal(templ); if (abrt) return 1; \
|
||
|
|
setznp32(templ); \
|
||
|
|
flags_rebuild(); \
|
||
|
|
if (tempc) flags |= C_FLAG; \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define opSHxD(operation) \
|
||
|
|
static int op ## operation ## _i_a16(uint32_t fetchdat) \
|
||
|
|
{ \
|
||
|
|
int count; \
|
||
|
|
\
|
||
|
|
fetch_ea_16(fetchdat); \
|
||
|
|
count = getbyte() & 31; \
|
||
|
|
operation(); \
|
||
|
|
\
|
||
|
|
CLOCK_CYCLES(3); \
|
||
|
|
return 0; \
|
||
|
|
} \
|
||
|
|
static int op ## operation ## _CL_a16(uint32_t fetchdat) \
|
||
|
|
{ \
|
||
|
|
int count; \
|
||
|
|
\
|
||
|
|
fetch_ea_16(fetchdat); \
|
||
|
|
count = CL & 31; \
|
||
|
|
operation(); \
|
||
|
|
\
|
||
|
|
CLOCK_CYCLES(3); \
|
||
|
|
return 0; \
|
||
|
|
} \
|
||
|
|
static int op ## operation ## _i_a32(uint32_t fetchdat) \
|
||
|
|
{ \
|
||
|
|
int count; \
|
||
|
|
\
|
||
|
|
fetch_ea_32(fetchdat); \
|
||
|
|
count = getbyte() & 31; \
|
||
|
|
operation(); \
|
||
|
|
\
|
||
|
|
CLOCK_CYCLES(3); \
|
||
|
|
return 0; \
|
||
|
|
} \
|
||
|
|
static int op ## operation ## _CL_a32(uint32_t fetchdat) \
|
||
|
|
{ \
|
||
|
|
int count; \
|
||
|
|
\
|
||
|
|
fetch_ea_32(fetchdat); \
|
||
|
|
count = CL & 31; \
|
||
|
|
operation(); \
|
||
|
|
\
|
||
|
|
CLOCK_CYCLES(3); \
|
||
|
|
return 0; \
|
||
|
|
}
|
||
|
|
|
||
|
|
opSHxD(SHLD_w)
|
||
|
|
opSHxD(SHLD_l)
|
||
|
|
opSHxD(SHRD_w)
|
||
|
|
opSHxD(SHRD_l)
|