2020-10-09 23:07:56 -03:00
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* Emulation of the VIA PIPC southbridges.
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*
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*
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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* Melissa Goad, <mszoopers@protonmail.com>
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* RichardG, <richardg867@gmail.com>
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*
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* Copyright 2008-2020 Sarah Walker.
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* Copyright 2016-2020 Miran Grca.
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* Copyright 2020 Melissa Goad.
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* Copyright 2020 RichardG.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/cdrom.h>
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#include "cpu.h"
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#include <86box/scsi_device.h>
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#include <86box/scsi_cdrom.h>
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#include <86box/dma.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/apm.h>
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#include <86box/keyboard.h>
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#include <86box/mem.h>
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#include <86box/timer.h>
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#include <86box/nvr.h>
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#include <86box/acpi.h>
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#include <86box/pci.h>
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#include <86box/pic.h>
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#include <86box/port_92.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/hdc_ide_sff8038i.h>
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#include <86box/usb.h>
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#include <86box/zip.h>
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#include <86box/machine.h>
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#include <86box/smbus_piix4.h>
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#include <86box/chipset.h>
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2020-10-13 19:27:48 -03:00
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#include <86box/sio.h>
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#include <86box/hwm.h>
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2020-10-09 23:07:56 -03:00
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2020-10-10 20:34:42 -03:00
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/* Most revision numbers (PCI-ISA bridge or otherwise) were lifted from PCI device
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listings on forums, as VIA's datasheets are not very helpful regarding those. */
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#define VIA_PIPC_586A 0x05862500
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2020-10-09 23:07:56 -03:00
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#define VIA_PIPC_586B 0x05864700
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2020-10-10 17:02:33 -03:00
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#define VIA_PIPC_596A 0x05961200
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2020-10-10 20:34:42 -03:00
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#define VIA_PIPC_596B 0x05962300
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2020-10-09 23:07:56 -03:00
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#define VIA_PIPC_686A 0x06861400
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#define VIA_PIPC_686B 0x06864000
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typedef struct
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{
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uint32_t local;
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uint8_t max_func;
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uint8_t pci_isa_regs[256];
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uint8_t ide_regs[256];
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uint8_t usb_regs[2][256];
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uint8_t power_regs[256];
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2020-10-10 20:34:42 -03:00
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uint8_t ac97_regs[2][256];
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2020-10-09 23:07:56 -03:00
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sff8038i_t *bm[2];
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nvr_t *nvr;
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int nvr_enabled, slot;
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smbus_piix4_t *smbus;
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usb_t *usb[2];
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acpi_t *acpi;
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} pipc_t;
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2020-10-11 11:45:06 -03:00
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2020-10-09 23:07:56 -03:00
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#ifdef ENABLE_PIPC_LOG
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int pipc_do_log = ENABLE_PIPC_LOG;
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static void
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pipc_log(const char *fmt, ...)
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{
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va_list ap;
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if (pipc_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define pipc_log(fmt, ...)
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#endif
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static void
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pipc_reset_hard(void *priv)
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{
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int i;
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pipc_log("PIPC: reset_hard()\n");
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pipc_t *dev = (pipc_t *) priv;
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uint16_t old_base = (dev->ide_regs[0x20] & 0xf0) | (dev->ide_regs[0x21] << 8);
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sff_bus_master_reset(dev->bm[0], old_base);
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sff_bus_master_reset(dev->bm[1], old_base + 8);
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memset(dev->pci_isa_regs, 0, 256);
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memset(dev->ide_regs, 0, 256);
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memset(dev->usb_regs, 0, 512);
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memset(dev->power_regs, 0, 256);
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2020-10-10 20:34:42 -03:00
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memset(dev->ac97_regs, 0, 512);
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2020-10-09 23:07:56 -03:00
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dev->pci_isa_regs[0x00] = 0x06; dev->pci_isa_regs[0x01] = 0x11;
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dev->pci_isa_regs[0x02] = dev->local >> 16;
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dev->pci_isa_regs[0x03] = dev->local >> 24;
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dev->pci_isa_regs[0x04] = (dev->local <= VIA_PIPC_586B) ? 0x0f : 0x87;
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dev->pci_isa_regs[0x07] = 0x02;
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dev->pci_isa_regs[0x08] = dev->local >> 8;
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dev->pci_isa_regs[0x0a] = 0x01;
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dev->pci_isa_regs[0x0b] = 0x06;
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dev->pci_isa_regs[0x0e] = 0x80;
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dev->pci_isa_regs[0x48] = 0x01;
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dev->pci_isa_regs[0x4a] = 0x04;
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dev->pci_isa_regs[0x4f] = 0x03;
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2020-10-13 19:27:48 -03:00
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dev->pci_isa_regs[0x50] = (dev->local >= VIA_PIPC_686A) ? 0x0e : 0x24; /* 686A/B default value does not line up with default bits */
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2020-10-09 23:07:56 -03:00
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dev->pci_isa_regs[0x59] = 0x04;
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if (dev->local >= VIA_PIPC_686A)
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dev->pci_isa_regs[0x5a] = dev->pci_isa_regs[0x5f] = 0x04;
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dma_e = 0x00;
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for (i = 0; i < 8; i++) {
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dma[i].ab &= 0xffff000f;
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dma[i].ac &= 0xffff000f;
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}
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pic_set_shadow(0);
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/* IDE registers */
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dev->max_func++;
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dev->ide_regs[0x00] = 0x06; dev->ide_regs[0x01] = 0x11;
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dev->ide_regs[0x02] = 0x71; dev->ide_regs[0x03] = 0x05;
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dev->ide_regs[0x04] = 0x80;
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dev->ide_regs[0x06] = (dev->local == VIA_PIPC_686A) ? 0x90 : 0x80; dev->ide_regs[0x07] = 0x02;
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2020-10-10 20:34:42 -03:00
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dev->ide_regs[0x08] = (dev->local == VIA_PIPC_596B) ? 0x10 : 0x06; /* only 596B has rev 0x10? */
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2020-10-09 23:07:56 -03:00
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dev->ide_regs[0x09] = 0x85;
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dev->ide_regs[0x0a] = 0x01;
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dev->ide_regs[0x0b] = 0x01;
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dev->ide_regs[0x10] = 0xf1; dev->ide_regs[0x11] = 0x01;
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dev->ide_regs[0x14] = 0xf5; dev->ide_regs[0x15] = 0x03;
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dev->ide_regs[0x18] = 0x71; dev->ide_regs[0x19] = 0x01;
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dev->ide_regs[0x1c] = 0x75; dev->ide_regs[0x1d] = 0x03;
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dev->ide_regs[0x20] = 0x01; dev->ide_regs[0x21] = 0xcc;
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if (dev->local >= VIA_PIPC_686A)
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dev->ide_regs[0x34] = 0xc0;
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dev->ide_regs[0x3c] = 0x0e;
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2020-10-14 16:33:30 -03:00
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if (dev->local <= VIA_PIPC_586B)
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dev->ide_regs[0x40] = 0x04;
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2020-10-09 23:07:56 -03:00
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dev->ide_regs[0x41] = 0x02;
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dev->ide_regs[0x42] = 0x09;
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dev->ide_regs[0x43] = (dev->local >= VIA_PIPC_686A) ? 0x0a : 0x3a;
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dev->ide_regs[0x44] = 0x68;
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dev->ide_regs[0x46] = 0xc0;
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dev->ide_regs[0x48] = 0xa8; dev->ide_regs[0x49] = 0xa8;
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dev->ide_regs[0x4a] = 0xa8; dev->ide_regs[0x4b] = 0xa8;
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dev->ide_regs[0x4c] = 0xff;
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dev->ide_regs[0x4e] = 0xff;
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dev->ide_regs[0x4f] = 0xff;
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2020-10-13 19:27:48 -03:00
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dev->ide_regs[0x50] = dev->ide_regs[0x51] = dev->ide_regs[0x52] = dev->ide_regs[0x53] = (dev->local >= VIA_PIPC_686A) ? 0x07 : 0x03;
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2020-10-10 17:02:33 -03:00
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if (dev->local >= VIA_PIPC_596A)
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2020-10-09 23:07:56 -03:00
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dev->ide_regs[0x54] = 0x06;
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dev->ide_regs[0x61] = 0x02;
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dev->ide_regs[0x69] = 0x02;
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if (dev->local >= VIA_PIPC_686A) {
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dev->ide_regs[0xc0] = 0x01;
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dev->ide_regs[0xc2] = 0x02;
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}
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2020-10-10 20:34:42 -03:00
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for (i = 0; i <= (dev->local >= VIA_PIPC_686A); i++) {
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2020-10-09 23:07:56 -03:00
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dev->max_func++;
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dev->usb_regs[i][0x00] = 0x06; dev->usb_regs[i][0x01] = 0x11;
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dev->usb_regs[i][0x02] = 0x38; dev->usb_regs[i][0x03] = 0x30;
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dev->usb_regs[i][0x04] = 0x00; dev->usb_regs[i][0x05] = 0x00;
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dev->usb_regs[i][0x06] = 0x00; dev->usb_regs[i][0x07] = 0x02;
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2020-10-10 20:34:42 -03:00
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switch (dev->local) {
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case VIA_PIPC_586A:
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case VIA_PIPC_586B:
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dev->usb_regs[i][0x08] = 0x02;
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break;
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case VIA_PIPC_596A:
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dev->usb_regs[i][0x08] = 0x08;
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break;
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case VIA_PIPC_596B:
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dev->usb_regs[i][0x08] = 0x11;
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break;
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case VIA_PIPC_686A:
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dev->usb_regs[i][0x08] = 0x06;
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break;
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case VIA_PIPC_686B:
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dev->usb_regs[i][0x08] = 0x16;
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break;
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}
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2020-10-10 17:02:33 -03:00
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2020-10-09 23:07:56 -03:00
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dev->usb_regs[i][0x0a] = 0x03;
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dev->usb_regs[i][0x0b] = 0x0c;
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dev->usb_regs[i][0x0d] = 0x16;
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dev->usb_regs[i][0x20] = 0x01;
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dev->usb_regs[i][0x21] = 0x03;
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dev->usb_regs[i][0x3d] = 0x04;
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dev->usb_regs[i][0x60] = 0x10;
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if (dev->local >= VIA_PIPC_686A) {
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dev->usb_regs[i][0x80] = 0x01;
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dev->usb_regs[i][0x82] = 0x02;
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}
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dev->usb_regs[i][0xc1] = 0x20;
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}
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2020-10-11 12:28:16 -03:00
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if (dev->acpi) {
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2020-10-09 23:07:56 -03:00
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dev->max_func++;
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dev->power_regs[0x00] = 0x06; dev->power_regs[0x01] = 0x11;
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if (dev->local <= VIA_PIPC_586B)
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dev->power_regs[0x02] = 0x40;
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else if (dev->local <= VIA_PIPC_596B)
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dev->power_regs[0x02] = 0x50;
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else
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dev->power_regs[0x02] = 0x57;
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dev->power_regs[0x03] = 0x30;
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dev->power_regs[0x04] = 0x00; dev->power_regs[0x05] = 0x00;
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dev->power_regs[0x06] = (dev->local == VIA_PIPC_686B) ? 0x90 : 0x80; dev->power_regs[0x07] = 0x02;
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2020-10-10 20:34:42 -03:00
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switch (dev->local) {
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case VIA_PIPC_586B:
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case VIA_PIPC_686A:
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dev->power_regs[0x08] = 0x10;
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break;
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case VIA_PIPC_596A:
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dev->power_regs[0x08] = 0x20;
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break;
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case VIA_PIPC_596B:
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dev->power_regs[0x08] = 0x30;
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break;
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case VIA_PIPC_686B:
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dev->power_regs[0x08] = 0x40;
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break;
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}
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if (dev->local >= VIA_PIPC_686A)
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|
|
|
|
dev->power_regs[0x42] = 0x40; /* external suspend-related pin, must be set */
|
2020-10-09 23:07:56 -03:00
|
|
|
dev->power_regs[0x48] = 0x01;
|
|
|
|
|
|
2020-10-13 19:27:48 -03:00
|
|
|
if (dev->local >= VIA_PIPC_686A)
|
|
|
|
|
dev->power_regs[0x70] = 0x01;
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
if (dev->local == VIA_PIPC_596A)
|
|
|
|
|
dev->power_regs[0x80] = 0x01;
|
|
|
|
|
else if (dev->local >= VIA_PIPC_596B)
|
2020-10-09 23:07:56 -03:00
|
|
|
dev->power_regs[0x90] = 0x01;
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
if (dev->local >= VIA_PIPC_686A) {
|
|
|
|
|
for (i = 0; i <= 1; i++) {
|
|
|
|
|
dev->max_func++;
|
|
|
|
|
dev->ac97_regs[i][0x00] = 0x06; dev->ac97_regs[i][0x01] = 0x11;
|
|
|
|
|
dev->ac97_regs[i][0x02] = 0x58 + (0x10 * i); dev->ac97_regs[i][0x03] = 0x30;
|
|
|
|
|
dev->ac97_regs[i][0x06] = 0x10 * (1 - i); dev->ac97_regs[i][0x07] = 0x02;
|
|
|
|
|
dev->ac97_regs[i][0x08] = (dev->local == VIA_PIPC_686A) ? 0x12 : 0x50;
|
|
|
|
|
|
|
|
|
|
if (i == 0) {
|
|
|
|
|
dev->ac97_regs[i][0x0a] = 0x01;
|
|
|
|
|
dev->ac97_regs[i][0x0b] = 0x04;
|
|
|
|
|
} else {
|
|
|
|
|
dev->ac97_regs[i][0x0a] = 0x80;
|
|
|
|
|
dev->ac97_regs[i][0x0b] = 0x07;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dev->ac97_regs[i][0x10] = 0x01;
|
|
|
|
|
dev->ac97_regs[i][0x14] = 0x01;
|
|
|
|
|
|
|
|
|
|
dev->ac97_regs[i][0x3d] = 0x03;
|
|
|
|
|
|
|
|
|
|
dev->ac97_regs[i][0x43] = 0x1c;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
|
|
|
|
|
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
|
|
|
|
|
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
|
|
|
|
|
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
|
|
|
|
|
|
2020-10-10 17:02:33 -03:00
|
|
|
if (dev->local <= VIA_PIPC_586B) {
|
|
|
|
|
pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED);
|
|
|
|
|
pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED);
|
|
|
|
|
if (dev->local == VIA_PIPC_586B)
|
|
|
|
|
pci_set_mirq_routing(PCI_MIRQ2, PCI_IRQ_DISABLED);
|
|
|
|
|
}
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
ide_pri_disable();
|
|
|
|
|
ide_sec_disable();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pipc_ide_handlers(pipc_t *dev)
|
|
|
|
|
{
|
|
|
|
|
uint16_t main, side;
|
|
|
|
|
|
|
|
|
|
ide_pri_disable();
|
|
|
|
|
ide_sec_disable();
|
|
|
|
|
|
|
|
|
|
if (dev->ide_regs[0x09] & 0x01) {
|
|
|
|
|
main = (dev->ide_regs[0x11] << 8) | (dev->ide_regs[0x10] & 0xf8);
|
|
|
|
|
side = ((dev->ide_regs[0x15] << 8) | (dev->ide_regs[0x14] & 0xfc)) + 2;
|
|
|
|
|
} else {
|
|
|
|
|
main = 0x1f0;
|
|
|
|
|
side = 0x3f6;
|
|
|
|
|
}
|
|
|
|
|
ide_set_base(0, main);
|
|
|
|
|
ide_set_side(0, side);
|
|
|
|
|
|
|
|
|
|
if (dev->ide_regs[0x09] & 0x04) {
|
|
|
|
|
main = (dev->ide_regs[0x19] << 8) | (dev->ide_regs[0x18] & 0xf8);
|
|
|
|
|
side = ((dev->ide_regs[0x1d] << 8) | (dev->ide_regs[0x1c] & 0xfc)) + 2;
|
|
|
|
|
} else {
|
|
|
|
|
main = 0x170;
|
|
|
|
|
side = 0x376;
|
|
|
|
|
}
|
|
|
|
|
ide_set_base(1, main);
|
|
|
|
|
ide_set_side(1, side);
|
|
|
|
|
|
|
|
|
|
if (dev->ide_regs[0x04] & PCI_COMMAND_IO) {
|
|
|
|
|
if (dev->ide_regs[0x40] & 0x02)
|
|
|
|
|
ide_pri_enable();
|
|
|
|
|
if (dev->ide_regs[0x40] & 0x01)
|
|
|
|
|
ide_sec_enable();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pipc_ide_irqs(pipc_t *dev)
|
|
|
|
|
{
|
|
|
|
|
int irq_mode[2] = { 0, 0 };
|
|
|
|
|
|
|
|
|
|
if (dev->ide_regs[0x09] & 0x01)
|
|
|
|
|
irq_mode[0] = (dev->ide_regs[0x3d] & 0x01);
|
|
|
|
|
|
|
|
|
|
if (dev->ide_regs[0x09] & 0x04)
|
|
|
|
|
irq_mode[1] = (dev->ide_regs[0x3d] & 0x01);
|
|
|
|
|
|
|
|
|
|
sff_set_irq_mode(dev->bm[0], 0, irq_mode[0]);
|
|
|
|
|
sff_set_irq_mode(dev->bm[0], 1, irq_mode[1]);
|
|
|
|
|
|
|
|
|
|
sff_set_irq_mode(dev->bm[1], 0, irq_mode[0]);
|
|
|
|
|
sff_set_irq_mode(dev->bm[1], 1, irq_mode[1]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pipc_bus_master_handlers(pipc_t *dev)
|
|
|
|
|
{
|
|
|
|
|
uint16_t base = (dev->ide_regs[0x20] & 0xf0) | (dev->ide_regs[0x21] << 8);
|
|
|
|
|
|
|
|
|
|
sff_bus_master_handler(dev->bm[0], (dev->ide_regs[0x04] & 1), base);
|
|
|
|
|
sff_bus_master_handler(dev->bm[1], (dev->ide_regs[0x04] & 1), base + 8);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static uint8_t
|
|
|
|
|
pipc_read(int func, int addr, void *priv)
|
|
|
|
|
{
|
|
|
|
|
pipc_t *dev = (pipc_t *) priv;
|
|
|
|
|
uint8_t ret = 0xff;
|
|
|
|
|
int c;
|
2020-10-11 12:28:16 -03:00
|
|
|
uint8_t pm_func = dev->usb[1] ? 4 : 3;
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
if (func > dev->max_func)
|
|
|
|
|
return ret;
|
|
|
|
|
else if (func == 0) { /* PCI-ISA bridge */
|
|
|
|
|
if ((addr >= 0x60) && (addr <= 0x6f)) {
|
|
|
|
|
c = (addr & 0x0e) >> 1;
|
|
|
|
|
if (addr & 0x01)
|
|
|
|
|
ret = (dma[c].ab & 0x0000ff00) >> 8;
|
|
|
|
|
else {
|
|
|
|
|
ret = (dma[c].ab & 0x000000f0);
|
|
|
|
|
ret |= (!!(dma_e & (1 << c)) << 3);
|
|
|
|
|
}
|
|
|
|
|
} else
|
|
|
|
|
ret = dev->pci_isa_regs[addr];
|
|
|
|
|
}
|
2020-10-11 11:45:06 -03:00
|
|
|
else if ((func == 1) && !(dev->pci_isa_regs[0x48] & 0x02)) /* IDE */
|
2020-10-09 23:07:56 -03:00
|
|
|
ret = dev->ide_regs[addr];
|
2020-10-11 12:09:56 -03:00
|
|
|
else if ((func < pm_func) && !((func == 2) ? (dev->pci_isa_regs[0x48] & 0x04) : (dev->pci_isa_regs[0x85] & 0x10))) /* USB */
|
2020-10-09 23:07:56 -03:00
|
|
|
ret = dev->usb_regs[func - 2][addr];
|
2020-10-13 19:27:48 -03:00
|
|
|
else if (func == pm_func) { /* Power */
|
2020-10-09 23:07:56 -03:00
|
|
|
ret = dev->power_regs[addr];
|
2020-10-13 19:27:48 -03:00
|
|
|
if (addr == 0x42) {
|
|
|
|
|
ret &= ~0x10;
|
|
|
|
|
if (dev->nvr->regs[0x0d] & 0x80)
|
|
|
|
|
ret |= 0x10;
|
|
|
|
|
}
|
|
|
|
|
}
|
2020-10-10 20:34:42 -03:00
|
|
|
else if ((func <= (pm_func + 2)) && !(dev->pci_isa_regs[0x85] & ((func == (pm_func + 1)) ? 0x04 : 0x08))) /* AC97 / MC97 */
|
|
|
|
|
ret = dev->ac97_regs[func - pm_func - 1][addr];
|
2020-10-09 23:07:56 -03:00
|
|
|
|
2020-10-17 01:46:54 -03:00
|
|
|
pipc_log("PIPC: read(%d, %02X) = %02X\n", func, addr, ret);
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
nvr_update_io_mapping(pipc_t *dev)
|
|
|
|
|
{
|
|
|
|
|
if (dev->nvr_enabled)
|
|
|
|
|
nvr_at_handler(0, 0x0074, dev->nvr);
|
|
|
|
|
|
|
|
|
|
if ((dev->pci_isa_regs[0x5b] & 0x02) && (dev->pci_isa_regs[0x48] & 0x08))
|
|
|
|
|
nvr_at_handler(1, 0x0074, dev->nvr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
usb_update_io_mapping(pipc_t *dev, int func)
|
|
|
|
|
{
|
|
|
|
|
uhci_update_io_mapping(dev->usb[func - 2], dev->usb_regs[func - 2][0x20] & ~0x1f, dev->usb_regs[func - 2][0x21], dev->usb_regs[func - 2][PCI_REG_COMMAND] & PCI_COMMAND_IO);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pipc_write(int func, int addr, uint8_t val, void *priv)
|
|
|
|
|
{
|
|
|
|
|
pipc_t *dev = (pipc_t *) priv;
|
|
|
|
|
int c;
|
2020-10-11 12:28:16 -03:00
|
|
|
uint8_t pm_func = dev->usb[1] ? 4 : 3;
|
2020-10-13 19:27:48 -03:00
|
|
|
void *subdev;
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
if (func > dev->max_func)
|
|
|
|
|
return;
|
|
|
|
|
|
2020-10-17 01:46:54 -03:00
|
|
|
pipc_log("PIPC: write(%d, %02X, %02X)\n", func, addr, val);
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
if (func == 0) { /* PCI-ISA bridge */
|
|
|
|
|
/* Read-only addresses */
|
|
|
|
|
if ((addr < 4) || (addr == 5) || ((addr >= 8) && (addr < 0x40)) || (addr == 0x49) || (addr == 0x4b) ||
|
|
|
|
|
(addr == 0x53) || ((addr >= 0x5d) && (addr < 0x5f)) || ((addr >= 0x71) && (addr < 0x74)) || (addr >= 0x90))
|
|
|
|
|
return;
|
|
|
|
|
|
2020-10-10 17:02:33 -03:00
|
|
|
if ((dev->local <= VIA_PIPC_586A) && ((addr >= 0x58) && (addr < 0x80)))
|
|
|
|
|
return;
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
if ((dev->local <= VIA_PIPC_586B) && (addr >= 0x74))
|
|
|
|
|
return;
|
|
|
|
|
|
2020-10-10 17:02:33 -03:00
|
|
|
if ((dev->local <= VIA_PIPC_596A) && ((addr == 0x51) || (addr == 0x52) || (addr == 0x5f) || (addr == 0x85) ||
|
2020-10-09 23:07:56 -03:00
|
|
|
(addr == 0x86) || ((addr >= 0x8a) && (addr < 0x90))))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
switch (addr) {
|
|
|
|
|
case 0x04:
|
|
|
|
|
dev->pci_isa_regs[0x04] = (val & 8) | 7;
|
|
|
|
|
break;
|
|
|
|
|
case 0x07:
|
|
|
|
|
dev->pci_isa_regs[0x07] &= ~(val & 0xb0);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x47:
|
2020-10-10 17:02:33 -03:00
|
|
|
if (val & 0x01)
|
|
|
|
|
trc_write(0x0047, (val & 0x80) ? 0x06 : 0x04, NULL);
|
2020-10-09 23:07:56 -03:00
|
|
|
pic_set_shadow(!!(val & 0x10));
|
PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
2020-10-14 23:15:01 +02:00
|
|
|
pic_elcr_set_enabled(!!(val & 0x20));
|
2020-10-09 23:07:56 -03:00
|
|
|
dev->pci_isa_regs[0x47] = val & 0xfe;
|
|
|
|
|
break;
|
|
|
|
|
case 0x48:
|
|
|
|
|
dev->pci_isa_regs[0x48] = val;
|
|
|
|
|
nvr_update_io_mapping(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-13 19:27:48 -03:00
|
|
|
case 0x50: case 0x51: case 0x52: case 0x85:
|
|
|
|
|
dev->pci_isa_regs[addr] = val;
|
|
|
|
|
/* Forward Super I/O-related registers to sio_vt82c686.c */
|
|
|
|
|
if ((subdev = device_get_priv(&via_vt82c686_sio_device)))
|
|
|
|
|
vt82c686_sio_write(addr, val, subdev);
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
case 0x54:
|
|
|
|
|
pci_set_irq_level(PCI_INTA, !(val & 8));
|
|
|
|
|
pci_set_irq_level(PCI_INTB, !(val & 4));
|
|
|
|
|
pci_set_irq_level(PCI_INTC, !(val & 2));
|
|
|
|
|
pci_set_irq_level(PCI_INTD, !(val & 1));
|
|
|
|
|
break;
|
|
|
|
|
case 0x55:
|
2020-10-17 01:46:54 -03:00
|
|
|
pipc_log("PIPC: PCI INT%c %d\n", (dev->local >= VIA_PIPC_596A) ? 'A' : 'D', val >> 4);
|
2020-10-10 17:02:33 -03:00
|
|
|
pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTA : PCI_INTD, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED);
|
|
|
|
|
if (dev->local <= VIA_PIPC_586B)
|
2020-10-09 23:07:56 -03:00
|
|
|
pci_set_mirq_routing(PCI_MIRQ0, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED);
|
|
|
|
|
dev->pci_isa_regs[0x55] = val;
|
|
|
|
|
break;
|
|
|
|
|
case 0x56:
|
2020-10-17 01:46:54 -03:00
|
|
|
pipc_log("PIPC: PCI INT%c %d\n", (dev->local >= VIA_PIPC_596A) ? 'C' : 'A', val >> 4);
|
|
|
|
|
pipc_log("PIPC: PCI INTB %d\n", val & 0x0f);
|
2020-10-10 17:02:33 -03:00
|
|
|
pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTC : PCI_INTA, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED);
|
2020-10-09 23:07:56 -03:00
|
|
|
pci_set_irq_routing(PCI_INTB, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED);
|
|
|
|
|
dev->pci_isa_regs[0x56] = val;
|
|
|
|
|
break;
|
|
|
|
|
case 0x57:
|
2020-10-17 01:46:54 -03:00
|
|
|
pipc_log("PIPC: PCI INT%c %d\n", (dev->local >= VIA_PIPC_596A) ? 'D' : 'C', val >> 4);
|
2020-10-10 17:02:33 -03:00
|
|
|
pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTD : PCI_INTC, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED);
|
|
|
|
|
if (dev->local <= VIA_PIPC_586B)
|
2020-10-09 23:07:56 -03:00
|
|
|
pci_set_mirq_routing(PCI_MIRQ1, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED);
|
|
|
|
|
dev->pci_isa_regs[0x57] = val;
|
|
|
|
|
break;
|
|
|
|
|
case 0x58:
|
2020-10-10 17:02:33 -03:00
|
|
|
if (dev->local == VIA_PIPC_586B)
|
2020-10-09 23:07:56 -03:00
|
|
|
pci_set_mirq_routing(PCI_MIRQ2, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED);
|
|
|
|
|
dev->pci_isa_regs[0x58] = val;
|
|
|
|
|
break;
|
|
|
|
|
case 0x5b:
|
|
|
|
|
dev->pci_isa_regs[0x5b] = val;
|
|
|
|
|
nvr_update_io_mapping(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x60: case 0x62: case 0x64: case 0x66:
|
|
|
|
|
case 0x6a: case 0x6c: case 0x6e:
|
|
|
|
|
c = (addr & 0x0e) >> 1;
|
|
|
|
|
dma[c].ab = (dma[c].ab & 0xffffff0f) | (val & 0xf0);
|
|
|
|
|
dma[c].ac = (dma[c].ac & 0xffffff0f) | (val & 0xf0);
|
|
|
|
|
if (val & 0x08)
|
|
|
|
|
dma_e |= (1 << c);
|
|
|
|
|
else
|
|
|
|
|
dma_e &= ~(1 << c);
|
|
|
|
|
break;
|
|
|
|
|
case 0x61: case 0x63: case 0x65: case 0x67:
|
|
|
|
|
case 0x6b: case 0x6d: case 0x6f:
|
|
|
|
|
c = (addr & 0x0e) >> 1;
|
|
|
|
|
dma[c].ab = (dma[c].ab & 0xffff00ff) | (val << 8);
|
|
|
|
|
dma[c].ac = (dma[c].ac & 0xffff00ff) | (val << 8);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x70: case 0x71: case 0x72: case 0x73:
|
|
|
|
|
dev->pci_isa_regs[(addr - 0x44)] = val;
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
case 0x77:
|
|
|
|
|
if (val & 0x10)
|
|
|
|
|
pclog("PIPC: Warning: Internal I/O APIC enabled.\n");
|
2020-10-09 23:07:56 -03:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x80: case 0x86: case 0x87:
|
|
|
|
|
dev->pci_isa_regs[addr] &= ~(val);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
dev->pci_isa_regs[addr] = val;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
} else if (func == 1) { /* IDE */
|
2020-10-11 11:45:06 -03:00
|
|
|
/* Read-only addresses and disable bit */
|
2020-10-09 23:07:56 -03:00
|
|
|
if ((addr < 4) || (addr == 5) || (addr == 8) || ((addr >= 0xa) && (addr < 0x0d)) ||
|
|
|
|
|
((addr >= 0x0e) && (addr < 0x10)) || ((addr >= 0x12) && (addr < 0x13)) ||
|
|
|
|
|
((addr >= 0x16) && (addr < 0x17)) || ((addr >= 0x1a) && (addr < 0x1b)) ||
|
|
|
|
|
((addr >= 0x1e) && (addr < 0x1f)) || ((addr >= 0x22) && (addr < 0x3c)) ||
|
|
|
|
|
((addr >= 0x3e) && (addr < 0x40)) || ((addr >= 0x55) && (addr < 0x60)) ||
|
|
|
|
|
((addr >= 0x62) && (addr < 0x68)) || ((addr >= 0x6a) && (addr < 0x70)) ||
|
|
|
|
|
(addr == 0x72) || (addr == 0x73) || (addr == 0x76) || (addr == 0x77) ||
|
|
|
|
|
(addr == 0x7a) || (addr == 0x7b) || (addr == 0x7e) || (addr == 0x7f) ||
|
2020-10-11 11:45:06 -03:00
|
|
|
((addr >= 0x84) && (addr < 0x88)) || (addr >= 0x8c) || (dev->pci_isa_regs[0x48] & 0x02))
|
2020-10-09 23:07:56 -03:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if ((dev->local <= VIA_PIPC_586B) && ((addr == 0x54) || (addr >= 0x70)))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
switch (addr) {
|
|
|
|
|
case 0x04:
|
|
|
|
|
dev->ide_regs[0x04] = val & 0x85;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
pipc_bus_master_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 0x07:
|
|
|
|
|
dev->ide_regs[0x07] &= ~(val & 0xf1);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x09:
|
|
|
|
|
dev->ide_regs[0x09] = (val & 0x05) | 0x8a;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
pipc_ide_irqs(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x10:
|
|
|
|
|
dev->ide_regs[0x10] = (val & 0xf8) | 1;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 0x11:
|
|
|
|
|
dev->ide_regs[0x11] = val;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x14:
|
|
|
|
|
dev->ide_regs[0x14] = (val & 0xfc) | 1;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 0x15:
|
|
|
|
|
dev->ide_regs[0x15] = val;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x18:
|
|
|
|
|
dev->ide_regs[0x18] = (val & 0xf8) | 1;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 0x19:
|
|
|
|
|
dev->ide_regs[0x19] = val;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x1c:
|
|
|
|
|
dev->ide_regs[0x1c] = (val & 0xfc) | 1;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 0x1d:
|
|
|
|
|
dev->ide_regs[0x1d] = val;
|
|
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x20:
|
|
|
|
|
dev->ide_regs[0x20] = (val & 0xf0) | 1;
|
|
|
|
|
pipc_bus_master_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 0x21:
|
|
|
|
|
dev->ide_regs[0x21] = val;
|
|
|
|
|
pipc_bus_master_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x3d:
|
|
|
|
|
dev->ide_regs[0x3d] = val & 0x01;
|
|
|
|
|
pipc_ide_irqs(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x40:
|
2020-10-14 16:33:30 -03:00
|
|
|
if (dev->local <= VIA_PIPC_586B) {
|
|
|
|
|
dev->ide_regs[0x40] = val & 0x03;
|
|
|
|
|
dev->ide_regs[0x40] |= 0x04;
|
|
|
|
|
} else
|
|
|
|
|
dev->ide_regs[0x40] = val & 0x0f;
|
2020-10-09 23:07:56 -03:00
|
|
|
pipc_ide_handlers(dev);
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-14 16:33:30 -03:00
|
|
|
case 0x50: case 0x52:
|
|
|
|
|
if (dev->local <= VIA_PIPC_586B)
|
|
|
|
|
dev->ide_regs[addr] = val & 0xe3;
|
|
|
|
|
else if (dev->local <= VIA_PIPC_596B)
|
|
|
|
|
dev->ide_regs[addr] = val & 0xeb;
|
|
|
|
|
else if (dev->local <= VIA_PIPC_686A)
|
|
|
|
|
dev->ide_regs[addr] = val & 0xef;
|
|
|
|
|
else
|
|
|
|
|
dev->ide_regs[addr] = val & 0xf7;
|
|
|
|
|
break;
|
|
|
|
|
case 0x51: case 0x53:
|
|
|
|
|
if (dev->local <= VIA_PIPC_596B)
|
|
|
|
|
dev->ide_regs[addr] = val & 0xe3;
|
|
|
|
|
else if (dev->local <= VIA_PIPC_686A)
|
|
|
|
|
dev->ide_regs[addr] = val & 0xe7;
|
|
|
|
|
else
|
|
|
|
|
dev->ide_regs[addr] = val & 0xf7;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x61: case 0x69:
|
|
|
|
|
dev->ide_regs[addr] = val & 0x0f;
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
default:
|
|
|
|
|
dev->ide_regs[addr] = val;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
} else if (func < pm_func) { /* USB */
|
|
|
|
|
/* Read-only addresses */
|
|
|
|
|
if ((addr < 4) || (addr == 5) || (addr == 6) || ((addr >= 8) && (addr < 0xd)) ||
|
|
|
|
|
((addr >= 0xe) && (addr < 0x20)) || ((addr >= 0x22) && (addr < 0x3c)) ||
|
|
|
|
|
((addr >= 0x3e) && (addr < 0x40)) || ((addr >= 0x42) && (addr < 0x44)) ||
|
|
|
|
|
((addr >= 0x46) && (addr < 0xc0)) || (addr >= 0xc2))
|
|
|
|
|
return;
|
|
|
|
|
|
2020-10-11 11:45:06 -03:00
|
|
|
/* Check disable bits for both controllers */
|
2020-10-11 12:09:56 -03:00
|
|
|
if ((func == 2) ? (dev->pci_isa_regs[0x48] & 0x04) : (dev->pci_isa_regs[0x85] & 0x10))
|
2020-10-10 20:34:42 -03:00
|
|
|
return;
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
switch (addr) {
|
|
|
|
|
case 0x04:
|
|
|
|
|
dev->usb_regs[func - 2][0x04] = val & 0x97;
|
|
|
|
|
usb_update_io_mapping(dev, func);
|
|
|
|
|
break;
|
|
|
|
|
case 0x07:
|
|
|
|
|
dev->usb_regs[func - 2][0x07] &= ~(val & 0x78);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x20:
|
|
|
|
|
dev->usb_regs[func - 2][0x20] = (val & ~0x1f) | 1;
|
|
|
|
|
usb_update_io_mapping(dev, func);
|
|
|
|
|
break;
|
|
|
|
|
case 0x21:
|
|
|
|
|
dev->usb_regs[func - 2][0x21] = val;
|
|
|
|
|
usb_update_io_mapping(dev, func);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
dev->usb_regs[func - 2][addr] = val;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
} else if (func == pm_func) { /* Power */
|
|
|
|
|
/* Read-only addresses */
|
2020-10-10 20:34:42 -03:00
|
|
|
if ((addr < 0xd) || ((addr >= 0xe) && (addr < 0x40)) || (addr == 0x43) ||
|
2020-10-09 23:07:56 -03:00
|
|
|
(addr == 0x4e) || (addr == 0x4f) || (addr == 0x56) || (addr == 0x57) || ((addr >= 0x5c) && (addr < 0x61)) ||
|
2020-10-10 17:02:33 -03:00
|
|
|
((addr >= 0x64) && (addr < 0x70)) || (addr == 0x72) || (addr == 0x73) || ((addr >= 0x75) && (addr < 0x80)) ||
|
2020-10-10 20:34:42 -03:00
|
|
|
(addr == 0x83) || ((addr >= 0x85) && (addr < 0x90)) || ((addr >= 0x92) && (addr < 0xd2)) || (addr >= 0xd7))
|
2020-10-09 23:07:56 -03:00
|
|
|
return;
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
if ((dev->local <= VIA_PIPC_586B) && ((addr == 0x48) || (addr == 0x4c) || (addr == 0x4d) || (addr >= 0x54)))
|
2020-10-10 17:02:33 -03:00
|
|
|
return;
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
if ((dev->local <= VIA_PIPC_596B) && ((addr >= 0x64) && (addr < (dev->local == VIA_PIPC_596A ? 0x80 : 0x85))))
|
2020-10-09 23:07:56 -03:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
switch (addr) {
|
2020-10-10 20:34:42 -03:00
|
|
|
case 0x41: case 0x48: case 0x49:
|
2020-10-09 23:07:56 -03:00
|
|
|
dev->power_regs[addr] = val;
|
2020-10-10 17:02:33 -03:00
|
|
|
c = (dev->power_regs[0x49] << 8);
|
|
|
|
|
if (dev->local >= VIA_PIPC_596A)
|
|
|
|
|
c |= (dev->power_regs[0x48] & 0x80);
|
2020-10-14 20:50:27 +02:00
|
|
|
acpi_set_timer32(dev->acpi, dev->power_regs[0x41] & 0x08);
|
2020-10-10 17:02:33 -03:00
|
|
|
acpi_update_io_mapping(dev->acpi, c, dev->power_regs[0x41] & 0x80);
|
2020-10-09 23:07:56 -03:00
|
|
|
break;
|
|
|
|
|
|
2020-10-13 19:27:48 -03:00
|
|
|
case 0x42:
|
|
|
|
|
dev->power_regs[addr] = val & 0x0f;
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
case 0x61: case 0x62: case 0x63:
|
|
|
|
|
dev->power_regs[(addr - 0x58)] = val;
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-13 19:27:48 -03:00
|
|
|
case 0x70: case 0x71: case 0x74:
|
|
|
|
|
dev->power_regs[addr] = val;
|
|
|
|
|
/* Forward hardware monitor-related registers to hwm_vt82c686.c */
|
|
|
|
|
if ((subdev = device_get_priv(&via_vt82c686_hwm_device)))
|
|
|
|
|
vt82c686_hwm_write(addr, val, subdev);
|
|
|
|
|
break;
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
case 0x80: case 0x81: case 0x84: /* 596(A) has the SMBus I/O base here instead. Enable bit is assumed. */
|
2020-10-10 17:02:33 -03:00
|
|
|
dev->power_regs[addr] = val;
|
2020-10-10 20:34:42 -03:00
|
|
|
smbus_piix4_remap(dev->smbus, (dev->power_regs[0x81] << 8) | (dev->power_regs[0x80] & 0xf0), dev->power_regs[0x84] & 0x01);
|
2020-10-10 17:02:33 -03:00
|
|
|
break;
|
|
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
case 0x90: case 0x91: case 0xd2:
|
2020-10-09 23:07:56 -03:00
|
|
|
dev->power_regs[addr] = val;
|
|
|
|
|
smbus_piix4_remap(dev->smbus, (dev->power_regs[0x91] << 8) | (dev->power_regs[0x90] & 0xf0), dev->power_regs[0xd2] & 0x01);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
dev->power_regs[addr] = val;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2020-10-10 20:34:42 -03:00
|
|
|
} else if (func <= pm_func + 2) { /* AC97 / MC97 */
|
|
|
|
|
/* Read-only addresses */
|
|
|
|
|
if ((addr < 0x4) || ((addr >= 0x6) && (addr < 0xd)) || ((addr >= 0xe) && (addr < 0x10)) || ((addr >= 0x1c) && (addr < 0x2c)) ||
|
|
|
|
|
((addr >= 0x30) && (addr < 0x34)) || ((addr >= 0x35) && (addr < 0x3c)) || ((addr >= 0x3d) && (addr < 0x41)) ||
|
|
|
|
|
((addr >= 0x45) && (addr < 0x4a)) || (addr >= 0x4c))
|
|
|
|
|
return;
|
|
|
|
|
|
2020-10-11 11:45:06 -03:00
|
|
|
/* Also check disable bits for both controllers */
|
2020-10-10 20:34:42 -03:00
|
|
|
if ((func == (pm_func + 1)) && ((addr == 0x44) || (dev->pci_isa_regs[0x85] & 0x04)))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if ((func == (pm_func + 2)) && ((addr == 0x4a) || (addr == 0x4b) || (dev->pci_isa_regs[0x85] & 0x08)))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
switch (addr) {
|
|
|
|
|
default:
|
|
|
|
|
dev->ac97_regs[func - pm_func - 1][addr] = val;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2020-10-09 23:07:56 -03:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void *
|
|
|
|
|
pipc_init(const device_t *info)
|
|
|
|
|
{
|
|
|
|
|
pipc_t *dev = (pipc_t *) malloc(sizeof(pipc_t));
|
|
|
|
|
memset(dev, 0, sizeof(pipc_t));
|
|
|
|
|
|
|
|
|
|
pipc_log("PIPC: init()\n");
|
|
|
|
|
|
|
|
|
|
dev->local = info->local;
|
|
|
|
|
dev->slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, pipc_read, pipc_write, dev);
|
|
|
|
|
|
|
|
|
|
dev->bm[0] = device_add_inst(&sff8038i_device, 1);
|
|
|
|
|
sff_set_slot(dev->bm[0], dev->slot);
|
|
|
|
|
sff_set_irq_mode(dev->bm[0], 0, 0);
|
|
|
|
|
sff_set_irq_mode(dev->bm[0], 1, 0);
|
|
|
|
|
sff_set_irq_pin(dev->bm[0], PCI_INTA);
|
|
|
|
|
|
|
|
|
|
dev->bm[1] = device_add_inst(&sff8038i_device, 2);
|
|
|
|
|
sff_set_slot(dev->bm[1], dev->slot);
|
|
|
|
|
sff_set_irq_mode(dev->bm[1], 0, 0);
|
|
|
|
|
sff_set_irq_mode(dev->bm[1], 1, 0);
|
|
|
|
|
sff_set_irq_pin(dev->bm[1], PCI_INTA);
|
|
|
|
|
|
|
|
|
|
dev->nvr = device_add(&via_nvr_device);
|
|
|
|
|
|
2020-10-11 12:28:16 -03:00
|
|
|
if (dev->local >= VIA_PIPC_596A)
|
|
|
|
|
dev->smbus = device_add(&piix4_smbus_device);
|
2020-10-09 23:07:56 -03:00
|
|
|
|
2020-10-10 20:34:42 -03:00
|
|
|
if (dev->local >= VIA_PIPC_596A)
|
|
|
|
|
dev->acpi = device_add(&acpi_via_596b_device);
|
2020-10-11 12:28:16 -03:00
|
|
|
else if (dev->local >= VIA_PIPC_586B)
|
2020-10-10 20:34:42 -03:00
|
|
|
dev->acpi = device_add(&acpi_via_device);
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
dev->usb[0] = device_add_inst(&usb_device, 1);
|
|
|
|
|
if (dev->local >= VIA_PIPC_686A)
|
|
|
|
|
dev->usb[1] = device_add_inst(&usb_device, 2);
|
|
|
|
|
|
|
|
|
|
pipc_reset_hard(dev);
|
|
|
|
|
|
|
|
|
|
device_add(&port_92_pci_device);
|
|
|
|
|
|
|
|
|
|
dma_alias_set();
|
|
|
|
|
|
2020-10-10 17:02:33 -03:00
|
|
|
if (dev->local <= VIA_PIPC_586B) {
|
|
|
|
|
pci_enable_mirq(0);
|
|
|
|
|
pci_enable_mirq(1);
|
|
|
|
|
if (dev->local == VIA_PIPC_586B)
|
|
|
|
|
pci_enable_mirq(2);
|
|
|
|
|
}
|
2020-10-09 23:07:56 -03:00
|
|
|
|
2020-10-14 20:50:27 +02:00
|
|
|
if (dev->acpi) {
|
|
|
|
|
acpi_set_slot(dev->acpi, dev->slot);
|
|
|
|
|
acpi_set_nvr(dev->acpi, dev->nvr);
|
|
|
|
|
|
2020-10-11 12:28:16 -03:00
|
|
|
acpi_init_gporeg(dev->acpi, 0xff, 0xbf, 0xff, 0x7f);
|
2020-10-14 20:50:27 +02:00
|
|
|
}
|
2020-10-10 20:34:42 -03:00
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
return dev;
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-13 19:27:48 -03:00
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
static void
|
|
|
|
|
pipc_close(void *p)
|
|
|
|
|
{
|
2020-10-13 19:27:48 -03:00
|
|
|
pipc_t *dev = (pipc_t *) p;
|
2020-10-09 23:07:56 -03:00
|
|
|
|
|
|
|
|
pipc_log("PIPC: close()\n");
|
|
|
|
|
|
2020-10-13 19:27:48 -03:00
|
|
|
free(dev);
|
2020-10-09 23:07:56 -03:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
const device_t via_vt82c586b_device =
|
|
|
|
|
{
|
|
|
|
|
"VIA VT82C586B",
|
|
|
|
|
DEVICE_PCI,
|
|
|
|
|
VIA_PIPC_586B,
|
|
|
|
|
pipc_init,
|
|
|
|
|
pipc_close,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL
|
|
|
|
|
};
|
|
|
|
|
|
2020-10-10 17:02:33 -03:00
|
|
|
const device_t via_vt82c596_device =
|
|
|
|
|
{
|
|
|
|
|
"VIA VT82C596(A)",
|
|
|
|
|
DEVICE_PCI,
|
|
|
|
|
VIA_PIPC_596A,
|
|
|
|
|
pipc_init,
|
|
|
|
|
pipc_close,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
2020-10-09 23:07:56 -03:00
|
|
|
const device_t via_vt82c596b_device =
|
|
|
|
|
{
|
|
|
|
|
"VIA VT82C596B",
|
|
|
|
|
DEVICE_PCI,
|
|
|
|
|
VIA_PIPC_596B,
|
|
|
|
|
pipc_init,
|
|
|
|
|
pipc_close,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL
|
|
|
|
|
};
|
2020-10-13 19:27:48 -03:00
|
|
|
|
|
|
|
|
|
|
|
|
|
const device_t via_vt82c686a_device =
|
|
|
|
|
{
|
|
|
|
|
"VIA VT82C686A",
|
|
|
|
|
DEVICE_PCI,
|
|
|
|
|
VIA_PIPC_686A,
|
|
|
|
|
pipc_init,
|
|
|
|
|
pipc_close,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
const device_t via_vt82c686b_device =
|
|
|
|
|
{
|
|
|
|
|
"VIA VT82C686B",
|
|
|
|
|
DEVICE_PCI,
|
|
|
|
|
VIA_PIPC_686B,
|
|
|
|
|
pipc_init,
|
|
|
|
|
pipc_close,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
NULL
|
|
|
|
|
};
|
