2021-01-17 14:39:45 +01:00
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/*
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2023-01-06 15:36:05 -05:00
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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2021-01-17 14:39:45 +01:00
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*
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2023-01-06 15:36:05 -05:00
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* This file is part of the 86Box distribution.
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2021-01-17 14:39:45 +01:00
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*
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2023-01-06 15:36:05 -05:00
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* Emulation of the NatSemi PC87310 Super I/O chip.
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2021-01-17 14:39:45 +01:00
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*
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*
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*
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2023-01-06 15:36:05 -05:00
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* Tiseno100
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* EngiNerd <webmaster.crrc@yahoo.it>
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2022-02-20 02:26:27 -05:00
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*
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2023-01-06 15:36:05 -05:00
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* Copyright 2020 Miran Grca.
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* Copyright 2020 Tiseno100
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* Copyright 2021 EngiNerd.
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2021-01-17 14:39:45 +01:00
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/lpt.h>
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#include <86box/mem.h>
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#include <86box/nvr.h>
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#include <86box/pci.h>
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#include <86box/rom.h>
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#include <86box/serial.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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#define HAS_IDE_FUNCTIONALITY dev->ide_function
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#ifdef ENABLE_PC87310_LOG
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int pc87310_do_log = ENABLE_PC87310_LOG;
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2022-10-27 11:20:31 -04:00
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2021-01-17 14:39:45 +01:00
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static void
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pc87310_log(const char *fmt, ...)
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{
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va_list ap;
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2022-09-18 17:17:00 -04:00
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if (pc87310_do_log) {
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2021-01-17 14:39:45 +01:00
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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2022-09-18 17:17:00 -04:00
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# define pc87310_log(fmt, ...)
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2021-01-17 14:39:45 +01:00
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#endif
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typedef struct {
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uint8_t tries, ide_function,
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2022-09-18 17:17:00 -04:00
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reg;
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fdc_t *fdc;
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2021-01-17 14:39:45 +01:00
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serial_t *uart[2];
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} pc87310_t;
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static void
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lpt1_handler(pc87310_t *dev)
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{
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2022-09-18 17:17:00 -04:00
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int temp;
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2022-03-09 21:57:51 -05:00
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uint16_t lpt_port = LPT1_ADDR;
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2022-09-18 17:17:00 -04:00
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uint8_t lpt_irq = LPT1_IRQ;
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2021-01-17 14:39:45 +01:00
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/* bits 0-1:
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* 00 378h
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* 01 3bch
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* 10 278h
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* 11 disabled
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*/
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temp = dev->reg & 3;
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switch (temp) {
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2022-09-18 17:17:00 -04:00
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case 0:
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lpt_port = LPT1_ADDR;
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break;
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case 1:
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lpt_port = LPT_MDA_ADDR;
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break;
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case 2:
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lpt_port = LPT2_ADDR;
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break;
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case 3:
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lpt_port = 0x000;
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lpt_irq = 0xff;
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break;
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2021-01-17 14:39:45 +01:00
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}
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if (lpt_port)
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2022-09-18 17:17:00 -04:00
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lpt1_init(lpt_port);
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2021-01-17 14:39:45 +01:00
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lpt1_irq(lpt_irq);
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}
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static void
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serial_handler(pc87310_t *dev, int uart)
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{
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int temp;
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/* bit 2: disable serial port 1
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* bit 3: disable serial port 2
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* bit 4: swap serial ports
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*/
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temp = (dev->reg >> (2 + uart)) & 1;
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2022-09-18 17:17:00 -04:00
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// current serial port is enabled
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if (!temp) {
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// configure serial port as COM2
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2021-01-17 14:39:45 +01:00
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if (((dev->reg >> 4) & 1) ^ uart)
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2022-03-09 21:57:51 -05:00
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serial_setup(dev->uart[uart], COM2_ADDR, COM2_IRQ);
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2021-01-17 14:39:45 +01:00
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// configure serial port as COM1
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else
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2022-03-09 21:57:51 -05:00
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serial_setup(dev->uart[uart], COM1_ADDR, COM1_IRQ);
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2021-01-17 14:39:45 +01:00
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}
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}
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static void
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pc87310_write(uint16_t port, uint8_t val, void *priv)
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{
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pc87310_t *dev = (pc87310_t *) priv;
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2022-09-18 17:17:00 -04:00
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uint8_t valxor;
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2021-01-17 14:39:45 +01:00
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// second write to config register
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2022-09-18 17:17:00 -04:00
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if (dev->tries) {
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valxor = val ^ dev->reg;
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dev->tries = 0;
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dev->reg = val;
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// first write to config register
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2021-01-17 14:39:45 +01:00
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} else {
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2022-09-18 17:17:00 -04:00
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dev->tries++;
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return;
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}
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2021-01-17 14:39:45 +01:00
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pc87310_log("SIO: written %01X\n", val);
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2022-02-20 02:26:27 -05:00
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2021-01-17 14:39:45 +01:00
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/* reconfigure parallel port */
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if (valxor & 0x03) {
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lpt1_remove();
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/* bits 0-1: 11 disable parallel port */
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if (!((val & 1) && (val & 2)))
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lpt1_handler(dev);
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}
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/* reconfigure serial ports */
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if (valxor & 0x1c) {
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serial_remove(dev->uart[0]);
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serial_remove(dev->uart[1]);
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/* bit 2: 1 disable first serial port */
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if (!(val & 4))
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serial_handler(dev, 0);
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/* bit 3: 1 disable second serial port */
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if (!(val & 8))
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serial_handler(dev, 1);
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}
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/* reconfigure IDE controller */
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if (valxor & 0x20) {
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pc87310_log("SIO: HDC disabled\n");
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ide_pri_disable();
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/* bit 5: 1 disable ide controller */
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if (!(val & 0x20) && HAS_IDE_FUNCTIONALITY) {
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pc87310_log("SIO: HDC enabled\n");
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ide_set_base(0, 0x1f0);
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ide_set_side(0, 0x3f6);
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ide_pri_enable();
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}
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}
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/* reconfigure floppy disk controller */
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if (valxor & 0x40) {
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pc87310_log("SIO: FDC disabled\n");
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fdc_remove(dev->fdc);
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/* bit 6: 1 disable fdc */
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if (!(val & 0x40)) {
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pc87310_log("SIO: FDC enabled\n");
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2022-03-11 22:04:57 -05:00
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fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
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2021-01-17 14:39:45 +01:00
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}
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}
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return;
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}
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uint8_t
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pc87310_read(uint16_t port, void *priv)
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{
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pc87310_t *dev = (pc87310_t *) priv;
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2022-09-18 17:17:00 -04:00
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uint8_t ret = 0xff;
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2021-01-17 14:39:45 +01:00
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dev->tries = 0;
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ret = dev->reg;
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pc87310_log("SIO: read %01X\n", ret);
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2022-02-20 02:26:27 -05:00
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2021-01-17 14:39:45 +01:00
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return ret;
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}
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void
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pc87310_reset(pc87310_t *dev)
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{
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2022-09-18 17:17:00 -04:00
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dev->reg = 0x0;
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2021-01-17 14:39:45 +01:00
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dev->tries = 0;
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/*
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2022-09-18 17:17:00 -04:00
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0 = 360 rpm @ 500 kbps for 3.5"
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2023-01-06 15:36:29 -05:00
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1 = Default, 300 rpm @ 500, 300, 250, 1000 kbps for 3.5"
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2021-01-17 14:39:45 +01:00
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*/
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lpt1_remove();
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lpt1_handler(dev);
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serial_remove(dev->uart[0]);
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serial_remove(dev->uart[1]);
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serial_handler(dev, 0);
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serial_handler(dev, 1);
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fdc_reset(dev->fdc);
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2022-09-18 17:17:00 -04:00
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// ide_pri_enable();
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2021-01-17 14:39:45 +01:00
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}
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static void
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pc87310_close(void *priv)
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{
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pc87310_t *dev = (pc87310_t *) priv;
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free(dev);
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}
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static void *
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pc87310_init(const device_t *info)
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{
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pc87310_t *dev = (pc87310_t *) malloc(sizeof(pc87310_t));
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memset(dev, 0, sizeof(pc87310_t));
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/* Avoid conflicting with machines that make no use of the PC87310 Internal IDE */
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HAS_IDE_FUNCTIONALITY = info->local;
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dev->fdc = device_add(&fdc_at_nsc_device);
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2022-02-20 02:26:27 -05:00
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2021-01-17 14:39:45 +01:00
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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if (HAS_IDE_FUNCTIONALITY)
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device_add(&ide_isa_device);
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pc87310_reset(dev);
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io_sethandler(0x3f3, 0x0001,
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2022-09-18 17:17:00 -04:00
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pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev);
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2021-01-17 14:39:45 +01:00
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return dev;
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}
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const device_t pc87310_device = {
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2022-09-18 17:17:00 -04:00
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.name = "National Semiconductor PC87310 Super I/O",
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2022-03-13 09:57:57 -04:00
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.internal_name = "pc87310",
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2022-09-18 17:17:00 -04:00
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.flags = 0,
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.local = 0,
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.init = pc87310_init,
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.close = pc87310_close,
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.reset = NULL,
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2022-03-13 09:57:57 -04:00
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{ .available = NULL },
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.speed_changed = NULL,
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2022-09-18 17:17:00 -04:00
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.force_redraw = NULL,
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.config = NULL
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2021-01-17 14:39:45 +01:00
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};
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const device_t pc87310_ide_device = {
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2022-09-18 17:17:00 -04:00
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.name = "National Semiconductor PC87310 Super I/O with IDE functionality",
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2022-03-13 09:57:57 -04:00
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.internal_name = "pc87310_ide",
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2022-09-18 17:17:00 -04:00
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.flags = 0,
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.local = 1,
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.init = pc87310_init,
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.close = pc87310_close,
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.reset = NULL,
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2022-03-13 09:57:57 -04:00
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{ .available = NULL },
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.speed_changed = NULL,
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2022-09-18 17:17:00 -04:00
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.force_redraw = NULL,
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.config = NULL
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2022-02-18 21:38:51 -05:00
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};
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