2022-09-09 02:28:51 +06:00
|
|
|
/*
|
|
|
|
|
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
|
|
|
|
* running old operating systems and software designed for IBM
|
|
|
|
|
* PC systems and compatibles from 1981 through fairly recent
|
|
|
|
|
* system designs based on the PCI bus.
|
|
|
|
|
*
|
|
|
|
|
* This file is part of the 86Box distribution.
|
|
|
|
|
*
|
|
|
|
|
* 8080 CPU emulation.
|
|
|
|
|
*
|
|
|
|
|
* Authors: Cacodemon345
|
|
|
|
|
*
|
|
|
|
|
* Copyright 2022 Cacodemon345
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#include <stdint.h>
|
2022-09-10 14:50:50 +06:00
|
|
|
#include <stdlib.h>
|
|
|
|
|
#include "cpu.h"
|
|
|
|
|
#include <86box/timer.h>
|
2022-09-09 02:28:51 +06:00
|
|
|
#include <86box/i8080.h>
|
2022-09-10 14:50:50 +06:00
|
|
|
#include <86box/mem.h>
|
|
|
|
|
|
|
|
|
|
static int prefetching = 1, completed = 1;
|
|
|
|
|
static int in_rep = 0, repeating = 0, rep_c_flag = 0;
|
|
|
|
|
static int oldc, clear_lock = 0;
|
|
|
|
|
static int refresh = 0, cycdiff;
|
|
|
|
|
|
2022-09-11 11:47:13 +06:00
|
|
|
static uint32_t cpu_src = 0, cpu_dest = 0;
|
|
|
|
|
static uint32_t cpu_data = 0;
|
|
|
|
|
|
2022-09-10 14:50:50 +06:00
|
|
|
static void
|
|
|
|
|
clock_start(void)
|
|
|
|
|
{
|
|
|
|
|
cycdiff = cycles;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
clock_end(void)
|
|
|
|
|
{
|
|
|
|
|
int diff = cycdiff - cycles;
|
|
|
|
|
|
|
|
|
|
/* On 808x systems, clock speed is usually crystal frequency divided by an integer. */
|
|
|
|
|
tsc += (uint64_t)diff * ((uint64_t)xt_cpu_multi >> 32ULL); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */
|
|
|
|
|
if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
|
|
|
|
|
timer_process();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
2022-10-19 19:20:49 -04:00
|
|
|
8080_wait(int c, int bus)
|
2022-09-10 14:50:50 +06:00
|
|
|
{
|
|
|
|
|
cycles -= c;
|
|
|
|
|
if (bus < 2) {
|
|
|
|
|
clock_end();
|
|
|
|
|
clock_start();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static uint8_t
|
|
|
|
|
readmemb(uint32_t a)
|
|
|
|
|
{
|
|
|
|
|
uint8_t ret;
|
|
|
|
|
|
2022-10-19 19:20:49 -04:00
|
|
|
8080_wait(4, 1);
|
2022-09-10 14:50:50 +06:00
|
|
|
ret = read_mem_b(a);
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static uint8_t
|
|
|
|
|
ins_fetch(i8080* cpu)
|
|
|
|
|
{
|
2022-09-11 11:47:13 +06:00
|
|
|
uint8_t ret = cpu->readmembyte(cpu->pmembase + cpu->pc);
|
2022-09-10 14:50:50 +06:00
|
|
|
|
|
|
|
|
cpu->pc++;
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
transfer_from_808x(i8080* cpu)
|
|
|
|
|
{
|
|
|
|
|
cpu->hl = BX;
|
|
|
|
|
cpu->bc = CX;
|
|
|
|
|
cpu->de = DX;
|
|
|
|
|
cpu->a = AL;
|
|
|
|
|
cpu->flags = cpu_state.flags & 0xFF;
|
|
|
|
|
cpu->sp = BP;
|
|
|
|
|
cpu->pc = cpu_state.pc;
|
|
|
|
|
cpu->oldpc = cpu_state.oldpc;
|
|
|
|
|
cpu->pmembase = cs;
|
|
|
|
|
cpu->dmembase = ds;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
transfer_to_808x(i8080* cpu)
|
|
|
|
|
{
|
|
|
|
|
BX = cpu->hl;
|
|
|
|
|
CX = cpu->bc;
|
|
|
|
|
DX = cpu->de;
|
|
|
|
|
AL = cpu->a;
|
|
|
|
|
cpu_state.flags &= 0xFF00;
|
|
|
|
|
cpu_state.flags |= cpu->flags & 0xFF;
|
|
|
|
|
BP = cpu->sp;
|
|
|
|
|
cpu_state.pc = cpu->pc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint8_t
|
|
|
|
|
getreg_i8080(i8080 *cpu, uint8_t reg)
|
|
|
|
|
{
|
|
|
|
|
uint8_t ret = 0xFF;
|
|
|
|
|
switch(reg)
|
|
|
|
|
{
|
|
|
|
|
case 0x0: ret = cpu->b; break;
|
|
|
|
|
case 0x1: ret = cpu->c; break;
|
|
|
|
|
case 0x2: ret = cpu->d; break;
|
|
|
|
|
case 0x3: ret = cpu->e; break;
|
|
|
|
|
case 0x4: ret = cpu->h; break;
|
|
|
|
|
case 0x5: ret = cpu->l; break;
|
2022-09-11 11:47:13 +06:00
|
|
|
case 0x6: ret = cpu->readmembyte(cpu->dmembase + cpu->sp); break;
|
2022-09-10 14:50:50 +06:00
|
|
|
case 0x7: ret = cpu->a; break;
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-11 11:47:13 +06:00
|
|
|
uint8_t
|
|
|
|
|
getreg_i8080_emu(i8080 *cpu, uint8_t reg)
|
|
|
|
|
{
|
|
|
|
|
uint8_t ret = 0xFF;
|
|
|
|
|
switch(reg)
|
|
|
|
|
{
|
|
|
|
|
case 0x0: ret = CH; break;
|
|
|
|
|
case 0x1: ret = CL; break;
|
|
|
|
|
case 0x2: ret = DH; break;
|
|
|
|
|
case 0x3: ret = DL; break;
|
|
|
|
|
case 0x4: ret = BH; break;
|
|
|
|
|
case 0x5: ret = BL; break;
|
|
|
|
|
case 0x6: ret = cpu->readmembyte(cpu->dmembase + BP); break;
|
|
|
|
|
case 0x7: ret = AL; break;
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
setreg_i8080_emu(i8080 *cpu, uint8_t reg, uint8_t val)
|
|
|
|
|
{
|
|
|
|
|
switch(reg)
|
|
|
|
|
{
|
|
|
|
|
case 0x0: CH = val; break;
|
|
|
|
|
case 0x1: CL = val; break;
|
|
|
|
|
case 0x2: DH = val; break;
|
|
|
|
|
case 0x3: DL = val; break;
|
|
|
|
|
case 0x4: BH = val; break;
|
|
|
|
|
case 0x5: BL = val; break;
|
|
|
|
|
case 0x6: cpu->writemembyte(cpu->dmembase + BP, val); break;
|
|
|
|
|
case 0x7: AL = val; break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
setreg_i8080(i8080 *cpu, uint8_t reg, uint8_t val)
|
|
|
|
|
{
|
|
|
|
|
switch(reg)
|
|
|
|
|
{
|
|
|
|
|
case 0x0: cpu->b = val; break;
|
|
|
|
|
case 0x1: cpu->c = val; break;
|
|
|
|
|
case 0x2: cpu->d = val; break;
|
|
|
|
|
case 0x3: cpu->e = val; break;
|
|
|
|
|
case 0x4: cpu->h = val; break;
|
|
|
|
|
case 0x5: cpu->l = val; break;
|
|
|
|
|
case 0x6: cpu->writemembyte(cpu->dmembase + cpu->sp, val); break;
|
|
|
|
|
case 0x7: cpu->a = val; break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-10 14:50:50 +06:00
|
|
|
void
|
2022-09-11 11:47:13 +06:00
|
|
|
interpret_exec8080(i8080* cpu, uint8_t opcode)
|
2022-09-10 14:50:50 +06:00
|
|
|
{
|
|
|
|
|
switch (opcode) {
|
|
|
|
|
case 0x00:
|
|
|
|
|
{
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2022-09-09 02:28:51 +06:00
|
|
|
|
|
|
|
|
/* Actually implement i8080 emulation. */
|
2022-09-10 14:50:50 +06:00
|
|
|
void
|
|
|
|
|
exec8080(i8080* cpu, int cycs)
|
|
|
|
|
{
|
|
|
|
|
uint8_t temp = 0, temp2;
|
|
|
|
|
uint8_t old_af;
|
|
|
|
|
uint8_t handled = 0;
|
|
|
|
|
uint16_t addr, tempw;
|
|
|
|
|
uint16_t new_ip;
|
|
|
|
|
int bits;
|
|
|
|
|
|
|
|
|
|
cycles += cycs;
|
|
|
|
|
|
|
|
|
|
while (cycles > 0) {
|
2022-09-11 11:47:13 +06:00
|
|
|
cpu->startclock();
|
2022-09-10 14:50:50 +06:00
|
|
|
|
|
|
|
|
if (!repeating) {
|
|
|
|
|
cpu->oldpc = cpu->pc;
|
2022-09-11 11:47:13 +06:00
|
|
|
opcode = cpu->fetchinstruction(cpu);
|
2022-09-10 14:50:50 +06:00
|
|
|
oldc = cpu->flags & C_FLAG_I8080;
|
2022-10-19 19:20:49 -04:00
|
|
|
8080_wait(1, 0);
|
2022-09-10 14:50:50 +06:00
|
|
|
}
|
|
|
|
|
completed = 1;
|
|
|
|
|
if (completed) {
|
|
|
|
|
repeating = 0;
|
|
|
|
|
in_rep = 0;
|
|
|
|
|
rep_c_flag = 0;
|
2022-09-11 11:47:13 +06:00
|
|
|
cpu->endclock();
|
|
|
|
|
if (cpu->checkinterrupts) cpu->checkinterrupts();
|
2022-09-10 14:50:50 +06:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|