2019-10-11 19:59:05 +02:00
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/*
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2022-11-05 21:44:11 -04:00
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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2019-10-11 19:59:05 +02:00
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*
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2022-11-05 21:44:11 -04:00
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* This file is part of the 86Box distribution.
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2019-10-11 19:59:05 +02:00
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*
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2022-11-05 21:44:11 -04:00
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* NS8250/16450/16550 UART emulation.
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2019-10-11 19:59:05 +02:00
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*
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2022-11-05 21:44:11 -04:00
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* Now passes all the AMIDIAG tests.
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2019-10-31 05:20:40 +01:00
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*
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2020-03-25 00:46:02 +02:00
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*
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2019-10-11 19:59:05 +02:00
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*
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2023-01-06 15:36:29 -05:00
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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2022-11-13 16:37:58 -05:00
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* Miran Grca, <mgrca8@gmail.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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2019-10-11 19:59:05 +02:00
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*
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2022-11-13 16:37:58 -05:00
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* Copyright 2008-2020 Sarah Walker.
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* Copyright 2016-2020 Miran Grca.
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* Copyright 2017-2020 Fred N. van Kempen.
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2019-10-11 19:59:05 +02:00
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*/
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2018-05-21 19:04:05 +02:00
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#include <stdarg.h>
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2017-09-25 04:31:20 -04:00
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#include <stdio.h>
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#include <stdint.h>
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2017-09-04 01:52:29 -04:00
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#include <stdlib.h>
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2018-11-08 19:21:55 +01:00
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#include <string.h>
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2017-09-25 04:31:20 -04:00
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#include <wchar.h>
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2018-05-21 19:04:05 +02:00
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#define HAVE_STDARG_H
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2020-03-29 14:24:42 +02:00
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/timer.h>
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#include <86box/machine.h>
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#include <86box/io.h>
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#include <86box/pic.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/serial.h>
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#include <86box/mouse.h>
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2017-09-25 04:31:20 -04:00
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2022-09-18 17:13:28 -04:00
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serial_port_t com_ports[SERIAL_MAX];
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2022-07-28 16:50:49 -04:00
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2022-07-27 17:00:34 -04:00
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enum {
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SERIAL_INT_LSR = 1,
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SERIAL_INT_RECEIVE = 2,
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2018-11-08 19:21:55 +01:00
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SERIAL_INT_TRANSMIT = 4,
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2022-07-27 17:00:34 -04:00
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SERIAL_INT_MSR = 8,
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SERIAL_INT_TIMEOUT = 16
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2017-06-17 03:36:38 -04:00
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};
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2022-07-27 17:00:34 -04:00
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static int next_inst = 0;
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static serial_device_t serial_devices[SERIAL_MAX];
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2017-06-17 03:36:38 -04:00
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2022-11-19 08:49:04 -05:00
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// #define ENABLE_SERIAL_CONSOLE 1
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2022-11-13 16:38:48 -05:00
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2018-05-21 19:04:05 +02:00
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#ifdef ENABLE_SERIAL_LOG
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int serial_do_log = ENABLE_SERIAL_LOG;
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static void
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2018-10-19 00:39:32 +02:00
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serial_log(const char *fmt, ...)
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2018-05-21 19:04:05 +02:00
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{
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va_list ap;
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if (serial_do_log) {
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2022-07-27 17:00:34 -04:00
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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2018-05-21 19:04:05 +02:00
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}
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}
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2018-10-19 00:39:32 +02:00
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#else
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2022-07-27 17:00:34 -04:00
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# define serial_log(fmt, ...)
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2018-10-19 00:39:32 +02:00
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#endif
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2018-05-21 19:04:05 +02:00
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2018-11-08 19:21:55 +01:00
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void
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serial_reset_port(serial_t *dev)
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2017-06-17 03:36:38 -04:00
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{
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2022-07-27 17:00:34 -04:00
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dev->lsr = 0x60; /* Mark that both THR/FIFO and TXSR are empty. */
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2018-11-08 19:21:55 +01:00
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dev->iir = dev->ier = dev->lcr = dev->fcr = 0;
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2022-07-27 17:00:34 -04:00
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dev->fifo_enabled = 0;
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2018-11-08 19:21:55 +01:00
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dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
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2023-02-15 16:00:46 +01:00
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dev->xmit_fifo_end = dev->rcvr_fifo_end = 0;
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2022-07-27 17:00:34 -04:00
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dev->rcvr_fifo_full = 0;
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dev->baud_cycles = 0;
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2023-02-15 16:00:46 +01:00
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dev->out_new = 0xffff;
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2019-02-06 03:34:39 +01:00
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memset(dev->xmit_fifo, 0, 16);
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2023-02-15 16:00:46 +01:00
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memset(dev->rcvr_fifo, 0, 16);
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2017-06-17 03:36:38 -04:00
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}
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2019-02-06 03:34:39 +01:00
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void
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serial_transmit_period(serial_t *dev)
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{
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2019-10-11 19:59:05 +02:00
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double ddlab;
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2019-02-06 03:34:39 +01:00
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2023-02-15 16:00:46 +01:00
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if (dev->dlab != 0x0000)
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ddlab = (double) dev->dlab;
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else
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ddlab = 65536.0;
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2019-10-11 19:59:05 +02:00
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2019-02-06 03:34:39 +01:00
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/* Bit period based on DLAB. */
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2020-02-29 19:12:23 +01:00
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dev->transmit_period = (16000000.0 * ddlab) / dev->clock_src;
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2023-02-14 20:37:58 -05:00
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if (dev->sd && dev->sd->transmit_period_callback)
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dev->sd->transmit_period_callback(dev, dev->sd->priv, dev->transmit_period);
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2019-02-06 03:34:39 +01:00
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}
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2018-11-08 19:21:55 +01:00
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void
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serial_update_ints(serial_t *dev)
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2018-01-13 22:56:13 +01:00
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{
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2018-11-08 19:21:55 +01:00
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int stat = 0;
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dev->iir = 1;
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if ((dev->ier & 4) && (dev->int_status & SERIAL_INT_LSR)) {
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2022-07-27 17:00:34 -04:00
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/* Line status interrupt */
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stat = 1;
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dev->iir = 6;
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2019-10-31 05:20:40 +01:00
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} else if ((dev->ier & 1) && (dev->int_status & SERIAL_INT_TIMEOUT)) {
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2022-07-27 17:00:34 -04:00
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/* Received data available */
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stat = 1;
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dev->iir = 0x0c;
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2018-11-08 19:21:55 +01:00
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} else if ((dev->ier & 1) && (dev->int_status & SERIAL_INT_RECEIVE)) {
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2022-07-27 17:00:34 -04:00
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/* Received data available */
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stat = 1;
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dev->iir = 4;
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2018-11-08 19:21:55 +01:00
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} else if ((dev->ier & 2) && (dev->int_status & SERIAL_INT_TRANSMIT)) {
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2022-07-27 17:00:34 -04:00
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/* Transmit data empty */
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stat = 1;
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dev->iir = 2;
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2018-11-08 19:21:55 +01:00
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} else if ((dev->ier & 8) && (dev->int_status & SERIAL_INT_MSR)) {
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2022-07-27 17:00:34 -04:00
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/* Modem status interrupt */
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stat = 1;
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dev->iir = 0;
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2018-11-08 19:21:55 +01:00
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}
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2021-09-07 18:25:50 +02:00
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if (stat && (dev->irq != 0xff) && ((dev->mctrl & 8) || (dev->type == SERIAL_8250_PCJR))) {
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2022-07-27 17:00:34 -04:00
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if (dev->type >= SERIAL_16450)
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picintlevel(1 << dev->irq);
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else
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picint(1 << dev->irq);
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2018-11-08 19:21:55 +01:00
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} else
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2022-07-27 17:00:34 -04:00
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picintc(1 << dev->irq);
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2018-01-13 22:56:13 +01:00
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}
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2019-10-31 05:20:40 +01:00
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static void
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serial_clear_timeout(serial_t *dev)
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{
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/* Disable timeout timer and clear timeout condition. */
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timer_disable(&dev->timeout_timer);
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dev->int_status &= ~SERIAL_INT_TIMEOUT;
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serial_update_ints(dev);
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}
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static void
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2023-02-15 16:00:46 +01:00
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serial_receive_timer(void *priv)
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2017-06-17 03:36:38 -04:00
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{
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2023-02-28 23:24:58 -05:00
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serial_t *dev = (serial_t *) priv;
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2023-02-15 16:00:46 +01:00
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2023-06-26 12:47:04 -04:00
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#if 0
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serial_log("serial_receive_timer()\n");
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#endif
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2023-02-15 16:00:46 +01:00
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timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period);
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2018-11-08 19:21:55 +01:00
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2021-12-19 21:21:34 -05:00
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if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
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2022-07-27 17:00:34 -04:00
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/* FIFO mode. */
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2023-02-15 16:00:46 +01:00
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if (dev->out_new != 0xffff) {
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/* We have received a byte into the RSR. */
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/* Clear FIFO timeout. */
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serial_clear_timeout(dev);
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if (dev->rcvr_fifo_full) {
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/* Overrun - just discard the byte in the RSR. */
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serial_log("FIFO overrun\n");
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dev->lsr |= 0x02;
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} else {
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/* We can input data into the FIFO. */
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dev->rcvr_fifo[dev->rcvr_fifo_end] = (uint8_t) (dev->out_new & 0xff);
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2023-06-26 12:47:04 -04:00
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#if 0
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dev->rcvr_fifo_end = (dev->rcvr_fifo_end + 1) & 0x0f;
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#endif
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2023-02-16 20:10:05 +01:00
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/* Do not wrap around, makes sure it still triggers the interrupt
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at 16 bytes. */
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dev->rcvr_fifo_end++;
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2023-02-15 16:00:46 +01:00
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2023-02-16 00:15:04 +01:00
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serial_log("To FIFO: %02X (%i, %i, %i)\n", (uint8_t) (dev->out_new & 0xff),
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abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos),
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dev->rcvr_fifo_end, dev->rcvr_fifo_pos);
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2023-02-15 16:00:46 +01:00
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dev->out_new = 0xffff;
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if (abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos) >= dev->rcvr_fifo_len) {
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/* We have >= trigger level bytes, raise Data Ready interrupt. */
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serial_log("We have >= %i bytes in the FIFO, data ready!\n", dev->rcvr_fifo_len);
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dev->lsr |= 0x01;
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dev->int_status |= SERIAL_INT_RECEIVE;
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serial_update_ints(dev);
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}
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2023-02-16 20:10:05 +01:00
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/* Now wrap around. */
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dev->rcvr_fifo_end &= 0x0f;
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2023-02-16 00:15:04 +01:00
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if (dev->rcvr_fifo_end == dev->rcvr_fifo_pos)
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dev->rcvr_fifo_full = 1;
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2023-02-15 16:00:46 +01:00
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timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
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}
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2022-07-27 17:00:34 -04:00
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}
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2023-02-15 16:00:46 +01:00
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}
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serial_update_ints(dev);
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}
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static void
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write_fifo(serial_t *dev, uint8_t dat)
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{
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2023-02-16 02:43:06 +01:00
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serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat,
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(dev->type >= SERIAL_16550) && dev->fifo_enabled,
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2023-02-28 23:24:58 -05:00
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((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos % dev->rcvr_fifo_len) : 0);
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2023-02-15 16:00:46 +01:00
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if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
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/* FIFO mode. */
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/* This is the first phase, we are sending the data to the RSR (Receiver Shift
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Register), from where it's going to get dispatched to the FIFO. */
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2018-11-08 19:21:55 +01:00
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} else {
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2022-07-27 17:00:34 -04:00
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/* Non-FIFO mode. */
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2023-02-15 16:00:46 +01:00
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2022-07-27 17:00:34 -04:00
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/* Indicate overrun. */
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if (dev->lsr & 0x01)
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dev->lsr |= 0x02;
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2023-02-15 16:00:46 +01:00
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/* Raise Data Ready interrupt. */
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serial_log("To RHR: %02X\n", dat);
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2022-07-27 17:00:34 -04:00
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dev->lsr |= 0x01;
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dev->int_status |= SERIAL_INT_RECEIVE;
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serial_update_ints(dev);
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2018-11-08 19:21:55 +01:00
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}
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2023-02-15 16:00:46 +01:00
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/* Do this here, because in non-FIFO mode, this is read directly. */
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dev->out_new = (uint16_t) dat;
|
2017-06-17 03:36:38 -04:00
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}
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2019-10-31 05:20:40 +01:00
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void
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serial_write_fifo(serial_t *dev, uint8_t dat)
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{
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2021-12-19 21:21:34 -05:00
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serial_log("serial_write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos & 0x0f);
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2019-10-31 05:20:40 +01:00
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if (!(dev->mctrl & 0x10))
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2022-07-27 17:00:34 -04:00
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write_fifo(dev, dat);
|
2019-10-31 05:20:40 +01:00
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}
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2018-11-08 19:21:55 +01:00
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void
|
2019-02-06 03:34:39 +01:00
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serial_transmit(serial_t *dev, uint8_t val)
|
2017-06-17 03:36:38 -04:00
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{
|
2018-11-08 19:21:55 +01:00
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if (dev->mctrl & 0x10)
|
2022-07-27 17:00:34 -04:00
|
|
|
write_fifo(dev, val);
|
2018-11-08 19:21:55 +01:00
|
|
|
else if (dev->sd->dev_write)
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->sd->dev_write(dev, dev->sd->priv, val);
|
2022-11-05 21:43:42 -04:00
|
|
|
#ifdef ENABLE_SERIAL_CONSOLE
|
|
|
|
|
if ((val >= ' ' && val <= '~') || val == '\r' || val == '\n') {
|
|
|
|
|
fputc(val, stdout);
|
|
|
|
|
if (val == '\n')
|
|
|
|
|
fflush(stdout);
|
|
|
|
|
} else {
|
|
|
|
|
fprintf(stdout, "[%02X]", val);
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
|
|
|
|
|
2019-10-30 01:28:36 +01:00
|
|
|
static void
|
|
|
|
|
serial_move_to_txsr(serial_t *dev)
|
|
|
|
|
{
|
|
|
|
|
if (dev->fifo_enabled) {
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->txsr = dev->xmit_fifo[0];
|
|
|
|
|
if (dev->xmit_fifo_pos > 0) {
|
|
|
|
|
/* Move the entire fifo forward by one byte. */
|
2023-05-11 03:02:36 -04:00
|
|
|
for (uint8_t i = 1; i < 16; i++)
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->xmit_fifo[i - 1] = dev->xmit_fifo[i];
|
|
|
|
|
/* Decrease FIFO position. */
|
|
|
|
|
dev->xmit_fifo_pos--;
|
|
|
|
|
}
|
2019-10-30 01:28:36 +01:00
|
|
|
} else {
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->txsr = dev->thr;
|
|
|
|
|
dev->thr = 0;
|
2019-10-30 01:28:36 +01:00
|
|
|
}
|
|
|
|
|
|
2019-10-31 05:20:40 +01:00
|
|
|
dev->lsr &= ~0x40;
|
|
|
|
|
serial_log("serial_move_to_txsr(): FIFO %sabled, FIFO pos = %i\n", dev->fifo_enabled ? "en" : "dis", dev->xmit_fifo_pos & 0x0f);
|
2019-10-30 01:28:36 +01:00
|
|
|
|
2019-10-31 05:20:40 +01:00
|
|
|
if (!dev->fifo_enabled || (dev->xmit_fifo_pos == 0x0)) {
|
2022-07-27 17:00:34 -04:00
|
|
|
/* Update interrupts to signal THRE and that TXSR is no longer empty. */
|
|
|
|
|
dev->lsr |= 0x20;
|
|
|
|
|
dev->int_status |= SERIAL_INT_TRANSMIT;
|
|
|
|
|
serial_update_ints(dev);
|
2019-10-30 01:28:36 +01:00
|
|
|
}
|
|
|
|
|
if (dev->transmit_enabled & 2)
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->baud_cycles++;
|
2019-10-30 01:28:36 +01:00
|
|
|
else
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->baud_cycles = 0; /* If not moving while transmitting, reset BAUDOUT cycle count. */
|
2019-10-31 05:20:40 +01:00
|
|
|
if (!dev->fifo_enabled || (dev->xmit_fifo_pos == 0x0))
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->transmit_enabled &= ~1; /* Stop moving. */
|
|
|
|
|
dev->transmit_enabled |= 2; /* Start transmitting. */
|
2019-10-30 01:28:36 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
serial_process_txsr(serial_t *dev)
|
|
|
|
|
{
|
2019-10-31 05:20:40 +01:00
|
|
|
serial_log("serial_process_txsr(): FIFO %sabled\n", dev->fifo_enabled ? "en" : "dis");
|
2019-10-30 01:28:36 +01:00
|
|
|
serial_transmit(dev, dev->txsr);
|
|
|
|
|
dev->txsr = 0;
|
|
|
|
|
/* Reset BAUDOUT cycle count. */
|
|
|
|
|
dev->baud_cycles = 0;
|
|
|
|
|
/* If FIFO is enabled and there are bytes left to transmit,
|
|
|
|
|
continue with the FIFO, otherwise stop. */
|
2019-10-31 05:20:40 +01:00
|
|
|
if (dev->fifo_enabled && (dev->xmit_fifo_pos != 0x0))
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->transmit_enabled |= 1;
|
2019-10-30 01:28:36 +01:00
|
|
|
else {
|
2022-07-27 17:00:34 -04:00
|
|
|
/* Both FIFO/THR and TXSR are empty. */
|
|
|
|
|
/* If bit 5 is set, also set bit 6 to mark both THR and shift register as empty. */
|
|
|
|
|
if (dev->lsr & 0x20)
|
|
|
|
|
dev->lsr |= 0x40;
|
|
|
|
|
dev->transmit_enabled &= ~2;
|
2019-10-30 01:28:36 +01:00
|
|
|
}
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_TRANSMIT;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2019-10-11 19:59:05 +02:00
|
|
|
/* Transmit_enable flags:
|
2022-07-27 17:00:34 -04:00
|
|
|
Bit 0 = Do move if set;
|
|
|
|
|
Bit 1 = Do transmit if set. */
|
2019-02-06 03:34:39 +01:00
|
|
|
static void
|
|
|
|
|
serial_transmit_timer(void *priv)
|
|
|
|
|
{
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
|
int delay = 8; /* STOP to THRE delay is 8 BAUDOUT cycles. */
|
2019-10-11 19:59:05 +02:00
|
|
|
|
2019-10-30 01:28:36 +01:00
|
|
|
if (dev->transmit_enabled & 3) {
|
2022-07-27 17:00:34 -04:00
|
|
|
if ((dev->transmit_enabled & 1) && (dev->transmit_enabled & 2))
|
|
|
|
|
delay = dev->data_bits; /* Delay by less if already transmitting. */
|
2019-10-11 19:59:05 +02:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->baud_cycles++;
|
2019-02-06 03:34:39 +01:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
/* We have processed (total bits) BAUDOUT cycles, transmit the byte. */
|
|
|
|
|
if ((dev->baud_cycles == dev->bits) && (dev->transmit_enabled & 2))
|
|
|
|
|
serial_process_txsr(dev);
|
2019-10-30 01:28:36 +01:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
/* We have processed (data bits) BAUDOUT cycles. */
|
|
|
|
|
if ((dev->baud_cycles == delay) && (dev->transmit_enabled & 1))
|
|
|
|
|
serial_move_to_txsr(dev);
|
2019-10-30 01:28:36 +01:00
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
if (dev->transmit_enabled & 3)
|
|
|
|
|
timer_on_auto(&dev->transmit_timer, dev->transmit_period);
|
2019-02-06 03:34:39 +01:00
|
|
|
} else {
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->baud_cycles = 0;
|
|
|
|
|
return;
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-10-31 05:20:40 +01:00
|
|
|
static void
|
|
|
|
|
serial_timeout_timer(void *priv)
|
|
|
|
|
{
|
|
|
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
|
|
|
|
|
|
#ifdef ENABLE_SERIAL_LOG
|
|
|
|
|
serial_log("serial_timeout_timer()\n");
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
dev->lsr |= 0x01;
|
|
|
|
|
dev->int_status |= SERIAL_INT_TIMEOUT;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2023-02-14 20:37:58 -05:00
|
|
|
void
|
|
|
|
|
serial_device_timeout(void *priv)
|
|
|
|
|
{
|
|
|
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
|
|
|
|
|
|
#ifdef ENABLE_SERIAL_LOG
|
|
|
|
|
serial_log("serial_device_timeout()\n");
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
if (!dev->fifo_enabled) {
|
|
|
|
|
dev->lsr |= 0x10;
|
|
|
|
|
dev->int_status |= SERIAL_INT_LSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
static void
|
|
|
|
|
serial_update_speed(serial_t *dev)
|
|
|
|
|
{
|
2023-02-15 16:00:46 +01:00
|
|
|
timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period);
|
|
|
|
|
|
2019-10-31 05:20:40 +01:00
|
|
|
if (dev->transmit_enabled & 3)
|
2022-07-27 17:00:34 -04:00
|
|
|
timer_on_auto(&dev->transmit_timer, dev->transmit_period);
|
2019-10-31 05:20:40 +01:00
|
|
|
|
|
|
|
|
if (timer_is_enabled(&dev->timeout_timer))
|
2022-07-27 17:00:34 -04:00
|
|
|
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
|
2019-10-31 05:20:40 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
serial_reset_fifo(serial_t *dev)
|
|
|
|
|
{
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->lsr = (dev->lsr & 0xfe) | 0x60;
|
2019-10-31 05:20:40 +01:00
|
|
|
dev->int_status = (dev->int_status & ~SERIAL_INT_RECEIVE) | SERIAL_INT_TRANSMIT;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->rcvr_fifo_full = 0;
|
2019-02-06 03:34:39 +01:00
|
|
|
}
|
|
|
|
|
|
2023-02-14 20:37:58 -05:00
|
|
|
void
|
|
|
|
|
serial_set_dsr(serial_t *dev, uint8_t enabled)
|
|
|
|
|
{
|
|
|
|
|
if (dev->mctrl & 0x10)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
dev->msr &= ~0x2;
|
2023-02-16 02:43:06 +01:00
|
|
|
dev->msr |= ((dev->msr & 0x20) ^ ((!!enabled) << 5)) >> 4;
|
2023-02-14 20:37:58 -05:00
|
|
|
dev->msr &= ~0x20;
|
|
|
|
|
dev->msr |= (!!enabled) << 5;
|
|
|
|
|
dev->msr_set &= ~0x20;
|
|
|
|
|
dev->msr_set |= (!!enabled) << 5;
|
|
|
|
|
|
|
|
|
|
if (dev->msr & 0x2) {
|
|
|
|
|
dev->int_status |= SERIAL_INT_MSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
serial_set_cts(serial_t *dev, uint8_t enabled)
|
|
|
|
|
{
|
|
|
|
|
if (dev->mctrl & 0x10)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
dev->msr &= ~0x1;
|
2023-02-16 02:43:06 +01:00
|
|
|
dev->msr |= ((dev->msr & 0x10) ^ ((!!enabled) << 4)) >> 4;
|
2023-02-14 20:37:58 -05:00
|
|
|
dev->msr &= ~0x10;
|
|
|
|
|
dev->msr |= (!!enabled) << 4;
|
|
|
|
|
dev->msr_set &= ~0x10;
|
|
|
|
|
dev->msr_set |= (!!enabled) << 4;
|
|
|
|
|
|
|
|
|
|
if (dev->msr & 0x1) {
|
|
|
|
|
dev->int_status |= SERIAL_INT_MSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
serial_set_dcd(serial_t *dev, uint8_t enabled)
|
|
|
|
|
{
|
|
|
|
|
if (dev->mctrl & 0x10)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
dev->msr &= ~0x8;
|
2023-02-16 02:43:06 +01:00
|
|
|
dev->msr |= ((dev->msr & 0x80) ^ ((!!enabled) << 7)) >> 4;
|
2023-02-14 20:37:58 -05:00
|
|
|
dev->msr &= ~0x80;
|
|
|
|
|
dev->msr |= (!!enabled) << 7;
|
|
|
|
|
dev->msr_set &= ~0x80;
|
|
|
|
|
dev->msr_set |= (!!enabled) << 7;
|
|
|
|
|
|
|
|
|
|
if (dev->msr & 0x8) {
|
|
|
|
|
dev->int_status |= SERIAL_INT_MSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-02-29 19:12:23 +01:00
|
|
|
void
|
|
|
|
|
serial_set_clock_src(serial_t *dev, double clock_src)
|
|
|
|
|
{
|
|
|
|
|
dev->clock_src = clock_src;
|
|
|
|
|
|
|
|
|
|
serial_transmit_period(dev);
|
|
|
|
|
serial_update_speed(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
void
|
|
|
|
|
serial_write(uint16_t addr, uint8_t val, void *p)
|
2017-06-17 03:36:38 -04:00
|
|
|
{
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_t *dev = (serial_t *) p;
|
2023-05-11 03:02:36 -04:00
|
|
|
uint8_t new_msr;
|
|
|
|
|
uint8_t old;
|
2018-11-08 19:21:55 +01:00
|
|
|
|
2023-02-16 02:43:06 +01:00
|
|
|
// serial_log("UART: Write %02X to port %02X\n", val, addr);
|
|
|
|
|
serial_log("UART: [%04X:%08X] Write %02X to port %02X\n", CS, cpu_state.pc, val, addr);
|
2018-11-08 19:21:55 +01:00
|
|
|
|
2020-11-26 18:20:24 +01:00
|
|
|
cycles -= ISA_CYCLES(8);
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
switch (addr & 7) {
|
2022-07-27 17:00:34 -04:00
|
|
|
case 0:
|
|
|
|
|
if (dev->lcr & 0x80) {
|
|
|
|
|
dev->dlab = (dev->dlab & 0xff00) | val;
|
|
|
|
|
serial_transmit_period(dev);
|
|
|
|
|
serial_update_speed(dev);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Indicate FIFO/THR is no longer empty. */
|
|
|
|
|
dev->lsr &= 0x9f;
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_TRANSMIT;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
|
|
|
|
|
if ((dev->type >= SERIAL_16550) && dev->fifo_enabled && (dev->xmit_fifo_pos < 16)) {
|
|
|
|
|
/* FIFO mode, begin transmitting. */
|
|
|
|
|
timer_on_auto(&dev->transmit_timer, dev->transmit_period);
|
|
|
|
|
dev->transmit_enabled |= 1; /* Start moving. */
|
|
|
|
|
dev->xmit_fifo[dev->xmit_fifo_pos++] = val;
|
|
|
|
|
} else {
|
|
|
|
|
/* Non-FIFO mode, begin transmitting. */
|
|
|
|
|
timer_on_auto(&dev->transmit_timer, dev->transmit_period);
|
|
|
|
|
dev->transmit_enabled |= 1; /* Start moving. */
|
|
|
|
|
dev->thr = val;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
if (dev->lcr & 0x80) {
|
|
|
|
|
dev->dlab = (dev->dlab & 0x00ff) | (val << 8);
|
|
|
|
|
serial_transmit_period(dev);
|
|
|
|
|
serial_update_speed(dev);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
if ((val & 2) && (dev->lsr & 0x20))
|
|
|
|
|
dev->int_status |= SERIAL_INT_TRANSMIT;
|
|
|
|
|
dev->ier = val & 0xf;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
if (dev->type >= SERIAL_16550) {
|
|
|
|
|
if ((val ^ dev->fcr) & 0x01)
|
|
|
|
|
serial_reset_fifo(dev);
|
|
|
|
|
dev->fcr = val & 0xf9;
|
|
|
|
|
dev->fifo_enabled = val & 0x01;
|
|
|
|
|
if (!dev->fifo_enabled) {
|
|
|
|
|
memset(dev->rcvr_fifo, 0, 14);
|
|
|
|
|
memset(dev->xmit_fifo, 0, 16);
|
|
|
|
|
dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
|
|
|
|
|
dev->rcvr_fifo_full = 0;
|
|
|
|
|
dev->rcvr_fifo_len = 1;
|
|
|
|
|
break;
|
2017-09-04 01:52:29 -04:00
|
|
|
}
|
2022-07-27 17:00:34 -04:00
|
|
|
if (val & 0x02) {
|
|
|
|
|
memset(dev->rcvr_fifo, 0, 14);
|
|
|
|
|
dev->rcvr_fifo_pos = 0;
|
2023-02-15 16:00:46 +01:00
|
|
|
dev->rcvr_fifo_end = 0;
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->rcvr_fifo_full = 0;
|
|
|
|
|
}
|
|
|
|
|
if (val & 0x04) {
|
|
|
|
|
memset(dev->xmit_fifo, 0, 16);
|
|
|
|
|
dev->xmit_fifo_pos = 0;
|
|
|
|
|
}
|
|
|
|
|
switch ((val >> 6) & 0x03) {
|
|
|
|
|
case 0:
|
|
|
|
|
dev->rcvr_fifo_len = 1;
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
dev->rcvr_fifo_len = 4;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
dev->rcvr_fifo_len = 8;
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
dev->rcvr_fifo_len = 14;
|
|
|
|
|
break;
|
2023-06-26 12:47:04 -04:00
|
|
|
default:
|
|
|
|
|
break;
|
2022-07-27 17:00:34 -04:00
|
|
|
}
|
2023-02-28 23:24:58 -05:00
|
|
|
dev->out_new = 0xffff;
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
old = dev->lcr;
|
|
|
|
|
dev->lcr = val;
|
2023-02-14 20:37:58 -05:00
|
|
|
if ((old ^ val) & 0x3f) {
|
2022-07-27 17:00:34 -04:00
|
|
|
/* Data bits + start bit. */
|
|
|
|
|
dev->bits = ((dev->lcr & 0x03) + 5) + 1;
|
|
|
|
|
/* Stop bits. */
|
|
|
|
|
dev->bits++; /* First stop bit. */
|
|
|
|
|
if (dev->lcr & 0x04)
|
|
|
|
|
dev->bits++; /* Second stop bit. */
|
|
|
|
|
/* Parity bit. */
|
|
|
|
|
if (dev->lcr & 0x08)
|
|
|
|
|
dev->bits++;
|
|
|
|
|
|
|
|
|
|
serial_transmit_period(dev);
|
|
|
|
|
serial_update_speed(dev);
|
2023-02-14 20:37:58 -05:00
|
|
|
|
|
|
|
|
if (dev->sd && dev->sd->lcr_callback)
|
|
|
|
|
dev->sd->lcr_callback(dev, dev->sd->priv, dev->lcr);
|
2022-07-27 17:00:34 -04:00
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
if ((val & 2) && !(dev->mctrl & 2)) {
|
2023-02-14 20:37:58 -05:00
|
|
|
if (dev->sd && dev->sd->rcr_callback)
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->sd->rcr_callback(dev, dev->sd->priv);
|
|
|
|
|
}
|
|
|
|
|
if (!(val & 8) && (dev->mctrl & 8))
|
|
|
|
|
picintc(1 << dev->irq);
|
|
|
|
|
if ((val ^ dev->mctrl) & 0x10)
|
|
|
|
|
serial_reset_fifo(dev);
|
|
|
|
|
dev->mctrl = val;
|
|
|
|
|
if (val & 0x10) {
|
|
|
|
|
new_msr = (val & 0x0c) << 4;
|
|
|
|
|
new_msr |= (val & 0x02) ? 0x10 : 0;
|
|
|
|
|
new_msr |= (val & 0x01) ? 0x20 : 0;
|
|
|
|
|
|
|
|
|
|
if ((dev->msr ^ new_msr) & 0x10)
|
|
|
|
|
new_msr |= 0x01;
|
|
|
|
|
if ((dev->msr ^ new_msr) & 0x20)
|
|
|
|
|
new_msr |= 0x02;
|
|
|
|
|
if ((dev->msr ^ new_msr) & 0x80)
|
|
|
|
|
new_msr |= 0x08;
|
|
|
|
|
if ((dev->msr & 0x40) && !(new_msr & 0x40))
|
|
|
|
|
new_msr |= 0x04;
|
|
|
|
|
|
|
|
|
|
dev->msr = new_msr;
|
|
|
|
|
|
|
|
|
|
dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
|
|
|
|
|
dev->rcvr_fifo_full = 0;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
|
|
|
|
dev->lsr = (dev->lsr & 0xe0) | (val & 0x1f);
|
|
|
|
|
if (dev->lsr & 0x01)
|
|
|
|
|
dev->int_status |= SERIAL_INT_RECEIVE;
|
|
|
|
|
if (dev->lsr & 0x1e)
|
|
|
|
|
dev->int_status |= SERIAL_INT_LSR;
|
|
|
|
|
if (dev->lsr & 0x20)
|
|
|
|
|
dev->int_status |= SERIAL_INT_TRANSMIT;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 6:
|
2023-06-26 12:47:04 -04:00
|
|
|
#if 0
|
|
|
|
|
dev->msr = (val & 0xf0) | (dev->msr & 0x0f);
|
|
|
|
|
dev->msr = val;
|
|
|
|
|
#endif
|
2023-02-16 02:43:06 +01:00
|
|
|
/* The actual condition bits of the MSR are read-only, but the delta bits are
|
|
|
|
|
undocumentedly writable, and the PCjr BIOS uses them to raise MSR interrupts. */
|
|
|
|
|
dev->msr = (dev->msr & 0xf0) | (val & 0x0f);
|
2022-07-27 17:00:34 -04:00
|
|
|
if (dev->msr & 0x0f)
|
|
|
|
|
dev->int_status |= SERIAL_INT_MSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 7:
|
|
|
|
|
if (dev->type >= SERIAL_16450)
|
|
|
|
|
dev->scratch = val;
|
|
|
|
|
break;
|
2023-06-26 12:47:04 -04:00
|
|
|
default:
|
|
|
|
|
break;
|
2018-11-08 19:21:55 +01:00
|
|
|
}
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
uint8_t
|
|
|
|
|
serial_read(uint16_t addr, void *p)
|
2017-06-17 03:36:38 -04:00
|
|
|
{
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_t *dev = (serial_t *) p;
|
2023-02-15 16:00:46 +01:00
|
|
|
uint8_t ret = 0;
|
2018-11-08 19:21:55 +01:00
|
|
|
|
2020-11-26 18:20:24 +01:00
|
|
|
cycles -= ISA_CYCLES(8);
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
switch (addr & 7) {
|
2022-07-27 17:00:34 -04:00
|
|
|
case 0:
|
|
|
|
|
if (dev->lcr & 0x80) {
|
|
|
|
|
ret = dev->dlab & 0xff;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2023-02-15 16:00:46 +01:00
|
|
|
/* Clear timeout. */
|
|
|
|
|
serial_clear_timeout(dev);
|
|
|
|
|
|
2022-07-27 17:00:34 -04:00
|
|
|
if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
|
|
|
|
|
/* FIFO mode. */
|
|
|
|
|
|
2023-02-16 20:10:05 +01:00
|
|
|
if (dev->rcvr_fifo_full || (dev->rcvr_fifo_pos != dev->rcvr_fifo_end)) {
|
2023-02-15 16:00:46 +01:00
|
|
|
/* There is data in the FIFO. */
|
2023-02-28 23:24:58 -05:00
|
|
|
ret = dev->rcvr_fifo[dev->rcvr_fifo_pos];
|
2023-02-15 16:00:46 +01:00
|
|
|
dev->rcvr_fifo_pos = (dev->rcvr_fifo_pos + 1) & 0x0f;
|
|
|
|
|
|
2023-02-16 20:10:05 +01:00
|
|
|
/* Make sure to clear the FIFO full condition. */
|
|
|
|
|
dev->rcvr_fifo_full = 0;
|
|
|
|
|
|
2023-02-15 16:00:46 +01:00
|
|
|
if (abs(dev->rcvr_fifo_pos - dev->rcvr_fifo_end) < dev->rcvr_fifo_len) {
|
|
|
|
|
/* Amount of data in the FIFO below trigger level,
|
|
|
|
|
clear Data Ready interrupt. */
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_RECEIVE;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
2023-02-16 20:10:05 +01:00
|
|
|
|
|
|
|
|
/* Make sure the Data Ready bit of the LSR is set if we still have
|
|
|
|
|
bytes left in the FIFO. */
|
|
|
|
|
if (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) {
|
|
|
|
|
dev->lsr |= 0x01;
|
|
|
|
|
/* There are bytes left in the FIFO, activate the FIFO Timeout timer. */
|
|
|
|
|
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
|
|
|
|
|
} else
|
|
|
|
|
dev->lsr &= 0xfe;
|
2022-07-27 17:00:34 -04:00
|
|
|
}
|
|
|
|
|
} else {
|
2023-02-15 16:00:46 +01:00
|
|
|
/* Non-FIFO mode. */
|
|
|
|
|
|
2023-02-28 23:24:58 -05:00
|
|
|
ret = (uint8_t) (dev->out_new & 0xffff);
|
2023-02-15 16:00:46 +01:00
|
|
|
dev->out_new = 0xffff;
|
|
|
|
|
|
|
|
|
|
/* Always clear Data Ready interrupt. */
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->lsr &= 0xfe;
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_RECEIVE;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
2023-02-15 16:00:46 +01:00
|
|
|
|
|
|
|
|
// serial_log("Read data: %02X\n", ret);
|
2022-07-27 17:00:34 -04:00
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
if (dev->lcr & 0x80)
|
|
|
|
|
ret = (dev->dlab >> 8) & 0xff;
|
|
|
|
|
else
|
|
|
|
|
ret = dev->ier;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
ret = dev->iir;
|
|
|
|
|
if ((ret & 0xe) == 2) {
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_TRANSMIT;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
}
|
|
|
|
|
if (dev->fcr & 1)
|
|
|
|
|
ret |= 0xc0;
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
ret = dev->lcr;
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
ret = dev->mctrl;
|
|
|
|
|
break;
|
|
|
|
|
case 5:
|
|
|
|
|
ret = dev->lsr;
|
|
|
|
|
if (dev->lsr & 0x1f)
|
|
|
|
|
dev->lsr &= ~0x1e;
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_LSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 6:
|
2023-02-14 20:37:58 -05:00
|
|
|
ret = dev->msr | dev->msr_set;
|
2022-07-27 17:00:34 -04:00
|
|
|
dev->msr &= ~0x0f;
|
|
|
|
|
dev->int_status &= ~SERIAL_INT_MSR;
|
|
|
|
|
serial_update_ints(dev);
|
|
|
|
|
break;
|
|
|
|
|
case 7:
|
|
|
|
|
ret = dev->scratch;
|
|
|
|
|
break;
|
2023-06-26 12:47:04 -04:00
|
|
|
default:
|
|
|
|
|
break;
|
2018-11-08 19:21:55 +01:00
|
|
|
}
|
|
|
|
|
|
2023-02-16 02:43:06 +01:00
|
|
|
// serial_log("UART: Read %02X from port %02X\n", ret, addr);
|
|
|
|
|
serial_log("UART: [%04X:%08X] Read %02X from port %02X\n", CS, cpu_state.pc, ret, addr);
|
2018-11-08 19:21:55 +01:00
|
|
|
return ret;
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
void
|
|
|
|
|
serial_remove(serial_t *dev)
|
2017-06-17 03:36:38 -04:00
|
|
|
{
|
2020-06-14 21:59:45 +02:00
|
|
|
if (dev == NULL)
|
2022-07-27 17:00:34 -04:00
|
|
|
return;
|
2020-06-14 21:59:45 +02:00
|
|
|
|
2022-07-28 16:50:49 -04:00
|
|
|
if (!com_ports[dev->inst].enabled)
|
2022-07-27 17:00:34 -04:00
|
|
|
return;
|
2018-11-08 19:21:55 +01:00
|
|
|
|
|
|
|
|
if (!dev->base_address)
|
2022-07-27 17:00:34 -04:00
|
|
|
return;
|
2018-11-08 19:21:55 +01:00
|
|
|
|
|
|
|
|
serial_log("Removing serial port %i at %04X...\n", dev->inst, dev->base_address);
|
|
|
|
|
|
|
|
|
|
io_removehandler(dev->base_address, 0x0008,
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_read, NULL, NULL, serial_write, NULL, NULL, dev);
|
2018-11-08 19:21:55 +01:00
|
|
|
dev->base_address = 0x0000;
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
void
|
2021-09-07 18:25:50 +02:00
|
|
|
serial_setup(serial_t *dev, uint16_t addr, uint8_t irq)
|
2017-06-17 03:36:38 -04:00
|
|
|
{
|
2018-11-08 19:21:55 +01:00
|
|
|
serial_log("Adding serial port %i at %04X...\n", dev->inst, addr);
|
|
|
|
|
|
2020-06-14 21:59:45 +02:00
|
|
|
if (dev == NULL)
|
2022-07-27 17:00:34 -04:00
|
|
|
return;
|
2020-06-14 21:59:45 +02:00
|
|
|
|
2022-07-28 16:50:49 -04:00
|
|
|
if (!com_ports[dev->inst].enabled)
|
2022-07-27 17:00:34 -04:00
|
|
|
return;
|
2018-11-08 19:21:55 +01:00
|
|
|
if (dev->base_address != 0x0000)
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_remove(dev);
|
2018-11-08 19:21:55 +01:00
|
|
|
dev->base_address = addr;
|
|
|
|
|
if (addr != 0x0000)
|
2022-07-27 17:00:34 -04:00
|
|
|
io_sethandler(addr, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, dev);
|
2018-11-08 19:21:55 +01:00
|
|
|
dev->irq = irq;
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
serial_t *
|
|
|
|
|
serial_attach(int port,
|
2022-07-27 17:00:34 -04:00
|
|
|
void (*rcr_callback)(struct serial_s *serial, void *p),
|
|
|
|
|
void (*dev_write)(struct serial_s *serial, void *p, uint8_t data),
|
|
|
|
|
void *priv)
|
2017-06-17 03:36:38 -04:00
|
|
|
{
|
2018-11-08 19:21:55 +01:00
|
|
|
serial_device_t *sd = &serial_devices[port];
|
|
|
|
|
|
2023-02-14 20:37:58 -05:00
|
|
|
sd->rcr_callback = rcr_callback;
|
|
|
|
|
sd->dev_write = dev_write;
|
|
|
|
|
sd->transmit_period_callback = NULL;
|
|
|
|
|
sd->lcr_callback = NULL;
|
|
|
|
|
sd->priv = priv;
|
|
|
|
|
|
|
|
|
|
return sd->serial;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
serial_t *
|
|
|
|
|
serial_attach_ex(int port,
|
|
|
|
|
void (*rcr_callback)(struct serial_s *serial, void *p),
|
|
|
|
|
void (*dev_write)(struct serial_s *serial, void *p, uint8_t data),
|
|
|
|
|
void (*transmit_period_callback)(struct serial_s *serial, void *p, double transmit_period),
|
|
|
|
|
void (*lcr_callback)(struct serial_s *serial, void *p, uint8_t data_bits),
|
|
|
|
|
void *priv)
|
|
|
|
|
{
|
|
|
|
|
serial_device_t *sd = &serial_devices[port];
|
|
|
|
|
|
|
|
|
|
sd->rcr_callback = rcr_callback;
|
|
|
|
|
sd->dev_write = dev_write;
|
|
|
|
|
sd->transmit_period_callback = transmit_period_callback;
|
|
|
|
|
sd->lcr_callback = lcr_callback;
|
|
|
|
|
sd->priv = priv;
|
2018-11-08 19:21:55 +01:00
|
|
|
|
|
|
|
|
return sd->serial;
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
|
|
|
|
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
static void
|
|
|
|
|
serial_speed_changed(void *priv)
|
|
|
|
|
{
|
|
|
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
|
|
|
|
|
|
serial_update_speed(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
static void
|
|
|
|
|
serial_close(void *priv)
|
|
|
|
|
{
|
|
|
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
|
|
|
|
|
|
next_inst--;
|
|
|
|
|
|
|
|
|
|
free(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2023-02-15 16:00:46 +01:00
|
|
|
static void
|
|
|
|
|
serial_reset(void *priv)
|
|
|
|
|
{
|
|
|
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
|
|
|
|
|
|
timer_disable(&dev->transmit_timer);
|
|
|
|
|
timer_disable(&dev->timeout_timer);
|
|
|
|
|
timer_disable(&dev->receive_timer);
|
|
|
|
|
|
|
|
|
|
dev->lsr = dev->thr = dev->mctrl = dev->rcr = 0x00;
|
|
|
|
|
dev->iir = dev->ier = dev->lcr = dev->msr = 0x00;
|
|
|
|
|
dev->dat = dev->int_status = dev->scratch = dev->fcr = 0x00;
|
|
|
|
|
dev->fifo_enabled = dev->rcvr_fifo_len = dev->bits = dev->data_bits = 0x00;
|
|
|
|
|
dev->baud_cycles = dev->rcvr_fifo_full = dev->txsr = dev->out = 0x00;
|
|
|
|
|
|
2023-02-15 21:37:20 +06:00
|
|
|
dev->dlab = dev->out_new = 0x0000;
|
2023-02-15 16:00:46 +01:00
|
|
|
|
|
|
|
|
dev->rcvr_fifo_pos = dev->xmit_fifo_pos = dev->rcvr_fifo_end = dev->xmit_fifo_end = 0x00;
|
|
|
|
|
|
|
|
|
|
serial_reset_port(dev);
|
|
|
|
|
|
2023-02-28 23:24:58 -05:00
|
|
|
dev->dlab = 96;
|
|
|
|
|
dev->fcr = 0x06;
|
2023-02-15 16:00:46 +01:00
|
|
|
|
|
|
|
|
serial_transmit_period(dev);
|
|
|
|
|
serial_update_speed(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2018-11-08 19:21:55 +01:00
|
|
|
static void *
|
|
|
|
|
serial_init(const device_t *info)
|
2017-06-17 03:36:38 -04:00
|
|
|
{
|
2018-11-08 19:21:55 +01:00
|
|
|
serial_t *dev = (serial_t *) malloc(sizeof(serial_t));
|
|
|
|
|
memset(dev, 0, sizeof(serial_t));
|
|
|
|
|
|
2018-11-08 19:38:07 +01:00
|
|
|
dev->inst = next_inst;
|
2018-11-08 19:21:55 +01:00
|
|
|
|
2022-07-28 16:50:49 -04:00
|
|
|
if (com_ports[next_inst].enabled) {
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_log("Adding serial port %i...\n", next_inst);
|
|
|
|
|
dev->type = info->local;
|
|
|
|
|
memset(&(serial_devices[next_inst]), 0, sizeof(serial_device_t));
|
|
|
|
|
dev->sd = &(serial_devices[next_inst]);
|
|
|
|
|
dev->sd->serial = dev;
|
|
|
|
|
serial_reset_port(dev);
|
|
|
|
|
if (next_inst == 3)
|
|
|
|
|
serial_setup(dev, COM4_ADDR, COM4_IRQ);
|
|
|
|
|
else if (next_inst == 2)
|
|
|
|
|
serial_setup(dev, COM3_ADDR, COM3_IRQ);
|
|
|
|
|
else if ((next_inst == 1) || (info->flags & DEVICE_PCJR))
|
|
|
|
|
serial_setup(dev, COM2_ADDR, COM2_IRQ);
|
|
|
|
|
else if (next_inst == 0)
|
|
|
|
|
serial_setup(dev, COM1_ADDR, COM1_IRQ);
|
|
|
|
|
|
|
|
|
|
/* Default to 1200,N,7. */
|
2023-02-28 23:24:58 -05:00
|
|
|
dev->dlab = 96;
|
|
|
|
|
dev->fcr = 0x06;
|
2023-02-16 02:43:06 +01:00
|
|
|
if (info->local == SERIAL_8250_PCJR)
|
|
|
|
|
dev->clock_src = 1789500.0;
|
|
|
|
|
else
|
|
|
|
|
dev->clock_src = 1843200.0;
|
2022-07-27 17:00:34 -04:00
|
|
|
timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0);
|
|
|
|
|
timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0);
|
2023-02-15 16:00:46 +01:00
|
|
|
timer_add(&dev->receive_timer, serial_receive_timer, dev, 0);
|
|
|
|
|
serial_transmit_period(dev);
|
|
|
|
|
serial_update_speed(dev);
|
2018-11-08 19:21:55 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
next_inst++;
|
|
|
|
|
|
|
|
|
|
return dev;
|
2017-06-17 03:36:38 -04:00
|
|
|
}
|
2018-11-08 19:21:55 +01:00
|
|
|
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
void
|
|
|
|
|
serial_set_next_inst(int ni)
|
|
|
|
|
{
|
|
|
|
|
next_inst = ni;
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-06 03:34:39 +01:00
|
|
|
void
|
2022-07-27 17:00:34 -04:00
|
|
|
serial_standalone_init(void)
|
|
|
|
|
{
|
2023-06-26 12:47:04 -04:00
|
|
|
while (next_inst < SERIAL_MAX)
|
2022-07-27 17:00:34 -04:00
|
|
|
device_add_inst(&ns8250_device, next_inst + 1);
|
2019-02-06 03:34:39 +01:00
|
|
|
};
|
|
|
|
|
|
2021-12-19 21:21:34 -05:00
|
|
|
const device_t ns8250_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "National Semiconductor 8250(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns8250",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_8250,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2018-11-08 19:21:55 +01:00
|
|
|
};
|
|
|
|
|
|
2021-12-19 21:30:24 -05:00
|
|
|
const device_t ns8250_pcjr_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "National Semiconductor 8250(-compatible) UART for PCjr",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns8250_pcjr",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = DEVICE_PCJR,
|
|
|
|
|
.local = SERIAL_8250_PCJR,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2019-02-06 03:34:39 +01:00
|
|
|
};
|
|
|
|
|
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
const device_t ns16450_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "National Semiconductor NS16450(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns16450",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_16450,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2018-11-08 19:21:55 +01:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t ns16550_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "National Semiconductor NS16550(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns16550",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_16550,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2018-11-08 19:21:55 +01:00
|
|
|
};
|
2021-12-19 19:53:25 -05:00
|
|
|
|
|
|
|
|
const device_t ns16650_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "Startech Semiconductor 16650(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns16650",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_16650,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2021-12-19 19:53:25 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t ns16750_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "Texas Instruments 16750(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns16750",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_16750,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2021-12-19 19:53:25 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t ns16850_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "Exar Corporation NS16850(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns16850",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_16850,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2021-12-19 19:53:25 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const device_t ns16950_device = {
|
2022-07-27 17:00:34 -04:00
|
|
|
.name = "Oxford Semiconductor NS16950(-compatible) UART",
|
2022-03-13 09:28:28 -04:00
|
|
|
.internal_name = "ns16950",
|
2022-07-27 17:00:34 -04:00
|
|
|
.flags = 0,
|
|
|
|
|
.local = SERIAL_16950,
|
|
|
|
|
.init = serial_init,
|
|
|
|
|
.close = serial_close,
|
2023-02-15 16:00:46 +01:00
|
|
|
.reset = serial_reset,
|
2022-03-13 09:28:28 -04:00
|
|
|
{ .available = NULL },
|
|
|
|
|
.speed_changed = serial_speed_changed,
|
2022-07-27 17:00:34 -04:00
|
|
|
.force_redraw = NULL,
|
|
|
|
|
.config = NULL
|
2021-12-19 19:53:25 -05:00
|
|
|
};
|