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86Box/src/video/vid_8514a.c

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Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
/*
Even more tabs to spaces
2023-01-06 15:36:05 -05:00
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
*
Even more tabs to spaces
2023-01-06 15:36:05 -05:00
* This file is part of the 86Box distribution.
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
*
Even more tabs to spaces
2023-01-06 15:36:05 -05:00
* Emulation of the 8514/A card from IBM for the MCA bus and
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
* ISA bus clones.
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
*
*
*
Even more tabs to spaces
2023-01-06 15:36:05 -05:00
* Authors: TheCollector1995.
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
*
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
* Copyright 2022-2024 TheCollector1995.
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
#include <stdatomic.h>
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include <86box/machine.h>
#include <86box/mem.h>
#include <86box/timer.h>
#include <86box/mca.h>
#include <86box/rom.h>
#include <86box/plat.h>
#include <86box/thread.h>
#include <86box/video.h>
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
#include <86box/vid_8514a.h>
Video and emulator GUI changes of the day (October 28th, 2024) IBM 8514/A (MCA/ISA). Added a configure button to the QT frontend for the amount of memory used by said add-on chips. XGA: Forgot a change about the 4mb aperture.
2024-10-28 22:14:58 +01:00
#include <86box/vid_8514a_device.h>
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
#include <86box/vid_xga.h>
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#include <86box/vid_ati_eeprom.h>
#include <86box/vid_ati_mach8.h>
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
#include "cpu.h"
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#ifdef ATI_8514_ULTRA
#define BIOS_MACH8_ROM_PATH "roms/video/mach8/11301113140.BIN"
#endif
More sonarlint work
2023-06-09 23:46:54 -04:00
static void ibm8514_accel_outb(uint16_t port, uint8_t val, void *priv);
static void ibm8514_accel_outw(uint16_t port, uint16_t val, void *priv);
static uint8_t ibm8514_accel_inb(uint16_t port, void *priv);
static uint16_t ibm8514_accel_inw(uint16_t port, void *priv);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
#ifdef ENABLE_IBM8514_LOG
int ibm8514_do_log = ENABLE_IBM8514_LOG;
static void
ibm8514_log(const char *fmt, ...)
{
va_list ap;
if (ibm8514_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define ibm8514_log(fmt, ...)
#endif
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#define WRITE8(addr, var, val) \
switch ((addr) & 1) { \
case 0: \
var = (var & 0xff00) | (val); \
break; \
case 1: \
var = (var & 0x00ff) | ((val) << 8); \
break; \
}
#define READ8(addr, var) \
switch ((addr) & 1) { \
case 0: \
temp = (var) & 0xff; \
break; \
case 1: \
temp = ((var) >> 8) & 0xff; \
break; \
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
#define READ_PIXTRANS_WORD(cx, n) \
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if ((cmd <= 1) || (cmd == 5)) { \
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & dev->vram_mask]; \
temp |= (dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & dev->vram_mask] << 8); \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else { \
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \
temp |= (dev->vram[(dev->accel.dest + (cx) + (n + 1)) & dev->vram_mask] << 8); \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
#define READ(addr, dat) \
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp) { \
dat = vram_w[(addr) & (dev->vram_mask >> 1)]; \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else { \
dat = (dev->vram[(addr) & (dev->vram_mask)]); \
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
#define READ_HIGH(addr, dat) \
dat |= (dev->vram[(addr) & (dev->vram_mask)] << 8);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
#define MIX(mixmode, dest_dat, src_dat) \
{ \
switch ((mixmode) ? (dev->accel.frgd_mix & 0x1f) : (dev->accel.bkgd_mix & 0x1f)) { \
case 0x00: \
dest_dat = ~dest_dat; \
break; \
case 0x01: \
dest_dat = 0; \
break; \
case 0x02: \
dest_dat = ~0; \
break; \
case 0x03: \
dest_dat = dest_dat; \
break; \
case 0x04: \
dest_dat = ~src_dat; \
break; \
case 0x05: \
dest_dat = src_dat ^ dest_dat; \
break; \
case 0x06: \
dest_dat = ~(src_dat ^ dest_dat); \
break; \
case 0x07: \
dest_dat = src_dat; \
break; \
case 0x08: \
dest_dat = ~(src_dat & dest_dat); \
break; \
case 0x09: \
dest_dat = ~src_dat | dest_dat; \
break; \
case 0x0a: \
dest_dat = src_dat | ~dest_dat; \
break; \
case 0x0b: \
dest_dat = src_dat | dest_dat; \
break; \
case 0x0c: \
dest_dat = src_dat & dest_dat; \
break; \
case 0x0d: \
dest_dat = src_dat & ~dest_dat; \
break; \
case 0x0e: \
dest_dat = ~src_dat & dest_dat; \
break; \
case 0x0f: \
dest_dat = ~(src_dat | dest_dat); \
break; \
case 0x10: \
dest_dat = MIN(src_dat, dest_dat); \
break; \
case 0x11: \
dest_dat = dest_dat - src_dat; \
break; \
case 0x12: \
dest_dat = src_dat - dest_dat; \
break; \
case 0x13: \
dest_dat = src_dat + dest_dat; \
break; \
case 0x14: \
dest_dat = MAX(src_dat, dest_dat); \
break; \
case 0x15: \
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
dest_dat = (dest_dat - src_dat) >> 1; \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break; \
case 0x16: \
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
dest_dat = (src_dat - dest_dat) >> 1; \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break; \
case 0x17: \
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
dest_dat = (dest_dat + src_dat) >> 1; \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break; \
case 0x18: \
dest_dat = MAX(0, (dest_dat - src_dat)); \
break; \
case 0x19: \
dest_dat = MAX(0, (dest_dat - src_dat)); \
break; \
case 0x1a: \
dest_dat = MAX(0, (src_dat - dest_dat)); \
break; \
case 0x1b: \
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp) \
dest_dat = MIN(0xffff, (dest_dat + src_dat)); \
else \
dest_dat = MIN(0xff, (dest_dat + src_dat)); \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break; \
case 0x1c: \
dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \
break; \
case 0x1d: \
dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \
break; \
case 0x1e: \
dest_dat = MAX(0, (src_dat - dest_dat)) / 2; \
break; \
case 0x1f: \
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp) \
dest_dat = (0xffff < (src_dat + dest_dat)) ? 0xffff : ((src_dat + dest_dat) / 2); \
else \
dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); \
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break; \
} \
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
#define WRITE(addr, dat) \
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp) { \
vram_w[((addr)) & (dev->vram_mask >> 1)] = dat; \
dev->changedvram[(((addr)) & (dev->vram_mask >> 1)) >> 11] = changeframecount; \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else { \
dev->vram[((addr)) & (dev->vram_mask)] = dat; \
dev->changedvram[(((addr)) & (dev->vram_mask)) >> 12] = changeframecount; \
}
8514/A and XGA handling refactor: * separate (ibm8514|xga)_enabled into (ibm8514|xga)_standalone_enabled and (ibm8514|xga)_active, the former being enabled only for standalone 8514/A or XGA cards, the latter for all 8514/A and XGA-capable cards and not saved into the config file; * remove (ibm8514|xga)_has_vga and replace all uses of it with (ibm8514|xga)_standalone_enabled; * Qt UI: the checkboxes for standalone 8514/A and XGA are now correctly grayed out if an (S)VGA card with 8514/A or XGA capability is selected, including cases when the card is an internal/onboard one; said cards are now no longer appear as SVGA multi-monitor compatible.
2023-08-22 17:56:55 +05:00
int ibm8514_active = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
int
ibm8514_cpu_src(svga_t *svga)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (!(dev->accel.cmd & 0x100))
return 0;
if (dev->accel.cmd & 1)
return 1;
return 0;
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
int
ibm8514_cpu_dest(svga_t *svga)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (!(dev->accel.cmd & 0x100))
return 0;
if (dev->accel.cmd & 1)
return 0;
return 1;
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
void
More ATI changes plus one IBM 8514/A fix: 1. Made the 4 color mode (67h) work properly now, including its 4 schemes on all ATI cards that support said mode. 2. Shadow set now has a true purpose for 8514/A compatibility on ATI Mach8/32. 3. Non-ATI 8514/A used to not work before because of the dev->local variable was not being set to 0 in the ibm8514_init() function, now it's fixed.
2023-12-27 21:01:25 +01:00
ibm8514_accel_out_pixtrans(svga_t *svga, UNUSED(uint16_t port), uint32_t val, int len)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
uint8_t nibble = 0;
uint32_t pixelxfer = 0;
uint32_t monoxfer = 0xffffffff;
int pixcnt = 0;
int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3;
int frgd_mix = (dev->accel.frgd_mix >> 5) & 3;
int bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3;
int cmd = dev->accel.cmd >> 13;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
if (dev->accel.cmd & 0x100) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
/*Bus size*/
if (dev->accel.cmd & 0x200) /*16-bit*/
pixcnt = 16;
else /*8-bit*/
pixcnt = 8;
/*Pixel transfer data mode, can't be the same as Foreground/Background CPU data*/
if (pixcntl == 2) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((frgd_mix == 2) || (bkgd_mix == 2))
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
pixelxfer = val;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else {
if (dev->accel.cmd & 0x02) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (pixcnt == 16) {
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if ((cmd >= 2) && (dev->accel.cmd & 0x1000))
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
val = (val >> 8) | (val << 8);
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((cmd <= 2) || (cmd == 4)) {
if ((dev->accel.cmd & 0x08) && (cmd >= 2))
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
monoxfer = val;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else {
if (val & 0x02)
nibble |= 0x80;
if (val & 0x04)
nibble |= 0x40;
if (val & 0x08)
nibble |= 0x20;
if (val & 0x10)
nibble |= 0x10;
if (val & 0x200)
nibble |= 0x08;
if (val & 0x400)
nibble |= 0x04;
if (val & 0x800)
nibble |= 0x02;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (val & 0x1000)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
nibble |= 0x01;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
monoxfer = nibble;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else
monoxfer = val;
} else
monoxfer = val;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
pixelxfer = val;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.input)
ibm8514_accel_start(pixcnt >> 1, 1, monoxfer & 0xff, pixelxfer & 0xff, svga, len);
else
ibm8514_accel_start(pixcnt, 1, monoxfer & 0xffff, pixelxfer & 0xffff, svga, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
void
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (port != 0x9ae8 && port != 0xe2e8)
ibm8514_log("Port OUT FIFO=%04x, val=%04x, len=%d.\n", port, val, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
switch (port) {
case 0x82e8:
case 0xc2e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.cur_y = val & 0x7ff;
break;
case 0x86e8:
case 0xc6e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.cur_x = val & 0x7ff;
break;
case 0x8ae8:
case 0xcae8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
dev->accel.desty = val & 0x7ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.desty_axstp = val & 0x3fff;
if (val & 0x2000)
dev->accel.desty_axstp |= ~0x1fff;
}
break;
case 0x8ee8:
case 0xcee8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
dev->accel.destx = val & 0x7ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.destx_distp = val & 0x3fff;
if (val & 0x2000)
dev->accel.destx_distp |= ~0x1fff;
}
break;
case 0x92e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->test = val;
Better fallthrough annotation macro.
2023-08-09 19:44:56 -04:00
fallthrough;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
case 0xd2e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.err_term = val & 0x3fff;
if (val & 0x2000)
Fix warnings on the XGA, 8514/A and EGA Render map files. Revert initial XGA rom length back to 0x2000 to prevent error 114 in the MCA bioses.
2022-07-15 18:27:30 +02:00
dev->accel.err_term |= ~0x1fff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
break;
case 0x96e8:
case 0xd6e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.maj_axis_pcnt = val & 0x7ff;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.maj_axis_pcnt_no_limit = val;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
break;
case 0x9ae8:
case 0xdae8:
dev->accel.ssv_state = 0;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->data_available2 = 0;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cmd = val;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (port == 0xdae8) {
if (dev->accel.cmd & 0x100)
dev->accel.cmd_back = 0;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_log("8514/A CMD=%04x, back=%d.\n", dev->accel.cmd, dev->accel.cmd_back);
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ibm8514_accel_start(-1, 0, -1, 0, svga, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
break;
case 0x9ee8:
case 0xdee8:
dev->accel.ssv_state = 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.short_stroke = val;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cx = dev->accel.cur_x;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->accel.cur_x >= 0x600)
dev->accel.cx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cy = dev->accel.cur_y;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->accel.cur_y >= 0x600)
dev->accel.cy |= ~0x5ff;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.cmd & 0x1000) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len);
ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
} else {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len);
ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
break;
case 0xa2e8:
case 0xe2e8:
if (port == 0xe2e8) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
if (dev->accel.cmd_back)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.bkgd_color = val;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else {
if (ibm8514_cpu_dest(svga))
break;
ibm8514_accel_out_pixtrans(svga, port, val, len);
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.bkgd_color = val;
}
break;
case 0xa6e8:
case 0xe6e8:
if (port == 0xe6e8) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
if (dev->accel.cmd_back)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.frgd_color = val;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else {
if (ibm8514_cpu_dest(svga))
break;
ibm8514_accel_out_pixtrans(svga, port, val, len);
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.frgd_color = val;
}
break;
case 0xaae8:
case 0xeae8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.wrt_mask = val;
break;
case 0xaee8:
case 0xeee8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.rd_mask = val;
break;
case 0xb2e8:
case 0xf2e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.color_cmp = val;
break;
case 0xb6e8:
case 0xf6e8:
dev->accel.bkgd_mix = val & 0xff;
break;
case 0xbae8:
case 0xfae8:
dev->accel.frgd_mix = val & 0xff;
break;
case 0xbee8:
case 0xfee8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.multifunc_cntl = val;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cmd_back = !!(port == 0xfee8);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if ((dev->accel.multifunc_cntl >> 12) == 1) {
dev->accel.clip_top = dev->accel.multifunc[1] & 0x3ff;
if (dev->accel.multifunc[1] & 0x400)
dev->accel.clip_top |= ~0x3ff;
}
if ((dev->accel.multifunc_cntl >> 12) == 2) {
dev->accel.clip_left = dev->accel.multifunc[2] & 0x3ff;
if (dev->accel.multifunc[2] & 0x400)
dev->accel.clip_left |= ~0x3ff;
}
if ((dev->accel.multifunc_cntl >> 12) == 3)
dev->accel.clip_bottom = dev->accel.multifunc[3] & 0x7ff;
if ((dev->accel.multifunc_cntl >> 12) == 4)
dev->accel.clip_right = dev->accel.multifunc[4] & 0x7ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_ramdac_out(uint16_t port, uint8_t val, void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
svga_out(port, val, svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
uint8_t
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_ramdac_in(uint16_t port, void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
uint8_t ret;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ret = svga_in(port, svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
return ret;
}
static void
ibm8514_io_set(svga_t *svga)
{
io_sethandler(0x2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x2ea, 0x0004, ibm8514_ramdac_in, NULL, NULL, ibm8514_ramdac_out, NULL, NULL, svga);
io_sethandler(0x6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x12e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x16e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x1ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x1ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x22e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x26e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x2ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x42e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x4ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x52e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x56e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x5ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x5ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x82e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x86e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x8ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x8ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x92e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x96e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x9ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0x9ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xa2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xa6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xaae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xaee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xb2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xb6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xbae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xbee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xe2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xc2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xc6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xcae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xcee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xd2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xd6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xdae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xdee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xe6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xeae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xeee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xf2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xf6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xfae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
io_sethandler(0xfee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga);
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
void
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
uint8_t old = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (port & 0x8000)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
else {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
switch (port) {
case 0x2e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
case 0x6e9:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
WRITE8(port, dev->htotal, val);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_log("IBM 8514/A compatible: (0x%04x): htotal=0x%02x.\n", port, val);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x6e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
/*In preparation to switch from VGA to 8514/A mode*/
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->hdisped = val;
dev->hdisp = (dev->hdisped + 1) << 3;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0xae8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->hsync_start = val;
ibm8514_log("IBM 8514/A compatible: (0x%04x): val=0x%02x, hsync_start=%d.\n", port, val, (val + 1) << 3);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0xee8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->hsync_width = val;
ibm8514_log("IBM 8514/A compatible: (0x%04x): val=0x%02x, hsync_width=%d, hsyncpol=%02x.\n", port, val & 0x1f, ((val & 0x1f) + 1) << 3, val & 0x20);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x12e8:
case 0x12e9:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
/*In preparation to switch from VGA to 8514/A mode*/
WRITE8(port, dev->v_total_reg, val);
dev->v_total_reg &= 0x1fff;
dev->v_total = dev->v_total_reg + 1;
if (dev->interlace)
dev->v_total >>= 1;
ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x16e8:
case 0x16e9:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
/*In preparation to switch from VGA to 8514/A mode*/
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
WRITE8(port, dev->v_disp, val);
dev->v_disp &= 0x1fff;
dev->vdisp = (dev->v_disp + 1) >> 1;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp);
ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x1ae8:
case 0x1ae9:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
/*In preparation to switch from VGA to 8514/A mode*/
WRITE8(port, dev->v_sync_start, val);
dev->v_sync_start &= 0x1fff;
dev->v_syncstart = dev->v_sync_start + 1;
if (dev->interlace)
dev->v_syncstart >>= 1;
ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x1ee8:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
case 0x1ee9:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_log("IBM 8514/A compatible: V_SYNC_WID write 1EE8 = %02x\n", val);
ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncwidth=0x%02x.\n", port, val);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x22e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->disp_cntl = val;
dev->interlace = !!(dev->disp_cntl & 0x10);
ibm8514_log("IBM 8514/A compatible: DISP_CNTL write %04x=%02x, interlace=%d.\n", port, dev->disp_cntl, dev->interlace);
svga_recalctimings(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x42e8:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (val & 1)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->subsys_stat &= ~1;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (val & 2)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->subsys_stat &= ~2;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (val & 4)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->subsys_stat &= ~4;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (val & 8)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->subsys_stat &= ~8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x42e9:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
old = dev->subsys_cntl;
dev->subsys_cntl = val;
if ((old ^ val) & 1)
dev->subsys_stat |= 1;
if ((old ^ val) & 2)
dev->subsys_stat |= 2;
if ((old ^ val) & 4)
dev->subsys_stat |= 4;
if ((old ^ val) & 8)
dev->subsys_stat |= 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
break;
case 0x4ae8:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
WRITE8(port, dev->accel.advfunc_cntl, val);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->on = dev->accel.advfunc_cntl & 0x01;
vga_on = !dev->on;
ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_log("IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480");
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
svga_recalctimings(svga);
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_accel_outb(uint16_t port, uint8_t val, void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ibm8514_accel_out(port, val, svga, 1);
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_accel_outw(uint16_t port, uint16_t val, void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ibm8514_accel_out(port, val, svga, 2);
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
uint16_t
ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint16_t temp = 0;
int cmd = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
switch (port) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
case 0x82e8:
case 0xc2e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
temp = dev->accel.cur_y;
break;
case 0x86e8:
case 0xc6e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
temp = dev->accel.cur_x;
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
case 0x92e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
temp = dev->test;
break;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
case 0x96e8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
temp = dev->accel.maj_axis_pcnt;
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
case 0x9ae8:
case 0xdae8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->force_busy)
temp |= 0x200; /*Hardware busy*/
dev->force_busy = 0;
if (dev->data_available) {
temp |= 0x100; /*Read Data available*/
dev->data_available = 0;
}
}
break;
case 0x9ae9:
case 0xdae9:
if (len == 1) {
if (dev->force_busy2)
temp |= 2; /*Hardware busy*/
dev->force_busy2 = 0;
if (dev->data_available2) {
temp |= 1; /*Read Data available*/
dev->data_available2 = 0;
}
}
break;
case 0xe2e8:
case 0xe6e8:
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_dest(svga)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
cmd = (dev->accel.cmd >> 13);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
READ_PIXTRANS_WORD(dev->accel.cx, 0);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.input) {
ibm8514_accel_out_pixtrans(svga, port, temp & 0xff, len);
if (dev->accel.odd_in) { /*WORDs on odd destination scan lengths.*/
dev->accel.odd_in = 0;
temp &= ~0xff00;
READ_HIGH(dev->accel.dest + dev->accel.cx, temp);
}
ibm8514_accel_out_pixtrans(svga, port, (temp >> 8) & 0xff, len);
} else
ibm8514_accel_out_pixtrans(svga, port, temp, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
break;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
default:
break;
}
return temp;
}
uint8_t
ibm8514_accel_in(uint16_t port, svga_t *svga)
{
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint8_t temp = 0;
switch (port) {
case 0x2e8:
if (dev->vc == dev->v_syncstart)
temp |= 2;
ibm8514_log("0x2E8 read: Display Status=%02x.\n", temp);
break;
case 0x6e8:
temp = dev->hdisped;
break;
case 0x22e8:
temp = dev->disp_cntl;
break;
case 0x26e8:
case 0x26e9:
READ8(port, dev->htotal);
break;
case 0x2ee8:
temp = dev->subsys_cntl;
break;
case 0x2ee9:
temp = 0xff;
break;
case 0x42e8:
case 0x42e9:
if (dev->vc == dev->v_syncstart)
dev->subsys_stat |= 1;
if (port & 1)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
temp = dev->vram_512k_8514 ? 0x00 : 0x80;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
else {
temp |= (dev->subsys_stat | 0x80);
temp |= 0x20;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
return temp;
}
static uint8_t
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_accel_inb(uint16_t port, void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
uint8_t temp;
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (port & 0x8000)
temp = ibm8514_accel_in_fifo(svga, port, 1);
else
temp = ibm8514_accel_in(port, svga);
return temp;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
static uint16_t
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_accel_inw(uint16_t port, void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
uint16_t temp;
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (port & 0x8000)
temp = ibm8514_accel_in_fifo(svga, port, 2);
else {
temp = ibm8514_accel_in(port, svga);
temp |= (ibm8514_accel_in(port + 1, svga) << 8);
}
return temp;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
void
ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, uint8_t ssv, int len)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (!cpu_input) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.ssv_len = ssv & 0x0f;
dev->accel.ssv_dir = ssv & 0xe0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.ssv_draw = ssv & 0x10;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_src(svga)) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
return; /*Wait for data from CPU*/
}
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
ibm8514_accel_start(count, cpu_input, mix_dat, cpu_dat, svga, len);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, UNUSED(int len))
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint16_t *vram_w = (uint16_t *) dev->vram;
More sonarlint work
2023-06-09 23:46:54 -04:00
uint16_t src_dat = 0;
uint16_t dest_dat;
uint16_t old_dest_dat;
int frgd_mix;
int bkgd_mix;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
int16_t clip_t = dev->accel.clip_top;
int16_t clip_l = dev->accel.clip_left;
uint16_t clip_b = dev->accel.clip_bottom;
uint16_t clip_r = dev->accel.clip_right;
More sonarlint work
2023-06-09 23:46:54 -04:00
int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint16_t mix_mask = dev->bpp ? 0x8000 : 0x80;
More sonarlint work
2023-06-09 23:46:54 -04:00
uint16_t compare = dev->accel.color_cmp;
int compare_mode = dev->accel.multifunc[0x0a] & 0x38;
int cmd = dev->accel.cmd >> 13;
uint16_t wrt_mask = dev->accel.wrt_mask;
uint16_t rd_mask = dev->accel.rd_mask;
uint16_t rd_mask_polygon = dev->accel.rd_mask;
uint16_t frgd_color = dev->accel.frgd_color;
uint16_t bkgd_color = dev->accel.bkgd_color;
uint32_t old_mix_dat;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
int and3 = dev->accel.cur_x & 3;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (!dev->bpp) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
compare &= 0xff;
frgd_color &= 0xff;
bkgd_color &= 0xff;
rd_mask = ((dev->accel.rd_mask & 0x01) << 7) | ((dev->accel.rd_mask & 0xfe) >> 1);
rd_mask &= 0xff;
rd_mask_polygon &= 0xff;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x100) {
dev->force_busy = 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->force_busy2 = 1;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
frgd_mix = (dev->accel.frgd_mix >> 5) & 3;
bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3;
if (cpu_input) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x02) || (pixcntl == 2)) {
More and more video changes and fixes (8514/A and compatibles): 1. Made the 8514/A mode switch to VGA and viceversa (including ATI mode) actually usable and eliminating the last bugs related to them. Fixes 8514/A mode in OS/2 1.x/2.x (both IBM and Microsoft). 2. More sanity checks to the 8514/A and XGA pointers. Should fix emulator crashes on hard resets.
2023-11-08 23:47:16 +01:00
if ((frgd_mix == 2) || (bkgd_mix == 2))
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
count >>= 3;
More and more video changes and fixes (8514/A and compatibles): 1. Made the 8514/A mode switch to VGA and viceversa (including ATI mode) actually usable and eliminating the last bugs related to them. Fixes 8514/A mode in OS/2 1.x/2.x (both IBM and Microsoft). 2. More sanity checks to the 8514/A and XGA pointers. Should fix emulator crashes on hard resets.
2023-11-08 23:47:16 +01:00
else if (pixcntl == 2) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
count >>= 1;
More and more video changes and fixes (8514/A and compatibles): 1. Made the 8514/A mode switch to VGA and viceversa (including ATI mode) actually usable and eliminating the last bugs related to them. Fixes 8514/A mode in OS/2 1.x/2.x (both IBM and Microsoft). 2. More sanity checks to the 8514/A and XGA pointers. Should fix emulator crashes on hard resets.
2023-11-08 23:47:16 +01:00
else
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
count >>= 3;
}
More and more video changes and fixes (8514/A and compatibles): 1. Made the 8514/A mode switch to VGA and viceversa (including ATI mode) actually usable and eliminating the last bugs related to them. Fixes 8514/A mode in OS/2 1.x/2.x (both IBM and Microsoft). 2. More sanity checks to the 8514/A and XGA pointers. Should fix emulator crashes on hard resets.
2023-11-08 23:47:16 +01:00
} else
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
count >>= 3;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if ((dev->accel.cmd & 0x200) && (count == 2))
count >>= 1;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
if (pixcntl == 1) {
mix_dat = 0;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if (and3 == 3) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x02)
mix_dat |= 0x08;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[8] & 0x04)
mix_dat |= 0x10;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x08)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x20;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x10)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x40;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x02)
mix_dat |= 0x80;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[9] & 0x04)
mix_dat |= 0x01;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x08)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x02;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x10)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x04;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if (and3 == 2) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x02)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x04;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x04)
mix_dat |= 0x08;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[8] & 0x08)
mix_dat |= 0x10;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x10)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x20;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x02)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x40;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x04)
mix_dat |= 0x80;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[9] & 0x08)
mix_dat |= 0x01;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x10)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x02;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if (and3 == 1) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x02)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x02;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x04)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x04;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x08)
mix_dat |= 0x08;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[8] & 0x10)
mix_dat |= 0x10;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x02)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x20;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x04)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x40;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x08)
mix_dat |= 0x80;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[9] & 0x10)
mix_dat |= 0x01;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if (and3 == 0) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x02)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x01;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x04)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x02;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x08)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x04;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[8] & 0x10)
mix_dat |= 0x08;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (dev->accel.multifunc[9] & 0x02)
mix_dat |= 0x10;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x04)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x20;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x08)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x40;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.multifunc[9] & 0x10)
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
mix_dat |= 0x80;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
old_mix_dat = mix_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
/*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled.
When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on
the NOP command)*/
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
switch (cmd) {
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
case 0: /*NOP (Short Stroke Vectors)*/
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.ssv_state == 0)
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x08) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
while (count-- && dev->accel.ssv_len >= 0) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = cpu_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
old_dest_dat = dest_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
MIX(mix_dat & mix_mask, dest_dat, src_dat);
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.ssv_draw) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x04) && dev->accel.ssv_len) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if (!(dev->accel.cmd & 0x04)) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
mix_dat <<= 1;
mix_dat |= 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
else
cpu_dat >>= 8;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (!dev->accel.ssv_len)
break;
switch (dev->accel.ssv_dir & 0xe0) {
case 0x00:
dev->accel.cx++;
break;
case 0x20:
dev->accel.cx++;
dev->accel.cy--;
break;
case 0x40:
dev->accel.cy--;
break;
case 0x60:
dev->accel.cx--;
dev->accel.cy--;
break;
case 0x80:
dev->accel.cx--;
break;
case 0xa0:
dev->accel.cx--;
dev->accel.cy++;
break;
case 0xc0:
dev->accel.cy++;
break;
case 0xe0:
dev->accel.cx++;
dev->accel.cy++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.ssv_len--;
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
while (count-- && (dev->accel.ssv_len >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if (dev->accel.ssv_draw) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x04) && dev->accel.ssv_len) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if (!(dev->accel.cmd & 0x04)) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
}
}
}
}
mix_dat <<= 1;
mix_dat |= 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
else
cpu_dat >>= 8;
if (!dev->accel.ssv_len)
break;
if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) {
dev->accel.err_term += dev->accel.destx_distp;
/*Step minor axis*/
switch (dev->accel.cmd & 0xe0) {
case 0x00:
dev->accel.cy--;
break;
case 0x20:
dev->accel.cy--;
break;
case 0x40:
dev->accel.cx--;
break;
case 0x60:
dev->accel.cx++;
break;
case 0x80:
dev->accel.cy++;
break;
case 0xa0:
dev->accel.cy++;
break;
case 0xc0:
dev->accel.cx--;
break;
case 0xe0:
dev->accel.cx++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else
dev->accel.err_term += dev->accel.desty_axstp;
/*Step major axis*/
switch (dev->accel.cmd & 0xe0) {
case 0x00:
dev->accel.cx--;
break;
case 0x20:
dev->accel.cx++;
break;
case 0x40:
dev->accel.cy--;
break;
case 0x60:
dev->accel.cy--;
break;
case 0x80:
dev->accel.cx--;
break;
case 0xa0:
dev->accel.cx++;
break;
case 0xc0:
dev->accel.cy++;
break;
case 0xe0:
dev->accel.cy++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
dev->accel.ssv_len--;
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
case 1: /*Draw line*/
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (!cpu_input) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.output = 0;
dev->accel.x_count = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cx = dev->accel.cur_x;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.cur_x >= 0x600)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx |= ~0x5ff;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cy = dev->accel.cur_y;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.cur_y >= 0x600)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cy |= ~0x5ff;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy = dev->accel.maj_axis_pcnt;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_log("Line Draw 8514/A CMD=%04x, frgdmix=%d, bkgdmix=%d, c(%d,%d), pixcntl=%d, sy=%d, polyfill=%x, selfrmix=%02x, selbkmix=%02x, bkgdcol=%02x, frgdcol=%02x, clipt=%d, clipb=%d.\n", dev->accel.cmd, frgd_mix, bkgd_mix, dev->accel.cx, dev->accel.cy, pixcntl, dev->accel.sy, dev->accel.multifunc[0x0a] & 6, dev->accel.frgd_mix & 0x1f, dev->accel.bkgd_mix & 0x1f, bkgd_color, frgd_color, dev->accel.clip_top, clip_b);
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_src(svga)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02) {
if (!(dev->accel.cmd & 0x1000)) {
if (dev->accel.cmd & 0x08)
dev->accel.output = 1;
Slight fixes to the 8514/A blitter in line draw, rectangle and outline modes.
2022-06-26 23:19:48 +02:00
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
} else if (ibm8514_cpu_dest(svga)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 1;
dev->data_available2 = 1;
return;
Slight fixes to the 8514/A blitter in line draw, rectangle and outline modes.
2022-06-26 23:19:48 +02:00
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x08) { /*Vector Line*/
if (ibm8514_cpu_dest(svga) && cpu_input && (dev->accel.cmd & 0x02))
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
count >>= 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02)
ibm8514_log("Line Draw Vector Single pixtrans=%04x, count=%d.\n", mix_dat, count);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
/* Mix data = current video memory value. */
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, mix_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_dest(svga)) {
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (pixcntl == 3)
src_dat = ((src_dat & rd_mask) == rd_mask);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.output) {
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
default:
break;
}
} else {
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
src_dat = 0;
break;
default:
break;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
old_dest_dat = dest_dat;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.output) {
MIX(mix_dat & 0x01, dest_dat, src_dat);
} else {
MIX(mix_dat & mix_mask, dest_dat, src_dat);
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x02) && ibm8514_cpu_src(svga)) {
if ((dev->accel.cmd & 0x04) && dev->accel.sy) {
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 0x04)) {
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
} else {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_src(svga) || !cpu_input) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x04) && dev->accel.sy) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if (!(dev->accel.cmd & 0x04)) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Slight fixes to the 8514/A blitter in line draw, rectangle and outline modes.
2022-06-26 23:19:48 +02:00
}
}
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->accel.sy)
break;
if (dev->accel.output)
mix_dat >>= 1;
else {
mix_dat <<= 1;
mix_dat |= 1;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
else
cpu_dat >>= 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
switch (dev->accel.cmd & 0xe0) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0x00:
dev->accel.cx++;
break;
case 0x20:
dev->accel.cx++;
dev->accel.cy--;
break;
case 0x40:
dev->accel.cy--;
break;
case 0x60:
dev->accel.cx--;
dev->accel.cy--;
break;
case 0x80:
dev->accel.cx--;
break;
case 0xa0:
dev->accel.cx--;
dev->accel.cy++;
break;
case 0xc0:
dev->accel.cy++;
break;
case 0xe0:
dev->accel.cx++;
dev->accel.cy++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
dev->accel.sy--;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count = 0;
dev->accel.output = 0;
} else { /*Bresenham Line*/
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (pixcntl == 1) {
dev->accel.temp_cnt = 8;
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->accel.temp_cnt) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.temp_cnt = 8;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix_dat = old_mix_dat;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_dest(svga)) {
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = cpu_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
old_dest_dat = dest_dat;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
MIX(mix_dat & 0x01, dest_dat, src_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x04) && dev->accel.sy) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if (!(dev->accel.cmd & 0x04)) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.temp_cnt--;
mix_dat >>= 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
else
cpu_dat >>= 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.sy == 0)
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.cmd & 0x40) {
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
if (dev->accel.cmd & 0x20)
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx++;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
else
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx--;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
} else
dev->accel.err_term += dev->accel.desty_axstp;
} else {
if (dev->accel.cmd & 0x20)
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx++;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
else
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx--;
More sonarlint work
2023-06-09 23:46:54 -04:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
} else
dev->accel.err_term += dev->accel.desty_axstp;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy--;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
/* Mix data = current video memory value. */
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, mix_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_dest(svga)) {
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (pixcntl == 3)
src_dat = ((src_dat & rd_mask) == rd_mask);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = cpu_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x04) && dev->accel.sy) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if (!(dev->accel.cmd & 0x04)) {
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
mix_dat <<= 1;
mix_dat |= 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
else
cpu_dat >>= 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.sy == 0)
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.cmd & 0x40) {
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
if (dev->accel.cmd & 0x20)
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx++;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
else
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx--;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
} else
dev->accel.err_term += dev->accel.desty_axstp;
} else {
if (dev->accel.cmd & 0x20)
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx++;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
else
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cx--;
More sonarlint work
2023-06-09 23:46:54 -04:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
} else
dev->accel.err_term += dev->accel.desty_axstp;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy--;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 2: /*Rectangle fill (X direction)*/
case 3: /*Rectangle fill (Y direction)*/
case 4: /*Rectangle fill (Y direction using nibbles)*/
if (!cpu_input) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count = 0;
dev->accel.output = 0;
dev->accel.input = 0;
dev->accel.input2 = 0;
dev->accel.odd_in = 0;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx = dev->accel.cur_x;
if (dev->accel.cur_x >= 0x600)
dev->accel.cx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cy = dev->accel.cur_y;
if (dev->accel.cur_y >= 0x600)
dev->accel.cy |= ~0x5ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
dev->accel.sy = dev->accel.multifunc[0] & 0x7ff;
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (cmd == 4)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cmd |= 0x02;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
else if (cmd == 3)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cmd &= ~0x02;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_src(svga)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (!(dev->accel.cmd & 0x1000)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x08) {
dev->accel.x_count = dev->accel.cx - (and3 + 3);
dev->accel.sx += (and3 + 3);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count = dev->accel.cx;
if (and3) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x20)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count -= and3;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count += and3;
dev->accel.sx += 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x1000) {
if (dev->accel.cmd & 0x200) {
if (dev->accel.cmd & 0x04) {
dev->accel.output = 1;
dev->accel.sx -= 2;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
}
}
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
} else if (ibm8514_cpu_dest(svga)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!(dev->accel.cmd & 0x02)) {
if (dev->accel.cmd & 0x1000) {
if (dev->accel.cmd & 0x200) {
if (!(dev->accel.sx & 1) && !(dev->accel.cmd & 0x04)) {
dev->accel.input = 1;
} else if (dev->accel.cmd & 0x04) {
dev->accel.input2 = 1;
dev->accel.sx -= 2;
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_log("INPUT=%d.\n", dev->accel.input);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 1;
dev->data_available2 = 1;
return; /*Wait for data from CPU*/
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_log("Rectangle %d: full=%04x, odd=%d, c(%d,%d), frgdmix=%d, bkgdmix=%d, xcount=%d, and3=%d, len(%d,%d), CURX=%d, Width=%d, pixcntl=%d, mix_dat=%08x, count=%d, cpu_data=%08x, cpu_input=%d.\n", cmd, dev->accel.cmd, dev->accel.input, dev->accel.cx, dev->accel.cy, frgd_mix, bkgd_mix, dev->accel.x_count, and3, dev->accel.sx, dev->accel.sy, dev->accel.cur_x, dev->accel.maj_axis_pcnt, pixcntl, mix_dat, count, cpu_dat, cpu_input);
if (dev->accel.cmd & 0x08) { /*Vectored Rectangle*/
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (cpu_input) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (ibm8514_cpu_src(svga)) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = cpu_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
READ(dev->accel.dest + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x02) && (dev->accel.x_count != dev->accel.cx))
goto skip_vector_rect_write;
if ((dev->accel.cmd & 0x04) && dev->accel.sx) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 0x04)) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
switch (dev->accel.cmd & 0xe0) {
case 0x00:
dev->accel.cx++;
break;
case 0x20:
dev->accel.cx++;
break;
case 0x60:
dev->accel.cx--;
break;
case 0x80:
dev->accel.cx--;
break;
case 0xa0:
dev->accel.cx--;
break;
case 0xe0:
dev->accel.cx++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
skip_vector_rect_write:
switch (dev->accel.cmd & 0xe0) {
case 0x00:
dev->accel.x_count++;
break;
case 0x20:
dev->accel.x_count++;
break;
case 0x60:
dev->accel.x_count--;
break;
case 0x80:
dev->accel.x_count--;
break;
case 0xa0:
dev->accel.x_count--;
break;
case 0xe0:
dev->accel.x_count++;
break;
default:
break;
}
if (dev->bpp)
cpu_dat >>= 16;
else
cpu_dat >>= 8;
mix_dat <<= 1;
mix_dat |= 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.sx--;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x20)
dev->accel.cx -= (dev->accel.sx + 1);
else
dev->accel.cx += (dev->accel.sx + 1);
switch (dev->accel.cmd & 0xe0) {
case 0x20:
dev->accel.cy--;
break;
case 0x40:
dev->accel.cy--;
break;
case 0x60:
dev->accel.cy--;
break;
case 0xa0:
dev->accel.cy++;
break;
case 0xc0:
dev->accel.cy++;
break;
case 0xe0:
dev->accel.cy++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy--;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count = 0;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else
ibm8514_log("Vectored Rectangle with destination reads (TODO).\n");
} else
ibm8514_log("Vectored Rectangle with normal processing (TODO).\n");
} else { /*Normal Rectangle*/
if (cpu_input) {
while (count-- && (dev->accel.sy >= 0)) {
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
/* Mix data = current video memory value. */
READ(dev->accel.dest + dev->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (ibm8514_cpu_dest(svga)) {
READ(dev->accel.dest + dev->accel.cx, src_dat);
if (pixcntl == 3)
src_dat = ((src_dat & rd_mask) == rd_mask);
} else {
if (dev->accel.cmd & 0x02) {
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = cpu_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = cpu_dat;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
READ(dev->accel.dest + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
old_dest_dat = dest_dat;
if (dev->accel.cmd & 0x02) {
MIX(mix_dat & 0x01, dest_dat, src_dat);
if ((dev->accel.x_count != dev->accel.cx) && !(dev->accel.cmd & 0x1000) && and3)
goto skip_nibble_rect_write;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if ((dev->accel.cmd & 0x04) && dev->accel.sx) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 0x04)) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (ibm8514_cpu_dest(svga) && (cmd == 2)) {
if (pixcntl == 3) {
MIX(mix_dat & mix_mask, dest_dat, src_dat);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else {
MIX(mix_dat & mix_mask, dest_dat, src_dat);
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if ((dev->accel.cmd & 0x04) && dev->accel.sx) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
} else if (!(dev->accel.cmd & 0x04)) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
skip_nibble_rect_write:
if (dev->accel.cmd & 0x20)
dev->accel.x_count++;
else
dev->accel.x_count--;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02)
mix_dat >>= 1;
else {
mix_dat <<= 1;
mix_dat |= 1;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
cpu_dat >>= 16;
else
cpu_dat >>= 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
if (dev->accel.input)
dev->accel.odd_in = 1;
if (dev->accel.output || dev->accel.input2)
dev->accel.sx -= 2;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20)
dev->accel.cx -= (dev->accel.sx + 1);
else
dev->accel.cx += (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
else
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sy--;
dev->accel.x_count = 0;
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
} else {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (pixcntl == 1) {
if (dev->accel.cmd & 0x40) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
count = (dev->accel.maj_axis_pcnt & 0x7ff) + 1;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.temp_cnt = 8;
while (count-- && dev->accel.sy >= 0) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->accel.temp_cnt) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
mix_dat >>= 8;
dev->accel.temp_cnt = 8;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
READ(dev->accel.dest + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.temp_cnt > 0) {
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
if (dev->accel.cmd & 0x20) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cx -= (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cx += (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy--;
return;
}
}
} else {
dev->accel.temp_cnt = 8;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
while (count-- && (dev->accel.sy >= 0)) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (!dev->accel.temp_cnt) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.temp_cnt = 8;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix_dat = old_mix_dat;
Slight fixes to the 8514/A blitter in line draw, rectangle and outline modes.
2022-06-26 23:19:48 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
case 3:
src_dat = 0;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
READ(dev->accel.dest + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
old_dest_dat = dest_dat;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
MIX(mix_dat & 0x01, dest_dat, src_dat);
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
}
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.temp_cnt--;
mix_dat >>= 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
if (dev->accel.cmd & 0x20) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cx -= (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cx += (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy--;
if (dev->accel.sy < 0) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (cmd != 4) {
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
return;
}
}
Slight fixes to the 8514/A blitter in line draw, rectangle and outline modes.
2022-06-26 23:19:48 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if ((dev->accel.multifunc[0x0a] & 0x06) == 0x04) { /*Polygon Draw Type A*/
while (count-- && (dev->accel.sy >= 0)) {
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
READ(dev->accel.dest + dev->accel.cx, mix_dat);
if ((mix_dat & rd_mask_polygon) == rd_mask_polygon)
dev->accel.fill_state ^= 1;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
READ(dev->accel.dest + dev->accel.cx, dest_dat);
old_dest_dat = dest_dat;
if (dev->accel.fill_state) {
if (!(rd_mask_polygon & 0x01) && (wrt_mask & 0x01)) {
MIX(mix_dat ^ rd_mask_polygon, dest_dat, mix_dat);
ibm8514_log("Filling c(%d,%d) without bit 0 of rdmask=%02x, wrtmask=%02x, mixdat=%02x, dest=%02x, old=%02x.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, old_dest_dat);
dest_dat &= ~rd_mask_polygon;
} else if ((rd_mask_polygon & 0x01) && (wrt_mask & 0x01)) {
ibm8514_log("Filling c(%d,%d) with bit 0 of rdmask=%02x, wrtmask=%02x.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask);
dest_dat &= ~(rd_mask_polygon & wrt_mask);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else {
if (!(rd_mask_polygon & 0x01) && (wrt_mask & 0x01))
dest_dat &= ~rd_mask_polygon;
else if ((rd_mask_polygon & 0x01) && (wrt_mask & 0x01))
dest_dat &= ~(rd_mask_polygon & wrt_mask);
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back);
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.fill_state = 0;
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20)
dev->accel.cx -= (dev->accel.sx + 1);
else
dev->accel.cx += (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
else
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sy--;
More sonarlint work
2023-06-09 23:46:54 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.sy < 0) {
ibm8514_log(".\n");
return;
}
}
}
} else {
ibm8514_log("Polygon Draw Type=%02x, CL=%d, CR=%d.\n", dev->accel.multifunc[0x0a] & 0x06, clip_l, clip_r);
while (count-- && dev->accel.sy >= 0) {
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
if (!bkgd_mix && (dev->accel.cmd & 0x40) && ((dev->accel.frgd_mix & 0x1f) == 7) && ((dev->accel.bkgd_mix & 0x1f) == 3) && !dev->bpp && (bkgd_color == 0x00)) /*For some reason, the September 1992 Mach8/32 drivers for Win3.x don't set the background colors properly.*/
src_dat = frgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
case 3:
src_dat = 0;
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
default:
break;
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
READ(dev->accel.dest + dev->accel.cx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x10) {
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else
ibm8514_log("Outside clipping.\n");
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix_dat <<= 1;
mix_dat |= 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.fill_state = 0;
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20)
dev->accel.cx -= (dev->accel.sx + 1);
else
dev->accel.cx += (dev->accel.sx + 1);
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
More 8514/A related fixes: Replaced svga->bpp == 24 with dev->accel_bpp == 24 as well as proper ATI graphics engine offsets added to 24bpp mode in the 8514/A rectangle fill commands (cmd 2, 3, 4) as well as on a command val of 8514/A bitblt (mainly 0xc2b5, actual cmd 6). This should fix 24bpp mode under Windows/NT and other operating systems, like OS/2 2.x/Warp.
2023-08-24 00:47:26 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8))
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
else if (dev->bpp)
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
else
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sy--;
if (dev->accel.sy < 0) {
if (cmd != 4) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
return;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
}
}
}
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
case 5: /*Draw Polygon Boundary Line*/ {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (!cpu_input) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sy = dev->accel.maj_axis_pcnt_no_limit;
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
dev->accel.cx = dev->accel.cur_x;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->accel.cur_x >= 0x600)
dev->accel.cx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.cy = dev->accel.cur_y;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->accel.cur_y >= 0x600)
dev->accel.cy |= ~0x5ff;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.cmd & 0x80)
dev->accel.oldcy = dev->accel.cy + 1;
else
dev->accel.oldcy = dev->accel.cy - 1;
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
ibm8514_log("Polygon Boundary activated=%04x, len=%d, cur(%d,%d), frgdmix=%02x, err=%d, clipping: l=%d, r=%d, t=%d, b=%d, pixcntl=%02x.\n", dev->accel.cmd, dev->accel.sy, dev->accel.cx, dev->accel.cy, dev->accel.frgd_mix & 0x1f, dev->accel.err_term, dev->accel.multifunc[2], dev->accel.multifunc[4], dev->accel.clip_top, clip_b, dev->accel.multifunc[0x0a]);
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_src(svga)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
} else if (ibm8514_cpu_dest(svga)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 1;
dev->data_available2 = 1;
return;
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x08) { /*Vectored Boundary Line*/
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cx < clip_l)
dev->accel.cx = clip_l;
More sonarlint work
2023-06-09 23:46:54 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
src_dat = 0;
break;
default:
break;
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if (dev->accel.cmd & 0x10) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.sy && (dev->accel.cmd & 0x04)) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.oldcy != dev->accel.cy) {
WRITE((dev->accel.cy * dev->pitch) + (dev->accel.cx), dest_dat);
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else if (!(dev->accel.cmd & 0x04)) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.oldcy != dev->accel.cy) {
WRITE((dev->accel.cy * dev->pitch) + (dev->accel.cx), dest_dat);
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
}
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
mix_dat <<= 1;
mix_dat |= 1;
if (dev->bpp)
cpu_dat >>= 16;
else
cpu_dat >>= 8;
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (!dev->accel.sy)
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
break;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
switch (dev->accel.cmd & 0xe0) {
case 0x00:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.cx++;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
break;
case 0x20:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.cx++;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
dev->accel.oldcy = dev->accel.cy;
dev->accel.cy--;
break;
case 0x40:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.oldcy = dev->accel.cy;
dev->accel.cy--;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
break;
case 0x60:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.cx--;
dev->accel.oldcy = dev->accel.cy;
dev->accel.cy--;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
break;
case 0x80:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.cx--;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
break;
case 0xa0:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.cx--;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
dev->accel.oldcy = dev->accel.cy;
dev->accel.cy++;
break;
case 0xc0:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.oldcy = dev->accel.cy;
dev->accel.cy++;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
break;
case 0xe0:
dev->accel.cx++;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.oldcy = dev->accel.cy;
dev->accel.cy++;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.sy--;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else { /*Vectored Bresenham*/
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cx < clip_l)
dev->accel.cx = clip_l;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
src_dat = 0;
break;
default:
break;
}
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
if ((dev->accel.cmd & 0x14) == 0x14) {
if (dev->accel.sy) {
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
if (dev->accel.oldcy != dev->accel.cy) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
}
}
}
}
}
mix_dat <<= 1;
mix_dat |= 1;
if (dev->bpp)
cpu_dat >>= 16;
else
cpu_dat >>= 8;
if (!dev->accel.sy)
break;
if (dev->accel.cmd & 0x40) {
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
dev->accel.oldcy = dev->accel.cy;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
} else
dev->accel.err_term += dev->accel.desty_axstp;
} else {
if (dev->accel.cmd & 0x20)
dev->accel.cx++;
else
dev->accel.cx--;
dev->accel.oldcy = dev->accel.cy;
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
if (dev->accel.cmd & 0x80)
dev->accel.cy++;
else
dev->accel.cy--;
} else
dev->accel.err_term += dev->accel.desty_axstp;
}
dev->accel.sy--;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
}
break;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
case 6: /*BitBlt*/
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (!cpu_input) /*!cpu_input is trigger to start operation*/
{
dev->accel.x_count = 0;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.dx = dev->accel.destx;
if (dev->accel.destx >= 0x600)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.dx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dy = dev->accel.desty;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.desty >= 0x600)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.dy |= ~0x5ff;
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx = dev->accel.cur_x;
if (dev->accel.cur_x >= 0x600)
dev->accel.cx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.cy = dev->accel.cur_y;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->accel.cur_y >= 0x600)
dev->accel.cy |= ~0x5ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
dev->accel.sy = dev->accel.multifunc[0] & 0x7ff;
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
} else if (dev->bpp) {
dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch);
} else {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.fill_state = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (ibm8514_cpu_src(svga)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (!(dev->accel.cmd & 0x1000)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.x_count = dev->accel.cx;
if (and3) {
if (dev->accel.cmd & 0x20)
dev->accel.x_count -= and3;
else
dev->accel.x_count += and3;
dev->accel.sx += 8;
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 0;
dev->data_available2 = 0;
return; /*Wait for data from CPU*/
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
} else if (ibm8514_cpu_dest(svga)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->data_available = 1;
dev->data_available2 = 1;
return; /*Wait for data from CPU*/
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_log("BitBLT: full=%04x, odd=%d, c(%d,%d), d(%d,%d), xcount=%d, and3=%d, len(%d,%d), CURX=%d, Width=%d, pixcntl=%d, mix_dat=%08x, count=%d, cpu_data=%08x, cpu_input=%d.\n", dev->accel.cmd, dev->accel.input, dev->accel.cx, dev->accel.cy, dev->accel.dx, dev->accel.dy, dev->accel.x_count, and3, dev->accel.sx, dev->accel.sy, dev->accel.cur_x, dev->accel.maj_axis_pcnt, pixcntl, mix_dat, count, cpu_dat, cpu_input);
if (cpu_input) {
while (count-- && (dev->accel.sy >= 0)) {
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
if (pixcntl == 3) {
if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
READ(dev->accel.src + dev->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
if (dev->accel.cmd & 0x02)
mix_dat = mix_dat ? 0x01 : 0x00;
else
mix_dat = mix_dat ? mix_mask : 0x00;
} else if (dev->accel.cmd & 0x10) {
READ(dev->accel.src + dev->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
if (dev->accel.cmd & 0x02)
mix_dat = mix_dat ? 0x01 : 0x00;
else
mix_dat = mix_dat ? mix_mask : 0x00;
}
}
if (dev->accel.cmd & 0x02) {
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
READ(dev->accel.src + dev->accel.cx, src_dat);
if (pixcntl == 3) {
if (dev->accel.cmd & 0x10)
src_dat = ((src_dat & rd_mask) == rd_mask);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
default:
break;
}
} else {
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
READ(dev->accel.src + dev->accel.cx, src_dat);
if (pixcntl == 3) {
if (dev->accel.cmd & 0x10)
src_dat = ((src_dat & rd_mask) == rd_mask);
}
break;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
READ(dev->accel.dest + dev->accel.dx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
old_dest_dat = dest_dat;
if (dev->accel.cmd & 0x02) {
MIX(mix_dat & 0x01, dest_dat, src_dat);
if ((dev->accel.x_count != dev->accel.cx) && !(dev->accel.cmd & 0x1000) && and3)
goto skip_nibble_bitblt_write;
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20) {
dev->accel.dx++;
dev->accel.cx++;
} else {
dev->accel.dx--;
dev->accel.cx--;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
skip_nibble_bitblt_write:
if (dev->accel.cmd & 0x20)
dev->accel.x_count++;
else
dev->accel.x_count--;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x02)
mix_dat >>= 1;
else {
mix_dat <<= 1;
mix_dat |= 1;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
cpu_dat >>= 16;
else
cpu_dat >>= 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
if (dev->accel.cmd & 0x20) {
dev->accel.dx -= (dev->accel.sx + 1);
dev->accel.cx -= (dev->accel.sx + 1);
} else {
dev->accel.dx += (dev->accel.sx + 1);
dev->accel.cx += (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x80) {
dev->accel.dy++;
dev->accel.cy++;
} else {
dev->accel.dy--;
dev->accel.cy--;
}
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
} else if (dev->bpp) {
dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch);
} else {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
}
dev->accel.sy--;
dev->accel.x_count = 0;
return;
}
}
} else {
if (pixcntl == 1) {
if (dev->accel.cmd & 0x40) {
count = (dev->accel.maj_axis_pcnt & 0x7ff) + 1;
dev->accel.temp_cnt = 8;
while (count-- && (dev->accel.sy >= 0)) {
if (!dev->accel.temp_cnt) {
mix_dat >>= 8;
dev->accel.temp_cnt = 8;
}
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
src_dat = 0;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
READ(dev->accel.src + dev->accel.cx, src_dat);
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
READ(dev->accel.dest + dev->accel.dx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
old_dest_dat = dest_dat;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
MIX(mix_dat & mix_mask, dest_dat, src_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
}
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.temp_cnt > 0) {
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.cmd & 0x20) {
dev->accel.dx++;
dev->accel.cx++;
} else {
dev->accel.dx--;
dev->accel.cx--;
}
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
if (dev->accel.cmd & 0x20) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dx -= (dev->accel.sx + 1);
dev->accel.cx -= (dev->accel.sx + 1);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dx += (dev->accel.sx + 1);
dev->accel.cx += (dev->accel.sx + 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.cmd & 0x80) {
dev->accel.dy++;
dev->accel.cy++;
} else {
dev->accel.dy--;
dev->accel.cy--;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
} else if (dev->bpp) {
dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch);
} else {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dev->accel.sy--;
return;
}
}
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.temp_cnt = 8;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
while (count-- && (dev->accel.sy >= 0)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->accel.temp_cnt) {
dev->accel.temp_cnt = 8;
mix_dat = old_mix_dat;
}
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
src_dat = 0;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
case 3:
READ(dev->accel.src + dev->accel.cx, src_dat);
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
READ(dev->accel.dest + dev->accel.dx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
old_dest_dat = dest_dat;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
MIX(mix_dat & 0x01, dest_dat, src_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
}
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.temp_cnt--;
mix_dat >>= 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev->accel.cmd & 0x20) {
dev->accel.dx++;
dev->accel.cx++;
} else {
dev->accel.dx--;
dev->accel.cx--;
}
dev->accel.sx--;
if (dev->accel.sx < 0) {
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
if (dev->accel.cmd & 0x20) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dx -= (dev->accel.sx + 1);
dev->accel.cx -= (dev->accel.sx + 1);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dx += (dev->accel.sx + 1);
dev->accel.cx += (dev->accel.sx + 1);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
if (dev->accel.cmd & 0x80) {
dev->accel.dy++;
dev->accel.cy++;
} else {
dev->accel.dy--;
dev->accel.cy--;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
} else if (dev->bpp) {
dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sy--;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.sy < 0) {
dev->accel.destx = dev->accel.dx;
dev->accel.desty = dev->accel.dy;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
return;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
} else {
if ((dev->accel_bpp == 24) && (dev->accel.cmd == 0xc2b5)) {
int64_t cx;
int64_t dx;
cx = (int64_t) dev->accel.cx;
dx = (int64_t) dev->accel.dx;
while (1) {
if ((dx >= (((int64_t)clip_l) * 3)) &&
(dx <= (((uint64_t)clip_r) * 3)) &&
(dev->accel.dy >= (clip_t << 1)) &&
(dev->accel.dy <= (clip_b << 1))) {
READ(dev->accel.src + cx, src_dat);
READ(dev->accel.dest + dx, dest_dat);
dest_dat = (src_dat & wrt_mask) | (dest_dat & ~wrt_mask);
WRITE(dev->accel.dest + dx, dest_dat);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
cx++;
dx++;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx--;
if (dev->accel.sx < 0)
return;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
while (count-- && dev->accel.sy >= 0) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (pixcntl == 3) {
if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
READ(dev->accel.src + dev->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
} else if (dev->accel.cmd & 0x10) {
READ(dev->accel.src + dev->accel.cx, mix_dat);
mix_dat = ((mix_dat & rd_mask) == rd_mask);
mix_dat = mix_dat ? mix_mask : 0;
}
}
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
case 0:
src_dat = bkgd_color;
break;
case 1:
src_dat = frgd_color;
break;
case 2:
src_dat = 0;
break;
case 3:
READ(dev->accel.src + dev->accel.cx, src_dat);
if (pixcntl == 3) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cmd & 0x10) && !(dev->accel.cmd & 0x40))
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
src_dat = ((src_dat & rd_mask) == rd_mask);
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
READ(dev->accel.dest + dev->accel.dx, dest_dat);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((compare_mode == 0) ||
((compare_mode == 0x10) && (dest_dat >= compare)) ||
((compare_mode == 0x18) && (dest_dat < compare)) ||
((compare_mode == 0x20) && (dest_dat != compare)) ||
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
old_dest_dat = dest_dat;
MIX(mix_dat & mix_mask, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x04) {
if (dev->accel.sx) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
}
} else {
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
mix_dat <<= 1;
mix_dat |= 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x20) {
dev->accel.dx++;
dev->accel.cx++;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
} else {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.dx--;
dev->accel.cx--;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sx--;
if (dev->accel.sx < 0) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
dev->accel.fill_state = 0;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.cmd & 0x20) {
dev->accel.dx -= (dev->accel.sx + 1);
dev->accel.cx -= (dev->accel.sx + 1);
} else {
dev->accel.dx += (dev->accel.sx + 1);
dev->accel.cx += (dev->accel.sx + 1);
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (dev->accel.cmd & 0x80) {
dev->accel.dy++;
dev->accel.cy++;
} else {
dev->accel.dy--;
dev->accel.cy--;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
} else if (dev->bpp) {
dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch);
} else {
dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch);
dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch);
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->accel.sy--;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.sy < 0) {
dev->accel.destx = dev->accel.dx;
dev->accel.desty = dev->accel.dy;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
return;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
}
}
}
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
void
ibm8514_render_blank(svga_t *svga)
{
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
if ((dev->displine + svga->y_add) < 0)
return;
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
uint32_t *line_ptr = &svga->monitor->target_buffer->line[dev->displine + svga->y_add][svga->x_add];
uint32_t line_width = (uint32_t)(dev->h_disp) * sizeof(uint32_t);
if (dev->h_disp > 0)
memset(line_ptr, 0, line_width);
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
void
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ibm8514_render_8bpp(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
uint32_t *p;
uint32_t dat;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if ((dev->displine + svga->y_add) < 0)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
return;
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
for (int x = 0; x <= dev->h_disp; x += 8) {
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
p[0] = dev->pallook[dat & dev->dac_mask];
p[1] = dev->pallook[(dat >> 8) & dev->dac_mask];
p[2] = dev->pallook[(dat >> 16) & dev->dac_mask];
p[3] = dev->pallook[(dat >> 24) & dev->dac_mask];
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dat = *(uint32_t *) (&dev->vram[(dev->ma + 4) & dev->vram_mask]);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
p[4] = dev->pallook[dat & dev->dac_mask];
p[5] = dev->pallook[(dat >> 8) & dev->dac_mask];
p[6] = dev->pallook[(dat >> 16) & dev->dac_mask];
p[7] = dev->pallook[(dat >> 24) & dev->dac_mask];
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
dev->ma += 8;
p += 8;
}
dev->ma &= dev->vram_mask;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
void
ibm8514_render_15bpp(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int x;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint32_t *p;
uint32_t dat;
if ((dev->displine + svga->y_add) < 0) {
return;
}
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->h_disp; x += 8) {
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1)) & dev->vram_mask]);
p[x] = video_15to32[dat & 0xffff];
p[x + 1] = video_15to32[dat >> 16];
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1) + 4) & dev->vram_mask]);
p[x + 2] = video_15to32[dat & 0xffff];
p[x + 3] = video_15to32[dat >> 16];
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1) + 8) & dev->vram_mask]);
p[x + 4] = video_15to32[dat & 0xffff];
p[x + 5] = video_15to32[dat >> 16];
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1) + 12) & dev->vram_mask]);
p[x + 6] = video_15to32[dat & 0xffff];
p[x + 7] = video_15to32[dat >> 16];
}
dev->ma += (x << 1);
dev->ma &= dev->vram_mask;
}
}
void
ibm8514_render_16bpp(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int x;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint32_t *p;
uint32_t dat;
if ((dev->displine + svga->y_add) < 0) {
return;
}
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->h_disp; x += 8) {
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1)) & dev->vram_mask]);
p[x] = video_16to32[dat & 0xffff];
p[x + 1] = video_16to32[dat >> 16];
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1) + 4) & dev->vram_mask]);
p[x + 2] = video_16to32[dat & 0xffff];
p[x + 3] = video_16to32[dat >> 16];
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1) + 8) & dev->vram_mask]);
p[x + 4] = video_16to32[dat & 0xffff];
p[x + 5] = video_16to32[dat >> 16];
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 1) + 12) & dev->vram_mask]);
p[x + 6] = video_16to32[dat & 0xffff];
p[x + 7] = video_16to32[dat >> 16];
}
dev->ma += (x << 1);
dev->ma &= dev->vram_mask;
}
}
void
ibm8514_render_24bpp(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint32_t *p;
uint32_t dat;
if ((dev->displine + svga->y_add) < 0)
return;
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
for (int x = 0; x <= dev->h_disp; x += 4) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
p[x] = dat & 0xffffff;
dat = *(uint32_t *) (&dev->vram[(dev->ma + 3) & dev->vram_mask]);
p[x + 1] = dat & 0xffffff;
dat = *(uint32_t *) (&dev->vram[(dev->ma + 6) & dev->vram_mask]);
p[x + 2] = dat & 0xffffff;
dat = *(uint32_t *) (&dev->vram[(dev->ma + 9) & dev->vram_mask]);
p[x + 3] = dat & 0xffffff;
dev->ma += 12;
}
dev->ma &= dev->vram_mask;
}
}
void
ibm8514_render_BGR(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
uint32_t *p;
uint32_t dat;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if ((dev->displine + svga->y_add) < 0)
return;
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
for (int x = 0; x <= dev->h_disp; x += 4) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dat = *(uint32_t *) (&dev->vram[(dev->ma + 3) & dev->vram_mask]);
p[x + 1] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dat = *(uint32_t *) (&dev->vram[(dev->ma + 6) & dev->vram_mask]);
p[x + 2] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dat = *(uint32_t *) (&dev->vram[(dev->ma + 9) & dev->vram_mask]);
p[x + 3] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dev->ma += 12;
}
dev->ma &= dev->vram_mask;
}
}
void
ibm8514_render_ABGR8888(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int x;
uint32_t *p;
uint32_t dat;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if ((dev->displine + svga->y_add) < 0)
return;
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 2)) & dev->vram_mask]);
*p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
}
dev->ma += (x * 4);
dev->ma &= dev->vram_mask;
}
}
void
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
ibm8514_render_32bpp(svga_t *svga)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int x;
uint32_t *p;
uint32_t dat;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if ((dev->displine + svga->y_add) < 0)
return;
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || dev->changedvram[(dev->ma >> 12) + 2] || svga->fullchange) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 2)) & dev->vram_mask]);
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
p[x] = dat & 0xffffff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
dev->ma += (x * 4);
dev->ma &= dev->vram_mask;
}
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
static void
ibm8514_render_overscan_left(ibm8514_t *dev, svga_t *svga)
{
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if ((dev->displine + svga->y_add) < 0)
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (svga->scrblank || (dev->h_disp == 0))
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Even more sonarlint work
2023-06-01 18:32:25 -04:00
for (int i = 0; i < svga->x_add; i++)
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
buffer32->line[dev->displine + svga->y_add][i] = svga->overscan_color;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
static void
ibm8514_render_overscan_right(ibm8514_t *dev, svga_t *svga)
{
Yet more sonarlint fixes
2023-05-29 01:30:51 -04:00
int right;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
8514/A changes: Reduced the number of variables that depend on the main SVGA handler. Re-implemented accel command 5 (Polygon Boundary Line) right. Implemented Polygon fill type A and B (latter not tested yet) on accel command 2 per manual. Fixed crashes when starting Win2.1x using the built-in 8514/A driver. Some wip cleanups.
2022-05-19 00:15:03 +02:00
if ((dev->displine + svga->y_add) < 0)
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (svga->scrblank || (dev->h_disp == 0))
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
right = (overscan_x >> 1);
Even more sonarlint work
2023-06-01 18:32:25 -04:00
for (int i = 0; i < right; i++)
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->h_disp + i] = svga->overscan_color;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
void
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
ibm8514_poll(void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga_t *svga = (svga_t *)priv;
ibm8514_t *dev = (ibm8514_t *)svga->dev8514;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
uint32_t x;
Yet more sonarlint fixes
2023-05-29 01:30:51 -04:00
int wx;
int wy;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
ibm8514_log("IBM 8514/A poll.\n");
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->on) {
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
ibm8514_log("ON!\n");
if (!dev->linepos) {
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) {
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - dev->hwcursor_latch.yoff;
dev->hwcursor_oddeven = 0;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1);
dev->hwcursor_oddeven = 1;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
timer_advance_u64(&svga->timer, dev->dispofftime);
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga->cgastat |= 1;
dev->linepos = 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->dispon) {
dev->hdisp_on = 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->ma &= dev->vram_mask;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->firstline == 2000) {
dev->firstline = dev->displine;
video_wait_for_buffer_monitor(svga->monitor_index);
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->hwcursor_on)
dev->changedvram[dev->ma >> 12] = dev->changedvram[(dev->ma >> 12) + 1] = dev->interlace ? 3 : 2;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga->render8514(svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga->x_add = (overscan_x >> 1);
ibm8514_render_overscan_left(dev, svga);
ibm8514_render_overscan_right(dev, svga);
svga->x_add = (overscan_x >> 1);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->hwcursor_on) {
if (svga->hwcursor_draw)
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
svga->hwcursor_draw(svga, (dev->displine + svga->y_add + ((dev->hwcursor_latch.y >= 0) ? 0 : dev->hwcursor_latch.y)) & 2047);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->hwcursor_on--;
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->hwcursor_on && dev->interlace)
dev->hwcursor_on--;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->lastline < dev->displine)
dev->lastline = dev->displine;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
dev->displine++;
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->interlace)
dev->displine++;
if ((svga->cgastat & 8) && ((dev->displine & 0x0f) == (svga->crtc[0x11] & 0x0f)) && svga->vslines)
svga->cgastat &= ~8;
svga->vslines++;
if (dev->displine > 1500)
dev->displine = 0;
} else {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
timer_advance_u64(&svga->timer, dev->dispontime);
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->dispon)
svga->cgastat &= ~1;
dev->hdisp_on = 0;
dev->linepos = 0;
if (dev->dispon) {
if (dev->sc == dev->rowcount) {
dev->sc = 0;
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
dev->maback += (dev->rowoffset << 3);
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->interlace)
dev->maback += (dev->rowoffset << 3);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->maback &= dev->vram_mask;
dev->ma = dev->maback;
} else {
dev->sc++;
dev->sc &= 0x1f;
dev->ma = dev->maback;
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->vc++;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->vc &= 0xfff;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->vc == dev->dispend) {
dev->dispon = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
for (x = 0; x < ((dev->vram_mask + 1) >> 12); x++) {
if (dev->changedvram[x])
dev->changedvram[x]--;
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (svga->fullchange)
svga->fullchange--;
}
if (dev->vc == dev->v_syncstart) {
dev->dispon = 0;
svga->cgastat |= 8;
x = dev->h_disp;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->interlace && !dev->oddeven)
dev->lastline++;
if (dev->interlace && dev->oddeven)
dev->firstline--;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
wx = x;
wy = dev->lastline - dev->firstline;
svga_doblit(wx, wy, svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->firstline = 2000;
dev->lastline = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->firstline_draw = 2000;
dev->lastline_draw = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->oddeven ^= 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga->monitor->mon_changeframecount = dev->interlace ? 3 : 2;
svga->vslines = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
if (dev->interlace && dev->oddeven)
dev->ma = dev->maback = (dev->rowoffset << 1);
else
dev->ma = dev->maback = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->ma = (dev->ma << 2);
dev->maback = (dev->maback << 2);
}
if (dev->vc == dev->v_total) {
dev->vc = 0;
dev->sc = 0;
dev->dispon = 1;
dev->displine = (dev->interlace && dev->oddeven) ? 1 : 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga->x_add = (overscan_x >> 1);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
dev->hwcursor_on = 0;
dev->hwcursor_latch = dev->hwcursor;
}
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
}
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
void
ibm8514_recalctimings(svga_t *svga)
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
svga->render8514 = ibm8514_render_blank;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#ifdef ATI_8514_ULTRA
if (dev->extensions) {
if (svga->ext8514 != NULL)
ati8514_recalctimings(svga);
} else
#endif
{
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->on) {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->h_total = dev->htotal + 1;
dev->rowcount = !!(dev->disp_cntl & 0x08);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (dev->accel.advfunc_cntl & 0x01) {
if (dev->accel.advfunc_cntl & 0x04) {
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
} else {
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
dev->h_disp = 640;
dev->dispend = 480;
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
} else {
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (dev->accel.advfunc_cntl & 0x04)
svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0;
else
svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
if (dev->dispend == 766)
dev->dispend += 2;
if (dev->dispend == 478)
dev->dispend += 2;
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
if (dev->interlace)
dev->dispend >>= 1;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->pitch = 1024;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->rowoffset = 0x80;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
svga->map8 = dev->pallook;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->vram_512k_8514) {
if (dev->h_disp == 640)
dev->pitch = 640;
}
dev->accel_bpp = 8;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
svga->render8514 = ibm8514_render_8bpp;
ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->accel.advfunc_cntl & 4, !ibm8514_standalone_enabled);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
ibm8514_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
static uint8_t
ibm8514_mca_read(int port, void *priv)
{
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
const svga_t *svga = (svga_t *) priv;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
return (dev->pos_regs[port & 7]);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
static void
ibm8514_mca_write(int port, uint8_t val, void *priv)
{
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
svga_t *svga = (svga_t *) priv;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
/* MCA does not write registers below 0x0100. */
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
if (port < 0x0102)
return;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
/* Save the MCA register value. */
dev->pos_regs[port & 7] = val;
}
static uint8_t
ibm8514_mca_feedb(void *priv)
{
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
const svga_t *svga = (svga_t *) priv;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
return dev->pos_regs[2] & 1;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
static void
ibm8514_mca_reset(void *priv)
{
svga_t *svga = (svga_t *) priv;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
ibm8514_log("MCA reset.\n");
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->on = 0;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
vga_on = 1;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
#ifdef ATI_8514_ULTRA
if (dev->extensions)
ati8514_mca_write(0x102, 0, svga);
else
#endif
ibm8514_mca_write(0x102, 0, svga);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
timer_set_callback(&svga->timer, svga_poll);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
static void *
ibm8514_init(const device_t *info)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
#ifdef ATI_8514_ULTRA
uint32_t bios_addr = 0;
#endif
Accelerator fixes part 2: 8514/A. Mix patterns are drawn at the correct position now instead of backwards. Better handling of subsys/subcntl side. As usual, better handling of the VGA on/off passthrough. Better handling of the accelerator pitch (TODO: need a way to properly identify 640x480x256 in the pitch side).
2023-05-05 19:55:27 +02:00
if (svga_get_pri() == NULL)
return NULL;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
svga_t *svga = svga_get_pri();
ibm8514_t *dev = (ibm8514_t *) calloc(1, sizeof(ibm8514_t));
svga->dev8514 = dev;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
svga->ext8514 = NULL;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->vram_amount = device_get_config_int("memory");
dev->vram_512k_8514 = dev->vram_amount == 512;
dev->vram_size = dev->vram_amount << 10;
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->vram = calloc(dev->vram_size, 1);
Video changes of the day (July 8th, 2024) IBM 8514/A set: Fixed a one off video bug that was causing the VGA video to not be restored after quitting a 8514/A GUI session (namely on Win2.x' 8514/A's driver). ATI Mach32: Fixed another vertical display issue when activated (in 1280x1024 mode, when 1024 was 1022). All involved: Apply RG's changedvram fix to 8514/A, Mach8/32 and XGA's changedvram pointers.
2024-07-08 21:21:06 +02:00
dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1);
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
dev->vram_mask = dev->vram_size - 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->map8 = dev->pallook;
More ATI changes plus one IBM 8514/A fix: 1. Made the 4 color mode (67h) work properly now, including its 4 schemes on all ATI cards that support said mode. 2. Shadow set now has a true purpose for 8514/A compatibility on ATI Mach8/32. 3. Non-ATI 8514/A used to not work before because of the dev->local variable was not being set to 0 in the ibm8514_init() function, now it's fixed.
2023-12-27 21:01:25 +01:00
dev->local = 0;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel_bpp = 8;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
sonarlint vid_8514a.c
2023-07-30 18:47:40 -04:00
dev->type = info->flags;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->bpp = 0;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#ifdef ATI_8514_ULTRA
dev->extensions = device_get_config_int("extensions");
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
bios_addr = device_get_config_hex20("bios_addr");
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
switch (dev->extensions) {
case 1:
if (rom_present(BIOS_MACH8_ROM_PATH)) {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach_t * mach = (mach_t *) calloc(1, sizeof(mach_t));
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
svga->ext8514 = mach;
if (dev->type & DEVICE_MCA) {
rom_init(&dev->bios_rom,
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
BIOS_MACH8_ROM_PATH,
0xc6000, 0x2000, 0x1fff,
0, MEM_MAPPING_EXTERNAL);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
dev->pos_regs[0] = 0x88;
dev->pos_regs[1] = 0x80;
mca_add(ati8514_mca_read, ati8514_mca_write, ibm8514_mca_feedb, ibm8514_mca_reset, svga);
ati_eeprom_load(&mach->eeprom, "ati8514_mca.nvr", 0);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mem_mapping_disable(&dev->bios_rom.mapping);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
} else {
rom_init(&dev->bios_rom,
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
BIOS_MACH8_ROM_PATH,
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
bios_addr, 0x1000, 0xfff,
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
0, MEM_MAPPING_EXTERNAL);
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
rom_init(&dev->bios_rom2,
BIOS_MACH8_ROM_PATH,
bios_addr + 0x1000, 0x800, 0x7ff,
0x1000, MEM_MAPPING_EXTERNAL);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
ati_eeprom_load(&mach->eeprom, "ati8514.nvr", 0);
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
mach->accel.scratch0 = (((bios_addr >> 7) - 0x1000) >> 4);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach->accel.scratch1 = mach->accel.scratch0 - 0x80;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ati8514_init(svga, svga->ext8514, svga->dev8514);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
break;
}
fallthrough;
default:
ibm8514_io_set(svga);
if (dev->type & DEVICE_MCA) {
dev->pos_regs[0] = 0x7f;
dev->pos_regs[1] = 0xef;
mca_add(ibm8514_mca_read, ibm8514_mca_write, ibm8514_mca_feedb, ibm8514_mca_reset, svga);
}
break;
}
#else
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
ibm8514_io_set(svga);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->type & DEVICE_MCA) {
8514/A: Pitch no longer hardcoded to 1024, fixes 640x480x256 resolutions. 8514/A: More fixes to the accelerated engine, mainly in paintbrush (blackness brush). SVGA: Preparation of the next batch.
2022-06-12 17:31:54 +02:00
dev->pos_regs[0] = 0x7f;
dev->pos_regs[1] = 0xef;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mca_add(ibm8514_mca_read, ibm8514_mca_write, ibm8514_mca_feedb, ibm8514_mca_reset, svga);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#endif
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
return svga;
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_close(void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
#ifdef ATI_8514_ULTRA
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach_t *mach = (mach_t *) svga->ext8514;
if (mach)
free(mach);
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
#endif
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
if (dev) {
free(dev->vram);
free(dev->changedvram);
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
free(dev);
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_speed_changed(void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
svga_recalctimings(svga);
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
ibm8514_force_redraw(void *priv)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
svga_t *svga = (svga_t *) priv;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
clang format in src/video (#2654)
2022-08-31 19:19:29 -04:00
svga->fullchange = changeframecount;
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#ifdef ATI_8514_ULTRA
// clang-format off
static const device_config_t ext8514_config[] = {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
{
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.default_int = 1024,
.selection = {
{
.description = "512 KB",
.value = 512
},
{
.description = "1 MB",
.value = 1024
},
{
.description = ""
}
}
},
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
{
.name = "extensions",
.description = "Vendor",
.type = CONFIG_SELECTION,
.default_int = 0,
.selection = {
{
.description = "IBM",
.value = 0
},
{
.description = "ATI",
.value = 1
},
{
.description = ""
}
}
},
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
{
.name = "bios_addr",
.description = "BIOS address",
.type = CONFIG_HEX20,
.default_string = "",
.default_int = 0xc8000,
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "C800h", .value = 0xc8000 },
{ .description = "CA00h", .value = 0xca000 },
{ .description = "CC00h", .value = 0xcc000 },
{ .description = "CE00h", .value = 0xce000 },
{ .description = "D000h", .value = 0xd0000 },
{ .description = "D200h", .value = 0xd2000 },
{ .description = "D400h", .value = 0xd4000 },
{ .description = "D600h", .value = 0xd6000 },
{ .description = "D800h", .value = 0xd8000 },
{ .description = "DA00h", .value = 0xda000 },
{ .description = "DC00h", .value = 0xdc000 },
{ .description = "DE00h", .value = 0xde000 },
{ .description = "" }
},
},
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
{
.type = CONFIG_END
}
};
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
#else
// clang-format off
static const device_config_t ext8514_config[] = {
{
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.default_int = 1024,
.selection = {
{
.description = "512 KB",
.value = 512
},
{
.description = "1 MB",
.value = 1024
},
{
.description = ""
}
}
},
{
.type = CONFIG_END
}
};
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#endif
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
// clang-format off
const device_t gen8514_isa_device = {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
.name = "IBM 8514/A clone (ISA)",
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
.internal_name = "8514_isa",
.flags = DEVICE_AT | DEVICE_ISA,
.local = 0,
.init = ibm8514_init,
.close = ibm8514_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = ibm8514_speed_changed,
.force_redraw = ibm8514_force_redraw,
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
.config = ext8514_config
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
};
const device_t ibm8514_mca_device = {
.name = "IBM 8514/A (MCA)",
.internal_name = "8514_mca",
.flags = DEVICE_MCA,
.local = 0,
.init = ibm8514_init,
.close = ibm8514_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = ibm8514_speed_changed,
.force_redraw = ibm8514_force_redraw,
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
.config = ext8514_config
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
};
void
ibm8514_device_add(void)
{
8514/A and XGA handling refactor: * separate (ibm8514|xga)_enabled into (ibm8514|xga)_standalone_enabled and (ibm8514|xga)_active, the former being enabled only for standalone 8514/A or XGA cards, the latter for all 8514/A and XGA-capable cards and not saved into the config file; * remove (ibm8514|xga)_has_vga and replace all uses of it with (ibm8514|xga)_standalone_enabled; * Qt UI: the checkboxes for standalone 8514/A and XGA are now correctly grayed out if an (S)VGA card with 8514/A or XGA capability is selected, including cases when the card is an internal/onboard one; said cards are now no longer appear as SVGA multi-monitor compatible.
2023-08-22 17:56:55 +05:00
if (!ibm8514_standalone_enabled)
Initial emulation of the IBM 8514/A coprocessor for both the MCA and ISA buses. Currently the GUI option is on the QT frontend.
2022-05-14 18:55:00 +02:00
return;
if (machine_has_bus(machine, MACHINE_BUS_MCA))
device_add(&ibm8514_mca_device);
else
device_add(&gen8514_isa_device);
}
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