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86Box/src/cpu/x86seg.h

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Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
/*
Header cleanups Tabs to spaces Consistency
2022-11-13 16:37:58 -05:00
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
*
Header cleanups Tabs to spaces Consistency
2022-11-13 16:37:58 -05:00
* This file is part of the 86Box distribution.
Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
*
The 286/386 interpreter now has its own variant of x86seg.c.
2023-08-21 02:56:33 +02:00
* x86 CPU segment emulation header.
Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
*
Remove version tree-wide
2020-03-25 00:46:02 +02:00
*
Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
*
Header cleanups Tabs to spaces Consistency
2022-11-13 16:37:58 -05:00
* Authors: Miran Grca, <mgrca8@gmail.com>
More cleanups to separate main code from platform support and UI support, plus a few bugfixes.
2017-10-12 14:25:17 -04:00
*
Header cleanups Tabs to spaces Consistency
2022-11-13 16:37:58 -05:00
* Copyright 2016-2017 Miran Grca.
Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
*/
The 286/386 interpreter now has its own variant of x86seg.c.
2023-08-21 02:56:33 +02:00
#ifndef EMU_X86SEG_H
#define EMU_X86SEG_H
Implemented PCI interrupt controller ports 4D0 and 4D1; Applied more mainline PCem commits; Repplied the CPU optimization commit alongside the fix commit.
2017-06-03 00:45:12 +02:00
The 286/386 interpreter now has its own variant of x86seg.c.
2023-08-21 02:56:33 +02:00
#ifdef OPS_286_386
extern void x86_doabrt_2386(int x86_abrt);
#ifdef USE_NEW_DYNAREC
extern int loadseg_2386(uint16_t seg, x86seg *s);
#else
extern void loadseg_2386(uint16_t seg, x86seg *s);
#endif
extern void loadcs_2386(uint16_t seg);
extern void loadcsjmp_2386(uint16_t seg, uint32_t old_pc);
#ifdef USE_NEW_DYNAREC
extern void loadcscall_2386(uint16_t seg, uint32_t old_pc);
#else
extern void loadcscall_2386(uint16_t seg);
#endif
extern void pmoderetf_2386(int is32, uint16_t off);
extern void pmodeint_2386(int num, int soft);
extern void pmodeiret_2386(int is32);
extern void taskswitch286_2386(uint16_t seg, uint16_t *segdat, int is32);
/* #define's to avoid long #ifdef blocks in x86_ops_*.h. */
#define op_doabrt x86_doabrt_2386
#define op_loadseg loadseg_2386
#define op_loadcs loadcs_2386
#define op_loadcsjmp loadcsjmp_2386
#define op_loadcscall loadcscall_2386
#define op_pmoderetf pmoderetf_2386
#define op_pmodeint pmodeint_2386
#define op_pmodeiret pmodeiret_2386
#define op_taskswitch taskswitch_2386
#define op_taskswitch286 taskswitch286_2386
#else
extern void x86_doabrt(int x86_abrt);
#ifdef USE_NEW_DYNAREC
extern int loadseg(uint16_t seg, x86seg *s);
#else
extern void loadseg(uint16_t seg, x86seg *s);
#endif
/* The prototype of loadcs_2386() is needed here for reset. */
extern void loadcs_2386(uint16_t seg);
extern void loadcs(uint16_t seg);
extern void loadcsjmp(uint16_t seg, uint32_t old_pc);
#ifdef USE_NEW_DYNAREC
extern void loadcscall(uint16_t seg, uint32_t old_pc);
#else
extern void loadcscall(uint16_t seg);
#endif
extern void pmoderetf(int is32, uint16_t off);
/* The prototype of pmodeint_2386() is needed here for 386_common.c interrupts. */
extern void pmodeint_2386(int num, int soft);
extern void pmodeint(int num, int soft);
extern void pmodeiret(int is32);
extern void taskswitch286(uint16_t seg, uint16_t *segdat, int is32);
/* #define's to avoid long #ifdef blocks in x86_ops_*.h. */
#define op_doabrt x86_doabrt
#define op_loadseg loadseg
#define op_loadcs loadcs
#define op_loadcsjmp loadcsjmp
#define op_loadcscall loadcscall
#define op_pmoderetf pmoderetf
#define op_pmodeint pmodeint
#define op_pmodeiret pmodeiret
#define op_taskswitch286 taskswitch286
#endif
extern void cyrix_write_seg_descriptor_2386(uint32_t addr, x86seg *seg);
extern void cyrix_load_seg_descriptor_2386(uint32_t addr, x86seg *seg);
WARNING: CONFIGS MIGHT PARTIALLY BREAK WHERE DEVICE NAMES HAVE CHANGED. Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite; Added device.c/h API to obtain name from the device_t struct; Significant changes to win/win_settings.c to clean up the code a bit and fix bugs; Ported all the CPU and AudioPCI commits from PCem; Added an API call to allow ACPI soft power off to gracefully stop the emulator; Removed the Siemens PCD-2L from the Dev branch because it now works; Removed the Socket 5 HP Vectra from the Dev branch because it now works; Fixed the Compaq Presario and the Micronics Spitfire; Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470; SMM fixes; Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions; Changed IDE reset period to match the specification, fixes #929; The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset; Added the Intel AN430TX but Dev branched because it does not work; The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full); Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types; USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it); Fixed NVR on the the SMC FDC37C932QF and APM variants; A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX; Some ACPI changes.
2020-11-16 00:01:21 +01:00
extern void cyrix_write_seg_descriptor(uint32_t addr, x86seg *seg);
extern void cyrix_load_seg_descriptor(uint32_t addr, x86seg *seg);
The 286/386 interpreter now has its own variant of x86seg.c.
2023-08-21 02:56:33 +02:00
#endif /*EMU_X86SEG_H*/
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