2016-08-14 22:07:17 -04:00
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/* Copyright holders: Tenshi
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see COPYING for more details
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*/
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2016-06-26 00:34:39 +02:00
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/*
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National Semiconductors PC87306 Super I/O Chip
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Used by Intel Advanced/EV
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*/
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#include "ibm.h"
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2016-11-11 03:16:41 +01:00
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#include "disc.h"
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2016-06-26 00:34:39 +02:00
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#include "fdc.h"
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#include "fdd.h"
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#include "io.h"
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#include "lpt.h"
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#include "serial.h"
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#include "pc87306.h"
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static int pc87306_locked;
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static int pc87306_curreg;
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static uint8_t pc87306_regs[29];
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static uint8_t pc87306_gpio[2] = {0xFF, 0xFF};
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static uint8_t tries;
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static uint16_t lpt_port;
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2016-12-23 03:16:24 +01:00
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static int power_down = 0;
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2016-06-26 00:34:39 +02:00
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void pc87306_gpio_remove();
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void pc87306_gpio_init();
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void pc87306_gpio_write(uint16_t port, uint8_t val, void *priv)
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{
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2016-12-23 03:16:24 +01:00
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if (port & 1)
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{
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return;
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}
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2016-06-26 00:34:39 +02:00
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pc87306_gpio[port & 1] = val;
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}
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uint8_t uart_int1()
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{
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2016-12-23 03:16:24 +01:00
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/* 0: IRQ3, 1: IRQ4 */
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return ((pc87306_regs[0x1C] >> 2) & 1) ? 3 : 4;
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2016-06-26 00:34:39 +02:00
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}
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uint8_t uart_int2()
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{
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2016-12-23 03:16:24 +01:00
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return ((pc87306_regs[0x1C] >> 6) & 1) ? 3 : 4;
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2016-06-26 00:34:39 +02:00
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}
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uint8_t uart1_int()
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{
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2016-09-22 21:33:14 +02:00
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uint8_t temp;
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2016-09-22 21:22:56 +02:00
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temp = ((pc87306_regs[1] >> 2) & 1) ? 3 : 4; /* 0 = IRQ 4, 1 = IRQ 3 */
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2016-12-23 03:16:24 +01:00
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// pclog("UART 1 set to IRQ %i\n", (pc87306_regs[0x1C] & 1) ? uart_int1() : temp);
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2016-09-22 21:22:56 +02:00
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return (pc87306_regs[0x1C] & 1) ? uart_int1() : temp;
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2016-06-26 00:34:39 +02:00
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}
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uint8_t uart2_int()
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{
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2016-09-22 21:33:14 +02:00
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uint8_t temp;
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2016-09-22 21:22:56 +02:00
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temp = ((pc87306_regs[1] >> 4) & 1) ? 3 : 4; /* 0 = IRQ 4, 1 = IRQ 3 */
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2016-12-23 03:16:24 +01:00
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// pclog("UART 2 set to IRQ %i\n", (pc87306_regs[0x1C] & 1) ? uart_int2() : temp);
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2016-09-22 21:22:56 +02:00
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return (pc87306_regs[0x1C] & 1) ? uart_int2() : temp;
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2016-06-26 00:34:39 +02:00
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}
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2016-12-23 03:16:24 +01:00
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void lpt1_handler()
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{
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int temp;
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if (pc87306_regs[0x1B] & 0x10)
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{
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temp = (pc87306_regs[0x1B] & 0x20) >> 5;
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if (temp)
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{
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lpt_port = 0x378;
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}
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else
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{
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lpt_port = 0x278;
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}
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}
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else
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{
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temp = pc87306_regs[0x01] & 3;
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switch (temp)
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{
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case 0: lpt_port = 0x378;
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case 1: lpt_port = 0x3bc;
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case 2: lpt_port = 0x278;
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}
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}
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lpt1_init(lpt_port);
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pc87306_regs[0x19] = lpt_port >> 2;
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}
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2016-06-26 00:34:39 +02:00
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void serial1_handler()
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{
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int temp;
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temp = (pc87306_regs[1] >> 2) & 3;
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switch (temp)
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{
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case 0: serial1_set(0x3f8, uart1_int()); break;
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case 1: serial1_set(0x2f8, uart1_int()); break;
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case 2:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial1_set(0x3e8, uart1_int()); break;
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case 1: serial1_set(0x338, uart1_int()); break;
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case 2: serial1_set(0x2e8, uart1_int()); break;
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case 3: serial1_set(0x220, uart1_int()); break;
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}
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break;
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case 3:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial1_set(0x2e8, uart1_int()); break;
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case 1: serial1_set(0x238, uart1_int()); break;
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case 2: serial1_set(0x2e0, uart1_int()); break;
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case 3: serial1_set(0x228, uart1_int()); break;
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}
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break;
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}
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}
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void serial2_handler()
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{
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int temp;
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temp = (pc87306_regs[1] >> 4) & 3;
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switch (temp)
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{
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case 0: serial2_set(0x3f8, uart2_int()); break;
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case 1: serial2_set(0x2f8, uart2_int()); break;
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case 2:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial2_set(0x3e8, uart2_int()); break;
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case 1: serial2_set(0x338, uart2_int()); break;
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case 2: serial2_set(0x2e8, uart2_int()); break;
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case 3: serial2_set(0x220, uart2_int()); break;
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}
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break;
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case 3:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial2_set(0x2e8, uart2_int()); break;
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case 1: serial2_set(0x238, uart2_int()); break;
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case 2: serial2_set(0x2e0, uart2_int()); break;
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case 3: serial2_set(0x228, uart2_int()); break;
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}
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break;
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}
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}
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void pc87306_write(uint16_t port, uint8_t val, void *priv)
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{
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2016-09-22 22:48:31 +02:00
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uint8_t index;
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index = (port & 1) ? 0 : 1;
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2016-06-26 00:34:39 +02:00
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int temp;
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uint8_t valxor;
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// pclog("pc87306_write : port=%04x reg %02X = %02X locked=%i\n", port, pc87306_curreg, val, pc87306_locked);
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if (index)
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{
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2016-12-23 03:16:24 +01:00
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pc87306_curreg = val & 0x1f;
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2016-09-22 22:48:31 +02:00
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// pclog("Register set to: %02X\n", val);
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2016-06-26 00:34:39 +02:00
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tries = 0;
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return;
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}
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else
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{
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if (tries)
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{
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if (pc87306_curreg <= 28) valxor = val ^ pc87306_regs[pc87306_curreg];
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2017-01-26 17:20:55 +01:00
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tries = 0;
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if ((pc87306_curreg <= 28) && (pc87306_curreg != 8) && (pc87306_curreg != 0x18))
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2016-12-23 03:16:24 +01:00
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{
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2017-01-26 17:20:55 +01:00
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if (pc87306_curreg == 0)
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{
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val &= 0x5f;
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}
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if ((pc87306_curreg == 0x0F) || (pc87306_curreg == 0x12))
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{
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pc87306_gpio_remove();
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}
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2016-12-23 03:16:24 +01:00
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pc87306_regs[pc87306_curreg] = val;
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// pclog("Register %02X set to: %02X (was: %02X)\n", pc87306_curreg, val, pc87306_regs[pc87306_curreg]);
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2017-01-26 17:20:55 +01:00
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goto process_value;
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2016-12-23 03:16:24 +01:00
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}
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2016-06-26 00:34:39 +02:00
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}
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else
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{
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tries++;
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return;
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}
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}
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2016-09-22 22:48:31 +02:00
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return;
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2016-06-26 00:34:39 +02:00
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process_value:
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switch(pc87306_curreg)
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{
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case 0:
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if (valxor & 1)
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{
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lpt1_remove();
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}
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if ((valxor & 1) && (val & 1))
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{
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2016-12-23 03:16:24 +01:00
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lpt1_handler();
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2016-06-26 00:34:39 +02:00
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}
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2016-09-22 22:48:31 +02:00
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if (valxor & 2)
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{
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serial1_remove();
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if (val & 2)
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{
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serial1_handler();
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}
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}
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if (valxor & 4)
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2016-06-26 00:34:39 +02:00
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{
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2016-09-22 22:48:31 +02:00
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serial2_remove();
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2016-12-23 03:16:24 +01:00
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if (val & 4)
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{
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serial2_handler();
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}
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2016-06-26 00:34:39 +02:00
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}
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break;
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case 1:
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2016-09-22 22:48:31 +02:00
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if (valxor & 1)
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2016-06-26 00:34:39 +02:00
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{
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2016-09-22 22:48:31 +02:00
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lpt1_remove();
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if (pc87306_regs[0] & 1)
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2016-06-26 00:34:39 +02:00
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{
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2016-12-23 03:16:24 +01:00
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lpt1_handler();
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2016-06-26 00:34:39 +02:00
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}
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2016-09-22 22:48:31 +02:00
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}
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if (valxor & 0xcc)
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{
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serial1_remove();
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if (pc87306_regs[0] & 2)
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2016-06-26 00:34:39 +02:00
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{
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2016-09-22 22:48:31 +02:00
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serial1_handler();
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2016-06-26 00:34:39 +02:00
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}
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}
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2016-09-22 22:48:31 +02:00
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if (valxor & 0xf0)
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2016-06-26 00:34:39 +02:00
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{
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2016-09-22 22:48:31 +02:00
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serial2_remove();
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2016-12-23 03:16:24 +01:00
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if (pc87306_regs[0] & 4)
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{
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serial2_handler();
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}
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}
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break;
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case 2:
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lpt1_remove();
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serial1_remove();
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serial2_remove();
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if (val & 1)
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{
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pc87306_regs[0] &= 0xb0;
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}
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else
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{
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lpt1_handler();
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serial1_handler();
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// serial2_handler();
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pc87306_regs[0] |= 0x4b;
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2016-06-26 00:34:39 +02:00
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}
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break;
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case 9:
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2016-12-23 08:16:54 +01:00
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// pclog("Setting DENSEL polarity to: %i (before: %i)\n", (val & 0x40 ? 1 : 0), fdc_get_densel_polarity());
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2016-11-07 06:39:20 +01:00
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fdc_update_enh_mode((val & 4) ? 1 : 0);
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2016-11-02 22:39:07 +01:00
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fdc_update_densel_polarity((val & 0x40) ? 1 : 0);
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2016-06-26 00:34:39 +02:00
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break;
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case 0xF:
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2017-01-26 17:20:55 +01:00
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case 0x12:
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2016-06-26 00:34:39 +02:00
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pc87306_gpio_init();
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break;
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case 0x1C:
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2016-09-22 22:48:31 +02:00
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// if (valxor & 0x25)
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if (valxor)
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2016-06-26 00:34:39 +02:00
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{
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serial1_remove();
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serial2_remove();
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if (pc87306_regs[0] & 2)
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{
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serial1_handler();
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}
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if (pc87306_regs[0] & 4) serial2_handler();
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}
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break;
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}
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}
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uint8_t pc87306_gpio_read(uint16_t port, void *priv)
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{
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2016-12-23 03:16:24 +01:00
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if (port & 1)
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{
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return 0xfb; /* Bit 2 clear, since we don't emulate the on-board audio. */
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
return pc87306_gpio[port & 1];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint8_t pc87306_read(uint16_t port, void *priv)
|
|
|
|
|
{
|
|
|
|
|
// pclog("pc87306_read : port=%04x reg %02X locked=%i\n", port, pc87306_curreg, pc87306_locked);
|
2016-09-22 22:48:31 +02:00
|
|
|
uint8_t index;
|
|
|
|
|
index = (port & 1) ? 0 : 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2016-12-23 03:16:24 +01:00
|
|
|
tries = 0;
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
if (index)
|
2016-12-23 03:16:24 +01:00
|
|
|
{
|
|
|
|
|
// pclog("PC87306: Read value %02X at the index register\n", pc87306_curreg & 0x1f);
|
|
|
|
|
return pc87306_curreg & 0x1f;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (pc87306_curreg >= 28)
|
2016-12-23 03:16:24 +01:00
|
|
|
{
|
|
|
|
|
// pclog("PC87306: Read invalid at data register, index %02X\n", pc87306_curreg);
|
2016-06-26 00:34:39 +02:00
|
|
|
return 0xff;
|
2016-12-23 03:16:24 +01:00
|
|
|
}
|
|
|
|
|
else if (pc87306_curreg == 8)
|
|
|
|
|
{
|
|
|
|
|
// pclog("PC87306: Read ID at data register, index 08\n");
|
|
|
|
|
return 0x70;
|
|
|
|
|
}
|
|
|
|
|
else if (pc87306_curreg == 5)
|
|
|
|
|
{
|
|
|
|
|
// pclog("PC87306: Read value %02X at data register, index 05\n", pc87306_regs[pc87306_curreg] | 4);
|
|
|
|
|
return pc87306_regs[pc87306_curreg] | 4;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
else
|
2016-12-23 03:16:24 +01:00
|
|
|
{
|
|
|
|
|
// pclog("PC87306: Read value %02X at data register, index %02X\n", pc87306_regs[pc87306_curreg], pc87306_curreg);
|
2016-06-26 00:34:39 +02:00
|
|
|
return pc87306_regs[pc87306_curreg];
|
2016-12-23 03:16:24 +01:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_gpio_remove()
|
|
|
|
|
{
|
|
|
|
|
io_removehandler(pc87306_regs[0xF] << 2, 0x0002, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_gpio_init()
|
|
|
|
|
{
|
2017-01-26 17:20:55 +01:00
|
|
|
if ((pc87306_regs[0x12]) & 0x10)
|
|
|
|
|
{
|
|
|
|
|
io_sethandler(pc87306_regs[0xF] << 2, 0x0001, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((pc87306_regs[0x12]) & 0x20)
|
|
|
|
|
{
|
|
|
|
|
io_sethandler((pc87306_regs[0xF] << 2) + 1, 0x0001, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, NULL);
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_init()
|
|
|
|
|
{
|
2016-12-23 03:16:24 +01:00
|
|
|
memset(pc87306_regs, 0, 29);
|
|
|
|
|
lpt2_remove();
|
|
|
|
|
|
|
|
|
|
// pc87306_regs[0] = 0xF;
|
|
|
|
|
pc87306_regs[0] = 0x4B;
|
|
|
|
|
// pc87306_regs[1] = 0x11;
|
|
|
|
|
pc87306_regs[1] = 0x01;
|
2016-11-07 06:39:20 +01:00
|
|
|
pc87306_regs[3] = 2;
|
2016-06-26 00:34:39 +02:00
|
|
|
pc87306_regs[5] = 0xD;
|
|
|
|
|
pc87306_regs[8] = 0x70;
|
|
|
|
|
pc87306_regs[9] = 0xFF;
|
|
|
|
|
pc87306_regs[0xF] = 0x1E;
|
2016-12-23 03:16:24 +01:00
|
|
|
pc87306_regs[0x12] = 0x30;
|
2016-06-26 00:34:39 +02:00
|
|
|
pc87306_regs[0x19] = 0xDE;
|
|
|
|
|
pc87306_regs[0x1B] = 0x10;
|
|
|
|
|
pc87306_regs[0x1C] = 0;
|
|
|
|
|
/*
|
|
|
|
|
0 = 360 rpm @ 500 kbps for 3.5"
|
|
|
|
|
1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5"
|
|
|
|
|
*/
|
|
|
|
|
fdc_update_is_nsc(1);
|
2016-11-07 06:39:20 +01:00
|
|
|
fdc_update_enh_mode(0);
|
2016-06-26 00:34:39 +02:00
|
|
|
fdc_update_densel_polarity(1);
|
2016-09-14 23:18:14 +02:00
|
|
|
fdc_update_max_track(85);
|
2016-06-26 00:34:39 +02:00
|
|
|
fdd_swap = 0;
|
|
|
|
|
io_sethandler(0x02e, 0x0002, pc87306_read, NULL, NULL, pc87306_write, NULL, NULL, NULL);
|
|
|
|
|
}
|