2017-10-11 05:40:44 -04:00
|
|
|
/*
|
|
|
|
|
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
|
|
|
|
* running old operating systems and software designed for IBM
|
|
|
|
|
* PC systems and compatibles from 1981 through fairly recent
|
|
|
|
|
* system designs based on the PCI bus.
|
|
|
|
|
*
|
|
|
|
|
* This file is part of the 86Box distribution.
|
|
|
|
|
*
|
2018-02-24 15:56:48 +01:00
|
|
|
* Oak OTI037C/67/077 emulation.
|
2017-10-11 05:40:44 -04:00
|
|
|
*
|
2020-03-25 00:46:02 +02:00
|
|
|
*
|
2017-10-11 05:40:44 -04:00
|
|
|
*
|
|
|
|
|
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
|
|
|
|
* Miran Grca, <mgrca8@gmail.com>
|
|
|
|
|
*
|
2018-02-03 03:19:12 +01:00
|
|
|
* Copyright 2008-2018 Sarah Walker.
|
|
|
|
|
* Copyright 2016-2018 Miran Grca.
|
2017-10-11 05:40:44 -04:00
|
|
|
*/
|
2017-09-25 04:31:20 -04:00
|
|
|
#include <stdint.h>
|
2016-06-26 00:34:39 +02:00
|
|
|
#include <stdlib.h>
|
2018-10-02 22:54:28 +02:00
|
|
|
#include <string.h>
|
2017-09-25 04:31:20 -04:00
|
|
|
#include <wchar.h>
|
2020-03-29 14:24:42 +02:00
|
|
|
#include <86box/86box.h>
|
|
|
|
|
#include <86box/io.h>
|
|
|
|
|
#include <86box/timer.h>
|
|
|
|
|
#include <86box/mem.h>
|
|
|
|
|
#include <86box/rom.h>
|
|
|
|
|
#include <86box/device.h>
|
|
|
|
|
#include <86box/video.h>
|
|
|
|
|
#include <86box/vid_svga.h>
|
2021-10-24 19:06:05 +02:00
|
|
|
#include <86box/vid_svga_render.h>
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2022-02-20 19:11:58 -05:00
|
|
|
#define BIOS_037C_PATH "roms/video/oti/bios.bin"
|
2021-11-21 13:33:22 -03:00
|
|
|
#define BIOS_067_AMA932J_PATH "roms/machines/ama932j/OTI067.BIN"
|
2021-11-21 13:17:30 -03:00
|
|
|
#define BIOS_067_M300_08_PATH "roms/machines/m30008/EVC_BIOS.ROM"
|
|
|
|
|
#define BIOS_067_M300_15_PATH "roms/machines/m30015/EVC_BIOS.ROM"
|
2022-02-20 19:11:58 -05:00
|
|
|
#define BIOS_077_PATH "roms/video/oti/oti077.vbi"
|
2017-11-01 01:51:19 -05:00
|
|
|
|
|
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
enum {
|
|
|
|
|
OTI_037C,
|
|
|
|
|
OTI_067 = 2,
|
|
|
|
|
OTI_067_AMA932J,
|
2021-07-04 18:22:52 +03:00
|
|
|
OTI_067_M300 = 4,
|
2018-10-08 00:22:40 +02:00
|
|
|
OTI_077 = 5
|
|
|
|
|
};
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
typedef struct {
|
|
|
|
|
svga_t svga;
|
|
|
|
|
|
|
|
|
|
rom_t bios_rom;
|
|
|
|
|
|
|
|
|
|
int index;
|
|
|
|
|
uint8_t regs[32];
|
|
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
uint8_t chip_id;
|
2017-10-11 05:40:44 -04:00
|
|
|
uint8_t pos;
|
2018-10-08 00:22:40 +02:00
|
|
|
uint8_t enable_register;
|
|
|
|
|
uint8_t dipswitch_val;
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
uint32_t vram_size;
|
|
|
|
|
uint32_t vram_mask;
|
|
|
|
|
} oti_t;
|
|
|
|
|
|
2018-09-19 20:13:32 +02:00
|
|
|
static video_timings_t timing_oti = {VIDEO_ISA, 6, 8,16, 6, 8,16};
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
oti_out(uint16_t addr, uint8_t val, void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
|
|
|
|
svga_t *svga = &oti->svga;
|
|
|
|
|
uint8_t old;
|
2018-10-08 00:22:40 +02:00
|
|
|
uint8_t idx, enable;
|
|
|
|
|
|
|
|
|
|
if (!oti->chip_id && !(oti->enable_register & 1) && (addr != 0x3C3))
|
|
|
|
|
return;
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) &&
|
|
|
|
|
!(svga->miscout & 1)) addr ^= 0x60;
|
|
|
|
|
|
|
|
|
|
switch (addr) {
|
2018-02-24 15:56:48 +01:00
|
|
|
case 0x3C3:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (!oti->chip_id) {
|
|
|
|
|
oti->enable_register = val & 1;
|
|
|
|
|
return;
|
|
|
|
|
} else
|
|
|
|
|
break;
|
2021-10-24 19:06:05 +02:00
|
|
|
break;
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2021-10-24 19:06:05 +02:00
|
|
|
case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9:
|
|
|
|
|
if (oti->chip_id == OTI_077)
|
|
|
|
|
sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga);
|
|
|
|
|
else
|
|
|
|
|
svga_out(addr, val, svga);
|
|
|
|
|
return;
|
2018-10-08 00:22:40 +02:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
case 0x3D4:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id)
|
|
|
|
|
svga->crtcreg = val & 0x3f;
|
|
|
|
|
else
|
|
|
|
|
svga->crtcreg = val; /* FIXME: The BIOS wants to set the test bit? */
|
2017-10-11 05:40:44 -04:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case 0x3D5:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id && (svga->crtcreg & 0x20))
|
2018-04-25 23:51:13 +02:00
|
|
|
return;
|
2018-10-08 00:22:40 +02:00
|
|
|
idx = svga->crtcreg;
|
|
|
|
|
if (!oti->chip_id)
|
|
|
|
|
idx &= 0x1f;
|
|
|
|
|
if ((idx < 7) && (svga->crtc[0x11] & 0x80))
|
2017-10-11 05:40:44 -04:00
|
|
|
return;
|
2018-10-08 00:22:40 +02:00
|
|
|
if ((idx == 7) && (svga->crtc[0x11] & 0x80))
|
2017-10-11 05:40:44 -04:00
|
|
|
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
|
2018-10-08 00:22:40 +02:00
|
|
|
old = svga->crtc[idx];
|
|
|
|
|
svga->crtc[idx] = val;
|
2017-10-11 05:40:44 -04:00
|
|
|
if (old != val) {
|
2018-10-08 00:22:40 +02:00
|
|
|
if ((idx < 0x0e) || (idx > 0x10)) {
|
2021-07-12 22:12:27 +02:00
|
|
|
if (idx == 0x0c || idx == 0x0d) {
|
|
|
|
|
svga->fullchange = 3;
|
|
|
|
|
svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5);
|
|
|
|
|
} else {
|
|
|
|
|
svga->fullchange = changeframecount;
|
|
|
|
|
svga_recalctimings(svga);
|
|
|
|
|
}
|
2017-10-11 05:40:44 -04:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
2022-02-20 02:26:27 -05:00
|
|
|
case 0x3DE:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id)
|
|
|
|
|
oti->index = val & 0x1f;
|
|
|
|
|
else
|
|
|
|
|
oti->index = val;
|
2017-10-11 05:40:44 -04:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case 0x3DF:
|
2018-10-08 00:22:40 +02:00
|
|
|
idx = oti->index;
|
|
|
|
|
if (!oti->chip_id)
|
|
|
|
|
idx &= 0x1f;
|
2018-02-24 15:56:48 +01:00
|
|
|
oti->regs[idx] = val;
|
|
|
|
|
switch (idx) {
|
2017-10-11 05:40:44 -04:00
|
|
|
case 0xD:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id == OTI_067) {
|
2021-04-26 00:19:01 +02:00
|
|
|
svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff;
|
2018-10-08 00:22:40 +02:00
|
|
|
if (!(val & 0x80))
|
|
|
|
|
svga->vram_display_mask = 0x3ffff;
|
|
|
|
|
|
2018-02-24 15:56:48 +01:00
|
|
|
if ((val & 0x80) && oti->vram_size == 256)
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
else
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
2018-10-08 00:22:40 +02:00
|
|
|
} else if (oti->chip_id == OTI_077) {
|
2021-04-26 00:21:14 +02:00
|
|
|
svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff;
|
2018-10-08 00:22:40 +02:00
|
|
|
|
|
|
|
|
switch ((val & 0xc0) >> 6) {
|
|
|
|
|
case 0x00: /* 256 kB of memory */
|
|
|
|
|
default:
|
|
|
|
|
enable = (oti->vram_size >= 256);
|
2021-04-26 00:19:01 +02:00
|
|
|
if (val & 0x0c)
|
2018-10-08 00:22:40 +02:00
|
|
|
svga->vram_display_mask = MIN(oti->vram_mask, 0x3ffff);
|
|
|
|
|
break;
|
|
|
|
|
case 0x01: /* 1 MB of memory */
|
|
|
|
|
case 0x03:
|
|
|
|
|
enable = (oti->vram_size >= 1024);
|
2021-04-26 00:19:01 +02:00
|
|
|
if (val & 0x0c)
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
svga->vram_display_mask = MIN(oti->vram_mask, 0xfffff);
|
2018-10-08 00:22:40 +02:00
|
|
|
break;
|
2018-10-08 01:22:37 +02:00
|
|
|
case 0x02: /* 512 kB of memory */
|
2018-10-08 00:22:40 +02:00
|
|
|
enable = (oti->vram_size >= 512);
|
2021-04-26 00:19:01 +02:00
|
|
|
if (val & 0x0c)
|
Added the IBM 5161 ISA expansion for PC and XT;
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port;
Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX);
Finished the 586MC1;
Added 8087 emulation;
Moved Cyrix 6x86'es to the Dev branch;
Sanitized/cleaned up memregs.c/h and intel.c/h;
Split the chipsets from machines and sanitized Port 92 emulation;
Added support for the 15bpp mode to the Compaq ATI 28800;
Moved the MR 386DX and 486 machines to the Dev branch;
Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00;
Ported the new timer code from PCem;
Cleaned up the CPU table of unused stuff and better optimized its structure;
Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch;
Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem;
Added the AHA-1540A and the BusTek BT-542B;
Moved the Sumo SCSI-AT to the Dev branch;
Minor IDE, FDC, and floppy drive code clean-ups;
Made NCR 5380/53C400-based cards' BIOS address configurable;
Got rid of the legacy romset variable;
Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit;
Added the Amstead PPC512 per PCem patch by John Elliott;
Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages);
Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing;
Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem;
Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit;
Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement;
Amstrad MegaPC does now works correctly with non-internal graphics card;
The SLiRP code no longer casts a packed struct type to a non-packed struct type;
The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present;
The S3 Virge on BeOS is no longer broken (was broken by build #1591);
OS/2 2.0 build 6.167 now sees key presses again;
Xi8088 now work on CGA again;
86F images converted from either the old or new variants of the HxC MFM format now work correctly;
Hardware interrupts with a vector of 0xFF are now handled correctly;
OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct;
Fixed VNC keyboard input bugs;
Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver;
Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly;
Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4;
Compaq Portable now works with all graphics cards;
Fixed various MDSI Genius bugs;
Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly;
Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355;
OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400.
Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391.
Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389.
Fixed a minor IDE timing bug, fixes #388.
Fixed Toshiba T1000 RAM issues, fixes #379.
Fixed EGA/(S)VGA overscan border handling, fixes #378;
Got rid of the now long useless IDE channel 2 auto-removal, fixes #370;
Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366;
Ported the Unicode CD image file name fix from VARCem, fixes #365;
Fixed high density floppy disks on the Xi8088, fixes #359;
Fixed some bugs in the Hercules emulation, fixes #346, fixes #358;
Fixed the SCSI hard disk mode sense pages, fixes #356;
Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349;
Fixed bugs in the serial mouse emulation, fixes #344;
Compiled 86Box binaries now include all the required .DLL's, fixes #341;
Made some combo boxes in the Settings dialog slightly wider, fixes #276.
2019-09-20 14:02:30 +02:00
|
|
|
svga->vram_display_mask = MIN(oti->vram_mask, 0x7ffff);
|
2018-10-08 00:22:40 +02:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (enable)
|
|
|
|
|
mem_mapping_enable(&svga->mapping);
|
|
|
|
|
else
|
|
|
|
|
mem_mapping_disable(&svga->mapping);
|
|
|
|
|
} else {
|
2018-02-24 15:56:48 +01:00
|
|
|
if (val & 0x80)
|
2018-10-08 00:22:40 +02:00
|
|
|
mem_mapping_disable(&svga->mapping);
|
2018-02-24 15:56:48 +01:00
|
|
|
else
|
2018-10-08 00:22:40 +02:00
|
|
|
mem_mapping_enable(&svga->mapping);
|
2018-02-24 15:56:48 +01:00
|
|
|
}
|
2017-10-11 05:40:44 -04:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x11:
|
|
|
|
|
svga->read_bank = (val & 0xf) * 65536;
|
|
|
|
|
svga->write_bank = (val >> 4) * 65536;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
svga_out(addr, val, svga);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static uint8_t
|
|
|
|
|
oti_in(uint16_t addr, void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
|
|
|
|
svga_t *svga = &oti->svga;
|
2018-10-08 00:22:40 +02:00
|
|
|
uint8_t idx, temp;
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
if (!oti->chip_id && !(oti->enable_register & 1) && (addr != 0x3C3))
|
|
|
|
|
return 0xff;
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) &&
|
|
|
|
|
!(svga->miscout & 1)) addr ^= 0x60;
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
switch (addr) {
|
2018-10-08 00:22:40 +02:00
|
|
|
case 0x3C2:
|
|
|
|
|
if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x50)
|
|
|
|
|
temp = 0;
|
|
|
|
|
else
|
|
|
|
|
temp = 0x10;
|
|
|
|
|
break;
|
|
|
|
|
|
2018-02-24 15:56:48 +01:00
|
|
|
case 0x3C3:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id)
|
|
|
|
|
temp = svga_in(addr, svga);
|
|
|
|
|
else
|
|
|
|
|
temp = oti->enable_register;
|
2018-02-24 15:56:48 +01:00
|
|
|
break;
|
2018-10-08 00:22:40 +02:00
|
|
|
|
2021-10-24 19:06:05 +02:00
|
|
|
case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9:
|
|
|
|
|
if (oti->chip_id == OTI_077)
|
|
|
|
|
return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga);
|
|
|
|
|
return svga_in(addr, svga);
|
|
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
case 0x3CF:
|
|
|
|
|
return svga->gdcreg[svga->gdcaddr & 0xf];
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
case 0x3D4:
|
|
|
|
|
temp = svga->crtcreg;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x3D5:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id) {
|
|
|
|
|
if (svga->crtcreg & 0x20)
|
|
|
|
|
temp = 0xff;
|
|
|
|
|
else
|
|
|
|
|
temp = svga->crtc[svga->crtcreg];
|
|
|
|
|
} else
|
|
|
|
|
temp = svga->crtc[svga->crtcreg & 0x1f];
|
2017-10-11 05:40:44 -04:00
|
|
|
break;
|
2018-04-25 23:51:13 +02:00
|
|
|
|
2018-03-24 01:15:40 +01:00
|
|
|
case 0x3DA:
|
2018-10-08 00:22:40 +02:00
|
|
|
if (oti->chip_id) {
|
|
|
|
|
temp = svga_in(addr, svga);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2018-03-24 01:15:40 +01:00
|
|
|
svga->attrff = 0;
|
2018-10-08 00:22:40 +02:00
|
|
|
/*The OTI-037C BIOS waits for bits 0 and 3 in 0x3da to go low, then reads 0x3da again
|
|
|
|
|
and expects the diagnostic bits to equal the current border colour. As I understand
|
|
|
|
|
it, the 0x3da active enable status does not include the border time, so this may be
|
|
|
|
|
an area where OTI-037C is not entirely VGA compatible.*/
|
2018-03-24 01:15:40 +01:00
|
|
|
svga->cgastat &= ~0x30;
|
|
|
|
|
/* copy color diagnostic info from the overscan color register */
|
|
|
|
|
switch (svga->attrregs[0x12] & 0x30)
|
|
|
|
|
{
|
|
|
|
|
case 0x00: /* P0 and P2 */
|
|
|
|
|
if (svga->attrregs[0x11] & 0x01)
|
|
|
|
|
svga->cgastat |= 0x10;
|
|
|
|
|
if (svga->attrregs[0x11] & 0x04)
|
|
|
|
|
svga->cgastat |= 0x20;
|
|
|
|
|
break;
|
|
|
|
|
case 0x10: /* P4 and P5 */
|
|
|
|
|
if (svga->attrregs[0x11] & 0x10)
|
|
|
|
|
svga->cgastat |= 0x10;
|
|
|
|
|
if (svga->attrregs[0x11] & 0x20)
|
|
|
|
|
svga->cgastat |= 0x20;
|
|
|
|
|
break;
|
|
|
|
|
case 0x20: /* P1 and P3 */
|
|
|
|
|
if (svga->attrregs[0x11] & 0x02)
|
|
|
|
|
svga->cgastat |= 0x10;
|
|
|
|
|
if (svga->attrregs[0x11] & 0x08)
|
|
|
|
|
svga->cgastat |= 0x20;
|
|
|
|
|
break;
|
|
|
|
|
case 0x30: /* P6 and P7 */
|
|
|
|
|
if (svga->attrregs[0x11] & 0x40)
|
|
|
|
|
svga->cgastat |= 0x10;
|
|
|
|
|
if (svga->attrregs[0x11] & 0x80)
|
|
|
|
|
svga->cgastat |= 0x20;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-10-08 00:22:40 +02:00
|
|
|
temp = svga->cgastat;
|
|
|
|
|
break;
|
2018-03-24 01:15:40 +01:00
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
case 0x3DE:
|
|
|
|
|
temp = oti->index;
|
|
|
|
|
if (oti->chip_id)
|
|
|
|
|
temp |= (oti->chip_id << 5);
|
2022-02-20 02:26:27 -05:00
|
|
|
break;
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
case 0x3DF:
|
|
|
|
|
idx = oti->index;
|
|
|
|
|
if (!oti->chip_id)
|
2022-02-20 02:26:27 -05:00
|
|
|
idx &= 0x1f;
|
2018-10-08 00:22:40 +02:00
|
|
|
if (idx == 0x10)
|
|
|
|
|
temp = oti->dipswitch_val;
|
|
|
|
|
else
|
|
|
|
|
temp = oti->regs[idx];
|
2017-10-11 05:40:44 -04:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
temp = svga_in(addr, svga);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return(temp);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
oti_pos_out(uint16_t addr, uint8_t val, void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
|
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
if ((val ^ oti->pos) & 8) {
|
2017-10-11 05:40:44 -04:00
|
|
|
if (val & 8)
|
|
|
|
|
io_sethandler(0x03c0, 32, oti_in, NULL, NULL,
|
|
|
|
|
oti_out, NULL, NULL, oti);
|
|
|
|
|
else
|
|
|
|
|
io_removehandler(0x03c0, 32, oti_in, NULL, NULL,
|
|
|
|
|
oti_out, NULL, NULL, oti);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
oti->pos = val;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static uint8_t
|
|
|
|
|
oti_pos_in(uint16_t addr, void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
|
|
|
|
|
|
|
|
|
return(oti->pos);
|
2022-02-20 02:26:27 -05:00
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
static void
|
|
|
|
|
oti_recalctimings(svga_t *svga)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)svga->p;
|
|
|
|
|
|
|
|
|
|
if (oti->regs[0x14] & 0x08) svga->ma_latch |= 0x10000;
|
2021-04-26 00:19:01 +02:00
|
|
|
if (oti->regs[0x16] & 0x08) svga->ma_latch |= 0x20000;
|
|
|
|
|
|
|
|
|
|
if (oti->regs[0x14] & 0x01) svga->vtotal += 0x400;
|
|
|
|
|
if (oti->regs[0x14] & 0x02) svga->dispend += 0x400;
|
|
|
|
|
if (oti->regs[0x14] & 0x04) svga->vsyncstart += 0x400;
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2021-04-26 00:19:01 +02:00
|
|
|
if ((oti->regs[0x0d] & 0x0c) && !(oti->regs[0x0d] & 0x10)) svga->rowoffset <<= 1;
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
svga->interlace = oti->regs[0x14] & 0x80;
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2021-10-24 19:06:05 +02:00
|
|
|
if (svga->bpp == 16) {
|
|
|
|
|
svga->render = svga_render_16bpp_highres;
|
|
|
|
|
svga->hdisp >>= 1;
|
|
|
|
|
} else if (svga->bpp == 15) {
|
|
|
|
|
svga->render = svga_render_15bpp_highres;
|
|
|
|
|
svga->hdisp >>= 1;
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static void *
|
2018-03-19 01:02:04 +01:00
|
|
|
oti_init(const device_t *info)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = malloc(sizeof(oti_t));
|
2021-03-14 20:35:01 +01:00
|
|
|
char *romfn = NULL;
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
memset(oti, 0x00, sizeof(oti_t));
|
2017-11-01 01:51:19 -05:00
|
|
|
oti->chip_id = info->local;
|
|
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
oti->dipswitch_val = 0x18;
|
|
|
|
|
|
2017-11-01 01:51:19 -05:00
|
|
|
switch(oti->chip_id) {
|
2018-10-08 00:22:40 +02:00
|
|
|
case OTI_037C:
|
|
|
|
|
romfn = BIOS_037C_PATH;
|
|
|
|
|
oti->vram_size = 256;
|
|
|
|
|
oti->regs[0] = 0x08; /* FIXME: The BIOS wants to read this at index 0? This index is undocumented. */
|
|
|
|
|
/* io_sethandler(0x03c0, 32,
|
|
|
|
|
oti_in, NULL, NULL, oti_out, NULL, NULL, oti); */
|
2022-02-20 02:26:27 -05:00
|
|
|
break;
|
2018-10-08 00:22:40 +02:00
|
|
|
|
|
|
|
|
case OTI_067_AMA932J:
|
|
|
|
|
romfn = BIOS_067_AMA932J_PATH;
|
|
|
|
|
oti->chip_id = 2;
|
2018-10-09 05:30:09 +02:00
|
|
|
oti->vram_size = device_get_config_int("memory");
|
2018-10-08 00:22:40 +02:00
|
|
|
oti->dipswitch_val |= 0x20;
|
|
|
|
|
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
|
|
|
|
|
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
|
2018-10-02 22:54:28 +02:00
|
|
|
break;
|
2018-10-08 00:22:40 +02:00
|
|
|
|
2021-07-04 18:22:52 +03:00
|
|
|
case OTI_067_M300:
|
|
|
|
|
if (rom_present(BIOS_067_M300_15_PATH))
|
|
|
|
|
romfn = BIOS_067_M300_15_PATH;
|
|
|
|
|
else
|
|
|
|
|
romfn = BIOS_067_M300_08_PATH;
|
|
|
|
|
oti->vram_size = device_get_config_int("memory");
|
|
|
|
|
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
|
|
|
|
|
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
|
|
|
|
|
break;
|
|
|
|
|
|
2018-10-08 00:22:40 +02:00
|
|
|
case OTI_067:
|
|
|
|
|
case OTI_077:
|
|
|
|
|
romfn = BIOS_077_PATH;
|
|
|
|
|
oti->vram_size = device_get_config_int("memory");
|
|
|
|
|
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
|
|
|
|
|
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
|
2017-11-01 01:51:19 -05:00
|
|
|
break;
|
|
|
|
|
}
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2020-01-14 20:51:06 +01:00
|
|
|
if (romfn != NULL) {
|
|
|
|
|
rom_init(&oti->bios_rom, romfn,
|
|
|
|
|
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
|
|
|
|
}
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2017-11-01 01:51:19 -05:00
|
|
|
oti->vram_mask = (oti->vram_size << 10) - 1;
|
2018-09-19 20:13:32 +02:00
|
|
|
|
|
|
|
|
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_oti);
|
|
|
|
|
|
2020-05-06 00:23:07 +02:00
|
|
|
svga_init(info, &oti->svga, oti, oti->vram_size << 10,
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_recalctimings, oti_in, oti_out, NULL, NULL);
|
|
|
|
|
|
2021-10-24 19:06:05 +02:00
|
|
|
if (oti->chip_id == OTI_077)
|
|
|
|
|
oti->svga.ramdac = device_add(&sc11487_ramdac_device); /*Actually a 82c487, probably a clone.*/
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
io_sethandler(0x03c0, 32,
|
|
|
|
|
oti_in, NULL, NULL, oti_out, NULL, NULL, oti);
|
2018-09-19 20:13:32 +02:00
|
|
|
|
|
|
|
|
oti->svga.miscout = 1;
|
2021-06-05 20:50:38 +02:00
|
|
|
oti->svga.packed_chain4 = 1;
|
2018-09-19 20:13:32 +02:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
return(oti);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
oti_close(void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
|
|
|
|
|
|
|
|
|
svga_close(&oti->svga);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
free(oti);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
oti_speed_changed(void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
|
|
|
|
|
|
|
|
|
svga_recalctimings(&oti->svga);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2022-02-20 02:26:27 -05:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
oti_force_redraw(void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-11 05:40:44 -04:00
|
|
|
oti_t *oti = (oti_t *)p;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
oti->svga.fullchange = changeframecount;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2018-02-24 15:56:48 +01:00
|
|
|
static int
|
|
|
|
|
oti037c_available(void)
|
|
|
|
|
{
|
2018-10-08 00:22:40 +02:00
|
|
|
return(rom_present(BIOS_037C_PATH));
|
2018-02-24 15:56:48 +01:00
|
|
|
}
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2022-02-20 19:11:58 -05:00
|
|
|
|
2018-08-16 00:25:20 +02:00
|
|
|
static int
|
|
|
|
|
oti067_ama932j_available(void)
|
|
|
|
|
{
|
2018-10-08 00:22:40 +02:00
|
|
|
return(rom_present(BIOS_067_AMA932J_PATH));
|
2018-08-16 00:25:20 +02:00
|
|
|
}
|
2018-03-02 21:57:37 +01:00
|
|
|
|
2022-02-20 19:11:58 -05:00
|
|
|
|
2017-11-01 01:51:19 -05:00
|
|
|
static int
|
2018-03-02 21:57:37 +01:00
|
|
|
oti067_077_available(void)
|
2017-11-01 01:51:19 -05:00
|
|
|
{
|
2018-10-08 00:22:40 +02:00
|
|
|
return(rom_present(BIOS_077_PATH));
|
2017-11-01 01:51:19 -05:00
|
|
|
}
|
|
|
|
|
|
2022-02-20 19:11:58 -05:00
|
|
|
|
2021-07-04 18:22:52 +03:00
|
|
|
static int
|
|
|
|
|
oti067_m300_available(void)
|
|
|
|
|
{
|
|
|
|
|
if (rom_present(BIOS_067_M300_15_PATH))
|
2022-02-26 23:31:28 -05:00
|
|
|
return(rom_present(BIOS_067_M300_15_PATH));
|
|
|
|
|
else
|
|
|
|
|
return(rom_present(BIOS_067_M300_08_PATH));
|
2021-07-04 18:22:52 +03:00
|
|
|
}
|
|
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
// clang-format off
|
|
|
|
|
static const device_config_t oti067_config[] = {
|
|
|
|
|
{
|
2022-04-09 20:09:14 -04:00
|
|
|
.name = "memory",
|
|
|
|
|
.description = "Memory size",
|
|
|
|
|
.type = CONFIG_SELECTION,
|
|
|
|
|
.default_int = 512,
|
|
|
|
|
.selection = {
|
|
|
|
|
{
|
|
|
|
|
.description = "256 kB",
|
|
|
|
|
.value = 256
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = "512 kB",
|
|
|
|
|
.value = 512
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = ""
|
|
|
|
|
}
|
2022-02-26 23:31:28 -05:00
|
|
|
}
|
|
|
|
|
},
|
2022-04-09 20:09:14 -04:00
|
|
|
{
|
|
|
|
|
.type = CONFIG_END
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
};
|
|
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
static const device_config_t oti067_ama932j_config[] = {
|
|
|
|
|
{
|
2022-04-09 20:09:14 -04:00
|
|
|
.name = "memory",
|
|
|
|
|
.description = "Memory size",
|
|
|
|
|
.type = CONFIG_SELECTION,
|
|
|
|
|
.default_int = 256,
|
|
|
|
|
.selection = {
|
|
|
|
|
{
|
|
|
|
|
.description = "256 kB",
|
|
|
|
|
.value = 256
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = "512 kB",
|
|
|
|
|
.value = 512
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = ""
|
|
|
|
|
}
|
2022-02-26 23:31:28 -05:00
|
|
|
}
|
|
|
|
|
},
|
2022-04-09 20:09:14 -04:00
|
|
|
{
|
|
|
|
|
.type = CONFIG_END
|
|
|
|
|
}
|
2018-10-09 05:53:09 +02:00
|
|
|
};
|
|
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
static const device_config_t oti077_config[] = {
|
|
|
|
|
{
|
2022-04-09 20:09:14 -04:00
|
|
|
.name = "memory",
|
|
|
|
|
.description = "Memory size",
|
|
|
|
|
.type = CONFIG_SELECTION,
|
|
|
|
|
.default_int = 1024,
|
|
|
|
|
.selection = {
|
|
|
|
|
{
|
|
|
|
|
.description = "256 kB",
|
|
|
|
|
.value = 256
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = "512 kB",
|
|
|
|
|
.value = 512
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = "1 MB",
|
|
|
|
|
.value = 1024
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.description = ""
|
|
|
|
|
}
|
2022-02-26 23:31:28 -05:00
|
|
|
}
|
|
|
|
|
},
|
2022-04-09 20:09:14 -04:00
|
|
|
{
|
|
|
|
|
.type = CONFIG_END
|
|
|
|
|
}
|
2016-06-26 00:34:39 +02:00
|
|
|
};
|
2022-02-26 23:31:28 -05:00
|
|
|
// clang-format on
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
const device_t oti037c_device = {
|
2022-03-13 21:43:45 -04:00
|
|
|
.name = "Oak OTI-037C",
|
|
|
|
|
.internal_name = "oti037c",
|
|
|
|
|
.flags = DEVICE_ISA,
|
|
|
|
|
.local = 0,
|
|
|
|
|
.init = oti_init,
|
|
|
|
|
.close = oti_close,
|
|
|
|
|
.reset = NULL,
|
|
|
|
|
{ .available = oti037c_available },
|
|
|
|
|
.speed_changed = oti_speed_changed,
|
|
|
|
|
.force_redraw = oti_force_redraw,
|
|
|
|
|
.config = NULL
|
2018-02-24 15:56:48 +01:00
|
|
|
};
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
const device_t oti067_device = {
|
2022-03-13 21:43:45 -04:00
|
|
|
.name = "Oak OTI-067",
|
|
|
|
|
.internal_name = "oti067",
|
|
|
|
|
.flags = DEVICE_ISA,
|
|
|
|
|
.local = 2,
|
|
|
|
|
.init = oti_init,
|
|
|
|
|
.close = oti_close,
|
|
|
|
|
.reset = NULL,
|
|
|
|
|
{ .available = oti067_077_available },
|
|
|
|
|
.speed_changed = oti_speed_changed,
|
|
|
|
|
.force_redraw = oti_force_redraw,
|
|
|
|
|
.config = oti067_config
|
2016-06-26 00:34:39 +02:00
|
|
|
};
|
2017-10-11 05:40:44 -04:00
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
const device_t oti067_m300_device = {
|
2022-03-13 21:43:45 -04:00
|
|
|
.name = "Oak OTI-067 (Olivetti M300-08/15)",
|
|
|
|
|
.internal_name = "oti067_m300",
|
|
|
|
|
.flags = DEVICE_ISA,
|
|
|
|
|
.local = 4,
|
|
|
|
|
.init = oti_init,
|
|
|
|
|
.close = oti_close,
|
|
|
|
|
.reset = NULL,
|
|
|
|
|
{ .available = oti067_m300_available },
|
|
|
|
|
.speed_changed = oti_speed_changed,
|
|
|
|
|
.force_redraw = oti_force_redraw,
|
|
|
|
|
.config = oti067_config
|
2021-07-04 18:22:52 +03:00
|
|
|
};
|
|
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
const device_t oti067_ama932j_device = {
|
2022-03-13 21:43:45 -04:00
|
|
|
.name = "Oak OTI-067 (AMA-932J)",
|
|
|
|
|
.internal_name = "oti067_ama932j",
|
|
|
|
|
.flags = DEVICE_ISA,
|
|
|
|
|
.local = 3,
|
|
|
|
|
.init = oti_init,
|
|
|
|
|
.close = oti_close,
|
|
|
|
|
.reset = NULL,
|
|
|
|
|
{ .available = oti067_ama932j_available },
|
|
|
|
|
.speed_changed = oti_speed_changed,
|
|
|
|
|
.force_redraw = oti_force_redraw,
|
|
|
|
|
.config = oti067_ama932j_config
|
2018-08-16 00:25:20 +02:00
|
|
|
};
|
|
|
|
|
|
2022-02-26 23:31:28 -05:00
|
|
|
const device_t oti077_device = {
|
2022-03-13 21:43:45 -04:00
|
|
|
.name = "Oak OTI-077",
|
|
|
|
|
.internal_name = "oti077",
|
|
|
|
|
.flags = DEVICE_ISA,
|
|
|
|
|
.local = 5,
|
|
|
|
|
.init = oti_init,
|
|
|
|
|
.close = oti_close,
|
|
|
|
|
.reset = NULL,
|
|
|
|
|
{ .available = oti067_077_available },
|
|
|
|
|
.speed_changed = oti_speed_changed,
|
|
|
|
|
.force_redraw = oti_force_redraw,
|
|
|
|
|
.config = oti077_config
|
2016-06-26 00:34:39 +02:00
|
|
|
};
|