2016-06-26 00:34:39 +02:00
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/*IBM AT -
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Write B0
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Write aa55
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Expects aa55 back*/
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2017-09-25 04:31:20 -04:00
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#include <stdio.h>
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#include <stdint.h>
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2016-06-26 00:34:39 +02:00
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#include <string.h>
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2017-09-25 04:31:20 -04:00
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#include <wchar.h>
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2017-08-27 01:18:43 +02:00
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#include "ibm.h"
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2017-08-27 04:33:47 +01:00
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#include "cpu/cpu.h"
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2016-06-26 00:34:39 +02:00
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#include "dma.h"
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#include "io.h"
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#include "pic.h"
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#include "pit.h"
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2017-05-06 17:48:33 +02:00
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#include "device.h"
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2016-06-26 00:34:39 +02:00
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#include "timer.h"
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2017-09-02 20:39:57 +02:00
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#include "machine/machine.h"
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2017-08-27 04:33:47 +01:00
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#include "sound/snd_speaker.h"
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#include "video/video.h"
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2017-05-06 17:48:33 +02:00
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2016-06-26 00:34:39 +02:00
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/*B0 to 40, two writes to 43, then two reads - value does not change!*/
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/*B4 to 40, two writes to 43, then two reads - value _does_ change!*/
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2017-10-09 01:48:36 +02:00
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int64_t displine;
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2016-06-26 00:34:39 +02:00
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double PITCONST;
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float cpuclock;
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float isa_timing, bus_timing;
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2017-05-29 01:18:32 +02:00
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float CGACONST;
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float MDACONST;
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float VGACONST1,VGACONST2;
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float RTCCONST;
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2017-10-09 01:48:36 +02:00
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int64_t firsttime=1;
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2016-06-26 00:34:39 +02:00
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void setpitclock(float clock)
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{
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cpuclock=clock;
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2017-09-08 16:35:14 +02:00
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PITCONST=clock/(1193181.0 + (2.0 / 3.0));
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2016-06-26 00:34:39 +02:00
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CGACONST=(clock/(19687503.0/11.0));
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MDACONST=(clock/2032125.0);
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VGACONST1=(clock/25175000.0);
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VGACONST2=(clock/28322000.0);
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isa_timing = clock/8000000.0;
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bus_timing = clock/(double)cpu_busspeed;
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video_updatetiming();
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2017-10-09 01:48:36 +02:00
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xt_cpu_multi = (int64_t)((14318184.0*(double)(1 << TIMER_SHIFT)) / (double)machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed);
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2016-06-26 00:34:39 +02:00
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RTCCONST=clock/32768.0;
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2017-10-09 01:48:36 +02:00
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TIMER_USEC = (int64_t)((clock / 1000000.0f) * (float)(1 << TIMER_SHIFT));
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2016-06-26 00:34:39 +02:00
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device_speed_changed();
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}
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2017-05-05 01:49:42 +02:00
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void pit_reset(PIT *pit)
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2016-06-26 00:34:39 +02:00
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{
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2017-10-09 01:48:36 +02:00
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void (*old_set_out_funcs[3])(int64_t new_out, int64_t old_out);
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2017-05-05 01:49:42 +02:00
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PIT_nr old_pit_nr[3];
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memcpy(old_set_out_funcs, pit->set_out_funcs, 3 * sizeof(void *));
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memcpy(old_pit_nr, pit->pit_nr, 3 * sizeof(PIT_nr));
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memset(pit, 0, sizeof(PIT));
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memcpy(pit->set_out_funcs, old_set_out_funcs, 3 * sizeof(void *));
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memcpy(pit->pit_nr, old_pit_nr, 3 * sizeof(PIT_nr));
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2017-10-09 01:48:36 +02:00
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pit->l[0] = 0xFFFF; pit->c[0] = 0xFFFFLL*PITCONST;
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pit->l[1] = 0xFFFF; pit->c[1] = 0xFFFFLL*PITCONST;
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pit->l[2] = 0xFFFF; pit->c[2] = 0xFFFFLL*PITCONST;
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2017-05-05 01:49:42 +02:00
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pit->m[0] = pit->m[1] = pit->m[2] = 0;
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pit->ctrls[0] = pit->ctrls[1] = pit->ctrls[2] = 0;
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pit->thit[0]=1;
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pit->gate[0] = pit->gate[1] = 1;
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pit->gate[2] = 0;
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pit->using_timer[0] = pit->using_timer[1] = pit->using_timer[2] = 1;
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2016-06-26 00:34:39 +02:00
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}
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void clearpit()
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{
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pit.c[0]=(pit.l[0]<<2);
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}
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float pit_timer0_freq()
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{
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if (pit.l[0])
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2017-09-08 16:35:14 +02:00
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return (1193181.0 + (2.0 / 3.0))/(float)pit.l[0];
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2016-06-26 00:34:39 +02:00
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else
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2017-09-08 16:35:14 +02:00
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return (1193181.0 + (2.0 / 3.0))/(float)0x10000;
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2016-06-26 00:34:39 +02:00
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}
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2017-10-09 01:48:36 +02:00
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static void pit_set_out(PIT *pit, int64_t t, int64_t out)
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->set_out_funcs[t](out, pit->out[t]);
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pit->out[t] = out;
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2016-06-26 00:34:39 +02:00
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}
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2017-10-09 01:48:36 +02:00
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static void pit_load(PIT *pit, int64_t t)
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2016-06-26 00:34:39 +02:00
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{
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2017-10-09 01:48:36 +02:00
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int64_t l = pit->l[t] ? pit->l[t] : 0x10000LL;
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2016-06-26 00:34:39 +02:00
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timer_process();
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2017-05-05 01:49:42 +02:00
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pit->newcount[t] = 0;
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pit->disabled[t] = 0;
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switch (pit->m[t])
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2016-06-26 00:34:39 +02:00
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{
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case 0: /*Interrupt on terminal count*/
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)((l << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 0);
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pit->thit[t] = 0;
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pit->enabled[t] = pit->gate[t];
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2016-06-26 00:34:39 +02:00
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break;
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case 1: /*Hardware retriggerable one-shot*/
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = 1;
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2016-06-26 00:34:39 +02:00
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break;
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case 2: /*Rate generator*/
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2017-05-05 01:49:42 +02:00
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if (pit->initial[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l - 1;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)(((l - 1) << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 1);
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pit->thit[t] = 0;
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2016-06-26 00:34:39 +02:00
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}
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = pit->gate[t];
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2016-06-26 00:34:39 +02:00
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break;
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case 3: /*Square wave mode*/
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2017-05-05 01:49:42 +02:00
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if (pit->initial[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)((((l + 1) >> 1) << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 1);
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pit->thit[t] = 0;
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2016-06-26 00:34:39 +02:00
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}
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = pit->gate[t];
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2016-06-26 00:34:39 +02:00
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break;
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case 4: /*Software triggered stobe*/
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2017-05-05 01:49:42 +02:00
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if (!pit->thit[t] && !pit->initial[t])
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pit->newcount[t] = 1;
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2016-06-26 00:34:39 +02:00
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else
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)((l << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 0);
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pit->thit[t] = 0;
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2016-06-26 00:34:39 +02:00
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}
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = pit->gate[t];
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2016-06-26 00:34:39 +02:00
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break;
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case 5: /*Hardware triggered stobe*/
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = 1;
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2016-06-26 00:34:39 +02:00
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break;
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}
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2017-05-05 01:49:42 +02:00
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pit->initial[t] = 0;
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pit->running[t] = pit->enabled[t] && pit->using_timer[t] && !pit->disabled[t];
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2016-06-26 00:34:39 +02:00
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timer_update_outstanding();
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}
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2017-10-09 01:48:36 +02:00
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void pit_set_gate_no_timer(PIT *pit, int64_t t, int64_t gate)
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2016-06-26 00:34:39 +02:00
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{
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2017-10-09 01:48:36 +02:00
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int64_t l = pit->l[t] ? pit->l[t] : 0x10000LL;
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2016-06-26 00:34:39 +02:00
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2017-05-05 01:49:42 +02:00
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if (pit->disabled[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->gate[t] = gate;
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2016-06-26 00:34:39 +02:00
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return;
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}
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2017-05-05 01:49:42 +02:00
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switch (pit->m[t])
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2016-06-26 00:34:39 +02:00
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{
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case 0: /*Interrupt on terminal count*/
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case 4: /*Software triggered stobe*/
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = gate;
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2016-06-26 00:34:39 +02:00
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break;
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case 1: /*Hardware retriggerable one-shot*/
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case 5: /*Hardware triggered stobe*/
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2017-05-05 01:49:42 +02:00
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if (gate && !pit->gate[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)((l << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 0);
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pit->thit[t] = 0;
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pit->enabled[t] = 1;
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2016-06-26 00:34:39 +02:00
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}
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break;
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case 2: /*Rate generator*/
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2017-05-05 01:49:42 +02:00
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if (gate && !pit->gate[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l - 1;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)(((l - 1) << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 1);
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pit->thit[t] = 0;
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2016-06-26 00:34:39 +02:00
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}
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = gate;
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2016-06-26 00:34:39 +02:00
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break;
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case 3: /*Square wave mode*/
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2017-05-05 01:49:42 +02:00
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if (gate && !pit->gate[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] = l;
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2017-10-09 01:48:36 +02:00
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pit->c[t] = (int64_t)((((l + 1) >> 1) << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 1);
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pit->thit[t] = 0;
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2016-06-26 00:34:39 +02:00
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}
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2017-05-05 01:49:42 +02:00
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pit->enabled[t] = gate;
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2016-06-26 00:34:39 +02:00
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break;
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}
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2017-05-05 01:49:42 +02:00
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pit->gate[t] = gate;
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pit->running[t] = pit->enabled[t] && pit->using_timer[t] && !pit->disabled[t];
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}
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2017-10-09 01:48:36 +02:00
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void pit_set_gate(PIT *pit, int64_t t, int64_t gate)
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2017-05-05 01:49:42 +02:00
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{
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if (pit->disabled[t])
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{
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pit->gate[t] = gate;
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return;
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}
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timer_process();
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pit_set_gate_no_timer(pit, t, gate);
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2016-06-26 00:34:39 +02:00
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timer_update_outstanding();
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}
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2017-10-09 01:48:36 +02:00
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static void pit_over(PIT *pit, int64_t t)
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2016-06-26 00:34:39 +02:00
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{
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2017-10-09 01:48:36 +02:00
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int64_t l = pit->l[t] ? pit->l[t] : 0x10000LL;
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2017-05-05 01:49:42 +02:00
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if (pit->disabled[t])
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2016-06-26 00:34:39 +02:00
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{
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2017-05-05 01:49:42 +02:00
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pit->count[t] += 0xffff;
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2017-10-09 01:48:36 +02:00
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pit->c[t] += (int64_t)((0xffff << TIMER_SHIFT) * PITCONST);
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2016-06-26 00:34:39 +02:00
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return;
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}
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2017-05-05 01:49:42 +02:00
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switch (pit->m[t])
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2016-06-26 00:34:39 +02:00
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{
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case 0: /*Interrupt on terminal count*/
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case 1: /*Hardware retriggerable one-shot*/
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2017-05-05 01:49:42 +02:00
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if (!pit->thit[t])
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pit_set_out(pit, t, 1);
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pit->thit[t] = 1;
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pit->count[t] += 0xffff;
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2017-10-09 01:48:36 +02:00
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pit->c[t] += (int64_t)((0xffff << TIMER_SHIFT) * PITCONST);
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2016-06-26 00:34:39 +02:00
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break;
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case 2: /*Rate generator*/
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2017-05-05 01:49:42 +02:00
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pit->count[t] += l;
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2017-10-09 01:48:36 +02:00
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pit->c[t] += (int64_t)((l << TIMER_SHIFT) * PITCONST);
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2017-05-05 01:49:42 +02:00
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pit_set_out(pit, t, 0);
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pit_set_out(pit, t, 1);
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2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 3: /*Square wave mode*/
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->out[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_set_out(pit, t, 0);
|
|
|
|
|
pit->count[t] += (l >> 1);
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->c[t] += (int64_t)(((l >> 1) << TIMER_SHIFT) * PITCONST);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_set_out(pit, t, 1);
|
|
|
|
|
pit->count[t] += ((l + 1) >> 1);
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->c[t] = (int64_t)((((l + 1) >> 1) << TIMER_SHIFT) * PITCONST);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 4: /*Software triggered strove*/
|
2017-05-05 01:49:42 +02:00
|
|
|
if (!pit->thit[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_set_out(pit, t, 0);
|
|
|
|
|
pit_set_out(pit, t, 1);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->newcount[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->newcount[t] = 0;
|
|
|
|
|
pit->count[t] += l;
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->c[t] += (int64_t)((l << TIMER_SHIFT) * PITCONST);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->thit[t] = 1;
|
|
|
|
|
pit->count[t] += 0xffff;
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->c[t] += (int64_t)((0xffff << TIMER_SHIFT) * PITCONST);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 5: /*Hardware triggered strove*/
|
2017-05-05 01:49:42 +02:00
|
|
|
if (!pit->thit[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_set_out(pit, t, 0);
|
|
|
|
|
pit_set_out(pit, t, 1);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->thit[t] = 1;
|
|
|
|
|
pit->count[t] += 0xffff;
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->c[t] += (int64_t)((0xffff << TIMER_SHIFT) * PITCONST);
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->running[t] = pit->enabled[t] && pit->using_timer[t] && !pit->disabled[t];
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t pit_get_timer_0()
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t read = (int64_t)((pit.c[0] + ((1 << TIMER_SHIFT) - 1)) / PITCONST) >> TIMER_SHIFT;
|
2016-06-26 00:34:39 +02:00
|
|
|
if (pit.m[0] == 2)
|
|
|
|
|
read++;
|
2017-10-09 01:48:36 +02:00
|
|
|
if (read < 0LL)
|
|
|
|
|
read = 0LL;
|
|
|
|
|
if (read > 0x10000LL)
|
|
|
|
|
read = 0x10000LL;
|
|
|
|
|
if (pit.m[0] == 3LL)
|
|
|
|
|
read <<= 1LL;
|
2016-06-26 00:34:39 +02:00
|
|
|
return read;
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
static int64_t pit_read_timer(PIT *pit, int64_t t)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
timer_clock();
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->using_timer[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t read = (int64_t)((pit->c[t] + ((1 << TIMER_SHIFT) - 1)) / PITCONST) >> TIMER_SHIFT;
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->m[t] == 2)
|
2016-06-26 00:34:39 +02:00
|
|
|
read++;
|
2017-10-09 01:48:36 +02:00
|
|
|
if (read < 0LL)
|
|
|
|
|
read = 0LL;
|
|
|
|
|
if (read > 0x10000LL)
|
|
|
|
|
read = 0x10000LL;
|
|
|
|
|
if (pit->m[t] == 3LL)
|
|
|
|
|
read <<= 1LL;
|
2016-06-26 00:34:39 +02:00
|
|
|
return read;
|
|
|
|
|
}
|
2017-10-09 01:48:36 +02:00
|
|
|
if (pit->m[t] == 2LL)
|
|
|
|
|
return pit->count[t] + 1LL;
|
2017-05-05 01:49:42 +02:00
|
|
|
return pit->count[t];
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
void pit_write(uint16_t addr, uint8_t val, void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
PIT *pit = (PIT *)p;
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t t;
|
|
|
|
|
cycles -= (int64_t)PITCONST;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
switch (addr&3)
|
|
|
|
|
{
|
|
|
|
|
case 3: /*CTRL*/
|
|
|
|
|
if ((val&0xC0)==0xC0)
|
|
|
|
|
{
|
|
|
|
|
if (!(val&0x20))
|
|
|
|
|
{
|
|
|
|
|
if (val & 2)
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->rl[0] = pit->using_timer[0] ? ((int64_t)(pit->c[0] / PITCONST) >> TIMER_SHIFT) : pit->count[0];
|
2016-06-26 00:34:39 +02:00
|
|
|
if (val & 4)
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->rl[1] = pit->using_timer[1] ? ((int64_t)(pit->c[1] / PITCONST) >> TIMER_SHIFT) : pit->count[1];
|
2016-06-26 00:34:39 +02:00
|
|
|
if (val & 8)
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->rl[2] = pit->using_timer[2] ? ((int64_t)(pit->c[2] / PITCONST) >> TIMER_SHIFT) : pit->count[2];
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
if (!(val & 0x10))
|
|
|
|
|
{
|
|
|
|
|
if (val & 2)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->read_status[0] = (pit->ctrls[0] & 0x3f) | 0x40 | (pit->out[0] ? 0x80 : 0);
|
|
|
|
|
pit->do_read_status[0] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
if (val & 4)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->read_status[1] = (pit->ctrls[1] & 0x3f) | 0x40 | (pit->out[1] ? 0x80 : 0);
|
|
|
|
|
pit->do_read_status[1] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
if (val & 8)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->read_status[2] = (pit->ctrls[2] & 0x3f) | 0x40 | (pit->out[2] ? 0x80 : 0);
|
|
|
|
|
pit->do_read_status[2] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
t = val >> 6;
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->ctrl=val;
|
2016-06-26 00:34:39 +02:00
|
|
|
if ((val>>7)==3)
|
|
|
|
|
{
|
|
|
|
|
return;
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
if (!(pit->ctrl&0x30))
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->rl[t] = pit_read_timer(pit, t);
|
|
|
|
|
pit->ctrl |= 0x30;
|
|
|
|
|
pit->rereadlatch[t] = 0;
|
|
|
|
|
pit->rm[t] = 3;
|
|
|
|
|
pit->latched[t] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->ctrls[t] = val;
|
|
|
|
|
pit->rm[t]=pit->wm[t]=(pit->ctrl>>4)&3;
|
|
|
|
|
pit->m[t]=(val>>1)&7;
|
|
|
|
|
if (pit->m[t]>5)
|
|
|
|
|
pit->m[t]&=3;
|
|
|
|
|
if (!(pit->rm[t]))
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->rm[t]=3;
|
|
|
|
|
pit->rl[t] = pit_read_timer(pit, t);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->rereadlatch[t]=1;
|
|
|
|
|
if (t == 2) ppispeakon=speakon=(pit->m[2]==0)?0:1;
|
|
|
|
|
pit->initial[t] = 1;
|
|
|
|
|
if (!pit->m[t])
|
|
|
|
|
pit_set_out(pit, t, 0);
|
2016-06-26 00:34:39 +02:00
|
|
|
else
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_set_out(pit, t, 1);
|
|
|
|
|
pit->disabled[t] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->wp=0;
|
|
|
|
|
pit->thit[t]=0;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 0: case 1: case 2: /*Timers*/
|
|
|
|
|
t=addr&3;
|
2017-05-05 01:49:42 +02:00
|
|
|
switch (pit->wm[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
case 1:
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->l[t]=val;
|
|
|
|
|
pit_load(pit, t);
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 2:
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->l[t]=(val<<8);
|
|
|
|
|
pit_load(pit, t);
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 0:
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->l[t]&=0xFF;
|
|
|
|
|
pit->l[t]|=(val<<8);
|
|
|
|
|
pit_load(pit, t);
|
|
|
|
|
pit->wm[t]=3;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 3:
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->l[t]&=0xFF00;
|
|
|
|
|
pit->l[t]|=val;
|
|
|
|
|
pit->wm[t]=0;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
speakval=(((float)pit->l[2]/(float)pit->l[0])*0x4000)-0x2000;
|
2016-06-26 00:34:39 +02:00
|
|
|
if (speakval>0x2000) speakval=0x2000;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
uint8_t pit_read(uint16_t addr, void *p)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
PIT *pit = (PIT *)p;
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t t;
|
2017-06-16 06:44:11 +02:00
|
|
|
uint8_t temp = 0xff;
|
2017-10-09 01:48:36 +02:00
|
|
|
cycles -= (int64_t)PITCONST;
|
2016-06-26 00:34:39 +02:00
|
|
|
switch (addr&3)
|
|
|
|
|
{
|
|
|
|
|
case 0: case 1: case 2: /*Timers*/
|
|
|
|
|
t = addr & 3;
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->do_read_status[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->do_read_status[t] = 0;
|
|
|
|
|
temp = pit->read_status[t];
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->rereadlatch[addr & 3] && !pit->latched[addr & 3])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->rereadlatch[addr & 3] = 0;
|
|
|
|
|
pit->rl[t] = pit_read_timer(pit, t);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
2017-05-05 01:49:42 +02:00
|
|
|
switch (pit->rm[addr & 3])
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
case 0:
|
2017-05-05 01:49:42 +02:00
|
|
|
temp = pit->rl[addr & 3] >> 8;
|
|
|
|
|
pit->rm[addr & 3] = 3;
|
|
|
|
|
pit->latched[addr & 3] = 0;
|
|
|
|
|
pit->rereadlatch[addr & 3] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 1:
|
2017-05-05 01:49:42 +02:00
|
|
|
temp = (pit->rl[addr & 3]) & 0xFF;
|
|
|
|
|
pit->latched[addr & 3] = 0;
|
|
|
|
|
pit->rereadlatch[addr & 3] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 2:
|
2017-05-05 01:49:42 +02:00
|
|
|
temp = (pit->rl[addr & 3]) >> 8;
|
|
|
|
|
pit->latched[addr & 3] = 0;
|
|
|
|
|
pit->rereadlatch[addr & 3] = 1;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
case 3:
|
2017-05-05 01:49:42 +02:00
|
|
|
temp = (pit->rl[addr & 3]) & 0xFF;
|
|
|
|
|
if (pit->m[addr & 3] & 0x80)
|
|
|
|
|
pit->m[addr & 3] &= 7;
|
2016-06-26 00:34:39 +02:00
|
|
|
else
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->rm[addr & 3] = 0;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 3: /*Control*/
|
2017-05-05 01:49:42 +02:00
|
|
|
temp = pit->ctrl;
|
2016-06-26 00:34:39 +02:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return temp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pit_timer_over(void *p)
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
PIT_nr *pit_nr = (PIT_nr *)p;
|
|
|
|
|
PIT *pit = pit_nr->pit;
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t timer = pit_nr->nr;
|
2017-05-05 01:49:42 +02:00
|
|
|
|
|
|
|
|
pit_over(pit, timer);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_clock(PIT *pit, int64_t t)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->thit[t] || !pit->enabled[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
return;
|
|
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->using_timer[t])
|
2016-06-26 00:34:39 +02:00
|
|
|
return;
|
|
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->count[t] -= (pit->m[t] == 3) ? 2 : 1;
|
|
|
|
|
if (!pit->count[t])
|
|
|
|
|
pit_over(pit, t);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_set_using_timer(PIT *pit, int64_t t, int64_t using_timer)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
timer_process();
|
2017-05-05 01:49:42 +02:00
|
|
|
if (pit->using_timer[t] && !using_timer)
|
|
|
|
|
pit->count[t] = pit_read_timer(pit, t);
|
|
|
|
|
if (!pit->using_timer[t] && using_timer)
|
2017-10-09 01:48:36 +02:00
|
|
|
pit->c[t] = (int64_t)((pit->count[t] << TIMER_SHIFT) * PITCONST);
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->using_timer[t] = using_timer;
|
|
|
|
|
pit->running[t] = pit->enabled[t] && pit->using_timer[t] && !pit->disabled[t];
|
2016-06-26 00:34:39 +02:00
|
|
|
timer_update_outstanding();
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_set_out_func(PIT *pit, int64_t t, void (*func)(int64_t new_out, int64_t old_out))
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit->set_out_funcs[t] = func;
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_null_timer(int64_t new_out, int64_t old_out)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_irq0_timer(int64_t new_out, int64_t old_out)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
if (new_out && !old_out)
|
|
|
|
|
picint(1);
|
|
|
|
|
if (!new_out)
|
|
|
|
|
picintc(1);
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_irq0_timer_pcjr(int64_t new_out, int64_t old_out)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
if (new_out && !old_out)
|
|
|
|
|
{
|
|
|
|
|
picint(1);
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_clock(&pit, 1);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|
|
|
|
|
if (!new_out)
|
|
|
|
|
picintc(1);
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_irq0_ps2(int64_t new_out, int64_t old_out)
|
2017-05-05 01:49:42 +02:00
|
|
|
{
|
|
|
|
|
if (new_out && !old_out)
|
|
|
|
|
{
|
|
|
|
|
picint(1);
|
|
|
|
|
pit_set_gate_no_timer(&pit2, 0, 1);
|
|
|
|
|
}
|
|
|
|
|
if (!new_out)
|
|
|
|
|
picintc(1);
|
|
|
|
|
if (!new_out && old_out)
|
|
|
|
|
pit_clock(&pit2, 0);
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_refresh_timer_xt(int64_t new_out, int64_t old_out)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
if (new_out && !old_out)
|
|
|
|
|
dma_channel_read(0);
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_refresh_timer_at(int64_t new_out, int64_t old_out)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
|
|
|
|
if (new_out && !old_out)
|
|
|
|
|
ppi.pb ^= 0x10;
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_speaker_timer(int64_t new_out, int64_t old_out)
|
2016-06-26 00:34:39 +02:00
|
|
|
{
|
2017-10-09 01:48:36 +02:00
|
|
|
int64_t l;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
|
|
|
|
speaker_update();
|
|
|
|
|
|
|
|
|
|
l = pit.l[2] ? pit.l[2] : 0x10000;
|
|
|
|
|
if (l < 25)
|
|
|
|
|
speakon = 0;
|
|
|
|
|
else
|
|
|
|
|
speakon = new_out;
|
|
|
|
|
ppispeakon = new_out;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2017-10-09 01:48:36 +02:00
|
|
|
void pit_nmi_ps2(int64_t new_out, int64_t old_out)
|
2017-05-05 01:49:42 +02:00
|
|
|
{
|
|
|
|
|
nmi = new_out;
|
|
|
|
|
if (nmi)
|
|
|
|
|
nmi_auto_clear = 1;
|
|
|
|
|
}
|
|
|
|
|
|
2016-06-26 00:34:39 +02:00
|
|
|
void pit_init()
|
|
|
|
|
{
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_reset(&pit);
|
|
|
|
|
|
|
|
|
|
io_sethandler(0x0040, 0x0004, pit_read, NULL, NULL, pit_write, NULL, NULL, &pit);
|
2016-06-26 00:34:39 +02:00
|
|
|
pit.gate[0] = pit.gate[1] = 1;
|
|
|
|
|
pit.gate[2] = 0;
|
|
|
|
|
pit.using_timer[0] = pit.using_timer[1] = pit.using_timer[2] = 1;
|
2017-05-05 01:49:42 +02:00
|
|
|
|
|
|
|
|
pit.pit_nr[0].nr = 0;
|
|
|
|
|
pit.pit_nr[1].nr = 1;
|
|
|
|
|
pit.pit_nr[2].nr = 2;
|
|
|
|
|
pit.pit_nr[0].pit = pit.pit_nr[1].pit = pit.pit_nr[2].pit = &pit;
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
timer_add(pit_timer_over, &pit.c[0], &pit.running[0], (void *)&pit.pit_nr[0]);
|
|
|
|
|
timer_add(pit_timer_over, &pit.c[1], &pit.running[1], (void *)&pit.pit_nr[1]);
|
|
|
|
|
timer_add(pit_timer_over, &pit.c[2], &pit.running[2], (void *)&pit.pit_nr[2]);
|
2016-06-26 00:34:39 +02:00
|
|
|
|
2017-05-05 01:49:42 +02:00
|
|
|
pit_set_out_func(&pit, 0, pit_irq0_timer);
|
|
|
|
|
pit_set_out_func(&pit, 1, pit_null_timer);
|
|
|
|
|
pit_set_out_func(&pit, 2, pit_speaker_timer);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pit_ps2_init()
|
|
|
|
|
{
|
|
|
|
|
pit_reset(&pit2);
|
|
|
|
|
|
|
|
|
|
io_sethandler(0x0044, 0x0001, pit_read, NULL, NULL, pit_write, NULL, NULL, &pit2);
|
|
|
|
|
io_sethandler(0x0047, 0x0001, pit_read, NULL, NULL, pit_write, NULL, NULL, &pit2);
|
|
|
|
|
|
|
|
|
|
pit2.gate[0] = 0;
|
|
|
|
|
pit2.using_timer[0] = 0;
|
|
|
|
|
pit2.disabled[0] = 1;
|
|
|
|
|
|
|
|
|
|
pit2.pit_nr[0].nr = 0;
|
|
|
|
|
pit2.pit_nr[0].pit = &pit2;
|
|
|
|
|
|
|
|
|
|
timer_add(pit_timer_over, &pit2.c[0], &pit2.running[0], (void *)&pit2.pit_nr[0]);
|
|
|
|
|
|
|
|
|
|
pit_set_out_func(&pit, 0, pit_irq0_ps2);
|
|
|
|
|
pit_set_out_func(&pit2, 0, pit_nmi_ps2);
|
2016-06-26 00:34:39 +02:00
|
|
|
}
|