2017-09-04 01:52:29 -04:00
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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2017-09-04 02:42:48 -04:00
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* Emulation of the NatSemi PC87306 Super I/O chip.
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2017-09-04 01:52:29 -04:00
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*
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2017-10-01 16:29:15 -04:00
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* Version: @(#)sio_pc87306.c 1.0.5 2017/09/30
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2017-09-04 01:52:29 -04:00
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2016,2017 Miran Grca.
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*/
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2017-09-25 04:31:20 -04:00
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <wchar.h>
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2017-09-04 01:52:29 -04:00
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#include "ibm.h"
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#include "io.h"
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2017-10-01 16:29:15 -04:00
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#include "device.h"
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2017-09-04 01:52:29 -04:00
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#include "lpt.h"
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#include "serial.h"
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#include "floppy/floppy.h"
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#include "floppy/fdc.h"
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#include "floppy/fdd.h"
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2017-10-01 16:29:15 -04:00
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#include "hdd/hdc.h"
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2017-09-30 16:56:38 -04:00
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#include "hdd/hdc_ide.h"
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2017-09-04 01:52:29 -04:00
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#include "sio.h"
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static int pc87306_curreg;
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static uint8_t pc87306_regs[29];
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static uint8_t pc87306_gpio[2] = {0xFF, 0xFB};
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static uint8_t tries;
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static uint16_t lpt_port;
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void pc87306_gpio_remove();
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void pc87306_gpio_init();
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void pc87306_gpio_write(uint16_t port, uint8_t val, void *priv)
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{
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pc87306_gpio[port & 1] = val;
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}
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uint8_t uart_int1()
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{
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/* 0: IRQ3, 1: IRQ4 */
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return ((pc87306_regs[0x1C] >> 2) & 1) ? 4 : 3;
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}
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uint8_t uart_int2()
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{
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/* 0: IRQ3, 1: IRQ4 */
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return ((pc87306_regs[0x1C] >> 6) & 1) ? 4 : 3;
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}
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uint8_t uart1_int()
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{
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uint8_t temp;
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temp = ((pc87306_regs[1] >> 2) & 1) ? 3 : 4; /* 0 = COM1 (IRQ 4), 1 = COM2 (IRQ 3), 2 = COM3 (IRQ 4), 3 = COM4 (IRQ 3) */
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return (pc87306_regs[0x1C] & 1) ? uart_int1() : temp;
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}
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uint8_t uart2_int()
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{
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uint8_t temp;
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temp = ((pc87306_regs[1] >> 4) & 1) ? 3 : 4; /* 0 = COM1 (IRQ 4), 1 = COM2 (IRQ 3), 2 = COM3 (IRQ 4), 3 = COM4 (IRQ 3) */
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return (pc87306_regs[0x1C] & 1) ? uart_int2() : temp;
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}
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void lpt1_handler()
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{
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int temp;
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temp = pc87306_regs[0x01] & 3;
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switch (temp)
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{
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case 0:
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lpt_port = 0x378;
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break;
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case 1:
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if (pc87306_regs[0x1B] & 0x40)
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{
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lpt_port = ((uint16_t) pc87306_regs[0x19]) << 2;
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}
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else
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{
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lpt_port = 0x3bc;
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}
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break;
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case 2:
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lpt_port = 0x278;
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break;
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}
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lpt1_init(lpt_port);
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}
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void serial1_handler()
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{
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int temp;
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temp = (pc87306_regs[1] >> 2) & 3;
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switch (temp)
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{
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case 0: serial_setup(1, SERIAL1_ADDR, uart1_int()); break;
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case 1: serial_setup(1, SERIAL2_ADDR, uart1_int()); break;
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case 2:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial_setup(1, 0x3e8, uart1_int()); break;
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case 1: serial_setup(1, 0x338, uart1_int()); break;
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case 2: serial_setup(1, 0x2e8, uart1_int()); break;
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case 3: serial_setup(1, 0x220, uart1_int()); break;
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}
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break;
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case 3:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial_setup(1, 0x2e8, uart1_int()); break;
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case 1: serial_setup(1, 0x238, uart1_int()); break;
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case 2: serial_setup(1, 0x2e0, uart1_int()); break;
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case 3: serial_setup(1, 0x228, uart1_int()); break;
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}
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break;
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}
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}
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void serial2_handler()
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{
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int temp;
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temp = (pc87306_regs[1] >> 4) & 3;
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switch (temp)
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{
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case 0: serial_setup(2, SERIAL1_ADDR, uart2_int()); break;
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case 1: serial_setup(2, SERIAL2_ADDR, uart2_int()); break;
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case 2:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial_setup(2, 0x3e8, uart2_int()); break;
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case 1: serial_setup(2, 0x338, uart2_int()); break;
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case 2: serial_setup(2, 0x2e8, uart2_int()); break;
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case 3: serial_setup(2, 0x220, uart2_int()); break;
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}
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break;
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case 3:
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switch ((pc87306_regs[1] >> 6) & 3)
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{
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case 0: serial_setup(2, 0x2e8, uart2_int()); break;
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case 1: serial_setup(2, 0x238, uart2_int()); break;
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case 2: serial_setup(2, 0x2e0, uart2_int()); break;
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case 3: serial_setup(2, 0x228, uart2_int()); break;
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}
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break;
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}
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}
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void pc87306_write(uint16_t port, uint8_t val, void *priv)
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{
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uint8_t index;
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uint8_t valxor;
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#if 0
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uint16_t or_value;
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#endif
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index = (port & 1) ? 0 : 1;
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if (index)
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{
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pc87306_curreg = val & 0x1f;
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tries = 0;
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return;
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}
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else
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{
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if (tries)
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{
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if ((pc87306_curreg == 0) && (val == 8))
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{
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val = 0x4b;
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}
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if (pc87306_curreg <= 28) valxor = val ^ pc87306_regs[pc87306_curreg];
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tries = 0;
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if ((pc87306_curreg == 0x19) && !(pc87306_regs[0x1B] & 0x40))
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{
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return;
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}
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if ((pc87306_curreg <= 28) && (pc87306_curreg != 8)/* && (pc87306_curreg != 0x18)*/)
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{
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if (pc87306_curreg == 0)
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{
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val &= 0x5f;
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}
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if (((pc87306_curreg == 0x0F) || (pc87306_curreg == 0x12)) && valxor)
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{
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pc87306_gpio_remove();
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}
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pc87306_regs[pc87306_curreg] = val;
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goto process_value;
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}
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}
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else
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{
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tries++;
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return;
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}
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}
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return;
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process_value:
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switch(pc87306_curreg)
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{
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case 0:
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if (valxor & 1)
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{
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lpt1_remove();
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if (val & 1)
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{
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lpt1_handler();
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}
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}
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if (valxor & 2)
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{
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serial_remove(1);
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if (val & 2)
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{
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serial1_handler();
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}
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}
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if (valxor & 4)
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{
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serial_remove(2);
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if (val & 4)
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{
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serial2_handler();
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}
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}
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if (valxor & 0x28)
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{
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fdc_remove();
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if (val & 8)
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{
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fdc_set_base((val & 0x20) ? 0x370 : 0x3f0, 0);
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}
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}
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if (valxor & 0xc0)
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{
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#if 0
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ide_pri_disable();
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if (val & 0x80)
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{
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or_value = 0;
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}
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else
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{
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or_value = 0x80;
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}
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ide_set_base(0, 0x170 | or_value);
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ide_set_side(0, 0x376 | or_value);
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if (val & 0x40)
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{
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ide_pri_enable_ex();
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}
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#endif
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}
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break;
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case 1:
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if (valxor & 3)
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{
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lpt1_remove();
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if (pc87306_regs[0] & 1)
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{
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lpt1_handler();
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}
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}
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if (valxor & 0xcc)
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{
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if (pc87306_regs[0] & 2)
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{
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serial1_handler();
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}
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else
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{
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serial_remove(1);
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}
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}
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if (valxor & 0xf0)
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{
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if (pc87306_regs[0] & 4)
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{
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serial2_handler();
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}
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else
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{
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serial_remove(2);
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}
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}
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break;
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case 2:
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if (valxor & 1)
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{
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if (val & 1)
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{
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lpt1_remove();
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serial_remove(1);
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serial_remove(2);
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fdc_remove();
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}
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else
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{
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if (pc87306_regs[0] & 1)
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{
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lpt1_handler();
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}
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if (pc87306_regs[0] & 2)
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{
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serial1_handler();
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}
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if (pc87306_regs[0] & 4)
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{
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serial2_handler();
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}
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if (pc87306_regs[0] & 8)
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{
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fdc_set_base((pc87306_regs[0] & 0x20) ? 0x370 : 0x3f0, 0);
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}
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}
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}
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break;
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case 9:
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if (valxor & 0x44)
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{
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fdc_update_enh_mode((val & 4) ? 1 : 0);
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fdc_update_densel_polarity((val & 0x40) ? 1 : 0);
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}
|
|
|
|
|
break;
|
|
|
|
|
case 0xF:
|
|
|
|
|
if (valxor)
|
|
|
|
|
{
|
|
|
|
|
pc87306_gpio_init();
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 0x12:
|
|
|
|
|
if (valxor & 0x30)
|
|
|
|
|
{
|
|
|
|
|
pc87306_gpio_init();
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 0x19:
|
|
|
|
|
if (valxor)
|
|
|
|
|
{
|
|
|
|
|
lpt1_remove();
|
|
|
|
|
if (pc87306_regs[0] & 1)
|
|
|
|
|
{
|
|
|
|
|
lpt1_handler();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 0x1B:
|
|
|
|
|
if (valxor & 0x40)
|
|
|
|
|
{
|
|
|
|
|
lpt1_remove();
|
|
|
|
|
if (!(val & 0x40))
|
|
|
|
|
{
|
|
|
|
|
pc87306_regs[0x19] = 0xEF;
|
|
|
|
|
}
|
|
|
|
|
if (pc87306_regs[0] & 1)
|
|
|
|
|
{
|
|
|
|
|
lpt1_handler();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 0x1C:
|
|
|
|
|
if (valxor)
|
|
|
|
|
{
|
|
|
|
|
if (pc87306_regs[0] & 2)
|
|
|
|
|
{
|
|
|
|
|
serial1_handler();
|
|
|
|
|
}
|
|
|
|
|
if (pc87306_regs[0] & 4)
|
|
|
|
|
{
|
|
|
|
|
serial2_handler();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint8_t pc87306_gpio_read(uint16_t port, void *priv)
|
|
|
|
|
{
|
|
|
|
|
return pc87306_gpio[port & 1];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint8_t pc87306_read(uint16_t port, void *priv)
|
|
|
|
|
{
|
|
|
|
|
uint8_t index;
|
|
|
|
|
index = (port & 1) ? 0 : 1;
|
|
|
|
|
|
|
|
|
|
tries = 0;
|
|
|
|
|
|
|
|
|
|
if (index)
|
|
|
|
|
{
|
|
|
|
|
return pc87306_curreg & 0x1f;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (pc87306_curreg >= 28)
|
|
|
|
|
{
|
|
|
|
|
return 0xff;
|
|
|
|
|
}
|
|
|
|
|
else if (pc87306_curreg == 8)
|
|
|
|
|
{
|
|
|
|
|
return 0x70;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
return pc87306_regs[pc87306_curreg];
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_gpio_remove()
|
|
|
|
|
{
|
|
|
|
|
io_removehandler(pc87306_regs[0xF] << 2, 0x0002, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_gpio_init()
|
|
|
|
|
{
|
|
|
|
|
if ((pc87306_regs[0x12]) & 0x10)
|
|
|
|
|
{
|
|
|
|
|
io_sethandler(pc87306_regs[0xF] << 2, 0x0001, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((pc87306_regs[0x12]) & 0x20)
|
|
|
|
|
{
|
|
|
|
|
io_sethandler((pc87306_regs[0xF] << 2) + 1, 0x0001, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, NULL);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_reset(void)
|
|
|
|
|
{
|
|
|
|
|
memset(pc87306_regs, 0, 29);
|
|
|
|
|
|
2017-09-04 02:42:48 -04:00
|
|
|
/* pc87306_regs[0] = 0x4B; */
|
|
|
|
|
pc87306_regs[0] = 0x0B;
|
2017-09-04 01:52:29 -04:00
|
|
|
pc87306_regs[1] = 0x01;
|
|
|
|
|
pc87306_regs[3] = 0x01;
|
|
|
|
|
pc87306_regs[5] = 0x0D;
|
|
|
|
|
pc87306_regs[8] = 0x70;
|
|
|
|
|
pc87306_regs[9] = 0xC0;
|
|
|
|
|
pc87306_regs[0xB] = 0x80;
|
|
|
|
|
pc87306_regs[0xF] = 0x1E;
|
|
|
|
|
pc87306_regs[0x12] = 0x30;
|
|
|
|
|
pc87306_regs[0x19] = 0xEF;
|
|
|
|
|
/*
|
|
|
|
|
0 = 360 rpm @ 500 kbps for 3.5"
|
|
|
|
|
1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5"
|
|
|
|
|
*/
|
|
|
|
|
fdc_update_is_nsc(1);
|
|
|
|
|
fdc_update_enh_mode(0);
|
|
|
|
|
fdc_update_densel_polarity(1);
|
|
|
|
|
fdc_update_max_track(85);
|
|
|
|
|
fdc_remove();
|
|
|
|
|
fdc_set_base(0x3f0, 0);
|
|
|
|
|
fdd_swap = 0;
|
|
|
|
|
serial_remove(1);
|
|
|
|
|
serial_remove(2);
|
|
|
|
|
serial1_handler();
|
|
|
|
|
serial2_handler();
|
|
|
|
|
pc87306_gpio_init();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void pc87306_init()
|
|
|
|
|
{
|
|
|
|
|
lpt2_remove();
|
|
|
|
|
|
|
|
|
|
pc87306_reset();
|
|
|
|
|
|
|
|
|
|
io_sethandler(0x02e, 0x0002, pc87306_read, NULL, NULL, pc87306_write, NULL, NULL, NULL);
|
|
|
|
|
|
|
|
|
|
pci_reset_handler.super_io_reset = pc87306_reset;
|
|
|
|
|
}
|