From bba8f4d499633915d7f6bbe56de049d10cead607 Mon Sep 17 00:00:00 2001 From: starfrost013 Date: Sat, 21 Jun 2025 00:39:50 +0100 Subject: [PATCH 01/31] Remove various unused ega_t fields and lots of unused 8514 stuff --- src/include/86box/vid_8514a.h | 39 ++--------- src/include/86box/vid_ega.h | 127 ++++++++++++++++------------------ src/include/86box/vid_svga.h | 1 - src/video/vid_8514a.c | 13 ++-- src/video/vid_ati_mach64.c | 8 --- src/video/vid_ati_mach8.c | 60 ++++++++-------- src/video/vid_ega.c | 5 -- src/video/vid_mga.c | 7 -- src/video/vid_ps55da2.c | 3 - src/video/vid_s3.c | 8 --- src/video/vid_svga.c | 29 -------- 11 files changed, 101 insertions(+), 199 deletions(-) diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index 9d19d916c..4b81e56c0 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -18,6 +18,8 @@ #ifndef VIDEO_8514A_H #define VIDEO_8514A_H +#include + #define INT_VSY (1 << 0) #define INT_GE_BSY (1 << 1) #define INT_FIFO_OVR (1 << 2) @@ -92,18 +94,14 @@ typedef struct ibm8514_t { int dac_r; int dac_g; int dac_b; - int internal_pitch; int hwcursor_on; - int modechange; uint64_t dispontime; uint64_t dispofftime; struct { uint16_t subsys_cntl; - uint16_t setup_md; uint16_t advfunc_cntl; - uint16_t advfunc_cntl_old; uint16_t cur_y; uint16_t cur_x; int16_t destx; @@ -132,35 +130,24 @@ typedef struct ibm8514_t { int16_t clip_left; int16_t clip_top; uint8_t pix_trans[2]; - int poly_draw; int ssv_state; - int x1; - int x2; - int x3; - int y1; - int y2; + int temp_cnt; - int16_t dx_ibm; - int16_t dy_ibm; int16_t cx; - int16_t cx_back; int16_t cy; - int16_t oldcx; + /* oldcx was not used! */ int16_t oldcy; int16_t sx; int16_t sy; int16_t dx; int16_t dy; - int16_t err; uint32_t src; uint32_t dest; int x_count; - int xx_count; int y_count; int input; int input2; int output; - int output2; int ssv_len; int ssv_len_back; @@ -179,20 +166,12 @@ typedef struct ibm8514_t { uint32_t dst_ge_offset; uint16_t src_pitch; uint16_t dst_pitch; - int64_t cur_x_24bpp; - int64_t cur_y_24bpp; - int64_t dest_x_24bpp; - int64_t dest_y_24bpp; } accel; - uint16_t test; int h_blankstart; - int h_blank_end_val; int hblankstart; - int hblank_end_val; int hblankend; int hblank_ext; - int hblank_sub; int v_total_reg; int v_total; @@ -202,12 +181,10 @@ typedef struct ibm8514_t { int split; int h_disp; int h_total; - int h_sync_width; int h_disp_time; int rowoffset; int dispon; - int hdisp_on; - int linecountff; + int hdispon; int vc; int linepos; int oddeven; @@ -241,9 +218,7 @@ typedef struct ibm8514_t { int vsyncwidth; int vtotal; int v_disp; - int v_disp2; int vdisp; - int vdisp2; int disp_cntl; int interlace; uint16_t subsys_cntl; @@ -255,15 +230,15 @@ typedef struct ibm8514_t { int blitter_busy; uint64_t blitter_time; - uint64_t status_time; int pitch; int ext_pitch; int ext_crt_pitch; ibm8514_extensions_t extensions; int onboard; int linear; + bool vram_is_512k; + uint32_t vram_amount; - int vram_512k_8514; int vendor_mode; int _8514on; int _8514crt; diff --git a/src/include/86box/vid_ega.h b/src/include/86box/vid_ega.h index beef6f98d..caa8a63d5 100644 --- a/src/include/86box/vid_ega.h +++ b/src/include/86box/vid_ega.h @@ -13,14 +13,18 @@ * * Authors: Sarah Walker, * Miran Grca, + * Connor Hyde / starfrost, * * Copyright 2008-2020 Sarah Walker. * Copyright 2016-2020 Miran Grca. + * Copyright 2025 Connor Hyde. */ #ifndef VIDEO_EGA_H #define VIDEO_EGA_H +#include + #if defined(EMU_MEM_H) && defined(EMU_ROM_H) typedef struct ega_t { mem_mapping_t mapping; @@ -57,65 +61,52 @@ typedef struct ega_t { uint16_t light_pen; - int vidclock; - int fast; - int extvram; - int vres; - int readmode; - int writemode; - int readplane; - int vrammask; - int chain4; - int chain2_read; - int chain2_write; - int cursorvisible; - int oddeven_page; - int oddeven_chain; - int vc; - int real_vc; - int scanline; - int dispon; - int hdisp_on; - int cursoron; - int blink; - int fullchange; - int linepos; - int vslines; - int linecountff; - int oddeven; - int lowres; - int interlace; - int linedbl; - int lindebl; - int rowcount; - int vtotal; - int dispend; - int vsyncstart; - int split; - int hdisp; - int hdisp_old; - int htotal; - int hdisp_time; - int rowoffset; - int vblankstart; - int scrollcache; - int firstline; - int lastline; - int firstline_draw; - int lastline_draw; - int x_add; - int y_add; - int displine; - int res_x; - int res_y; - int bpp; - int index; - int remap_required; - int actual_type; - int chipset; - int mono_display; + int32_t vidclock; + int32_t vres; + int32_t readmode; + int32_t writemode; + int32_t readplane; + int32_t vrammask; + int32_t chain4; + int32_t chain2_read; + int32_t chain2_write; + int32_t cursorvisible; + int32_t vc; + int32_t real_vc; + int32_t scanline; + int32_t dispon; + int32_t cursoron; + int32_t blink; + int32_t fullchange; + int32_t linepos; + int32_t vslines; + int32_t linecountff; + int32_t oddeven; + int32_t interlace; + int32_t linedbl; + int32_t rowcount; + int32_t vtotal; + int32_t dispend; + int32_t vsyncstart; + int32_t split; + int32_t hdisp; + int32_t htotal; + int32_t rowoffset; + int32_t vblankstart; + int32_t scrollcache; + int32_t firstline; + int32_t lastline; + int32_t firstline_draw; + int32_t lastline_draw; + int32_t x_add; + int32_t y_add; + int32_t displine; + int32_t index; + bool remap_required; + int32_t actual_type; + int32_t chipset; - int mda_attr_to_color_table[256][2][2]; + int32_t mda_attr_to_color_table[256][2][2]; uint32_t charseta; uint32_t charsetb; @@ -164,7 +155,7 @@ extern const device_t jega_device; extern const device_t jvga_device; #endif -extern int update_overscan; +extern int32_t update_overscan; #define DISPLAY_RGB 0 #define DISPLAY_COMPOSITE 1 @@ -174,7 +165,7 @@ extern int update_overscan; #define DISPLAY_WHITE 5 #if defined(EMU_MEM_H) && defined(EMU_ROM_H) -extern void ega_init(ega_t *ega, int monitor_type, int is_mono); +extern void ega_init(ega_t *ega, int32_t monitor_type, int32_t is_mono); extern void ega_recalctimings(struct ega_t *ega); extern void ega_recalc_remap_func(struct ega_t *ega); #endif @@ -186,18 +177,18 @@ extern void ega_write(uint32_t addr, uint8_t val, void *priv); extern uint8_t ega_read(uint32_t addr, void *priv); extern void ega_set_type(void *priv, uint32_t local); -extern int firstline_draw; -extern int lastline_draw; -extern int displine; -extern int scanline; +extern int32_t firstline_draw; +extern int32_t lastline_draw; +extern int32_t displine; +extern int32_t scanline; extern uint32_t memaddr; extern uint32_t cursoraddr; -extern int cursorvisible; -extern int cursoron; -extern int cgablink; +extern int32_t cursorvisible; +extern int32_t cursoron; +extern int32_t cgablink; -extern int scrollcache; +extern int32_t scrollcache; extern uint8_t edatlookup[4][4]; extern uint8_t egaremap2bpp[256]; diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index ad9170ad3..77e41273d 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -98,7 +98,6 @@ typedef struct svga_t { int hdisp_time; int rowoffset; int dispon; - int hdisp_on; int vc; int scanline; int linepos; diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 97202340d..d8dc369e2 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -520,7 +520,6 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x92e8: if (len == 2) { - dev->test = val; dev->accel.err_term = val & 0x3fff; if (val & 0x2000) dev->accel.err_term |= ~0x1fff; @@ -790,7 +789,7 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) case 0x92e8: if (len == 2) - temp = dev->test; + temp = dev->accel.err_term; break; case 0x96e8: @@ -968,7 +967,7 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) dev->data_available2 = 0; temp |= INT_FIFO_EMP; } - temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80)); + temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80)); temp |= 0x20; } break; @@ -2430,7 +2429,7 @@ skip_nibble_rect_write: ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back); + ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat); WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } else @@ -3679,7 +3678,6 @@ ibm8514_poll(void *priv) dev->linepos = 1; if (dev->dispon) { - dev->hdisp_on = 1; dev->memaddr &= dev->vram_mask; @@ -3722,7 +3720,6 @@ ibm8514_poll(void *priv) timer_advance_u64(&svga->timer, dev->dispontime); if (dev->dispon) svga->cgastat &= ~1; - dev->hdisp_on = 0; dev->linepos = 0; if (dev->dispon) { @@ -3862,7 +3859,7 @@ ibm8514_recalctimings(svga_t *svga) dev->pitch = 1024; dev->rowoffset = 0x80; - if (dev->vram_512k_8514) { + if (dev->vram_is_512k) { if (dev->h_disp == 640) dev->pitch = 640; } @@ -3947,7 +3944,7 @@ ibm8514_init(const device_t *info) svga->ext8514 = NULL; dev->vram_amount = device_get_config_int("memory"); - dev->vram_512k_8514 = dev->vram_amount == 512; + dev->vram_is_512k = dev->vram_amount == 512; dev->vram_size = dev->vram_amount << 10; dev->vram = calloc(dev->vram_size, 1); dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1); diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 74086dab1..471dacb19 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -255,9 +255,6 @@ typedef struct mach64_t { event_t *wake_fifo_thread; event_t *fifo_not_full_event; - uint64_t blitter_time; - uint64_t status_time; - uint16_t pci_id; uint32_t config_chip_id; uint32_t block_decoded_io; @@ -1189,8 +1186,6 @@ fifo_thread(void *param) thread_reset_event(mach64->wake_fifo_thread); mach64->blitter_busy = 1; while (!FIFO_EMPTY) { - uint64_t start_time = plat_timer_read(); - uint64_t end_time; fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_read_idx & FIFO_MASK]; switch (fifo->addr_type & FIFO_TYPE) { @@ -1213,9 +1208,6 @@ fifo_thread(void *param) if (FIFO_ENTRIES > 0xe000) thread_set_event(mach64->fifo_not_full_event); - - end_time = plat_timer_read(); - mach64->blitter_time += end_time - start_time; } mach64->blitter_busy = 0; } diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index 4133b730e..5a767e3fc 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -2835,7 +2835,7 @@ ati8514_recalctimings(svga_t *svga) mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n", dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace); - if (dev->vram_512k_8514) { + if (dev->vram_is_512k) { if (dev->h_disp == 640) dev->pitch = 640; else @@ -2917,7 +2917,7 @@ mach_recalctimings(svga_t *svga) mach->accel.crt_offset <<= 2; } - if (ATI_MACH32 && !dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (ATI_MACH32 && !dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { dev->accel.ge_offset <<= 1; mach->accel.crt_offset <<= 1; } @@ -2960,7 +2960,7 @@ mach_recalctimings(svga_t *svga) mach->accel.src_ge_offset <<= 2; mach->accel.dst_ge_offset <<= 2; } - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { mach->accel.src_ge_offset <<= 1; mach->accel.dst_ge_offset <<= 1; } @@ -2979,7 +2979,7 @@ mach_recalctimings(svga_t *svga) else mach->accel.dst_ge_offset <<= 2; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) mach->accel.dst_ge_offset <<= 1; mach->accel.dst_ge_offset -= mach->accel.crt_offset; @@ -2994,7 +2994,7 @@ mach_recalctimings(svga_t *svga) else mach->accel.src_ge_offset <<= 2; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) mach->accel.src_ge_offset <<= 1; mach->accel.src_ge_offset -= mach->accel.crt_offset; @@ -3015,7 +3015,7 @@ mach_recalctimings(svga_t *svga) switch (dev->accel_bpp) { case 8: if ((mach->accel.ext_ge_config & 0x30) == 0x00) { - if (dev->vram_512k_8514) { + if (dev->vram_is_512k) { if (dev->h_disp == 640) dev->pitch = 640; else @@ -3056,7 +3056,7 @@ mach_recalctimings(svga_t *svga) mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n", dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 0x03, dev->interlace, svga->hdisp); - if (dev->vram_512k_8514) { + if (dev->vram_is_512k) { if (dev->h_disp == 640) dev->pitch = 640; else @@ -3236,7 +3236,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->v_disp &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2); + mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->v_disp); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ @@ -3256,7 +3256,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->v_disp &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2); + mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->v_disp); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } svga_recalctimings(svga); @@ -3594,7 +3594,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u } mach->cursor_offset_lo = mach->cursor_offset_lo_reg; dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2); - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) dev->hwcursor.addr <<= 1; break; @@ -3607,7 +3607,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000); mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f; dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2); - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) dev->hwcursor.addr <<= 1; break; @@ -4794,7 +4794,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) temp |= INT_FIFO_EMP; mach_log("Fifo Empty.\n"); } - temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80)); + temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80)); if (mach->accel.ext_ge_config & 0x08) temp |= ((mach->accel.ext_ge_config & 0x07) << 4); else @@ -5231,12 +5231,12 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t cycles -= svga->monitor->mon_video_timing_write_b; if (linear) { - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { switch (addr & 0x06) { case 0x00: case 0x06: @@ -5387,7 +5387,7 @@ mach32_write(uint32_t addr, uint8_t val, void *priv) return; } - if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; switch (addr & 0x06) { case 0x00: @@ -5427,7 +5427,7 @@ mach32_writew(uint32_t addr, uint16_t val, void *priv) return; } - if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; if (addr & 0x04) { mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga); @@ -5462,7 +5462,7 @@ mach32_writel(uint32_t addr, uint32_t val, void *priv) return; } - if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; mach32_write_common(addr, val & 0x0f, 0, mach, svga); mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga); @@ -5705,12 +5705,12 @@ mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach) ibm8514_t *dev = (ibm8514_t *) svga->dev8514; cycles -= svga->monitor->mon_video_timing_write_w; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { if (addr & 0x04) { dev->vram[addr - 2] = val & 0x0f; dev->vram[addr - 1] = (val >> 4) & 0x0f; @@ -5734,12 +5734,12 @@ mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach) cycles -= svga->monitor->mon_video_timing_write_l; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { dev->vram[addr] = val & 0x0f; dev->vram[addr + 1] = (val >> 4) & 0x0f; dev->vram[addr + 4] = (val >> 8) & 0x0f; @@ -5765,11 +5765,11 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) cycles -= svga->monitor->mon_video_timing_read_b; if (linear) { - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { switch ((addr & 0x06) >> 1) { case 0x00: case 0x03: @@ -5879,7 +5879,7 @@ mach32_read(uint32_t addr, void *priv) (void) xga_read_test(addr, svga); addr = (addr & svga->banked_mask) + svga->read_bank; - if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; switch ((addr & 0x06) >> 1) { case 0x00: @@ -5916,7 +5916,7 @@ mach32_readw(uint32_t addr, void *priv) (void) xga_read_test(addr, svga); addr = (addr & svga->banked_mask) + svga->read_bank; - if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; if (addr & 0x04) { ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f; @@ -5948,7 +5948,7 @@ mach32_readl(uint32_t addr, void *priv) (void) xga_read_test(addr, svga); addr = (addr & svga->banked_mask) + svga->read_bank; - if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; ret = mach32_read_common(addr, 0, mach, svga) & 0x0f; ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4); @@ -5976,7 +5976,7 @@ mach32_readw_linear(uint32_t addr, mach_t *mach) uint16_t ret; cycles -= svga->monitor->mon_video_timing_read_w; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; addr &= dev->vram_mask; if (addr & 0x04) { @@ -6004,7 +6004,7 @@ mach32_readl_linear(uint32_t addr, mach_t *mach) uint32_t ret; cycles -= svga->monitor->mon_video_timing_read_l; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; addr &= dev->vram_mask; ret = dev->vram[addr] & 0x0f; @@ -6301,7 +6301,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine) int shift = 0; offset = dev->hwcursor_latch.x - dev->hwcursor_latch.xoff; - if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) shift = 1; mach_log("BPP=%d, displine=%d.\n", dev->accel_bpp, displine); @@ -7070,7 +7070,7 @@ mach8_init(const device_t *info) mach->has_bios = !(info->local & 0xff00); mach->ramdac_type = mach->pci_bus ? device_get_config_int("ramdac") : 1; dev->vram_amount = device_get_config_int("memory"); - dev->vram_512k_8514 = dev->vram_amount == 512; + dev->vram_is_512k = dev->vram_amount == 512; if (ATI_MACH32) { if (mach->pci_bus) { diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index 1cfea782c..fba4ce7a8 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -663,7 +663,6 @@ ega_recalctimings(ega_t *ega) ega->hdisp *= (ega->seqregs[1] & 8) ? 16 : 8; ega->render = ega_render_graphics; } - ega->hdisp_old = ega->hdisp; } if (ega->chipset) { @@ -841,7 +840,6 @@ ega_poll(void *priv) ega->linepos = 1; if (ega->dispon) { - ega->hdisp_on = 1; ega->memaddr &= ega->vrammask; if (ega->firstline == 2000) { @@ -897,7 +895,6 @@ ega_poll(void *priv) if (ega->dispon) ega->status &= ~1; - ega->hdisp_on = 0; ega->linepos = 0; if ((ega->scanline == (ega->crtc[11] & 31)) || (ega->scanline == ega->rowcount)) @@ -1539,10 +1536,8 @@ ega_init(ega_t *ega, int monitor_type, int is_mono) old_overscan_color = 0; ega->miscout |= 0x22; - ega->oddeven_page = 0; ega->seqregs[4] |= 2; - ega->extvram = 1; update_overscan = 0; diff --git a/src/video/vid_mga.c b/src/video/vid_mga.c index 294e6ce75..e08ee1724 100644 --- a/src/video/vid_mga.c +++ b/src/video/vid_mga.c @@ -474,8 +474,6 @@ typedef struct mystique_t { atomic_uint status; atomic_bool softrap_status_read; - uint64_t blitter_time, status_time; - pc_timer_t softrap_pending_timer, wake_timer; fifo_entry_t fifo[FIFO_SIZE]; @@ -6048,8 +6046,6 @@ static void mystique_start_blit(mystique_t *mystique) { svga_t *svga = &mystique->svga; - uint64_t start_time = plat_timer_read(); - uint64_t end_time; /*Make sure we don't get any artifacts.*/ svga->chain2_write = 0; @@ -6119,9 +6115,6 @@ mystique_start_blit(mystique_t *mystique) fatal("mystique_start_blit: unknown blit %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK); break; } - - end_time = plat_timer_read(); - mystique->blitter_time += end_time - start_time; } static void diff --git a/src/video/vid_ps55da2.c b/src/video/vid_ps55da2.c index 938e4bf6b..29eefabbf 100644 --- a/src/video/vid_ps55da2.c +++ b/src/video/vid_ps55da2.c @@ -356,7 +356,6 @@ typedef struct da2_t { uint64_t da2const; int dispon; - int hdisp_on; uint32_t memaddr, memaddr_backup, cursoraddr; int vc; @@ -3020,7 +3019,6 @@ da2_poll(void *priv) da2->linepos = 1; if (da2->dispon) { - da2->hdisp_on = 1; da2->memaddr &= da2->vram_display_mask; if (da2->firstline == 2000) { @@ -3052,7 +3050,6 @@ da2_poll(void *priv) if (da2->dispon) da2->cgastat &= ~1; - da2->hdisp_on = 0; da2->linepos = 0; if (da2->scanline == (da2->crtc[LC_CURSOR_ROW_END] & 31)) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index d0495dca0..b222957eb 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -375,8 +375,6 @@ typedef struct s3_t { event_t *fifo_not_full_event; atomic_int blitter_busy; - uint64_t blitter_time; - uint64_t status_time; uint8_t subsys_cntl, subsys_stat; @@ -9698,8 +9696,6 @@ static void fifo_thread(void *param) { s3_t *s3 = (s3_t *) param; - uint64_t start_time; - uint64_t end_time; while (s3->fifo_thread_run) { thread_set_event(s3->fifo_not_full_event); @@ -9707,7 +9703,6 @@ fifo_thread(void *param) thread_reset_event(s3->wake_fifo_thread); s3->blitter_busy = 1; while (!FIFO_EMPTY) { - start_time = plat_timer_read(); fifo_entry_t *fifo = &s3->fifo[s3->fifo_read_idx & FIFO_MASK]; switch (fifo->addr_type & FIFO_TYPE) { @@ -9739,9 +9734,6 @@ fifo_thread(void *param) if (FIFO_ENTRIES > 0xe000) thread_set_event(s3->fifo_not_full_event); - - end_time = plat_timer_read(); - s3->blitter_time += (end_time - start_time); } s3->blitter_busy = 0; s3->subsys_stat |= INT_FIFO_EMP; diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index cf3a22c5c..2fed471f9 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -972,33 +972,6 @@ svga_recalctimings(svga_t *svga) } } -#ifdef TBD - if (ibm8514_active && (svga->dev8514 != NULL)) { - if (dev->on) { - uint32_t dot8514 = dev->h_blankstart; - uint32_t adj_dot8514 = dev->h_blankstart; - uint32_t eff_mask8514 = 0x0000001f; - dev->hblank_sub = 0; - - while (adj_dot8514 < (dev->h_total << 1)) { - if (dot8514 == dev->h_total) - dot8514 = 0; - - if (adj_dot8514 >= dev->h_total) - dev->hblank_sub++; - - if ((dot8514 & eff_mask8514) == (dev->h_blank_end_val & eff_mask8514)) - break; - - dot8514++; - adj_dot8514++; - } - - dev->h_disp -= dev->hblank_sub; - } - } -#endif - if (svga->vblankstart < svga->dispend) { svga_log("DISPEND > VBLANKSTART.\n"); svga->dispend = svga->vblankstart; @@ -1281,7 +1254,6 @@ svga_poll(void *priv) svga->linepos = 1; if (svga->dispon) { - svga->hdisp_on = 1; svga->memaddr &= svga->vram_display_mask; if (svga->firstline == 2000) { @@ -1328,7 +1300,6 @@ svga_poll(void *priv) if (svga->dispon) svga->cgastat &= ~1; - svga->hdisp_on = 0; svga->linepos = 0; if ((svga->scanline == (svga->crtc[11] & 31)) || (svga->scanline == svga->rowcount)) From adb8b388a8dd848a5692350b39c11bfb7ff1e8c4 Mon Sep 17 00:00:00 2001 From: starfrost013 Date: Sat, 21 Jun 2025 00:55:39 +0100 Subject: [PATCH 02/31] v_disp -> vdisp_latch; get rid of even more unused shit --- src/include/86box/vid_8514a.h | 15 +++---------- src/include/86box/vid_ati_eeprom.h | 2 +- src/include/86box/vid_svga.h | 2 +- src/include/86box/vid_xga.h | 2 +- src/video/ramdac/vid_ramdac_bt48x.c | 2 +- src/video/ramdac/vid_ramdac_ibm_rgb528.c | 2 +- src/video/ramdac/vid_ramdac_tvp3026.c | 6 ++--- src/video/vid_8514a.c | 20 ++++++++--------- src/video/vid_ati_eeprom.c | 12 +++++----- src/video/vid_ati_mach64.c | 6 ++--- src/video/vid_ati_mach8.c | 28 ++++++++++++------------ src/video/vid_chips_69000.c | 2 +- src/video/vid_cl54xx.c | 4 ++-- src/video/vid_et4000w32.c | 2 +- src/video/vid_ht216.c | 2 +- src/video/vid_mga.c | 2 +- src/video/vid_s3.c | 8 +++---- src/video/vid_s3_virge.c | 12 +++++----- src/video/vid_svga.c | 12 +++++----- src/video/vid_tgui9440.c | 2 +- src/video/vid_voodoo_banshee.c | 8 +++---- src/video/vid_xga.c | 6 ++--- 22 files changed, 74 insertions(+), 83 deletions(-) diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index 4b81e56c0..5d4b262c4 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -40,15 +40,13 @@ typedef enum { } ibm8514_extensions_t; typedef struct hwcursor8514_t { - int ena; + int enable; int x; int y; int xoff; int yoff; int cur_xsize; int cur_ysize; - int v_acc; - int h_acc; uint32_t addr; uint32_t pitch; } hwcursor8514_t; @@ -129,7 +127,6 @@ typedef struct ibm8514_t { uint16_t clip_bottom; int16_t clip_left; int16_t clip_top; - uint8_t pix_trans[2]; int ssv_state; int temp_cnt; @@ -144,7 +141,7 @@ typedef struct ibm8514_t { uint32_t src; uint32_t dest; int x_count; - int y_count; + /* y_count not used */ int input; int input2; int output; @@ -154,13 +151,8 @@ typedef struct ibm8514_t { uint8_t ssv_dir; uint8_t ssv_draw; int odd_in; - int odd_out; - uint16_t scratch; int fill_state; - int xdir; - int ydir; - int linedraw; uint32_t ge_offset; uint32_t src_ge_offset; uint32_t dst_ge_offset; @@ -214,10 +206,9 @@ typedef struct ibm8514_t { int hdisp2; int hdisped; int scanline; - int vsyncstart; int vsyncwidth; int vtotal; - int v_disp; + int vdisp_latch; int vdisp; int disp_cntl; int interlace; diff --git a/src/include/86box/vid_ati_eeprom.h b/src/include/86box/vid_ati_eeprom.h index c52b5bd4b..84e09f946 100644 --- a/src/include/86box/vid_ati_eeprom.h +++ b/src/include/86box/vid_ati_eeprom.h @@ -49,7 +49,7 @@ typedef struct ati_eeprom_t { void ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type); void ati_eeprom_load_mach8(ati_eeprom_t *eeprom, char *fn, int mca); void ati_eeprom_load_mach8_vga(ati_eeprom_t *eeprom, char *fn); -void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat); +void ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat); int ati_eeprom_read(ati_eeprom_t *eeprom); #endif /*VIDEO_ATI_EEPROM_H*/ diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 77e41273d..b6eae1c8a 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -33,7 +33,7 @@ struct monitor_t; typedef struct hwcursor_t { - int ena; + int enable; int x; int y; int xoff; diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index e72c7af40..a2ef1a530 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -20,7 +20,7 @@ #include <86box/rom.h> typedef struct xga_hwcursor_t { - int ena; + int enable; int x; int y; int xoff; diff --git a/src/video/ramdac/vid_ramdac_bt48x.c b/src/video/ramdac/vid_ramdac_bt48x.c index d608750e3..0a70afdbd 100644 --- a/src/video/ramdac/vid_ramdac_bt48x.c +++ b/src/video/ramdac/vid_ramdac_bt48x.c @@ -161,7 +161,7 @@ bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_ break; case 0x09: /* Command Register 2 (RS value = 1001) */ ramdac->cmd_r2 = val; - svga->dac_hwcursor.ena = !!(val & 0x03); + svga->dac_hwcursor.enable = !!(val & 0x03); bt48x_set_bpp(ramdac, svga); break; case 0x0a: diff --git a/src/video/ramdac/vid_ramdac_ibm_rgb528.c b/src/video/ramdac/vid_ramdac_ibm_rgb528.c index cd7d5c1b6..947c251e9 100644 --- a/src/video/ramdac/vid_ramdac_ibm_rgb528.c +++ b/src/video/ramdac/vid_ramdac_ibm_rgb528.c @@ -631,7 +631,7 @@ ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *s } svga->dac_hwcursor.addr = ramdac->smlc_part; svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 0x04) ? 64 : 32; - svga->dac_hwcursor.ena = ((val & 0x03) != 0x00); + svga->dac_hwcursor.enable = ((val & 0x03) != 0x00); break; case 0x031: if (!updt_cntl) diff --git a/src/video/ramdac/vid_ramdac_tvp3026.c b/src/video/ramdac/vid_ramdac_tvp3026.c index bd5a83fd0..e80aeedab 100644 --- a/src/video/ramdac/vid_ramdac_tvp3026.c +++ b/src/video/ramdac/vid_ramdac_tvp3026.c @@ -170,7 +170,7 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svg svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.ena = !!(val & 0x03); + svga->dac_hwcursor.enable = !!(val & 0x03); ramdac->mode = val & 0x03; } break; @@ -182,13 +182,13 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svg svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.ena = !!(val & 0x03); + svga->dac_hwcursor.enable = !!(val & 0x03); ramdac->mode = val & 0x03; } else { svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.ena = !!(ramdac->dcc & 0x03); + svga->dac_hwcursor.enable = !!(ramdac->dcc & 0x03); ramdac->mode = ramdac->dcc & 0x03; } break; diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index d8dc369e2..f911da6be 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -397,21 +397,21 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x16e8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->v_disp = val; - dev->v_disp &= 0x1fff; - ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); + dev->vdisp_latch = val; + dev->vdisp_latch &= 0x1fff; + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_latch); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->v_disp, val); + WRITE8(port, dev->vdisp_latch, val); } break; case 0x16e9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->v_disp, val >> 8); - dev->v_disp &= 0x1fff; - ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); + WRITE8(port, dev->vdisp_latch, val >> 8); + dev->vdisp_latch &= 0x1fff; + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_latch); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -3663,12 +3663,12 @@ ibm8514_poll(void *priv) if (dev->on) { ibm8514_log("ON!\n"); if (!dev->linepos) { - if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) { + if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.enable) { dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - dev->hwcursor_latch.yoff; dev->hwcursor_oddeven = 0; } - if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.ena && dev->interlace) { + if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.enable && dev->interlace) { dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1); dev->hwcursor_oddeven = 1; } @@ -3819,7 +3819,7 @@ ibm8514_recalctimings(svga_t *svga) if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ dev->h_total = 0x9e; - dev->vdisp = (dev->v_disp + 1) >> 1; + dev->vdisp = (dev->vdisp_latch + 1) >> 1; if ((dev->vdisp == 478) || (dev->vdisp == 766)) dev->vdisp += 2; diff --git a/src/video/vid_ati_eeprom.c b/src/video/vid_ati_eeprom.c index a057f1f39..1efb506d1 100644 --- a/src/video/vid_ati_eeprom.c +++ b/src/video/vid_ati_eeprom.c @@ -107,18 +107,18 @@ ati_eeprom_save(ati_eeprom_t *eeprom) } void -ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat) +ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat) { - if (!ena) + if (!enable) eeprom->out = 1; if (clk && !eeprom->oldclk) { - if (ena && !eeprom->oldena) { + if (enable && !eeprom->oldena) { eeprom->state = EEPROM_WAIT; eeprom->opcode = 0; eeprom->count = 3; eeprom->out = 1; - } else if (ena) { + } else if (enable) { switch (eeprom->state) { case EEPROM_WAIT: if (!dat) @@ -231,9 +231,9 @@ ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat) break; } } - eeprom->oldena = ena; + eeprom->oldena = enable; } else if (!clk && eeprom->oldclk) { - if (ena) { + if (enable) { switch (eeprom->state) { case EEPROM_OUTPUT: eeprom->out = (eeprom->dat & 0x10000) ? 1 : 0; diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 471dacb19..fadf1115f 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -2297,7 +2297,7 @@ mach64_vblank_start(svga_t *svga) svga->overlay.addr = mach64->buf_offset[0] & 0x3ffff8; svga->overlay.pitch = mach64->buf_pitch[0] & 0xfff; - svga->overlay.ena = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1); + svga->overlay.enable = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1); mach64->overlay_v_acc = 0; mach64->scaler_update = 1; @@ -3344,9 +3344,9 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv) ati_eeprom_write(&mach64->eeprom, mach64->gen_test_cntl & 0x10, mach64->gen_test_cntl & 2, mach64->gen_test_cntl & 1); mach64->gen_test_cntl = (mach64->gen_test_cntl & ~8) | (ati_eeprom_read(&mach64->eeprom) ? 8 : 0); if (mach64->type == MACH64_GX) - svga->dac_hwcursor.ena = !!(mach64->gen_test_cntl & 0x80); + svga->dac_hwcursor.enable = !!(mach64->gen_test_cntl & 0x80); else - svga->hwcursor.ena = !!(mach64->gen_test_cntl & 0x80); + svga->hwcursor.enable = !!(mach64->gen_test_cntl & 0x80); break; case 0xdc: diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index 5a767e3fc..4a73d6a8e 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -2715,7 +2715,7 @@ mach_set_resolution(mach_t *mach, svga_t *svga) dev->hdisp = (dev->hdisped + 1) << 3; - dev->vdisp = (dev->v_disp + 1) >> 1; + dev->vdisp = (dev->vdisp_latch + 1) >> 1; if ((dev->vdisp == 478) || (dev->vdisp == 598) || (dev->vdisp == 766) || (dev->vdisp == 1022)) dev->vdisp += 2; @@ -3232,17 +3232,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20) && val) { - dev->v_disp = val; - dev->v_disp &= 0x1fff; + dev->vdisp_latch = val; + dev->vdisp_latch &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->v_disp); + mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->vdisp_latch); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20)) { - WRITE8(port, dev->v_disp, val); - dev->v_disp &= 0x1fff; + WRITE8(port, dev->vdisp_latch, val); + dev->vdisp_latch &= 0x1fff; } } } @@ -3252,11 +3252,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20)) { - WRITE8(port, dev->v_disp, val >> 8); - dev->v_disp &= 0x1fff; + WRITE8(port, dev->vdisp_latch, val >> 8); + dev->vdisp_latch &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->v_disp); + mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->vdisp_latch); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } svga_recalctimings(svga); @@ -3604,7 +3604,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { WRITE8(port + 1, mach->cursor_offset_hi_reg, val >> 8); } - dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000); + dev->hwcursor.enable = !!(mach->cursor_offset_hi_reg & 0x8000); mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f; dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2); if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) @@ -4606,13 +4606,13 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 0xc6ee: if (len == 2) - temp = dev->v_disp; + temp = dev->vdisp_latch; else - temp = dev->v_disp & 0xff; + temp = dev->vdisp_latch & 0xff; break; case 0xc6ef: if (len == 1) - temp = dev->v_disp >> 8; + temp = dev->vdisp_latch >> 8; break; case 0xcaee: @@ -7246,7 +7246,7 @@ ati8514_init(svga_t *svga, void *ext8514, void *dev8514) dev->accel_bpp = 8; dev->rowoffset = 0x80; dev->hdisped = 0x7f; - dev->v_disp = 0x05ff; + dev->vdisp_latch = 0x05ff; dev->htotal = 0x9d; dev->v_total_reg = 0x0668; dev->v_sync_start = 0x0600; diff --git a/src/video/vid_chips_69000.c b/src/video/vid_chips_69000.c index 70b2b9e16..c63886b04 100644 --- a/src/video/vid_chips_69000.c +++ b/src/video/vid_chips_69000.c @@ -1906,7 +1906,7 @@ chips_69000_write_ext_reg(chips_69000_t* chips, uint8_t val) break; case 0xA0: chips->ext_regs[chips->ext_index] = val; - chips->svga.hwcursor.ena = ((val & 7) == 0b101) || ((val & 7) == 0b1); + chips->svga.hwcursor.enable = ((val & 7) == 0b101) || ((val & 7) == 0b1); chips->svga.hwcursor.cur_xsize = chips->svga.hwcursor.cur_ysize = ((val & 7) == 0b1) ? 32 : 64; break; case 0xA2: diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index e1c02f5a9..a896108d6 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -813,7 +813,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv) else svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; svga_recalctimings(svga); - svga->hwcursor.ena = val & CIRRUS_CURSOR_SHOW; + svga->hwcursor.enable = val & CIRRUS_CURSOR_SHOW; if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) && @@ -1244,7 +1244,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv) break; case 0x3e: gd54xx->overlay.mode = (val >> 1) & 7; - svga->overlay.ena = (val & 1) != 0; + svga->overlay.enable = (val & 1) != 0; gd54xx_update_overlay(gd54xx); break; diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index 533bd1f28..ca2ee8434 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -277,7 +277,7 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv) et4000->regs[et4000->index] = val; svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8); svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8); - svga->hwcursor.ena = !!(et4000->regs[0xF7] & 0x80); + svga->hwcursor.enable = !!(et4000->regs[0xF7] & 0x80); svga->hwcursor.xoff = et4000->regs[0xE2]; svga->hwcursor.yoff = et4000->regs[0xE6]; svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || ((et4000->type == ET4000W32) && (et4000->regs[0xe2] >= 0x1f) && (et4000->regs[0xe6] >= 0x1f))) ? 128 : 64; diff --git a/src/video/vid_ht216.c b/src/video/vid_ht216.c index 3089ae26d..061b70246 100644 --- a/src/video/vid_ht216.c +++ b/src/video/vid_ht216.c @@ -299,7 +299,7 @@ ht216_out(uint16_t addr, uint8_t val, void *priv) break; case 0xa5: - svga->hwcursor.ena = !!(val & 0x80); + svga->hwcursor.enable = !!(val & 0x80); break; case 0xc0: diff --git a/src/video/vid_mga.c b/src/video/vid_mga.c index e08ee1724..e5ac55648 100644 --- a/src/video/vid_mga.c +++ b/src/video/vid_mga.c @@ -1380,7 +1380,7 @@ mystique_write_xreg(mystique_t *mystique, int reg, uint8_t val) case XREG_XCURCTRL: mystique->xcurctrl = val; - svga->hwcursor.ena = (val & 3) ? 1 : 0; + svga->hwcursor.enable = (val & 3) ? 1 : 0; break; case XREG_XCURCOL0R: diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index b222957eb..4f890dcdf 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -3037,7 +3037,7 @@ s3_out(uint16_t addr, uint8_t val, void *priv) case 0x45: if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968)) break; - svga->hwcursor.ena = val & 1; + svga->hwcursor.enable = val & 1; break; case 0x46: case 0x47: @@ -4442,13 +4442,13 @@ s3_trio64v_recalctimings(svga_t *svga) else svga->overlay.addr = s3->streams.sec_fb0; - svga->overlay.ena = (svga->overlay.x >= 0); + svga->overlay.enable = (svga->overlay.x >= 0); svga->overlay.h_acc = s3->streams.dda_horiz_accumulator; svga->overlay.v_acc = s3->streams.dda_vert_accumulator; svga->rowoffset = s3->streams.pri_stride >> 3; - if (svga->overlay.ena) { - svga->overlay.ena = (((s3->streams.blend_ctrl >> 24) & 7) == 0b000) || + if (svga->overlay.enable) { + svga->overlay.enable = (((s3->streams.blend_ctrl >> 24) & 7) == 0b000) || (((s3->streams.blend_ctrl >> 24) & 7) == 0b101); } switch ((s3->streams.pri_ctrl >> 24) & 0x7) { diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 9422f69bf..387d5faec 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -584,7 +584,7 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv) break; case 0x45: - svga->hwcursor.ena = val & 1; + svga->hwcursor.enable = val & 1; break; case 0x46: case 0x47: @@ -965,19 +965,19 @@ s3_virge_recalctimings(svga_t *svga) else svga->overlay.addr = virge->streams.sec_fb0; - svga->overlay.ena = (svga->overlay.x >= 0); + svga->overlay.enable = (svga->overlay.x >= 0); svga->overlay.h_acc = virge->streams.dda_horiz_accumulator; svga->overlay.v_acc = virge->streams.dda_vert_accumulator; if (virge->chip < S3_VIRGEGX2) svga->rowoffset = virge->streams.pri_stride >> 3; - if (virge->chip <= S3_VIRGEDX && svga->overlay.ena) { - svga->overlay.ena = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101); - } else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.ena) { + if (virge->chip <= S3_VIRGEDX && svga->overlay.enable) { + svga->overlay.enable = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101); + } else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.enable) { /* 0x20 = Secondary Stream enabled */ /* 0x2000 = Primary Stream enabled */ - svga->overlay.ena = !!(virge->streams.blend_ctrl & 0x20); + svga->overlay.enable = !!(virge->streams.blend_ctrl & 0x20); } if (virge->chip >= S3_VIRGEGX2) { diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 4b80a0eed..54856d9e0 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -1223,32 +1223,32 @@ svga_poll(void *priv) svga_log("SVGA Poll.\n"); if (!svga->linepos) { - if (svga->displine == ((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) && svga->hwcursor_latch.ena) { + if (svga->displine == ((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) && svga->hwcursor_latch.enable) { svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - svga->hwcursor_latch.yoff; svga->hwcursor_oddeven = 0; } - if (svga->displine == (((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) + 1) && svga->hwcursor_latch.ena && svga->interlace) { + if (svga->displine == (((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) + 1) && svga->hwcursor_latch.enable && svga->interlace) { svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - (svga->hwcursor_latch.yoff + 1); svga->hwcursor_oddeven = 1; } - if (svga->displine == ((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) && svga->dac_hwcursor_latch.ena) { + if (svga->displine == ((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) && svga->dac_hwcursor_latch.enable) { svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - svga->dac_hwcursor_latch.yoff; svga->dac_hwcursor_oddeven = 0; } - if (svga->displine == (((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) + 1) && svga->dac_hwcursor_latch.ena && svga->interlace) { + if (svga->displine == (((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) + 1) && svga->dac_hwcursor_latch.enable && svga->interlace) { svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1); svga->dac_hwcursor_oddeven = 1; } - if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.ena) { + if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.enable) { svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; svga->overlay_oddeven = 0; } - if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.ena && svga->interlace) { + if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.enable && svga->interlace) { svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; svga->overlay_oddeven = 1; } diff --git a/src/video/vid_tgui9440.c b/src/video/vid_tgui9440.c index 5cc3a8a78..c0ba06a07 100644 --- a/src/video/vid_tgui9440.c +++ b/src/video/vid_tgui9440.c @@ -530,7 +530,7 @@ tgui_out(uint16_t addr, uint8_t val, void *priv) case 0x50: if (tgui->type >= TGUI_9440) { - svga->hwcursor.ena = !!(val & 0x80); + svga->hwcursor.enable = !!(val & 0x80); svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & 1) ? 64 : 32); } break; diff --git a/src/video/vid_voodoo_banshee.c b/src/video/vid_voodoo_banshee.c index 4bcf8a479..12cccdccb 100644 --- a/src/video/vid_voodoo_banshee.c +++ b/src/video/vid_voodoo_banshee.c @@ -679,7 +679,7 @@ banshee_recalctimings(svga_t *svga) svga->interlace = !!(banshee->vidProcCfg & VIDPROCCFG_INTERLACE); - svga->overlay.ena = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE; + svga->overlay.enable = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE; svga->overlay.x = voodoo->overlay.start_x; svga->overlay.y = voodoo->overlay.start_y; @@ -689,8 +689,8 @@ banshee_recalctimings(svga_t *svga) if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) svga->overlay.pitch *= 128 * 32; if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0) - svga->overlay.ena = 0; - if (svga->overlay.ena) { + svga->overlay.enable = 0; + if (svga->overlay.enable) { #if 0 banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", voodoo->overlay.start_x, voodoo->overlay.start_y, @@ -894,7 +894,7 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *priv) banshee_log("vidProcCfg=%08x\n", val); #endif banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT; - svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA; + svga->hwcursor.enable = val & VIDPROCCFG_HWCURSOR_ENA; svga->fullchange = changeframecount; svga->lut_map = !(val & VIDPROCCFG_DESKTOP_CLUT_BYPASS) && (svga->bpp < 24); svga_recalctimings(svga); diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 8f4dc0d0e..51f842cc5 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -424,7 +424,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x36: xga->hwc_control = val; - xga->hwcursor.ena = xga->hwc_control & 1; + xga->hwcursor.enable = xga->hwc_control & 1; break; case 0x38: @@ -3092,12 +3092,12 @@ xga_poll(void *priv) xga_log("XGA Poll=%d.\n", xga->on); if (xga->on) { if (!xga->linepos) { - if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { + if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.enable) { xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 32 : 0); xga->hwcursor_oddeven = 0; } - if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) { + if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.enable && xga->interlace) { xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 33 : 1); xga->hwcursor_oddeven = 1; } From 7abb8170126ca784cb5acfcf72debe7c08323a72 Mon Sep 17 00:00:00 2001 From: starfrost013 Date: Sat, 21 Jun 2025 01:32:59 +0100 Subject: [PATCH 03/31] clarify vga/8514 separation --- src/include/86box/vid_8514a.h | 34 +++--- src/include/86box/vid_xga.h | 14 +-- src/video/vid_8514a.c | 161 +++++++++++--------------- src/video/vid_ati_mach8.c | 206 ++++++++++++++-------------------- src/video/vid_svga.c | 10 +- src/video/vid_xga.c | 52 ++++----- 6 files changed, 200 insertions(+), 277 deletions(-) diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index 5d4b262c4..cecacc507 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -39,7 +39,7 @@ typedef enum { EXTENSIONS_MAX } ibm8514_extensions_t; -typedef struct hwcursor8514_t { +typedef struct ibm8514_hwcursor_s { int enable; int x; int y; @@ -49,14 +49,14 @@ typedef struct hwcursor8514_t { int cur_ysize; uint32_t addr; uint32_t pitch; -} hwcursor8514_t; +} ibm8514_hwcursor_t; typedef union { uint64_t q; uint32_t d[2]; uint16_t w[4]; uint8_t b[8]; -} latch8514_t; +} ibm8514_latch_t; typedef struct ibm8514_t { rom_t bios_rom; @@ -64,8 +64,8 @@ typedef struct ibm8514_t { mem_mapping_t bios_mapping; uint8_t *rom1; uint8_t *rom2; - hwcursor8514_t hwcursor; - hwcursor8514_t hwcursor_latch; + ibm8514_hwcursor_t hwcursor; + ibm8514_hwcursor_t hwcursor_latch; uint8_t pos_regs[8]; char *rom_path; @@ -160,20 +160,17 @@ typedef struct ibm8514_t { uint16_t dst_pitch; } accel; - int h_blankstart; int hblankstart; int hblankend; int hblank_ext; - int v_total_reg; - int v_total; + int vtotal_reg; + int vtotal_8514; int dispend; - int v_sync_start; - int v_syncstart; + int vsyncstart; int split; - int h_disp; - int h_total; - int h_disp_time; + int hdisp_8514; + int htotal_8514; int rowoffset; int dispon; int hdispon; @@ -197,26 +194,23 @@ typedef struct ibm8514_t { uint8_t linedbl; uint8_t data_available; - uint8_t data_available2; uint8_t rowcount; int hsync_start; int hsync_width; int htotal; - int hdisp; - int hdisp2; + int hdisp_vga; int hdisped; int scanline; int vsyncwidth; int vtotal; - int vdisp_latch; - int vdisp; + int vdisp_8514; + int vdisp_vga; int disp_cntl; int interlace; uint16_t subsys_cntl; uint8_t subsys_stat; atomic_int force_busy; - atomic_int force_busy2; atomic_int fifo_idx; int blitter_busy; @@ -235,7 +229,7 @@ typedef struct ibm8514_t { int _8514crt; PALETTE _8514pal; - latch8514_t latch; + ibm8514_latch_t latch; void (*vblank_start)(void *priv); void (*accel_out_fifo)(void *priv, uint16_t port, uint16_t val, int len); diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index a2ef1a530..a8c7e09cd 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -114,18 +114,16 @@ typedef struct xga_t { int dac_pos; int dac_r; int dac_g; - int v_total; + int vtotal_xga; int dispend; - int v_syncstart; int split; - int v_blankstart; - int h_disp; - int h_disp_old; - int h_total; - int h_disp_time; + int vblankstart_xga; + int hdisp_xga; + int hdispold_xga; + int htotal_xga; int rowoffset; int dispon; - int h_disp_on; + int hdispon_xga; int vc; int scanline; int linepos; diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index f911da6be..d8a9576b5 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -376,19 +376,19 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x12e8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->v_total_reg = val; - dev->v_total_reg &= 0x1fff; + dev->vtotal_reg = val; + dev->vtotal_reg &= 0x1fff; ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->v_total_reg, val); + WRITE8(port, dev->vtotal_reg, val); } break; case 0x12e9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->v_total_reg, val >> 8); - dev->v_total_reg &= 0x1fff; + WRITE8(port, dev->vtotal_reg, val >> 8); + dev->vtotal_reg &= 0x1fff; ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -397,21 +397,21 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x16e8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->vdisp_latch = val; - dev->vdisp_latch &= 0x1fff; - ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_latch); + dev->vdisp_8514 = val; + dev->vdisp_8514 &= 0x1fff; + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_8514); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->vdisp_latch, val); + WRITE8(port, dev->vdisp_8514, val); } break; case 0x16e9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->vdisp_latch, val >> 8); - dev->vdisp_latch &= 0x1fff; - ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_latch); + WRITE8(port, dev->vdisp_8514, val >> 8); + dev->vdisp_8514 &= 0x1fff; + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_8514); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -420,25 +420,26 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x1ae8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->v_sync_start = val; - dev->v_sync_start &= 0x1fff; - ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); + dev->vsyncstart = val; + dev->vsyncstart &= 0x1fff; + ibm8514_log("IBM 8514/A compatible: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->v_sync_start, val); + WRITE8(port, dev->vsyncstart, val); } break; case 0x1ae9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->v_sync_start, val >> 8); - dev->v_sync_start &= 0x1fff; - dev->v_syncstart = dev->v_sync_start + 1; + WRITE8(port, dev->vsyncstart, val >> 8); + dev->vsyncstart &= 0x1fff; + dev->vsyncstart++; + // change this if it breaks if (dev->interlace) - dev->v_syncstart >>= 1; + dev->vsyncstart >>= 1; - ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); + ibm8514_log("IBM 8514/A compatible: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -465,7 +466,6 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->subsys_stat &= ~val; if ((val & 0xc000) == 0x8000) { dev->force_busy = 0; - dev->force_busy2 = 0; } } else { WRITE8(port, dev->subsys_cntl, val); @@ -477,7 +477,6 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) WRITE8(port, dev->subsys_cntl, val); if ((val & 0xc0) == 0x80) { dev->force_busy = 0; - dev->force_busy2 = 0; } } break; @@ -485,7 +484,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x4ae8: WRITE8(port, dev->accel.advfunc_cntl, val); dev->on = dev->accel.advfunc_cntl & 0x01; - ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); + ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp_vga, dev->vdisp_vga); ibm8514_log("IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); svga_recalctimings(svga); break; @@ -537,7 +536,6 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->accel.ssv_state = 0; if (len == 2) { dev->data_available = 0; - dev->data_available2 = 0; dev->accel.cmd = val; dev->accel.cmd_back = 1; if (dev->accel.cmd & 0x100) @@ -847,12 +845,12 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) if (len == 1) { dev->fifo_idx = 0; - if (dev->force_busy2) + if (dev->force_busy) temp |= 0x02; /*Hardware busy*/ - dev->force_busy2 = 0; + dev->force_busy = 0; - if (dev->data_available2) { + if (dev->data_available) { temp |= 0x01; /*Read Data available*/ switch (dev->accel.cmd >> 13) { case 2: @@ -860,11 +858,11 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) case 4: case 6: if (dev->accel.sy < 0) - dev->data_available2 = 0; + dev->data_available = 0; break; default: if (!dev->accel.sy) - dev->data_available2 = 0; + dev->data_available = 0; break; } } @@ -910,7 +908,7 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) switch (port) { case 0x2e8: - if (dev->vc == dev->v_syncstart) + if (dev->vc == dev->vsyncstart) temp |= 0x02; ibm8514_log("Read: Display Status1=%02x.\n", temp); @@ -962,9 +960,7 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) if (!dev->fifo_idx && !dev->on) { dev->force_busy = 0; - dev->force_busy2 = 0; dev->data_available = 0; - dev->data_available2 = 0; temp |= INT_FIFO_EMP; } temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80)); @@ -1020,9 +1016,7 @@ ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t if (ibm8514_cpu_src(svga)) { dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 0; - dev->data_available2 = 0; return; /*Wait for data from CPU*/ } } @@ -1236,7 +1230,6 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.ssv_len) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1337,7 +1330,6 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.ssv_len) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1405,15 +1397,11 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 0; - dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 1; - dev->data_available2 = 1; return; } } @@ -1521,7 +1509,6 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1646,7 +1633,6 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1754,7 +1740,6 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1858,9 +1843,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 0; - dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { if (!(dev->accel.cmd & 0x02)) { @@ -1877,9 +1860,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } ibm8514_log("INPUT=%d.\n", dev->accel.input); dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 1; - dev->data_available2 = 1; return; /*Wait for data from CPU*/ } } @@ -2033,7 +2014,6 @@ skip_vector_rect_write: if (dev->accel.sy < 0) { dev->force_busy = 0; - dev->force_busy2 = 0; dev->fifo_idx = 0; dev->accel.cmd_back = 1; } @@ -2195,7 +2175,6 @@ skip_nibble_rect_write: dev->accel.cmd_back = 1; } dev->force_busy = 0; - dev->force_busy2 = 0; return; } } @@ -2579,15 +2558,11 @@ skip_nibble_rect_write: if (ibm8514_cpu_src(svga)) { dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 0; - dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 1; - dev->data_available2 = 1; return; } } @@ -2656,7 +2631,6 @@ skip_nibble_rect_write: if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -2765,7 +2739,6 @@ skip_nibble_rect_write: if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -2853,15 +2826,11 @@ skip_nibble_rect_write: } } dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 0; - dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { dev->force_busy = 1; - dev->force_busy2 = 1; dev->data_available = 1; - dev->data_available2 = 1; return; /*Wait for data from CPU*/ } else ibm8514_log("BitBLT normal: Parameters: DX=%d, DY=%d, CX=%d, CY=%d, dstwidth=%d, dstheight=%d, clipl=%d, clipr=%d, clipt=%d, clipb=%d.\n", dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, dev->accel.sx, dev->accel.sy, clip_l, clip_r, clip_t, clip_b); @@ -3016,7 +2985,6 @@ skip_nibble_bitblt_write: if (dev->accel.sy < 0) { dev->accel.cmd_back = 1; dev->force_busy = 0; - dev->force_busy2 = 0; dev->fifo_idx = 0; } return; @@ -3366,9 +3334,9 @@ ibm8514_render_blank(svga_t *svga) dev->lastline_draw = dev->displine; uint32_t *line_ptr = &buffer32->line[dev->displine + svga->y_add][svga->x_add]; - uint32_t line_width = (uint32_t)(dev->h_disp) * sizeof(uint32_t); + uint32_t line_width = (uint32_t)(dev->hdisp_8514) * sizeof(uint32_t); - if (dev->h_disp > 0) + if (dev->hdisp_8514 > 0) memset(line_ptr, 0, line_width); } @@ -3389,7 +3357,7 @@ ibm8514_render_8bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (int x = 0; x <= dev->h_disp; x += 8) { + for (int x = 0; x <= dev->hdisp_8514; x += 8) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[0] = dev->pallook[dat & dev->dac_mask & 0xff]; p[1] = dev->pallook[(dat >> 8) & dev->dac_mask & 0xff]; @@ -3427,7 +3395,7 @@ ibm8514_render_15bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->h_disp; x += 8) { + for (x = 0; x <= dev->hdisp_8514; x += 8) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 1)) & dev->vram_mask]); p[x] = video_15to32[dat & 0xffff]; p[x + 1] = video_15to32[dat >> 16]; @@ -3467,7 +3435,7 @@ ibm8514_render_16bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->h_disp; x += 8) { + for (x = 0; x <= dev->hdisp_8514; x += 8) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 1)) & dev->vram_mask]); p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; @@ -3506,7 +3474,7 @@ ibm8514_render_24bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (int x = 0; x <= dev->h_disp; x += 4) { + for (int x = 0; x <= dev->hdisp_8514; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = dat & 0xffffff; @@ -3542,7 +3510,7 @@ ibm8514_render_BGR(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (int x = 0; x <= dev->h_disp; x += 4) { + for (int x = 0; x <= dev->hdisp_8514; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); @@ -3579,7 +3547,7 @@ ibm8514_render_ABGR8888(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->h_disp; x++) { + for (x = 0; x <= dev->hdisp_8514; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); } @@ -3606,7 +3574,7 @@ ibm8514_render_32bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->h_disp; x++) { + for (x = 0; x <= dev->hdisp_8514; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); p[x] = dat & 0xffffff; } @@ -3621,7 +3589,7 @@ ibm8514_render_overscan_left(ibm8514_t *dev, svga_t *svga) if ((dev->displine + svga->y_add) < 0) return; - if (svga->scrblank || (dev->h_disp == 0)) + if (svga->scrblank || (dev->hdisp_8514 == 0)) return; for (int i = 0; i < svga->x_add; i++) @@ -3636,12 +3604,12 @@ ibm8514_render_overscan_right(ibm8514_t *dev, svga_t *svga) if ((dev->displine + svga->y_add) < 0) return; - if (svga->scrblank || (dev->h_disp == 0)) + if (svga->scrblank || (dev->hdisp_8514 == 0)) return; right = (overscan_x >> 1); for (int i = 0; i < right; i++) - buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->h_disp + i] = svga->overscan_color; + buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->hdisp_8514 + i] = svga->overscan_color; } void @@ -3754,10 +3722,10 @@ ibm8514_poll(void *priv) if (svga->fullchange) svga->fullchange--; } - if (dev->vc == dev->v_syncstart) { + if (dev->vc == dev->vsyncstart) { dev->dispon = 0; svga->cgastat |= 8; - x = dev->h_disp; + x = dev->hdisp_8514; if (dev->interlace && !dev->oddeven) dev->lastline++; @@ -3787,7 +3755,7 @@ ibm8514_poll(void *priv) dev->memaddr = (dev->memaddr << 2); dev->memaddr_backup = (dev->memaddr_backup << 2); } - if (dev->vc == dev->v_total) { + if (dev->vc == dev->vtotal_8514) { dev->vc = 0; dev->scanline = (svga->crtc[0x8] & 0x1f); dev->dispon = 1; @@ -3813,38 +3781,39 @@ ibm8514_recalctimings(svga_t *svga) ati8514_recalctimings(svga); } else { if (dev->on) { - dev->hdisp = (dev->hdisped + 1) << 3; - dev->h_total = dev->htotal + 1; + dev->hdisp_vga = (dev->hdisped + 1) << 3; + dev->htotal_8514 = dev->htotal + 1; - if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ - dev->h_total = 0x9e; + if (dev->htotal_8514 == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ + dev->htotal_8514 = 0x9e; - dev->vdisp = (dev->vdisp_latch + 1) >> 1; - if ((dev->vdisp == 478) || (dev->vdisp == 766)) - dev->vdisp += 2; + dev->vdisp_vga = (dev->vdisp_8514 + 1) >> 1; + if ((dev->vdisp_vga == 478) || (dev->vdisp_vga == 766)) + dev->vdisp_vga += 2; - dev->v_total = dev->v_total_reg + 1; + dev->vtotal_8514 = dev->vtotal_reg + 1; if (dev->interlace) - dev->v_total >>= 1; + dev->vtotal_8514 >>= 1; + + dev->vsyncstart++; - dev->v_syncstart = dev->v_sync_start + 1; if (dev->interlace) - dev->v_syncstart >>= 1; + dev->vsyncstart >>= 1; dev->rowcount = !!(dev->disp_cntl & 0x08); - if ((dev->hdisp != 640) && (dev->hdisp != 1024)) { + if ((dev->hdisp_vga != 640) && (dev->hdisp_vga != 1024)) { if (dev->accel.advfunc_cntl & 0x04) { - dev->hdisp = 1024; - dev->vdisp = 768; + dev->hdisp_vga = 1024; + dev->vdisp_vga = 768; } else { - dev->hdisp = 640; - dev->vdisp = 480; + dev->hdisp_vga = 640; + dev->vdisp_vga = 480; } } - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; + dev->hdisp_8514 = dev->hdisp_vga; + dev->dispend = dev->vdisp_vga; if (dev->accel.advfunc_cntl & 0x04) svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0; @@ -3860,7 +3829,7 @@ ibm8514_recalctimings(svga_t *svga) dev->pitch = 1024; dev->rowoffset = 0x80; if (dev->vram_is_512k) { - if (dev->h_disp == 640) + if (dev->hdisp_8514 == 640) dev->pitch = 640; } dev->accel_bpp = 8; @@ -3868,7 +3837,7 @@ ibm8514_recalctimings(svga_t *svga) ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->accel.advfunc_cntl & 4, !ibm8514_standalone_enabled); } } - ibm8514_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); + ibm8514_log("8514 enabled, hdisp_vga=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp_vga, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); } static uint8_t diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index 4a73d6a8e..7bd550f0b 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -371,18 +371,14 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Extended Bresenham Write pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; - dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Extended Bresenham Read pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; - dev->data_available2 = 1; return; } } @@ -530,7 +526,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (cpu_input) { mach->force_busy = 0; dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -539,7 +534,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (cpu_input) { mach->force_busy = 0; dev->force_busy = 0; - dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -740,7 +734,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if ((mono_src == 1) && !count) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -749,7 +742,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 } else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -959,18 +951,14 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Non-Conforming BitBLT Write pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; - dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Non-Conforming BitBLT Read pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; - dev->data_available2 = 1; return; } } @@ -989,7 +977,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 mach_log("No DEST.\n"); if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1001,7 +988,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach->accel.sx_end == mach->accel.sx_start) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } mach_log("No SRC.\n"); @@ -1018,7 +1004,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sy == mach->accel.height) { mach_log("No Blit on DPCONFIG=3251.\n"); dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1228,7 +1213,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sy >= mach->accel.height) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1276,18 +1260,14 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Direct Linedraw Write pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; - dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Direct Linedraw Read pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; - dev->data_available2 = 1; return; } } @@ -1392,7 +1372,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (!count) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1538,7 +1517,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sx >= mach->accel.width) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1659,7 +1637,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (!count) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1797,7 +1774,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sx >= mach->accel.width) { if (cpu_input) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1930,18 +1906,14 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Scan To X Write pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; - dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Scan To X Read pixtrans.\n"); dev->force_busy = 1; - dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; - dev->data_available2 = 1; return; } } @@ -2038,7 +2010,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->fifo_idx = 0; dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; dev->accel.cmd_back = 1; dev->accel.cur_x = dev->accel.dx; @@ -2212,7 +2183,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->fifo_idx = 0; dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; dev->accel.cmd_back = 1; return; @@ -2627,7 +2597,7 @@ ati_render_24bpp(svga_t *svga) dev->lastline_draw = dev->displine; if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/ - for (int x = 0; x <= dev->h_disp; x += 4) { + for (int x = 0; x <= dev->hdisp_8514; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); @@ -2643,7 +2613,7 @@ ati_render_24bpp(svga_t *svga) dev->memaddr += 12; } } else { /*RGB, Red-(23:16), Green-(15:8), Blue-(7:0)*/ - for (int x = 0; x <= dev->h_disp; x += 4) { + for (int x = 0; x <= dev->hdisp_8514; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = dat & 0xffffff; @@ -2683,12 +2653,12 @@ ati_render_32bpp(svga_t *svga) dev->lastline_draw = dev->displine; if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/ - for (x = 0; x <= dev->h_disp; x++) { + for (x = 0; x <= dev->hdisp_8514; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); *p++ = ((dat & 0x00ff0000) >> 16) | (dat & 0x0000ff00) | ((dat & 0x000000ff) << 16); } } else { /*RGB, Red-(31:24), Green-(23:16), Blue-(15:8)*/ - for (x = 0; x <= dev->h_disp; x++) { + for (x = 0; x <= dev->hdisp_8514; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); *p++ = ((dat & 0xffffff00) >> 8); } @@ -2708,22 +2678,22 @@ mach_set_resolution(mach_t *mach, svga_t *svga) ibm8514_t *dev = (ibm8514_t *) svga->dev8514; int ret = 0; - dev->h_total = dev->htotal + 1; + dev->htotal_8514 = dev->htotal + 1; - if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ - dev->h_total = 0x9e; + if (dev->htotal_8514 == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ + dev->htotal_8514 = 0x9e; - dev->hdisp = (dev->hdisped + 1) << 3; + dev->hdisp_vga = (dev->hdisped + 1) << 3; - dev->vdisp = (dev->vdisp_latch + 1) >> 1; - if ((dev->vdisp == 478) || (dev->vdisp == 598) || (dev->vdisp == 766) || (dev->vdisp == 1022)) - dev->vdisp += 2; + dev->vdisp_vga = (dev->vdisp_8514 + 1) >> 1; + if ((dev->vdisp_vga == 478) || (dev->vdisp_vga == 598) || (dev->vdisp_vga == 766) || (dev->vdisp_vga == 1022)) + dev->vdisp_vga += 2; - dev->v_total = dev->v_total_reg + 1; + dev->vtotal_8514 = dev->vtotal_reg + 1; - dev->v_syncstart = dev->v_sync_start + 1; + dev->vsyncstart++; - mach_log("VSYNCSTART=%d, VTOTAL=%d, interlace=%02x, vdisp=%d.\n", dev->v_syncstart, dev->v_total, dev->interlace, dev->vdisp); + mach_log("VSYNCSTART=%d, VTOTAL=%d, interlace=%02x, vdisp=%d.\n", dev->vsyncstart, dev->vtotal_8514, dev->interlace, dev->vdisp_vga); if (!ATI_MACH32) { if ((mach->accel.clock_sel & 0x01) && @@ -2757,15 +2727,15 @@ mach_set_resolution(mach_t *mach, svga_t *svga) svga_recalctimings(svga); else { if (dev->accel.advfunc_cntl & 0x04) { - if (dev->hdisp == 640) { - dev->hdisp = 1024; - dev->vdisp = 768; + if (dev->hdisp_vga == 640) { + dev->hdisp_vga = 1024; + dev->vdisp_vga = 768; mach_log("1024x768.\n"); } } else { - if (dev->hdisp == 1024) { - dev->hdisp = 640; - dev->vdisp = 480; + if (dev->hdisp_vga == 1024) { + dev->hdisp_vga = 640; + dev->vdisp_vga = 480; mach_log("640x480.\n"); } } @@ -2785,7 +2755,7 @@ mach_set_resolution(mach_t *mach, svga_t *svga) } else svga_recalctimings(svga); - mach_log("Shadow set ATI=%x, shadow set 8514/A and on1=%x, on2=%x, resolution h=%d, v=%d, vtotal=%d, vsyncstart=%d, crtres=%d, ret=%d, actual passthrough=%x.\n", mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01, dev->hdisp, dev->vdisp, dev->v_total, dev->v_syncstart, mach->crt_resolution, ret, dev->on); + mach_log("Shadow set ATI=%x, shadow set 8514/A and on1=%x, on2=%x, resolution h=%d, v=%d, vtotal=%d, vsyncstart=%d, crtres=%d, ret=%d, actual passthrough=%x.\n", mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01, dev->hdisp_vga, dev->vdisp_vga, dev->vtotal_8514, dev->v_syncstart, mach->crt_resolution, ret, dev->on); } void @@ -2806,7 +2776,7 @@ ati8514_recalctimings(svga_t *svga) dev->accel.ge_offset -= mach->accel.crt_offset; mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n", - dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01); + dev->hdisp_vga, dev->vdisp_vga, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01); mach->accel.src_pitch = dev->pitch; mach->accel.dst_pitch = dev->pitch; @@ -2817,11 +2787,11 @@ ati8514_recalctimings(svga_t *svga) mach_log("8514/A ON, pitch=%d, GE offset=%08x.\n", ((mach->accel.ge_pitch & 0xff) << 3), dev->accel.ge_offset); - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; + dev->hdisp_8514 = dev->hdisp_vga; + dev->dispend = dev->vdisp_vga; if (dev->dispend == 600) - dev->h_disp = 800; - else if (dev->h_disp == 640) + dev->hdisp_8514 = 800; + else if (dev->hdisp_8514 == 640) dev->dispend = 480; if (dev->accel.advfunc_cntl & 0x04) @@ -2833,10 +2803,10 @@ ati8514_recalctimings(svga_t *svga) dev->dispend >>= 1; mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n", - dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, + dev->accel.advfunc_cntl & 0x04, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace); if (dev->vram_is_512k) { - if (dev->h_disp == 640) + if (dev->hdisp_8514 == 640) dev->pitch = 640; else dev->pitch = 1024; @@ -2926,17 +2896,17 @@ mach_recalctimings(svga_t *svga) mach_log("RowCount=%x, rowoffset=%x, pitch=%d, geoffset=%x, crtoffset=%x.\n", dev->rowcount, dev->rowoffset, dev->pitch, dev->accel.ge_offset, mach->accel.crt_offset); mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x, interlace=%x.\n", - dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, + dev->hdisp_vga, dev->vdisp_vga, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0xfe, dev->interlace); - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; + dev->hdisp_8514 = dev->hdisp_vga; + dev->dispend = dev->vdisp_vga; if (dev->dispend == 959) { /*FIXME: vertical resolution mess on EEPROM tests on Mach8*/ dev->dispend >>= 1; dev->dispend++; } else if (dev->dispend == 600) - dev->h_disp = 800; - else if (dev->h_disp == 640) + dev->hdisp_8514 = 800; + else if (dev->hdisp_8514 == 640) dev->dispend = 480; svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / svga->getclock((mach->accel.clock_sel >> 2) & 0x0f, svga->clock_gen); @@ -3005,18 +2975,18 @@ mach_recalctimings(svga_t *svga) break; } mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n", - dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, + dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace, svga->hdisp); if ((mach->accel.ext_ge_config & 0x800) || (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800))) { mach_log("hv=%d,%d, pitch=%d, rowoffset=%d, gextconfig=%03x, bpp=%d, shadow=%x, vgahdisp=%d.\n", - dev->h_disp, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0, + dev->hdisp_8514, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0, dev->accel_bpp, mach->shadow_set & 0x03, svga->hdisp); switch (dev->accel_bpp) { case 8: if ((mach->accel.ext_ge_config & 0x30) == 0x00) { if (dev->vram_is_512k) { - if (dev->h_disp == 640) + if (dev->hdisp_8514 == 640) dev->pitch = 640; else dev->pitch = 1024; @@ -3054,10 +3024,10 @@ mach_recalctimings(svga_t *svga) mach->accel.dst_ge_offset -= mach->accel.crt_offset; mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n", - dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, + dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 0x03, dev->interlace, svga->hdisp); if (dev->vram_is_512k) { - if (dev->h_disp == 640) + if (dev->hdisp_8514 == 640) dev->pitch = 640; else dev->pitch = 1024; @@ -3199,15 +3169,15 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10) && val) { - dev->v_total_reg = val; - dev->v_total_reg &= 0x1fff; + dev->vtotal_reg = val; + dev->vtotal_reg &= 0x1fff; } } } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10)) { - WRITE8(port, dev->v_total_reg, val); - dev->v_total_reg &= 0x1fff; + WRITE8(port, dev->vtotal_reg, val); + dev->vtotal_reg &= 0x1fff; } } } @@ -3219,8 +3189,8 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { if (!(mach->shadow_cntl & 0x10)) { /*For 8514/A mode, take the shadow sets into account.*/ - WRITE8(port, dev->v_total_reg, val >> 8); - dev->v_total_reg &= 0x1fff; + WRITE8(port, dev->vtotal_reg, val >> 8); + dev->vtotal_reg &= 0x1fff; } } mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val); @@ -3232,17 +3202,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20) && val) { - dev->vdisp_latch = val; - dev->vdisp_latch &= 0x1fff; + dev->vdisp_8514 = val; + dev->vdisp_8514 &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->vdisp_latch); + mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->vdisp_8514); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20)) { - WRITE8(port, dev->vdisp_latch, val); - dev->vdisp_latch &= 0x1fff; + WRITE8(port, dev->vdisp_8514, val); + dev->vdisp_8514 &= 0x1fff; } } } @@ -3252,11 +3222,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20)) { - WRITE8(port, dev->vdisp_latch, val >> 8); - dev->vdisp_latch &= 0x1fff; + WRITE8(port, dev->vdisp_8514, val >> 8); + dev->vdisp_8514 &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->vdisp_latch); + mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->vdisp_8514); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } svga_recalctimings(svga); @@ -3266,17 +3236,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10) && val) { - dev->v_sync_start = val; - dev->v_sync_start &= 0x1fff; + dev->vsyncstart = val; + dev->vsyncstart &= 0x1fff; } } - mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); + mach_log("ATI 8514/A: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val); } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10)) { - WRITE8(port, dev->v_sync_start, val); - dev->v_sync_start &= 0x1fff; + WRITE8(port, dev->vsyncstart, val); + dev->vsyncstart &= 0x1fff; } } } @@ -3286,11 +3256,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10)) { - WRITE8(port, dev->v_sync_start, val >> 8); - dev->v_sync_start &= 0x1fff; + WRITE8(port, dev->vsyncstart, val >> 8); + dev->vsyncstart &= 0x1fff; } } - mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); + mach_log("ATI 8514/A: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val); } svga_recalctimings(svga); @@ -3322,7 +3292,6 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if ((dev->subsys_cntl & 0xc000) == 0x8000) { mach->force_busy = 0; dev->force_busy = 0; - dev->force_busy2 = 0; } break; @@ -3348,7 +3317,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u } mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, valxor=%x, shadow crt=%x, hdisp=%d, vdisp=%d, extmode=%02x, accelbpp=%d, crt=%d, crtres=%d.\n", - CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution); + CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp_vga, dev->vdisp_vga, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution); if (ATI_MACH32) { mach_set_resolution(mach, svga); @@ -3531,7 +3500,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u } } } - mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy2); + mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy); break; case 0xaae8: @@ -3787,7 +3756,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->vendor_mode = 1; mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, val=%04x, xor=%d, hdisp=%d, vdisp=%d, accelbpp=%d.\n", - CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp, dev->vdisp, dev->accel_bpp); + CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp_vga, dev->vdisp_vga, dev->accel_bpp); mach_log("Vendor ATI mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); @@ -3995,7 +3964,6 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach->accel.bres_count = val & 0x7ff; mach_log("BresenhamDraw=%04x.\n", mach->accel.dp_config); dev->data_available = 0; - dev->data_available2 = 0; mach->accel.cmd_type = 1; frgd_sel = (mach->accel.dp_config >> 13) & 7; bkgd_sel = (mach->accel.dp_config >> 7) & 3; @@ -4048,7 +4016,6 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach->accel.dest_y_end = 0; } dev->data_available = 0; - dev->data_available2 = 0; mach_log("BitBLT=%04x, pattidx=%d.\n", mach->accel.dp_config, mach->accel.patt_idx); mach_log(".\n"); mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ @@ -4111,7 +4078,6 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach->accel.scan_to_x = 0; } dev->data_available = 0; - dev->data_available2 = 0; mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ mach_log("ScanToX len=%d.\n", val); mach_log(".\n"); @@ -4133,7 +4099,6 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach_log("Data Path Configuration (%04x) write val=%04x, len=%d.\n", port, val, len); if (len == 2) { dev->data_available = 0; - dev->data_available2 = 0; mach->accel.dp_config = val; } break; @@ -4371,26 +4336,26 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in if (len == 1) { dev->fifo_idx = 0; - if (dev->force_busy2) + if (dev->force_busy) temp |= 0x02; /*Hardware busy*/ - dev->force_busy2 = 0; + dev->force_busy = 0; - if (dev->data_available2) { + if (dev->data_available) { temp |= 0x01; /*Read Data available*/ if (mach->accel.cmd_type >= 0) { switch (mach->accel.cmd_type) { case 2: if (dev->accel.sy >= mach->accel.height) - dev->data_available2 = 0; + dev->data_available = 0; break; case 5: if (dev->accel.sx >= mach->accel.width) - dev->data_available2 = 0; + dev->data_available = 0; break; default: if (dev->accel.sy < 0) - dev->data_available2 = 0; + dev->data_available = 0; break; } } else { @@ -4400,11 +4365,11 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 4: case 6: if (dev->accel.sy < 0) - dev->data_available2 = 0; + dev->data_available = 0; break; default: if (!dev->accel.sy) - dev->data_available2 = 0; + dev->data_available = 0; break; } } @@ -4595,35 +4560,35 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 0xc2ee: if (len == 2) - temp = dev->v_total_reg; + temp = dev->vtotal_reg; else - temp = dev->v_total_reg & 0xff; + temp = dev->vtotal_reg & 0xff; break; case 0xc2ef: if (len == 1) - temp = dev->v_total_reg >> 8; + temp = dev->vtotal_reg >> 8; break; case 0xc6ee: if (len == 2) - temp = dev->vdisp_latch; + temp = dev->vdisp_8514; else - temp = dev->vdisp_latch & 0xff; + temp = dev->vdisp_8514 & 0xff; break; case 0xc6ef: if (len == 1) - temp = dev->vdisp_latch >> 8; + temp = dev->vdisp_8514 >> 8; break; case 0xcaee: if (len == 2) - temp = dev->v_sync_start; + temp = dev->vsyncstart; else - temp = dev->v_sync_start & 0xff; + temp = dev->vsyncstart & 0xff; break; case 0xcaef: if (len == 1) - temp = dev->v_sync_start >> 8; + temp = dev->vsyncstart >> 8; break; case 0xceee: @@ -4787,10 +4752,8 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) if (!dev->fifo_idx && !dev->on) { dev->force_busy = 0; - dev->force_busy2 = 0; mach->force_busy = 0; dev->data_available = 0; - dev->data_available2 = 0; temp |= INT_FIFO_EMP; mach_log("Fifo Empty.\n"); } @@ -5224,7 +5187,7 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t ibm8514_t *dev = (ibm8514_t *) svga->dev8514; int writemask2 = svga->writemask; int reset_wm = 0; - latch8514_t vall; + ibm8514_latch_t vall; uint8_t wm = svga->writemask; uint8_t i; @@ -7039,7 +7002,6 @@ mach_reset(void *priv) mach_disable_handlers(mach); mach->force_busy = 0; dev->force_busy = 0; - dev->force_busy2 = 0; if (mach->pci_bus) reset_state->pci_slot = mach->pci_slot; @@ -7246,10 +7208,10 @@ ati8514_init(svga_t *svga, void *ext8514, void *dev8514) dev->accel_bpp = 8; dev->rowoffset = 0x80; dev->hdisped = 0x7f; - dev->vdisp_latch = 0x05ff; + dev->vdisp_8514 = 0x05ff; dev->htotal = 0x9d; - dev->v_total_reg = 0x0668; - dev->v_sync_start = 0x0600; + dev->vtotal_reg = 0x0668; + dev->vsyncstart = 0x0600; dev->disp_cntl = 0x33; mach->accel.clock_sel = 0x1c; dev->accel.cmd_back = 1; diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 54856d9e0..8e87e5980 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -1030,16 +1030,16 @@ svga_recalctimings(svga_t *svga) if (ibm8514_active && (svga->dev8514 != NULL)) { if (dev->on) { - disptime8514 = dev->h_total; - _dispontime8514 = dev->h_disp; - svga_log("HTOTAL=%d, HDISP=%d.\n", dev->h_total, dev->h_disp); + disptime8514 = dev->htotal_8514; + _dispontime8514 = dev->hdisp_8514; + svga_log("HTOTAL=%d, HDISP=%d.\n", dev->htotal_8514, dev->hdisp_8514); } } if (xga_active && (svga->xga != NULL)) { if (xga->on) { - disptime_xga = xga->h_total ? xga->h_total : TIMER_USEC; - _dispontime_xga = xga->h_disp; + disptime_xga = xga->htotal_xga ? xga->htotal_xga : TIMER_USEC; + _dispontime_xga = xga->hdisp_xga; } } diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 51f842cc5..f7a1464e5 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -257,9 +257,9 @@ xga_render_blank(svga_t *svga) xga->lastline_draw = xga->displine; uint32_t *line_ptr = &svga->monitor->target_buffer->line[xga->displine + svga->y_add][svga->x_add]; - uint32_t line_width = (uint32_t)(xga->h_disp) * sizeof(uint32_t); + uint32_t line_width = (uint32_t)(xga->hdisp_xga) * sizeof(uint32_t); - if (xga->h_disp > 0) + if (xga->hdisp_xga > 0) memset(line_ptr, 0, line_width); } @@ -268,14 +268,14 @@ xga_recalctimings(svga_t *svga) { xga_t *xga = (xga_t *) svga->xga; if (xga->on) { - xga->h_total = xga->htotal + 1; - xga->v_total = xga->vtotal + 1; + xga->htotal_xga = xga->htotal + 1; + xga->vtotal_xga = xga->vtotal + 1; xga->dispend = xga->vdispend + 1; - xga->v_syncstart = xga->vsyncstart + 1; + xga->vsyncstart++; xga->split = xga->linecmp + 1; - xga->v_blankstart = xga->vblankstart + 1; + xga->vblankstart_xga = xga->vblankstart + 1; - xga->h_disp = (xga->hdisp + 1) << 3; + xga->hdisp_xga = (xga->hdisp + 1) << 3; xga->rowoffset = xga->pix_map_width; @@ -283,11 +283,11 @@ xga_recalctimings(svga_t *svga) xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; if (xga->interlace) { - xga->v_total >>= 1; + xga->vtotal_xga >>= 1; xga->dispend >>= 1; - xga->v_syncstart >>= 1; + xga->vsyncstart >>= 1; xga->split >>= 1; - xga->v_blankstart >>= 1; + xga->vblankstart_xga >>= 1; } xga->memaddr_latch = xga->disp_start_addr; @@ -296,14 +296,14 @@ xga_recalctimings(svga_t *svga) xga_log("XGA ClkSel1 = %d, ClkSel2 = %02x, dispcntl2=%02x.\n", (xga->clk_sel_1 >> 2) & 3, xga->clk_sel_2 & 0x80, xga->disp_cntl_2 & 0xc0); switch ((xga->clk_sel_1 >> 2) & 3) { case 0: - xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp); + xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->hdisp_xga); if (xga->clk_sel_2 & 0x80) svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 41539000.0; else svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 25175000.0; break; case 1: - xga_log("HDISP VGA1 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp); + xga_log("HDISP VGA1 = %d, XGA = %d.\n", svga->hdisp, xga->hdisp_xga); svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 28322000.0; break; case 3: @@ -1555,7 +1555,7 @@ xga_bitblt(svga_t *svga) if (srcheight == 7) xga->accel.pattern = 1; else { - if ((dstwidth == (xga->h_disp - 1)) && (srcwidth == 1)) { + if ((dstwidth == (xga->hdisp_xga - 1)) && (srcwidth == 1)) { if ((xga->accel.dst_map == 1) && (xga->accel.src_map == 2)) { if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px_map_format[xga->accel.src_map] >= 0x0a)) xga->accel.pattern = 1; @@ -1640,8 +1640,8 @@ xga_bitblt(svga_t *svga) else if ((xga->accel.src_map == 1) && (patwidth == 7)) xga->accel.pattern = 1; } else { - if (dstwidth == (xga->h_disp - 1)) { - if (srcwidth == (xga->h_disp - 1)) { + if (dstwidth == (xga->hdisp_xga - 1)) { + if (srcwidth == (xga->hdisp_xga - 1)) { if ((xga->accel.src_map == 1) && (xga->accel.dst_map == 1) && (xga->accel.pat_src == 2)) { if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px <= 7) && (xga->accel.py <= 3)) xga->accel.pattern = 1; @@ -2591,7 +2591,7 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga) if ((xga->displine + svga->y_add) < 0) return; - if (svga->scrblank || (xga->h_disp == 0)) + if (svga->scrblank || (xga->hdisp_xga == 0)) return; uint32_t *line_ptr = buffer32->line[xga->displine + svga->y_add]; @@ -2607,10 +2607,10 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga) if ((xga->displine + svga->y_add) < 0) return; - if (svga->scrblank || (xga->h_disp == 0)) + if (svga->scrblank || (xga->hdisp_xga == 0)) return; - uint32_t *line_ptr = &buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp]; + uint32_t *line_ptr = &buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->hdisp_xga]; right = (overscan_x >> 1); for (int i = 0; i < right; i++) *line_ptr++ = svga->overscan_color; @@ -2634,7 +2634,7 @@ xga_render_4bpp(svga_t *svga) xga->lastline_draw = xga->displine; - for (int x = 0; x <= xga->h_disp; x += 8) { + for (int x = 0; x <= xga->hdisp_xga; x += 8) { dat = *(uint32_t *) (&xga->vram[xga->memaddr & xga->vram_mask]); p[0] = xga->pallook[dat & 0x0f]; p[1] = xga->pallook[(dat >> 8) & 0x0f]; @@ -2671,7 +2671,7 @@ xga_render_8bpp(svga_t *svga) xga->firstline_draw = xga->displine; xga->lastline_draw = xga->displine; - for (int x = 0; x <= xga->h_disp; x += 8) { + for (int x = 0; x <= xga->hdisp_xga; x += 8) { dat = *(uint32_t *) (&xga->vram[xga->memaddr & xga->vram_mask]); p[0] = xga->pallook[dat & 0xff]; p[1] = xga->pallook[(dat >> 8) & 0xff]; @@ -2709,7 +2709,7 @@ xga_render_16bpp(svga_t *svga) xga->firstline_draw = xga->displine; xga->lastline_draw = xga->displine; - for (x = 0; x <= xga->h_disp; x += 8) { + for (x = 0; x <= xga->hdisp_xga; x += 8) { dat = *(uint32_t *) (&xga->vram[(xga->memaddr + (x << 1)) & xga->vram_mask]); p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; @@ -3107,7 +3107,7 @@ xga_poll(void *priv) xga->linepos = 1; if (xga->dispon) { - xga->h_disp_on = 1; + xga->hdispon_xga = 1; xga->memaddr &= xga->vram_mask; @@ -3149,7 +3149,7 @@ xga_poll(void *priv) if (xga->dispon) svga->cgastat &= ~1; - xga->h_disp_on = 0; + xga->hdispon_xga = 0; xga->linepos = 0; if (xga->dispon) { @@ -3194,10 +3194,10 @@ xga_poll(void *priv) if (svga->fullchange) svga->fullchange--; } - if (xga->vc == xga->v_syncstart) { + if (xga->vc == xga->vsyncstart) { xga->dispon = 0; svga->cgastat |= 8; - x = xga->h_disp; + x = xga->hdisp_xga; if (xga->interlace && !xga->oddeven) xga->lastline++; @@ -3227,7 +3227,7 @@ xga_poll(void *priv) xga->memaddr = (xga->memaddr << 2); xga->memaddr_backup = (xga->memaddr_backup << 2); } - if (xga->vc == xga->v_total) { + if (xga->vc == xga->vtotal_xga) { xga->vc = 0; xga->scanline = 0; xga->dispon = 1; From 282ba13948c5bd19f2185fca45df0b29ead6dff0 Mon Sep 17 00:00:00 2001 From: starfrost013 Date: Sat, 21 Jun 2025 01:43:58 +0100 Subject: [PATCH 04/31] How do i keep finding this stuff --- src/include/86box/vid_8514a.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index cecacc507..559df5a2c 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -62,14 +62,11 @@ typedef struct ibm8514_t { rom_t bios_rom; rom_t bios_rom2; mem_mapping_t bios_mapping; - uint8_t *rom1; - uint8_t *rom2; ibm8514_hwcursor_t hwcursor; ibm8514_hwcursor_t hwcursor_latch; uint8_t pos_regs[8]; char *rom_path; - int force_old_addr; int type; ibm8514_card_type local; int bpp; @@ -162,8 +159,6 @@ typedef struct ibm8514_t { int hblankstart; int hblankend; - int hblank_ext; - int vtotal_reg; int vtotal_8514; int dispend; From 8e3202446dd2bfc4329a894629e46c11b25b4f00 Mon Sep 17 00:00:00 2001 From: MaxwellS04 Date: Mon, 30 Jun 2025 01:31:12 +0700 Subject: [PATCH 05/31] Correct minimum memory on two ALi SS7 machines --- src/machine/machine_table.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index d5e2af58b..87dd38786 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -14730,7 +14730,7 @@ const machine_t machines[] = { .bus_flags = MACHINE_PS2_AGP | MACHINE_BUS_USB, .flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI | MACHINE_USB, .ram = { - .min = 1024, + .min = 8192, .max = 1572864, .step = 8192 }, @@ -14770,7 +14770,7 @@ const machine_t machines[] = { .bus_flags = MACHINE_PS2_AGP | MACHINE_BUS_USB, .flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI | MACHINE_USB, .ram = { - .min = 1024, + .min = 8192, .max = 1572864, .step = 8192 }, From 96734590cae3e13fac6b922df039d833580d75bd Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 30 Jun 2025 01:10:58 +0600 Subject: [PATCH 06/31] x86-specific FADD implementation --- src/cpu/x87_ops_arith.h | 59 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 5 deletions(-) diff --git a/src/cpu/x87_ops_arith.h b/src/cpu/x87_ops_arith.h index 8d0c02167..efcb64ebc 100644 --- a/src/cpu/x87_ops_arith.h +++ b/src/cpu/x87_ops_arith.h @@ -1,3 +1,56 @@ + +#ifdef X87_INLINE_ASM +static inline double float_add(double src, double val, int round) +{ + int orig_round, new_round; + __asm volatile("" + : + : + : "memory"); + asm ( + "fnstcw %0\n" : "=m"(orig_round) + ); + new_round = orig_round & ~(3 << 10); + new_round |= (round << 10); + + __asm volatile("" + : + : + : "memory"); + + asm ( + "fldl %0\n" + "fldcw %1\n" + "faddl %2\n" + "fstl %0\n" + "fldcw %3\n" + : "=m"(src) + : "m"(new_round), "m"(val), "m"(orig_round) + ); + + return src; +} + +#define DO_FADD(use_var) \ + do \ + { \ + ST(0) = float_add(ST(0), use_var, (cpu_state.npxc >> 10) & 3); \ + } \ + while (0) + +#else +#define DO_FADD(use_var) \ + do \ + { \ + if ((cpu_state.npxc >> 10) & 3) \ + fesetround(rounding_modes[(cpu_state.npxc >> 10) & 3]); \ + ST(0) += use_var; \ + if ((cpu_state.npxc >> 10) & 3) \ + fesetround(FE_TONEAREST); \ + } \ + while (0) +#endif + #define opFPU(name, optype, a_size, load_var, get, use_var, cycle_postfix) \ static int opFADD##name##_a##a_size(UNUSED(uint32_t fetchdat)) \ { \ @@ -8,11 +61,7 @@ load_var = get(); \ if (cpu_state.abrt) \ return 1; \ - if ((cpu_state.npxc >> 10) & 3) \ - fesetround(rounding_modes[(cpu_state.npxc >> 10) & 3]); \ - ST(0) += use_var; \ - if ((cpu_state.npxc >> 10) & 3) \ - fesetround(FE_TONEAREST); \ + DO_FADD(use_var); \ FP_TAG_VALID; \ CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd##cycle_postfix) : ((x87_timings.fadd##cycle_postfix) * cpu_multi)); \ CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd##cycle_postfix) : ((x87_concurrency.fadd##cycle_postfix) * cpu_multi)); \ From b44042ef1ce1fbfe2c2beab7a5fc5555853db6cc Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 30 Jun 2025 02:08:48 +0600 Subject: [PATCH 07/31] x86-specific FADD (SSE2 version) --- src/cpu/x87_ops.h | 24 ++++++++++++++---------- src/cpu/x87_ops_arith.h | 38 ++++++++++++++------------------------ 2 files changed, 28 insertions(+), 34 deletions(-) diff --git a/src/cpu/x87_ops.h b/src/cpu/x87_ops.h index 0bd8209e1..c60a0d171 100644 --- a/src/cpu/x87_ops.h +++ b/src/cpu/x87_ops.h @@ -22,6 +22,20 @@ */ #include #include +#if defined(_MSC_VER) && !defined(__clang__) +# if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 +# define X87_INLINE_ASM +# endif +#else +# if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 || defined __amd64__ +# define X87_INLINE_ASM +# endif +#endif + +#ifdef X87_INLINE_ASM +#include +#endif + #include "x87_timings.h" #ifdef _MSC_VER # include @@ -64,16 +78,6 @@ typedef union { }; } double_decompose_t; -#if defined(_MSC_VER) && !defined(__clang__) -# if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 -# define X87_INLINE_ASM -# endif -#else -# if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 || defined __amd64__ -# define X87_INLINE_ASM -# endif -#endif - #ifdef FPU_8087 # define x87_div(dst, src1, src2) \ do { \ diff --git a/src/cpu/x87_ops_arith.h b/src/cpu/x87_ops_arith.h index efcb64ebc..bf3fbf253 100644 --- a/src/cpu/x87_ops_arith.h +++ b/src/cpu/x87_ops_arith.h @@ -2,33 +2,23 @@ #ifdef X87_INLINE_ASM static inline double float_add(double src, double val, int round) { - int orig_round, new_round; - __asm volatile("" - : - : - : "memory"); - asm ( - "fnstcw %0\n" : "=m"(orig_round) - ); - new_round = orig_round & ~(3 << 10); - new_round |= (round << 10); + int rounding_mode_orig; - __asm volatile("" - : - : - : "memory"); + __m128d xmm_src = _mm_load_sd(&src); + __m128d xmm_dst = _mm_load_sd(&val); + __m128d xmm_res; - asm ( - "fldl %0\n" - "fldcw %1\n" - "faddl %2\n" - "fstl %0\n" - "fldcw %3\n" - : "=m"(src) - : "m"(new_round), "m"(val), "m"(orig_round) - ); + rounding_mode_orig = _MM_GET_ROUNDING_MODE(); + if (round == 0) _MM_SET_ROUNDING_MODE(_MM_ROUND_NEAREST); + if (round == 1) _MM_SET_ROUNDING_MODE(_MM_ROUND_DOWN); + if (round == 2) _MM_SET_ROUNDING_MODE(_MM_ROUND_UP); + if (round == 3) _MM_SET_ROUNDING_MODE(_MM_ROUND_TOWARD_ZERO); - return src; + xmm_res = _mm_add_sd(xmm_src, xmm_dst); + + _MM_SET_ROUNDING_MODE(rounding_mode_orig); + + return _mm_cvtsd_f64(xmm_res); } #define DO_FADD(use_var) \ From f29675e5d4c6f1d086bed3f80a673982059ade49 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 00:15:29 +0200 Subject: [PATCH 08/31] Manager: Remove the pointless "Convert system to PIII" option. --- src/qt/qt_vmmanager_main.cpp | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/qt/qt_vmmanager_main.cpp b/src/qt/qt_vmmanager_main.cpp index 88b9456cc..7916abca8 100644 --- a/src/qt/qt_vmmanager_main.cpp +++ b/src/qt/qt_vmmanager_main.cpp @@ -72,10 +72,6 @@ VMManagerMain::VMManagerMain(QWidget *parent) : } }); - QAction convertToP3(tr("Convert system to PIII")); - contextMenu.addAction(&convertToP3); - convertToP3.setEnabled(false); - QAction setSystemIcon(tr("Set icon")); contextMenu.addAction(&setSystemIcon); connect(&setSystemIcon, &QAction::triggered, [this] { From e601f258057551b704b1ec948d086da19b6726ae Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 00:17:33 +0200 Subject: [PATCH 09/31] x87: Fix the rounding_modes warnings. --- src/cpu/x87_ops.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/cpu/x87_ops.h b/src/cpu/x87_ops.h index c60a0d171..b134bf8fc 100644 --- a/src/cpu/x87_ops.h +++ b/src/cpu/x87_ops.h @@ -52,7 +52,9 @@ extern void fpu_log(const char *fmt, ...); extern double exp_pow_table[0x800]; +#ifndef X87_INLINE_ASM static int rounding_modes[4] = { FE_TONEAREST, FE_DOWNWARD, FE_UPWARD, FE_TOWARDZERO }; +#endif #define ST(x) cpu_state.ST[((cpu_state.TOP + (x)) & 7)] From ad5aa6e52f664bc9f57d3f42b8637610b4c41091 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 00:18:59 +0200 Subject: [PATCH 10/31] Attempt to undefine wait to avoid the conflicts on Mac. --- src/cpu/808x.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/cpu/808x.c b/src/cpu/808x.c index dda688ee1..62c8395af 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -297,6 +297,10 @@ fetch_and_bus(int c, int bus) } } +#ifdef wait +#undef wait +#endif + static void wait(int c, int bus) { From d8669a522710beae21dca7282293503c260dbfe6 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 00:36:00 +0200 Subject: [PATCH 11/31] (S)VGA: Recalculate pel panning on every line instead of on every frame. --- src/include/86box/vid_svga.h | 1 + src/video/vid_svga.c | 53 ++++++++++++++++++++---------------- 2 files changed, 31 insertions(+), 23 deletions(-) diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 8a18f0865..78e025746 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -137,6 +137,7 @@ typedef struct svga_t { int ps_bit_bug; int ati_4color; int vblankend; + int panning_blank; /*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 : 0MB-1MB - VRAM diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 2073fb8c0..e4a6d9efc 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -1435,10 +1435,8 @@ svga_poll(void *priv) svga->memaddr_backup = (svga->memaddr_backup << 2); svga->scanline = 0; - if (svga->attrregs[0x10] & 0x20) { - svga->scrollcache = 0; - svga->x_add = svga->left_overscan; - } + if (svga->attrregs[0x10] & 0x20) + svga->panning_blank = 1; } } if (svga->vc == svga->dispend) { @@ -1526,25 +1524,6 @@ svga_poll(void *priv) svga->dispon = 1; svga->displine = (svga->interlace && svga->oddeven) ? 1 : 0; - svga->scrollcache = (svga->attrregs[0x13] & 0x0f); - if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ - if (svga->seqregs[1] & 1) - svga->scrollcache &= 0x07; - else { - svga->scrollcache++; - if (svga->scrollcache > 8) - svga->scrollcache = 0; - } - } else if ((svga->render == svga_render_2bpp_lowres) || (svga->render == svga_render_2bpp_highres) || (svga->render == svga_render_4bpp_lowres) || (svga->render == svga_render_4bpp_highres)) - svga->scrollcache &= 0x07; - else - svga->scrollcache = (svga->scrollcache & 0x06) >> 1; - - if ((svga->seqregs[1] & 8) || (svga->render == svga_render_8bpp_lowres)) - svga->scrollcache <<= 1; - - svga->x_add = svga->left_overscan - svga->scrollcache; - svga->linecountff = 0; svga->hwcursor_on = 0; @@ -1555,9 +1534,37 @@ svga_poll(void *priv) svga->overlay_on = 0; svga->overlay_latch = svga->overlay; + + svga->panning_blank = 0; } + if (svga->scanline == (svga->crtc[10] & 31)) svga->cursorvisible = 1; + + if (svga->panning_blank) { + svga->scrollcache = 0; + svga->x_add = svga->left_overscan; + } else { + svga->scrollcache = (svga->attrregs[0x13] & 0x0f); + if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ + if (svga->seqregs[1] & 1) + svga->scrollcache &= 0x07; + else { + svga->scrollcache++; + if (svga->scrollcache > 8) + svga->scrollcache = 0; + } + } else if ((svga->render == svga_render_2bpp_lowres) || (svga->render == svga_render_2bpp_highres) || + (svga->render == svga_render_4bpp_lowres) || (svga->render == svga_render_4bpp_highres)) + svga->scrollcache &= 0x07; + else + svga->scrollcache = (svga->scrollcache & 0x06) >> 1; + + if ((svga->seqregs[1] & 8) || (svga->render == svga_render_8bpp_lowres)) + svga->scrollcache <<= 1; + + svga->x_add = svga->left_overscan - svga->scrollcache; + } } } From 4a468246cc0e43203a3844a60f5b03f71b824748 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 00:52:00 +0200 Subject: [PATCH 12/31] 808x: Rename wait() to wait_cycs() to avoid conflict with the Apple SDK. --- src/cpu/808x.c | 572 ++++++++++++++++++++--------------------- src/cpu/x87_ops.h | 2 +- src/cpu/x87_ops_misc.h | 2 +- src/cpu/x87_ops_sf.h | 2 +- 4 files changed, 287 insertions(+), 291 deletions(-) diff --git a/src/cpu/808x.c b/src/cpu/808x.c index 62c8395af..2e24d3c49 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -90,44 +90,44 @@ static bool cpu_md_write_disable = 1; #define fetch_ea_32(val) #define PREFETCH_RUN(a, b, c, d, e, f, g, h) -#define CYCLES(val) \ - { \ - wait(val, 0); \ +#define CYCLES(val) \ + { \ + wait_cycs(val, 0); \ } #define CLOCK_CYCLES_ALWAYS(val) \ { \ - wait(val, 0); \ + wait_cycs(val, 0); \ } #if 0 # define CLOCK_CYCLES_FPU(val) \ { \ - wait(val, 0); \ + wait_cycs(val, 0); \ } -# define CLOCK_CYCLES(val) \ - { \ - if (fpu_cycles > 0) { \ - fpu_cycles -= (val); \ - if (fpu_cycles < 0) { \ - wait(val, 0); \ - } \ - } else { \ - wait(val, 0); \ - } \ +# define CLOCK_CYCLES(val) \ + { \ + if (fpu_cycles > 0) { \ + fpu_cycles -= (val); \ + if (fpu_cycles < 0) { \ + wait_cycs(val, 0); \ + } \ + } else { \ + wait_cycs(val, 0); \ + } \ } # define CONCURRENCY_CYCLES(c) fpu_cycles = (c) #else -# define CLOCK_CYCLES(val) \ - { \ - wait(val, 0); \ +# define CLOCK_CYCLES(val) \ + { \ + wait_cycs(val, 0); \ } # define CLOCK_CYCLES_FPU(val) \ { \ - wait(val, 0); \ + wait_cycs(val, 0); \ } # define CONCURRENCY_CYCLES(c) @@ -297,12 +297,8 @@ fetch_and_bus(int c, int bus) } } -#ifdef wait -#undef wait -#endif - static void -wait(int c, int bus) +wait_cycs(int c, int bus) { cycles -= c; fetch_and_bus(c, bus); @@ -344,13 +340,13 @@ cpu_io(int bits, int out, uint16_t port) int old_cycles = cycles; if (out) { - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); if (bits == 16) { if (is8086 && !(port & 1)) { old_cycles = cycles; outw(port, AX); } else { - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); old_cycles = cycles; outb(port++, AL); outb(port, AH); @@ -360,13 +356,13 @@ cpu_io(int bits, int out, uint16_t port) outb(port, AL); } } else { - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); if (bits == 16) { if (is8086 && !(port & 1)) { old_cycles = cycles; AX = inw(port); } else { - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); old_cycles = cycles; AL = inb(port++); AH = inb(port); @@ -386,7 +382,7 @@ readmemb(uint32_t a) { uint8_t ret; - wait(4, 1); + wait_cycs(4, 1); ret = read_mem_b(a); return ret; @@ -410,11 +406,11 @@ readmemw(uint32_t s, uint16_t a) { uint16_t ret; - wait(4, 1); + wait_cycs(4, 1); if (is8086 && !(a & 1)) ret = read_mem_w(s + a); else { - wait(4, 1); + wait_cycs(4, 1); ret = read_mem_b(s + a); ret |= read_mem_b(s + ((is186 && !is_nec) ? (a + 1) : (a + 1) & 0xffff)) << 8; } @@ -469,7 +465,7 @@ writememb(uint32_t s, uint32_t a, uint8_t v) { uint32_t addr = s + a; - wait(4, 1); + wait_cycs(4, 1); write_mem_b(addr, v); if ((addr >= 0xf0000) && (addr <= 0xfffff)) @@ -482,12 +478,12 @@ writememw(uint32_t s, uint32_t a, uint16_t v) { uint32_t addr = s + a; - wait(4, 1); + wait_cycs(4, 1); if (is8086 && !(a & 1)) write_mem_w(addr, v); else { write_mem_b(addr, v & 0xff); - wait(4, 1); + wait_cycs(4, 1); addr = s + ((is186 && !is_nec) ? (a + 1) : ((a + 1) & 0xffff)); write_mem_b(addr, v >> 8); } @@ -564,7 +560,7 @@ pfq_fetchb_common(void) /* Reset prefetch queue internal position. */ pfq_ip = cpu_state.pc; /* Fill the queue. */ - wait(4 - (biu_cycles & 3), 0); + wait_cycs(4 - (biu_cycles & 3), 0); } /* Fetch. */ @@ -578,7 +574,7 @@ pfq_fetchb(void) uint8_t ret; ret = pfq_fetchb_common(); - wait(1, 0); + wait_cycs(1, 0); return ret; } @@ -590,7 +586,7 @@ pfq_fetchw(void) uint16_t temp; temp = pfq_fetchb_common(); - wait(1, 0); + wait_cycs(1, 0); temp |= (pfq_fetchb_common() << 8); return temp; @@ -764,38 +760,38 @@ do_mod_rm(void) if (cpu_mod == 3) return; - wait(1, 0); + wait_cycs(1, 0); if ((rmdat & 0xc7) == 0x06) { - wait(1, 0); + wait_cycs(1, 0); cpu_state.eaaddr = pfq_fetchw(); easeg = ovr_seg ? *ovr_seg : ds; - wait(1, 0); + wait_cycs(1, 0); return; } else switch (cpu_rm) { case 0: case 3: - wait(2, 0); + wait_cycs(2, 0); break; case 1: case 2: - wait(3, 0); + wait_cycs(3, 0); break; } cpu_state.eaaddr = (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); easeg = ovr_seg ? *ovr_seg : *mod1seg[cpu_rm]; switch (rmdat & 0xc0) { case 0x40: - wait(3, 0); + wait_cycs(3, 0); cpu_state.eaaddr += sign_extend(pfq_fetchb()); break; case 0x80: - wait(3, 0); + wait_cycs(3, 0); cpu_state.eaaddr += pfq_fetchw(); break; } cpu_state.eaaddr &= 0xffff; - wait(2, 0); + wait_cycs(2, 0); } #undef getr8 @@ -987,7 +983,7 @@ access(int num, UNUSED(int bits)) case 62: case 66: case 68: - wait(1, 0); + wait_cycs(1, 0); break; case 3: case 11: @@ -1003,7 +999,7 @@ access(int num, UNUSED(int bits)) case 52: case 53: case 54: - wait(2, 0); + wait_cycs(2, 0); break; case 16: case 18: @@ -1012,7 +1008,7 @@ access(int num, UNUSED(int bits)) case 32: case 37: case 42: - wait(3, 0); + wait_cycs(3, 0); break; case 10: case 12: @@ -1025,59 +1021,59 @@ access(int num, UNUSED(int bits)) case 39: case 41: case 60: - wait(4, 0); + wait_cycs(4, 0); break; case 4: case 70: - wait(5, 0); + wait_cycs(5, 0); break; case 31: case 38: case 40: - wait(6, 0); + wait_cycs(6, 0); break; case 5: if (opcode == 0xcc) - wait(7, 0); + wait_cycs(7, 0); else - wait(4, 0); + wait_cycs(4, 0); break; case 36: - wait(1, 0); + wait_cycs(1, 0); pfq_clear(); - wait(1, 0); + wait_cycs(1, 0); if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); + wait_cycs(1, 0); + wait_cycs(3, 0); break; case 43: - wait(2, 0); + wait_cycs(2, 0); pfq_clear(); - wait(1, 0); + wait_cycs(1, 0); break; case 57: if (cpu_mod != 3) - wait(2, 0); - wait(4, 0); + wait_cycs(2, 0); + wait_cycs(4, 0); break; case 58: if (cpu_mod != 3) - wait(1, 0); - wait(4, 0); + wait_cycs(1, 0); + wait_cycs(4, 0); break; case 59: - wait(2, 0); + wait_cycs(2, 0); pfq_clear(); if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); + wait_cycs(1, 0); + wait_cycs(3, 0); break; case 65: - wait(1, 0); + wait_cycs(1, 0); pfq_clear(); - wait(2, 0); + wait_cycs(2, 0); if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); break; } } @@ -1100,7 +1096,7 @@ interrupt(uint16_t addr) old_cs = CS; access(5, 16); new_ip = readmemw(0, cpu_state.eaaddr); - wait(1, 0); + wait_cycs(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; access(6, 16); new_cs = readmemw(0, cpu_state.eaaddr); @@ -1136,7 +1132,7 @@ interrupt_brkem(uint16_t addr) old_cs = CS; access(5, 16); new_ip = readmemw(0, cpu_state.eaaddr); - wait(1, 0); + wait_cycs(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; access(6, 16); new_cs = readmemw(0, cpu_state.eaaddr); @@ -1205,7 +1201,7 @@ custom_nmi(void) access(5, 16); (void) readmemw(0, cpu_state.eaaddr); new_ip = custom_nmi_vector & 0xffff; - wait(1, 0); + wait_cycs(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; access(6, 16); (void) readmemw(0, cpu_state.eaaddr); @@ -1264,20 +1260,20 @@ check_interrupts(void) repeating = 0; completed = 1; ovr_seg = NULL; - wait(3, 0); + wait_cycs(3, 0); /* ACK to PIC */ temp = pic_irq_ack(); - wait(4, 1); - wait(1, 0); + wait_cycs(4, 1); + wait_cycs(1, 0); /* ACK to PIC */ temp = pic_irq_ack(); - wait(4, 1); - wait(1, 0); + wait_cycs(4, 1); + wait_cycs(1, 0); in_lock = 0; clear_lock = 0; - wait(1, 0); + wait_cycs(1, 0); /* Here is where temp should be filled, but we cheat. */ - wait(3, 0); + wait_cycs(3, 0); opcode = 0x00; interrupt(temp); } @@ -1291,7 +1287,7 @@ rep_action(int bits) if (in_rep == 0) return 0; - wait(2, 0); + wait_cycs(2, 0); t = CX; if (irq_pending() && (repeating != 0)) { access(71, bits); @@ -1303,16 +1299,16 @@ rep_action(int bits) t = 0; } if (t == 0) { - wait(1, 0); + wait_cycs(1, 0); completed = 1; repeating = 0; return 1; } --CX; completed = 0; - wait(2, 0); + wait_cycs(2, 0); if (!repeating) - wait(2, 0); + wait_cycs(2, 0); return 0; } @@ -1322,7 +1318,7 @@ jump(uint16_t delta) uint16_t old_ip; access(67, 8); pfq_clear(); - wait(5, 0); + wait_cycs(5, 0); old_ip = cpu_state.pc; set_ip((cpu_state.pc + delta) & 0xffff); return old_ip; @@ -1346,9 +1342,9 @@ jcc(uint8_t opcode, int cond) { /* int8_t offset; */ - wait(1, 0); + wait_cycs(1, 0); cpu_data = pfq_fetchb(); - wait(1, 0); + wait_cycs(1, 0); if ((!cond) == !!(opcode & 0x01)) jump_short(); } @@ -1538,32 +1534,32 @@ mul(uint16_t a, uint16_t b) bit_count = 16; high_bit = 0x8000; } else - wait(8, 0); + wait_cycs(8, 0); size_mask = (1 << bit_count) - 1; if ((rmdat & 0x38) == 0x28) { if (!top_bit(a, bit_count)) { if (top_bit(b, bit_count)) { - wait(1, 0); + wait_cycs(1, 0); if ((b & size_mask) != ((opcode & 1) ? 0x8000 : 0x80)) - wait(1, 0); + wait_cycs(1, 0); b = ~b + 1; negate = 1; } } else { - wait(1, 0); + wait_cycs(1, 0); a = ~a + 1; negate = 1; if (top_bit(b, bit_count)) { b = ~b + 1; negate = 0; } else - wait(4, 0); + wait_cycs(4, 0); } - wait(10, 0); + wait_cycs(10, 0); } - wait(3, 0); + wait_cycs(3, 0); } c = 0; @@ -1571,13 +1567,13 @@ mul(uint16_t a, uint16_t b) carry = (a & 1) != 0; a >>= 1; for (i = 0; i < bit_count; ++i) { - wait(7, 0); + wait_cycs(7, 0); if (carry) { cpu_src = c; cpu_dest = b; add(bit_count); c = cpu_data & size_mask; - wait(1, 0); + wait_cycs(1, 0); carry = !!(cpu_state.flags & C_FLAG); } r = (c >> 1) + (carry ? high_bit : 0); @@ -1592,7 +1588,7 @@ mul(uint16_t a, uint16_t b) a = (~a + 1) & size_mask; if (a == 0) ++c; - wait(9, 0); + wait_cycs(9, 0); } cpu_data = a; cpu_dest = c; @@ -1637,7 +1633,7 @@ set_co_mul(UNUSED(int bits), int carry) set_of(carry); set_zf_ex(!carry); if (!carry) - wait(1, 0); + wait_cycs(1, 0); } /* Was div(), renamed to avoid conflicts with stdlib div(). */ @@ -1668,28 +1664,28 @@ x86_div(uint16_t l, uint16_t h) h &= size_mask; negative = 1; dividend_negative = 1; - wait(4, 0); + wait_cycs(4, 0); } if (top_bit(cpu_src, bit_count)) { cpu_src = ~cpu_src + 1; negative = !negative; } else - wait(1, 0); - wait(9, 0); + wait_cycs(1, 0); + wait_cycs(9, 0); } - wait(3, 0); + wait_cycs(3, 0); } - wait(8, 0); + wait_cycs(8, 0); cpu_src &= size_mask; if (h >= cpu_src) { if (opcode != 0xd4) - wait(1, 0); + wait_cycs(1, 0); interrupt(0); return 0; } if (opcode != 0xd4) - wait(1, 0); - wait(2, 0); + wait_cycs(1, 0); + wait_cycs(2, 0); carry = 1; for (b = 0; b < bit_count; ++b) { r = (l << 1) + (carry ? 1 : 0); @@ -1698,32 +1694,32 @@ x86_div(uint16_t l, uint16_t h) r = (h << 1) + (carry ? 1 : 0); carry = top_bit(h, bit_count); h = r; - wait(8, 0); + wait_cycs(8, 0); if (carry) { carry = 0; h -= cpu_src; if (b == bit_count - 1) - wait(2, 0); + wait_cycs(2, 0); } else { carry = cpu_src > h; if (!carry) { h -= cpu_src; - wait(1, 0); + wait_cycs(1, 0); if (b == bit_count - 1) - wait(2, 0); + wait_cycs(2, 0); } } } l = ~((l << 1) + (carry ? 1 : 0)); if (opcode != 0xd4 && (rmdat & 0x38) == 0x38) { - wait(4, 0); + wait_cycs(4, 0); if (top_bit(l, bit_count)) { if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); interrupt(0); return 0; } - wait(7, 0); + wait_cycs(7, 0); if (negative) l = ~l + 1; if (dividend_negative) @@ -1782,7 +1778,7 @@ aa(void) { set_pzs(8); AL = cpu_data & 0x0f; - wait(6, 0); + wait_cycs(6, 0); } static void @@ -1852,7 +1848,7 @@ cpu_inb(uint16_t port) int old_cycles = cycles; uint8_t ret; - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); old_cycles = cycles; ret = inb(port); @@ -1868,12 +1864,12 @@ cpu_inw(uint16_t port) int old_cycles = cycles; uint16_t ret; - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); if (is8086 && !(port & 1)) { old_cycles = cycles; ret = inw(port); } else { - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); old_cycles = cycles; ret = inb(port++); ret |= (inb(port) << 8); @@ -1889,7 +1885,7 @@ cpu_outb(uint16_t port, uint16_t val) { int old_cycles = cycles; - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); old_cycles = cycles; outb(port, val); @@ -1902,13 +1898,13 @@ cpu_outw(uint16_t port, uint16_t val) { int old_cycles = cycles; - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); if (is8086 && !(port & 1)) { old_cycles = cycles; outw(port, val); } else { - wait(is_mazovia ? 5 : 4, 1); + wait_cycs(is_mazovia ? 5 : 4, 1); old_cycles = cycles; outb(port++, val); outb(port, val >> 8); @@ -1958,7 +1954,7 @@ execx86(int cycs) in_lock = 0; clear_lock = 0; } - wait(1, 0); + wait_cycs(1, 0); } completed = 1; @@ -1967,7 +1963,7 @@ execx86(int cycs) switch (opcode) { case 0x60: /*PUSHA/PUSH R*/ orig_sp = SP; - wait(1, 0); + wait_cycs(1, 0); push(&AX); push(&CX); push(&DX); @@ -1979,7 +1975,7 @@ execx86(int cycs) handled = 1; break; case 0x61: /*POPA/POP R*/ - wait(9, 0); + wait_cycs(9, 0); DI = pop(); SI = pop(); BP = pop(); @@ -2011,7 +2007,7 @@ execx86(int cycs) case 0x65: if (is_nec) { /* REPC/REPNC */ - wait(1, 0); + wait_cycs(1, 0); in_rep = (opcode == 0x64 ? 1 : 2); rep_c_flag = 1; completed = 0; @@ -2021,7 +2017,7 @@ execx86(int cycs) case 0x68: wordtopush = pfq_fetchw(); - wait(1, 0); + wait_cycs(1, 0); push(&wordtopush); handled = 1; break; @@ -2061,12 +2057,12 @@ execx86(int cycs) bits = 8 << (opcode & 1); handled = 1; if (!repeating) - wait(2, 0); + wait_cycs(2, 0); if (rep_action(bits)) break; else if (!repeating) - wait(7, 0); + wait_cycs(7, 0); if (bits == 16) { writememw(es, DI, cpu_inw(DX)); @@ -2089,12 +2085,12 @@ execx86(int cycs) bits = 8 << (opcode & 1); handled = 1; if (!repeating) - wait(2, 0); + wait_cycs(2, 0); if (rep_action(bits)) break; else if (!repeating) - wait(7, 0); + wait_cycs(7, 0); if (bits == 16) { cpu_outw(DX, readmemw(dest_seg, SI)); @@ -2137,12 +2133,12 @@ execx86(int cycs) bits = 8 << (opcode & 1); do_mod_rm(); if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); access(53, bits); cpu_data = get_ea(); cpu_src = pfq_fetchb(); - wait((cpu_mod != 3) ? 9 : 6, 0); + wait_cycs((cpu_mod != 3) ? 9 : 6, 0); if (!is_nec) cpu_src &= 0x1F; @@ -2214,7 +2210,7 @@ execx86(int cycs) break; } if ((opcode & 2) != 0) - wait(4, 0); + wait_cycs(4, 0); --cpu_src; } access(17, bits); @@ -2248,7 +2244,7 @@ execx86(int cycs) switch (opcode) { case 0x28: /* ROL4 r/m */ do_mod_rm(); - wait(21, 0); + wait_cycs(21, 0); temp_val = geteab(); temp_al = AL; @@ -2266,7 +2262,7 @@ execx86(int cycs) case 0x2a: /* ROR4 r/m */ do_mod_rm(); - wait(21, 0); + wait_cycs(21, 0); temp_val = geteab(); temp_al = AL; @@ -2285,7 +2281,7 @@ execx86(int cycs) case 0x19: /* TEST1 r16/m16, imm4 */ bits = 8 << (opcode & 0x1); do_mod_rm(); - wait(3, 0); + wait_cycs(3, 0); bit = (opcode & 0x8) ? (pfq_fetchb()) : (CL); bit &= ((1 << (3 + (opcode & 0x1))) - 1); @@ -2303,7 +2299,7 @@ execx86(int cycs) case 0x1f: /* NOT1 r16/m16, imm4 */ bits = 8 << (opcode & 0x1); do_mod_rm(); - wait(3, 0); + wait_cycs(3, 0); bit = (opcode & 0x8) ? (pfq_fetchb()) : (CL); bit &= ((1 << (3 + (opcode & 0x1))) - 1); @@ -2323,7 +2319,7 @@ execx86(int cycs) case 0x1d: /* SET1 r16/m16, imm4 */ bits = 8 << (opcode & 0x1); do_mod_rm(); - wait(3, 0); + wait_cycs(3, 0); bit = (opcode & 0x8) ? (pfq_fetchb()) : (CL); bit &= ((1 << (3 + (opcode & 0x1))) - 1); @@ -2343,7 +2339,7 @@ execx86(int cycs) case 0x1b: /* CLR1 r16/m16, imm4 */ bits = 8 << (opcode & 0x1); do_mod_rm(); - wait(3, 0); + wait_cycs(3, 0); bit = (opcode & 0x8) ? (pfq_fetchb()) : (CL); bit &= ((1 << (3 + (opcode & 0x1))) - 1); @@ -2366,9 +2362,9 @@ execx86(int cycs) nibble = 0; srcseg = ovr_seg ? *ovr_seg : ds; - wait(5, 0); + wait_cycs(5, 0); for (i = 0; i < ((nibbles_count / 2) + odd); i++) { - wait(19, 0); + wait_cycs(19, 0); destcmp = read_mem_b((es) + DI + i); for (nibble = 0; nibble < 2; nibble++) { destbyte = destcmp >> (nibble ? 4 : 0); @@ -2401,9 +2397,9 @@ execx86(int cycs) nibble = 0; srcseg = ovr_seg ? *ovr_seg : ds; - wait(5, 0); + wait_cycs(5, 0); for (i = 0; i < ((nibbles_count / 2) + odd); i++) { - wait(19, 0); + wait_cycs(19, 0); destcmp = read_mem_b((es) + DI + i); for (nibble = 0; nibble < 2; nibble++) { destbyte = destcmp >> (nibble ? 4 : 0); @@ -2436,9 +2432,9 @@ execx86(int cycs) nibble = 0; srcseg = ovr_seg ? *ovr_seg : ds; - wait(5, 0); + wait_cycs(5, 0); for (i = 0; i < ((nibbles_count / 2) + odd); i++) { - wait(19, 0); + wait_cycs(19, 0); destcmp = read_mem_b((es) + DI + i); for (nibble = 0; nibble < 2; nibble++) { destbyte = destcmp >> (nibble ? 4 : 0); @@ -2464,7 +2460,7 @@ execx86(int cycs) case 0x31: /* INS reg1, reg2 */ case 0x39: /* INS reg8, imm4 */ do_mod_rm(); - wait(1, 0); + wait_cycs(1, 0); bit_length = ((opcode & 0x8) ? (pfq_fetchb() & 0xF) : (getr8(cpu_reg) & 0xF)) + 1; bit_offset = getr8(cpu_rm) & 0xF; @@ -2493,7 +2489,7 @@ execx86(int cycs) case 0x33: /* EXT reg1, reg2 */ case 0x3b: /* EXT reg8, imm4 */ do_mod_rm(); - wait(1, 0); + wait_cycs(1, 0); bit_length = ((opcode & 0x8) ? (pfq_fetchb() & 0xF) : (getr8(cpu_reg) & 0xF)) + 1; bit_offset = getr8(cpu_rm) & 0xF; @@ -2541,7 +2537,7 @@ execx86(int cycs) pfq_pos = 0; } else load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); - wait(1, 0); + wait_cycs(1, 0); /* All POP segment instructions suppress interrupts for one instruction. */ noint = 1; break; @@ -2550,7 +2546,7 @@ execx86(int cycs) case 0x2E: /*CS:*/ case 0x36: /*SS:*/ case 0x3E: /*DS:*/ - wait(1, 0); + wait_cycs(1, 0); ovr_seg = opseg[(opcode >> 3) & 0x03]; completed = 0; break; @@ -2601,21 +2597,21 @@ execx86(int cycs) cpu_src = tempw; } if (cpu_mod != 3) - wait(2, 0); - wait(1, 0); + wait_cycs(2, 0); + wait_cycs(1, 0); alu_op(bits); if (cpu_alu_op != 7) { if ((opcode & 2) == 0) { access(10, bits); set_ea(cpu_data); if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); } else { set_reg(cpu_reg, cpu_data); - wait(1, 0); + wait_cycs(1, 0); } } else - wait(1, 0); + wait_cycs(1, 0); break; case 0x04: @@ -2636,7 +2632,7 @@ execx86(int cycs) case 0x3d: /* alu A, imm */ bits = 8 << (opcode & 1); - wait(1, 0); + wait_cycs(1, 0); cpu_data = pfq_fetch(); cpu_dest = get_accum(bits); /* AX/AL */ cpu_src = cpu_data; @@ -2644,7 +2640,7 @@ execx86(int cycs) alu_op(bits); if (cpu_alu_op != 7) set_accum(bits, cpu_data); - wait(1, 0); + wait_cycs(1, 0); break; case 0x27: /*DAA*/ @@ -2667,7 +2663,7 @@ execx86(int cycs) } AL = cpu_dest; set_pzs(8); - wait(3, 0); + wait_cycs(3, 0); break; case 0x2F: /*DAS*/ cpu_dest = AL; @@ -2689,10 +2685,10 @@ execx86(int cycs) } AL = cpu_dest; set_pzs(8); - wait(3, 0); + wait_cycs(3, 0); break; case 0x37: /*AAA*/ - wait(1, 0); + wait_cycs(1, 0); if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { cpu_src = 6; ++AH; @@ -2700,7 +2696,7 @@ execx86(int cycs) } else { cpu_src = 0; clear_ca(); - wait(1, 0); + wait_cycs(1, 0); } cpu_dest = AL; cpu_data = cpu_dest + cpu_src; @@ -2708,7 +2704,7 @@ execx86(int cycs) aa(); break; case 0x3F: /*AAS*/ - wait(1, 0); + wait_cycs(1, 0); if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { cpu_src = 6; --AH; @@ -2716,7 +2712,7 @@ execx86(int cycs) } else { cpu_src = 0; clear_ca(); - wait(1, 0); + wait_cycs(1, 0); } cpu_dest = AL; cpu_data = cpu_dest - cpu_src; @@ -2741,7 +2737,7 @@ execx86(int cycs) case 0x4E: case 0x4F: /* INCDEC rw */ - wait(1, 0); + wait_cycs(1, 0); cpu_dest = cpu_state.regs[opcode & 7].w; cpu_src = 1; bits = 16; @@ -2778,7 +2774,7 @@ execx86(int cycs) case 0x5F: access(23, 16); cpu_state.regs[opcode & 0x07].w = pop(); - wait(1, 0); + wait_cycs(1, 0); break; case 0x60: /*JO alias*/ @@ -2845,20 +2841,20 @@ execx86(int cycs) cpu_data = get_ea(); cpu_dest = cpu_data; if (cpu_mod != 3) - wait(3, 0); + wait_cycs(3, 0); if (opcode == 0x81) { if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); cpu_src = pfq_fetchw(); } else { if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); if (opcode == 0x83) cpu_src = sign_extend(pfq_fetchb()); else cpu_src = pfq_fetchb() | 0xff00; } - wait(1, 0); + wait_cycs(1, 0); cpu_alu_op = (rmdat & 0x38) >> 3; alu_op(bits); if (cpu_alu_op != 7) { @@ -2866,7 +2862,7 @@ execx86(int cycs) set_ea(cpu_data); } else { if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); } break; @@ -2879,8 +2875,8 @@ execx86(int cycs) cpu_data = get_ea(); test(bits, cpu_data, get_reg(cpu_reg)); if (cpu_mod == 3) - wait(2, 0); - wait(2, 0); + wait_cycs(2, 0); + wait_cycs(2, 0); break; case 0x86: case 0x87: @@ -2891,7 +2887,7 @@ execx86(int cycs) cpu_data = get_ea(); cpu_src = get_reg(cpu_reg); set_reg(cpu_reg, cpu_data); - wait(3, 0); + wait_cycs(3, 0); access(12, bits); set_ea(cpu_src); break; @@ -2901,7 +2897,7 @@ execx86(int cycs) /* MOV rm, reg */ bits = 8 << (opcode & 1); do_mod_rm(); - wait(1, 0); + wait_cycs(1, 0); access(13, bits); set_ea(get_reg(cpu_reg)); break; @@ -2912,15 +2908,15 @@ execx86(int cycs) do_mod_rm(); access(50, bits); set_reg(cpu_reg, get_ea()); - wait(1, 0); + wait_cycs(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait_cycs(2, 0); break; case 0x8C: /*MOV w,sreg*/ do_mod_rm(); if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); access(14, 16); seteaw(_opseg[(rmdat & 0x18) >> 3]->seg); break; @@ -2928,9 +2924,9 @@ execx86(int cycs) case 0x8D: /*LEA*/ do_mod_rm(); cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; - wait(1, 0); + wait_cycs(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait_cycs(2, 0); break; case 0x8E: /*MOV sreg,w*/ @@ -2942,23 +2938,23 @@ execx86(int cycs) pfq_pos = 0; } else load_seg(tempw, _opseg[(rmdat & 0x18) >> 3]); - wait(1, 0); + wait_cycs(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait_cycs(2, 0); if (((rmdat & 0x18) >> 3) == 2) noint = 1; break; case 0x8F: /*POPW*/ do_mod_rm(); - wait(1, 0); + wait_cycs(1, 0); cpu_src = cpu_state.eaaddr; access(24, 16); if (cpu_mod != 3) - wait(2, 0); + wait_cycs(2, 0); cpu_data = pop(); cpu_state.eaaddr = cpu_src; - wait(2, 0); + wait_cycs(2, 0); access(15, 16); seteaw(cpu_data); break; @@ -2972,30 +2968,30 @@ execx86(int cycs) case 0x96: case 0x97: /* XCHG AX, rw */ - wait(1, 0); + wait_cycs(1, 0); cpu_data = cpu_state.regs[opcode & 7].w; cpu_state.regs[opcode & 7].w = AX; AX = cpu_data; - wait(1, 0); + wait_cycs(1, 0); break; case 0x98: /*CBW*/ - wait(1, 0); + wait_cycs(1, 0); AX = sign_extend(AL); break; case 0x99: /*CWD*/ - wait(4, 0); + wait_cycs(4, 0); if (!top_bit(AX, 16)) DX = 0; else { - wait(1, 0); + wait_cycs(1, 0); DX = 0xffff; } break; case 0x9A: /*CALL FAR*/ - wait(1, 0); + wait_cycs(1, 0); new_ip = pfq_fetchw(); - wait(1, 0); + wait_cycs(1, 0); new_cs = pfq_fetchw(); pfq_clear(); access(31, 16); @@ -3009,11 +3005,11 @@ execx86(int cycs) break; case 0x9B: /*WAIT*/ if (!repeating) - wait(2, 0); - wait(5, 0); + wait_cycs(2, 0); + wait_cycs(5, 0); #ifdef NO_HACK if (irq_pending()) { - wait(7, 0); + wait_cycs(7, 0); check_interrupts(); } else { repeating = 1; @@ -3021,7 +3017,7 @@ execx86(int cycs) clock_end(); } #else - wait(7, 0); + wait_cycs(7, 0); check_interrupts(); #endif break; @@ -3039,16 +3035,16 @@ execx86(int cycs) cpu_state.flags = pop() | 0x8002; else cpu_state.flags = pop() | 0x0002; - wait(1, 0); + wait_cycs(1, 0); sync_to_i8080(); break; case 0x9E: /*SAHF*/ - wait(1, 0); + wait_cycs(1, 0); cpu_state.flags = (cpu_state.flags & 0xff02) | AH; - wait(2, 0); + wait_cycs(2, 0); break; case 0x9F: /*LAHF*/ - wait(1, 0); + wait_cycs(1, 0); AH = cpu_state.flags & 0xd7; break; @@ -3056,17 +3052,17 @@ execx86(int cycs) case 0xA1: /* MOV A, [iw] */ bits = 8 << (opcode & 1); - wait(1, 0); + wait_cycs(1, 0); cpu_state.eaaddr = pfq_fetchw(); access(1, bits); set_accum(bits, readmem((ovr_seg ? *ovr_seg : ds))); - wait(1, 0); + wait_cycs(1, 0); break; case 0xA2: case 0xA3: /* MOV [iw], A */ bits = 8 << (opcode & 1); - wait(1, 0); + wait_cycs(1, 0); cpu_state.eaaddr = pfq_fetchw(); access(7, bits); writemem((ovr_seg ? *ovr_seg : ds), get_accum(bits)); @@ -3078,18 +3074,18 @@ execx86(int cycs) case 0xAD: /* LODS */ bits = 8 << (opcode & 1); if (!repeating) { - wait(1, 0); + wait_cycs(1, 0); if ((opcode & 8) == 0 && in_rep != 0) - wait(1, 0); + wait_cycs(1, 0); } if (rep_action(bits)) { - wait(1, 0); + wait_cycs(1, 0); if ((opcode & 8) != 0) - wait(1, 0); + wait_cycs(1, 0); break; } if (in_rep != 0 && (opcode & 8) != 0) - wait(1, 0); + wait_cycs(1, 0); access(20, bits); lods(bits); if ((opcode & 8) == 0) { @@ -3098,12 +3094,12 @@ execx86(int cycs) } else { set_accum(bits, cpu_data); if (in_rep != 0) - wait(2, 0); + wait_cycs(2, 0); } if (in_rep == 0) { - wait(3, 0); + wait_cycs(3, 0); if ((opcode & 8) != 0) - wait(1, 0); + wait_cycs(1, 0); break; } repeating = 1; @@ -3116,19 +3112,19 @@ execx86(int cycs) case 0xAF: /* SCAS */ bits = 8 << (opcode & 1); if (!repeating) - wait(1, 0); + wait_cycs(1, 0); if (rep_action(bits)) { - wait(2, 0); + wait_cycs(2, 0); break; } if (in_rep != 0) - wait(1, 0); - wait(1, 0); + wait_cycs(1, 0); + wait_cycs(1, 0); cpu_dest = get_accum(bits); if ((opcode & 8) == 0) { access(21, bits); lods(bits); - wait(1, 0); + wait_cycs(1, 0); cpu_dest = cpu_data; } access(2, bits); @@ -3137,14 +3133,14 @@ execx86(int cycs) DI = string_increment(bits); cpu_src = cpu_data; sub(bits); - wait(2, 0); + wait_cycs(2, 0); if (in_rep == 0) { - wait(3, 0); + wait_cycs(3, 0); break; } if ((!!(cpu_state.flags & (rep_c_flag ? C_FLAG : Z_FLAG))) == (in_rep == 1)) { completed = 1; - wait(4, 0); + wait_cycs(4, 0); break; } repeating = 1; @@ -3155,29 +3151,29 @@ execx86(int cycs) case 0xA9: /* TEST A, imm */ bits = 8 << (opcode & 1); - wait(1, 0); + wait_cycs(1, 0); cpu_data = pfq_fetch(); test(bits, get_accum(bits), cpu_data); - wait(1, 0); + wait_cycs(1, 0); break; case 0xAA: case 0xAB: /* STOS */ bits = 8 << (opcode & 1); if (!repeating) { - wait(1, 0); + wait_cycs(1, 0); if (in_rep != 0) - wait(1, 0); + wait_cycs(1, 0); } if (rep_action(bits)) { - wait(1, 0); + wait_cycs(1, 0); break; } cpu_data = AX; access(28, bits); stos(bits); if (in_rep == 0) { - wait(3, 0); + wait_cycs(3, 0); break; } repeating = 1; @@ -3192,12 +3188,12 @@ execx86(int cycs) case 0xB5: case 0xB6: case 0xB7: - wait(1, 0); + wait_cycs(1, 0); if (opcode & 0x04) cpu_state.regs[opcode & 0x03].b.h = pfq_fetchb(); else cpu_state.regs[opcode & 0x03].b.l = pfq_fetchb(); - wait(1, 0); + wait_cycs(1, 0); break; case 0xB8: @@ -3208,9 +3204,9 @@ execx86(int cycs) case 0xBD: case 0xBE: case 0xBF: - wait(1, 0); + wait_cycs(1, 0); cpu_state.regs[opcode & 0x07].w = pfq_fetchw(); - wait(1, 0); + wait_cycs(1, 0); break; case 0xC0: @@ -3224,28 +3220,28 @@ execx86(int cycs) /* RET */ bits = 8 + (opcode & 0x08); if ((opcode & 9) != 1) - wait(1, 0); + wait_cycs(1, 0); if (!(opcode & 1)) { cpu_src = pfq_fetchw(); - wait(1, 0); + wait_cycs(1, 0); } if ((opcode & 9) == 9) - wait(1, 0); + wait_cycs(1, 0); pfq_clear(); access(26, bits); new_ip = pop(); - wait(2, 0); + wait_cycs(2, 0); if ((opcode & 8) == 0) new_cs = CS; else { access(42, bits); new_cs = pop(); if (opcode & 1) - wait(1, 0); + wait_cycs(1, 0); } if (!(opcode & 1)) { SP += cpu_src; - wait(1, 0); + wait_cycs(1, 0); } load_cs(new_cs); access(72, bits); @@ -3263,7 +3259,7 @@ execx86(int cycs) access(57, bits); read_ea2(bits); load_seg(cpu_data, (opcode & 0x01) ? &cpu_state.seg_ds : &cpu_state.seg_es); - wait(1, 0); + wait_cycs(1, 0); break; case 0xC6: @@ -3271,12 +3267,12 @@ execx86(int cycs) /* MOV rm, imm */ bits = 8 << (opcode & 1); do_mod_rm(); - wait(1, 0); + wait_cycs(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait_cycs(2, 0); cpu_data = pfq_fetch(); if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); access(16, bits); set_ea(cpu_data); break; @@ -3285,13 +3281,13 @@ execx86(int cycs) interrupt(3); break; case 0xCD: /*INT*/ - wait(1, 0); + wait_cycs(1, 0); interrupt(pfq_fetchb()); break; case 0xCE: /*INTO*/ - wait(3, 0); + wait_cycs(3, 0); if (cpu_state.flags & V_FLAG) { - wait(2, 0); + wait_cycs(2, 0); interrupt(4); } break; @@ -3299,7 +3295,7 @@ execx86(int cycs) case 0xCF: /*IRET*/ access(43, 8); new_ip = pop(); - wait(3, 0); + wait_cycs(3, 0); access(44, 8); new_cs = pop(); load_cs(new_cs); @@ -3310,7 +3306,7 @@ execx86(int cycs) cpu_state.flags = pop() | 0x8002; else cpu_state.flags = pop() | 0x0002; - wait(5, 0); + wait_cycs(5, 0); noint = 1; nmi_enable = 1; if (is_nec && !(cpu_state.flags & MD_FLAG)) @@ -3325,15 +3321,15 @@ execx86(int cycs) bits = 8 << (opcode & 1); do_mod_rm(); if (cpu_mod == 3) - wait(1, 0); + wait_cycs(1, 0); access(53, bits); cpu_data = get_ea(); if ((opcode & 2) == 0) { cpu_src = 1; - wait((cpu_mod != 3) ? 4 : 0, 0); + wait_cycs((cpu_mod != 3) ? 4 : 0, 0); } else { cpu_src = CL; - wait((cpu_mod != 3) ? 9 : 6, 0); + wait_cycs((cpu_mod != 3) ? 9 : 6, 0); } if (is186 && !is_nec) cpu_src &= 0x1F; @@ -3405,7 +3401,7 @@ execx86(int cycs) break; } if ((opcode & 2) != 0) - wait(4, 0); + wait_cycs(4, 0); --cpu_src; } access(17, bits); @@ -3413,7 +3409,7 @@ execx86(int cycs) break; case 0xD4: /*AAM*/ - wait(1, 0); + wait_cycs(1, 0); #ifdef NO_VARIANT_ON_NEC if (is_nec) { (void) pfq_fetchb(); @@ -3429,7 +3425,7 @@ execx86(int cycs) } break; case 0xD5: /*AAD*/ - wait(1, 0); + wait_cycs(1, 0); if (is_nec) { (void) pfq_fetchb(); mul(10, AH); @@ -3444,9 +3440,9 @@ execx86(int cycs) break; case 0xD6: /*SALC*/ if (!is_nec) { - wait(1, 0); + wait_cycs(1, 0); AL = (cpu_state.flags & C_FLAG) ? 0xff : 0x00; - wait(1, 0); + wait_cycs(1, 0); break; } fallthrough; @@ -3454,7 +3450,7 @@ execx86(int cycs) cpu_state.eaaddr = (BX + AL) & 0xffff; access(4, 8); AL = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); - wait(1, 0); + wait_cycs(1, 0); break; case 0xD8: @@ -3535,9 +3531,9 @@ execx86(int cycs) } cpu_state.pc = tempw; /* Do this as the x87 code advances it, which is needed on the 286+ core, but not here. */ - wait(1, 0); + wait_cycs(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait_cycs(2, 0); break; case 0xE0: @@ -3545,10 +3541,10 @@ execx86(int cycs) case 0xE2: case 0xE3: /* LOOP */ - wait(3, 0); + wait_cycs(3, 0); cpu_data = pfq_fetchb(); if (opcode != 0xe2) - wait(1, 0); + wait_cycs(1, 0); if (opcode != 0xe3) { --CX; oldc = (CX != 0); @@ -3578,7 +3574,7 @@ execx86(int cycs) case 0xEF: bits = 8 << (opcode & 1); if ((opcode & 0x0e) != 0x0c) - wait(1, 0); + wait_cycs(1, 0); if ((opcode & 8) == 0) cpu_data = pfq_fetchb(); else @@ -3590,7 +3586,7 @@ execx86(int cycs) cpu_io(16, 0, cpu_data); else cpu_io(8, 0, cpu_data); - wait(1, 0); + wait_cycs(1, 0); } else { if ((opcode & 8) == 0) access(8, bits); @@ -3604,19 +3600,19 @@ execx86(int cycs) break; case 0xE8: /*CALL rel 16*/ - wait(1, 0); + wait_cycs(1, 0); cpu_state.oldpc = jump_near(); access(34, 8); push((uint16_t *) &(cpu_state.oldpc)); break; case 0xE9: /*JMP rel 16*/ - wait(1, 0); + wait_cycs(1, 0); jump_near(); break; case 0xEA: /*JMP far*/ - wait(1, 0); + wait_cycs(1, 0); addr = pfq_fetchw(); - wait(1, 0); + wait_cycs(1, 0); tempw = pfq_fetchw(); load_cs(tempw); access(70, 8); @@ -3624,22 +3620,22 @@ execx86(int cycs) set_ip(addr); break; case 0xEB: /*JMP rel*/ - wait(1, 0); + wait_cycs(1, 0); cpu_data = (int8_t) pfq_fetchb(); jump_short(); - wait(1, 0); + wait_cycs(1, 0); break; case 0xF0: case 0xF1: /*LOCK - F1 is alias*/ in_lock = 1; - wait(1, 0); + wait_cycs(1, 0); completed = 0; break; case 0xF2: /*REPNE*/ case 0xF3: /*REPE*/ - wait(1, 0); + wait_cycs(1, 0); in_rep = (opcode == 0xf2 ? 1 : 2); completed = 0; rep_c_flag = 0; @@ -3647,12 +3643,12 @@ execx86(int cycs) case 0xF4: /*HLT*/ if (!repeating) { - wait(1, 0); + wait_cycs(1, 0); pfq_clear(); } - wait(1, 0); + wait_cycs(1, 0); if (irq_pending()) { - wait(cycles & 1, 0); + wait_cycs(cycles & 1, 0); check_interrupts(); } else { repeating = 1; @@ -3661,7 +3657,7 @@ execx86(int cycs) } break; case 0xF5: /*CMC*/ - wait(1, 0); + wait_cycs(1, 0); cpu_state.flags ^= C_FLAG; break; @@ -3675,18 +3671,18 @@ execx86(int cycs) case 0x00: case 0x08: /* TEST */ - wait(2, 0); + wait_cycs(2, 0); if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); cpu_src = pfq_fetch(); - wait(1, 0); + wait_cycs(1, 0); test(bits, cpu_data, cpu_src); if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); break; case 0x10: /* NOT */ case 0x18: /* NEG */ - wait(2, 0); + wait_cycs(2, 0); if ((rmdat & 0x38) == 0x10) cpu_data = ~cpu_data; else { @@ -3700,7 +3696,7 @@ execx86(int cycs) case 0x20: /* MUL */ case 0x28: /* IMUL */ old_flags = cpu_state.flags; - wait(1, 0); + wait_cycs(1, 0); mul(get_accum(bits), cpu_data); if (opcode & 1) { AX = cpu_data; @@ -3717,7 +3713,7 @@ execx86(int cycs) set_sf(bits); set_pf(); if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); /* NOTE: When implementing the V20, care should be taken to not change the zero flag. */ if (is_nec) @@ -3726,10 +3722,10 @@ execx86(int cycs) case 0x30: /* DIV */ case 0x38: /* IDIV */ if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); cpu_src = cpu_data; if (x86_div(AL, AH)) - wait(1, 0); + wait_cycs(1, 0); break; } break; @@ -3737,19 +3733,19 @@ execx86(int cycs) case 0xF8: case 0xF9: /* CLCSTC */ - wait(1, 0); + wait_cycs(1, 0); set_cf(opcode & 1); break; case 0xFA: case 0xFB: /* CLISTI */ - wait(1, 0); + wait_cycs(1, 0); set_if(opcode & 1); break; case 0xFC: case 0xFD: /* CLDSTD */ - wait(1, 0); + wait_cycs(1, 0); set_df(opcode & 1); break; @@ -3774,22 +3770,22 @@ execx86(int cycs) } do_af(); set_pzs(bits); - wait(2, 0); + wait_cycs(2, 0); access(19, bits); set_ea(cpu_data); break; case 0x10: /* CALL rm */ cpu_data_opff_rm(); access(63, bits); - wait(1, 0); + wait_cycs(1, 0); pfq_clear(); - wait(4, 0); + wait_cycs(4, 0); if (cpu_mod != 3) - wait(1, 0); - wait(1, 0); /* Wait. */ + wait_cycs(1, 0); + wait_cycs(1, 0); /* Wait. */ cpu_state.oldpc = cpu_state.pc; set_ip(cpu_data); - wait(2, 0); + wait_cycs(2, 0); access(35, bits); push((uint16_t *) &(cpu_state.oldpc)); break; @@ -3803,7 +3799,7 @@ execx86(int cycs) access(36, bits); push(&(CS)); access(64, bits); - wait(4, 0); + wait_cycs(4, 0); cpu_state.oldpc = cpu_state.pc; load_cs(new_cs); set_ip(new_ip); @@ -3829,7 +3825,7 @@ execx86(int cycs) case 0x30: /* PUSH rm */ case 0x38: if (cpu_mod != 3) - wait(1, 0); + wait_cycs(1, 0); access(38, bits); push((uint16_t *) &(cpu_data)); break; @@ -3839,7 +3835,7 @@ execx86(int cycs) default: x808x_log("Illegal opcode: %02X\n", opcode); pfq_fetchb(); - wait(8, 0); + wait_cycs(8, 0); break; } } diff --git a/src/cpu/x87_ops.h b/src/cpu/x87_ops.h index b134bf8fc..1e4504949 100644 --- a/src/cpu/x87_ops.h +++ b/src/cpu/x87_ops.h @@ -581,7 +581,7 @@ static int FPU_ILLEGAL_a16(UNUSED(uint32_t fetchdat)) { geteaw(); - wait(timing_rr, 0); + wait_cycs(timing_rr, 0); return 0; } #else diff --git a/src/cpu/x87_ops_misc.h b/src/cpu/x87_ops_misc.h index 9a01f7496..417beea62 100644 --- a/src/cpu/x87_ops_misc.h +++ b/src/cpu/x87_ops_misc.h @@ -7,7 +7,7 @@ opFI(uint32_t fetchdat) cpu_state.npxc &= ~0x80; if (rmdat == 0xe1) cpu_state.npxc |= 0x80; - wait(3, 0); + wait_cycs(3, 0); return 0; } #else diff --git a/src/cpu/x87_ops_sf.h b/src/cpu/x87_ops_sf.h index 0d4fee81a..adbaa2003 100644 --- a/src/cpu/x87_ops_sf.h +++ b/src/cpu/x87_ops_sf.h @@ -354,7 +354,7 @@ sf_FI(uint32_t fetchdat) fpu_state.cwd &= ~FPU_SW_Summary; if (rmdat == 0xe1) fpu_state.cwd |= FPU_SW_Summary; - wait(3, 0); + wait_cycs(3, 0); return 0; } #else From 7d579fb3f994bfb98c186902803e5787aabe5761 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 00:53:21 +0200 Subject: [PATCH 13/31] Qt: Remove the superfluous second instance of the CPU override warning. --- src/qt/qt_main.cpp | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index afb5fcc1d..eb7d6ac44 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -790,20 +790,6 @@ main(int argc, char *argv[]) main_window->installEventFilter(&manager_socket); } - /* Warn the user about unsupported configs */ - if (cpu_override) { - QMessageBox warningbox(QMessageBox::Icon::Warning, QObject::tr("You are loading an unsupported configuration"), - QObject::tr("CPU type filtering based on selected machine is disabled for this emulated machine.\n\nThis makes it possible to choose a CPU that is otherwise incompatible with the selected machine. However, you may run into incompatibilities with the machine BIOS or other software.\n\nEnabling this setting is not officially supported and any bug reports filed may be closed as invalid."), - QMessageBox::NoButton, main_window); - warningbox.addButton(QObject::tr("Continue"), QMessageBox::AcceptRole); - warningbox.addButton(QObject::tr("Exit"), QMessageBox::RejectRole); - warningbox.exec(); - if (warningbox.result() == QDialog::Accepted) { - confirm_exit_cmdl = 0; /* skip the confirmation prompt without touching the config */ - emit main_window->close(); - } - } - // pc_reset_hard_init(); QTimer onesec; From 7abddb0b3575ca4a54ddac69ceebbfd37ab98b8e Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 18:31:07 +0200 Subject: [PATCH 14/31] Tseng graphics cards: restore some legacy renderers, fixes Slackware in 4bpp high resolution mode. --- src/video/vid_et3000.c | 3 +++ src/video/vid_et4000.c | 11 +++++++++++ src/video/vid_et4000w32.c | 3 +++ 3 files changed, 17 insertions(+) diff --git a/src/video/vid_et3000.c b/src/video/vid_et3000.c index a82f93385..482cc60a3 100644 --- a/src/video/vid_et3000.c +++ b/src/video/vid_et3000.c @@ -476,6 +476,9 @@ et3000_recalctimings(svga_t *svga) svga->clock = (cpuclock * (double) (1ULL << 32)) / 36000000.0; break; } + + if (svga->render == svga_render_4bpp_highres) + svga->render = svga_render_4bpp_tseng_highres; } static void * diff --git a/src/video/vid_et4000.c b/src/video/vid_et4000.c index a99cb8872..d7de0706e 100644 --- a/src/video/vid_et4000.c +++ b/src/video/vid_et4000.c @@ -723,6 +723,17 @@ et4000_recalctimings(svga_t *svga) svga->rowoffset <<= 1; svga->render = svga_render_8bpp_highres; } + + if (svga->render == svga_render_4bpp_highres) + svga->render = svga_render_4bpp_tseng_highres; + + if (dev->type == ET4000_TYPE_TC6058AF) { + if (svga->render == svga_render_8bpp_lowres) + svga->render = svga_render_8bpp_tseng_lowres; + + else if (svga->render == svga_render_8bpp_highres) + svga->render = svga_render_8bpp_tseng_highres; + } } static void diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index 533bd1f28..2e9a7796a 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -600,6 +600,9 @@ et4000w32p_recalctimings(svga_t *svga) } } } + + if (svga->render == svga_render_4bpp_highres) + svga->render = svga_render_4bpp_tseng_highres; } void From fe3ad0000b581f6d25ad1ebf982ee4e96f1c0ea3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 18:48:53 +0200 Subject: [PATCH 15/31] Forgotten the vid_svga_render.c and .h files. --- src/include/86box/vid_svga_render.h | 1 + src/video/vid_svga_render.c | 120 ++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/src/include/86box/vid_svga_render.h b/src/include/86box/vid_svga_render.h index 226ab8a18..7ead95838 100644 --- a/src/include/86box/vid_svga_render.h +++ b/src/include/86box/vid_svga_render.h @@ -55,6 +55,7 @@ extern void svga_render_4bpp_lowres(svga_t *svga); extern void svga_render_4bpp_highres(svga_t *svga); extern void svga_render_8bpp_lowres(svga_t *svga); extern void svga_render_8bpp_highres(svga_t *svga); +extern void svga_render_4bpp_tseng_highres(svga_t *svga); extern void svga_render_8bpp_clone_highres(svga_t *svga); extern void svga_render_8bpp_tseng_lowres(svga_t *svga); extern void svga_render_8bpp_tseng_highres(svga_t *svga); diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 0f9a4a253..bd471e72e 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -913,6 +913,126 @@ void svga_render_4bpp_highres(svga_t *svga) { svga_render_indexed_gfx(svga, true void svga_render_8bpp_lowres(svga_t *svga) { svga_render_indexed_gfx(svga, false, true); } void svga_render_8bpp_highres(svga_t *svga) { svga_render_indexed_gfx(svga, true, true); } +void +svga_render_4bpp_tseng_highres(svga_t *svga) +{ + int changed_offset; + int x; + int oddeven; + uint32_t addr; + uint32_t *p; + uint8_t edat[4]; + uint8_t dat; + uint32_t changed_addr; + + if ((svga->displine + svga->y_add) < 0) + return; + + if (svga->force_old_addr) { + changed_offset = (svga->memaddr + (svga->scanline & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; + + if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { + p = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; + + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; + + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->memaddr; + oddeven = 0; + + if (!(svga->crtc[0x17] & 0x40)) { + addr = (addr << 1) & svga->vram_mask; + + if (svga->seqregs[1] & 4) + oddeven = (addr & 4) ? 1 : 0; + + addr &= ~7; + + if ((svga->crtc[0x17] & 0x20) && (svga->memaddr & 0x20000)) + addr |= 4; + if (!(svga->crtc[0x17] & 0x20) && (svga->memaddr & 0x8000)) + addr |= 4; + } + + if (!(svga->crtc[0x17] & 0x01)) + addr = (addr & ~0x8000) | ((svga->scanline & 1) ? 0x8000 : 0); + if (!(svga->crtc[0x17] & 0x02)) + addr = (addr & ~0x10000) | ((svga->scanline & 2) ? 0x10000 : 0); + + if (svga->seqregs[1] & 4) { + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + svga->memaddr += 2; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + svga->memaddr += 4; + } + svga->memaddr &= svga->vram_mask; + + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + + p += 8; + } + } + } else { + changed_addr = svga->remap_func(svga, svga->memaddr); + + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; + + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; + + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->remap_func(svga, svga->memaddr); + oddeven = 0; + + if (svga->seqregs[1] & 4) { + oddeven = (addr & 4) ? 1 : 0; + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + svga->memaddr += 2; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + svga->memaddr += 4; + } + svga->memaddr &= svga->vram_mask; + + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + + p += 8; + } + } + } +} + void svga_render_8bpp_clone_highres(svga_t *svga) { From c537e614536a7104e426b6068bf4ed4c31db6033 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 30 Jun 2025 23:09:29 +0600 Subject: [PATCH 16/31] Copper demo wobbling effects now show up correctly --- src/include/86box/vid_svga.h | 3 +++ src/video/vid_et4000.c | 3 +++ src/video/vid_svga.c | 10 ++++++++ src/video/vid_svga_render.c | 45 ++++++++++++++++++++++++++++++++++-- 4 files changed, 59 insertions(+), 2 deletions(-) diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 78e025746..14f3c933a 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -30,6 +30,7 @@ # define FLAG_S3_911_16BIT 256 # define FLAG_512K_MASK 512 # define FLAG_NO_SHIFT3 1024 /* Needed for Bochs VBE. */ +# define FLAG_PRECISETIME 2048 /* Needed for Copper demo if on dynarec. */ struct monitor_t; typedef struct hwcursor_t { @@ -138,6 +139,8 @@ typedef struct svga_t { int ati_4color; int vblankend; int panning_blank; + int render_line_offset; + int start_retrace_latch; /*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 : 0MB-1MB - VRAM diff --git a/src/video/vid_et4000.c b/src/video/vid_et4000.c index d7de0706e..7dccd9747 100644 --- a/src/video/vid_et4000.c +++ b/src/video/vid_et4000.c @@ -892,6 +892,9 @@ et4000_init(const device_t *info) if (dev->type >= ET4000_TYPE_ISA) dev->svga.ramdac = device_add(&sc1502x_ramdac_device); + if (dev->type == ET4000_TYPE_TC6058AF) + dev->svga.adv_flags |= FLAG_PRECISETIME; + dev->vram_mask = dev->vram_size - 1; rom_init(&dev->bios_rom, fn, diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index e4a6d9efc..5f2d2d89c 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -703,6 +703,13 @@ svga_recalctimings(svga_t *svga) int old_monitor_overscan_x = svga->monitor->mon_overscan_x; int old_monitor_overscan_y = svga->monitor->mon_overscan_y; + if (svga->adv_flags & FLAG_PRECISETIME) { +#ifdef USE_DYNAREC + if (cpu_use_dynarec) + update_tsc(); +#endif + } + svga->vtotal = svga->crtc[6]; svga->dispend = svga->crtc[0x12]; svga->vsyncstart = svga->crtc[0x10]; @@ -1253,6 +1260,7 @@ svga_do_render(svga_t *svga) } if (!svga->override) { + svga->render_line_offset = svga->start_retrace_latch - svga->crtc[0x4]; svga->render(svga); svga->x_add = svga->left_overscan; @@ -1514,6 +1522,8 @@ svga_poll(void *priv) if (svga->vsync_callback) svga->vsync_callback(svga); + + svga->start_retrace_latch = svga->crtc[0x4]; } #if 0 if (svga->vc == lines_num) { diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index bd471e72e..5905a25dd 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -744,6 +744,13 @@ svga_render_indexed_gfx(svga_t *svga, bool highres, bool combine8bits) return; p = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->render_line_offset) { + if (svga->render_line_offset > 0) { + memset(p, svga->overscan_color, charwidth * svga->render_line_offset * sizeof(uint32_t)); + p += charwidth * svga->render_line_offset; + } + } + if (svga->firstline_draw == 2000) svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; @@ -900,6 +907,12 @@ svga_render_indexed_gfx(svga_t *svga, bool highres, bool combine8bits) else p += charwidth; } + + if (svga->render_line_offset < 0) { + uint32_t *orig_line = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; + memmove(orig_line, orig_line + (charwidth * -svga->render_line_offset), (svga->hdisp) * 4); + memset((orig_line + svga->hdisp) - (charwidth * -svga->render_line_offset), svga->overscan_color, charwidth * -svga->render_line_offset * 4); + } } /* @@ -1279,17 +1292,26 @@ svga_render_8bpp_tseng_lowres(svga_t *svga) { uint32_t *p; uint32_t dat; + int x = 0; if ((svga->displine + svga->y_add) < 0) return; - if (svga->changedvram[svga->memaddr >> 12] || svga->changedvram[(svga->memaddr >> 12) + 1] || svga->fullchange) { + if (svga->changedvram[svga->memaddr >> 12] || svga->changedvram[(svga->memaddr >> 12) + 1] || svga->fullchange || svga->render_line_offset) { + int end = svga->hdisp + svga->scrollcache; p = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; + if (svga->render_line_offset) { + if (svga->render_line_offset > 0) { + memset(p, svga->overscan_color, 8 * svga->render_line_offset * sizeof(uint32_t)); + p += 8 * svga->render_line_offset; + } + } + for (int x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { dat = *(uint32_t *) (&svga->vram[svga->memaddr & svga->vram_display_mask]); if (svga->attrregs[0x10] & 0x80) @@ -1311,6 +1333,11 @@ svga_render_8bpp_tseng_lowres(svga_t *svga) svga->memaddr += 4; p += 8; } + if (svga->render_line_offset < 0) { + uint32_t *orig_line = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; + memmove(orig_line, orig_line + (8 * -svga->render_line_offset), (svga->hdisp) * 4); + memset((orig_line + svga->hdisp) - (8 * -svga->render_line_offset), svga->overscan_color, 8 * -svga->render_line_offset * 4); + } svga->memaddr &= svga->vram_display_mask; } } @@ -1324,13 +1351,20 @@ svga_render_8bpp_tseng_highres(svga_t *svga) if ((svga->displine + svga->y_add) < 0) return; - if (svga->changedvram[svga->memaddr >> 12] || svga->changedvram[(svga->memaddr >> 12) + 1] || svga->fullchange) { + if (svga->changedvram[svga->memaddr >> 12] || svga->changedvram[(svga->memaddr >> 12) + 1] || svga->fullchange || svga->render_line_offset) { p = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; + if (svga->render_line_offset) { + if (svga->render_line_offset > 0) { + memset(p, svga->overscan_color, 8 * svga->render_line_offset * sizeof(uint32_t)); + p += 8 * svga->render_line_offset; + } + } + for (int x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) { dat = *(uint32_t *) (&svga->vram[svga->memaddr & svga->vram_display_mask]); if (svga->attrregs[0x10] & 0x80) @@ -1369,6 +1403,13 @@ svga_render_8bpp_tseng_highres(svga_t *svga) svga->memaddr += 8; p += 8; } + + if (svga->render_line_offset < 0) { + uint32_t *orig_line = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; + memmove(orig_line, orig_line + (8 * -svga->render_line_offset), (svga->hdisp) * 4); + memset((orig_line + svga->hdisp) - (8 * -svga->render_line_offset), svga->overscan_color, 8 * -svga->render_line_offset * 4); + } + svga->memaddr &= svga->vram_display_mask; } } From 474dfb666bd8c1ec797af1f0a619816cb652d877 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 30 Jun 2025 19:12:56 +0200 Subject: [PATCH 17/31] Fixed two newly introduced warnings. --- src/video/vid_svga_render.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 5905a25dd..0c3252414 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -1292,13 +1292,11 @@ svga_render_8bpp_tseng_lowres(svga_t *svga) { uint32_t *p; uint32_t dat; - int x = 0; if ((svga->displine + svga->y_add) < 0) return; if (svga->changedvram[svga->memaddr >> 12] || svga->changedvram[(svga->memaddr >> 12) + 1] || svga->fullchange || svga->render_line_offset) { - int end = svga->hdisp + svga->scrollcache; p = &svga->monitor->target_buffer->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) From 54b2f4237d1a304542bf12772ea14fa3ead16553 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 30 Jun 2025 19:51:35 +0200 Subject: [PATCH 18/31] Adjust the timings of the 8514/A and compatibles (June 30th, 2025) --- src/video/vid_8514a.c | 3 ++- src/video/vid_ati_mach8.c | 14 ++++++++------ src/video/vid_svga.c | 4 ++-- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index b1e38fef7..c8191a876 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -3819,7 +3819,7 @@ ibm8514_recalctimings(svga_t *svga) } else { if (dev->on) { dev->hdisp = (dev->hdisped + 1) << 3; - dev->h_total = (dev->htotal + 1) << 3; + dev->h_total = dev->htotal + 1; if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ dev->h_total = 0x9e; @@ -3854,6 +3854,7 @@ ibm8514_recalctimings(svga_t *svga) dev->h_disp = dev->hdisp; dev->dispend = dev->vdisp; + dev->h_disp_time = dev->hdisp >> 3; if (dev->accel.advfunc_cntl & 0x04) svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0; diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index c5cb2ccca..df8965caf 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -2707,9 +2707,9 @@ mach_set_resolution(mach_t *mach, svga_t *svga) { ibm8514_t *dev = (ibm8514_t *) svga->dev8514; - dev->h_total = (dev->htotal + 1) << 3; + dev->h_total = (dev->htotal + 1); if (dev->h_total == 8) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ - dev->h_total = 0x9e << 3; + dev->h_total = 0x9e; dev->hdisp = (dev->hdisped + 1) << 3; @@ -2730,7 +2730,7 @@ mach_set_resolution(mach_t *mach, svga_t *svga) switch (mach->shadow_set & 0x03) { case 0x01: if (!(dev->accel.advfunc_cntl & 0x04)) { - dev->h_total = 0x64 << 3; + dev->h_total = 0x64; dev->hdisp = 640; dev->vdisp = 480; dev->v_total = 0x0419; @@ -2739,7 +2739,7 @@ mach_set_resolution(mach_t *mach, svga_t *svga) break; case 0x02: if (dev->accel.advfunc_cntl & 0x04) { - dev->h_total = 0x9e << 3; + dev->h_total = 0x9e; dev->hdisp = 1024; dev->vdisp = 768; dev->v_total = 0x0669; @@ -2754,7 +2754,7 @@ mach_set_resolution(mach_t *mach, svga_t *svga) } else if ((dev->disp_cntl >> 5) == 2) { /*Reset 8514/A to defaults if needed.*/ if (dev->accel.advfunc_cntl & 0x04) { if (dev->hdisp == 640) { - dev->h_total = 0x9e << 3; + dev->h_total = 0x9e; dev->hdisp = 1024; dev->vdisp = 768; dev->v_total = 0x0669; @@ -2763,7 +2763,7 @@ mach_set_resolution(mach_t *mach, svga_t *svga) } } else { if (dev->hdisp == 1024) { - dev->h_total = 0x64 << 3; + dev->h_total = 0x64; dev->hdisp = 640; dev->vdisp = 480; dev->v_total = 0x0419; @@ -2926,6 +2926,8 @@ mach_recalctimings(svga_t *svga) else if (dev->h_disp == 640) dev->dispend = 480; + dev->h_disp_time = dev->hdisp >> 3; + svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / svga->getclock((mach->accel.clock_sel >> 2) & 0x0f, svga->clock_gen); if (mach->accel.clock_sel & 0x40) svga->clock_8514 *= 2; diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 5f2d2d89c..8ed71645e 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -1031,7 +1031,7 @@ svga_recalctimings(svga_t *svga) svga->y_add = svga->vtotal - svga->vblankend - 1; svga->monitor->mon_overscan_y = svga->y_add + abs(svga->vblankstart - svga->dispend); - if ((svga->dispend >= 2048) || (svga->y_add < 0)) { + if ((dev->dispend >= 2048) || (svga->y_add < 0)) { svga->y_add = 0; svga->monitor->mon_overscan_y = 0; } @@ -1094,7 +1094,7 @@ svga_recalctimings(svga_t *svga) if (ibm8514_active && (svga->dev8514 != NULL)) { if (dev->on) { disptime8514 = dev->h_total; - _dispontime8514 = dev->h_disp; + _dispontime8514 = dev->h_disp_time; svga_log("HTOTAL=%d, HDISP=%d.\n", dev->h_total, dev->h_disp); } } From aef9d1ed94e19a8951967eedd2ee5209e5bbe4e4 Mon Sep 17 00:00:00 2001 From: Daniel Gurney Date: Tue, 1 Jul 2025 03:04:14 +0300 Subject: [PATCH 19/31] Revert "Merge branch 'bugfixes' into master" This reverts commit 8250b57325d7b6c85309ee46c97d12c0ec51edc2, reversing changes made to 6c643d05b8d58269ae80125a2f6d392d85c7c388. --- src/include/86box/vid_8514a.h | 92 ++++-- src/include/86box/vid_ati_eeprom.h | 2 +- src/include/86box/vid_ega.h | 127 ++++---- src/include/86box/vid_svga.h | 3 +- src/include/86box/vid_xga.h | 16 +- src/video/ramdac/vid_ramdac_bt48x.c | 2 +- src/video/ramdac/vid_ramdac_ibm_rgb528.c | 2 +- src/video/ramdac/vid_ramdac_tvp3026.c | 6 +- src/video/vid_8514a.c | 196 +++++++------ src/video/vid_ati_eeprom.c | 12 +- src/video/vid_ati_mach64.c | 14 +- src/video/vid_ati_mach8.c | 354 ++++++++++++----------- src/video/vid_chips_69000.c | 2 +- src/video/vid_cl54xx.c | 4 +- src/video/vid_ega.c | 5 + src/video/vid_et4000w32.c | 2 +- src/video/vid_ht216.c | 2 +- src/video/vid_mga.c | 9 +- src/video/vid_ps55da2.c | 3 + src/video/vid_s3.c | 16 +- src/video/vid_s3_virge.c | 12 +- src/video/vid_svga.c | 79 ++++- src/video/vid_tgui9440.c | 2 +- src/video/vid_voodoo_banshee.c | 8 +- src/video/vid_xga.c | 58 ++-- 25 files changed, 616 insertions(+), 412 deletions(-) diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index 9109dd9ab..5aa8927e0 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -18,8 +18,6 @@ #ifndef VIDEO_8514A_H #define VIDEO_8514A_H -#include - #define INT_VSY (1 << 0) #define INT_GE_BSY (1 << 1) #define INT_FIFO_OVR (1 << 2) @@ -46,34 +44,39 @@ typedef enum { MODE_MAX } ibm8514_mode_t; -typedef struct ibm8514_hwcursor_s { - int enable; +typedef struct hwcursor8514_t { + int ena; int x; int y; int xoff; int yoff; int cur_xsize; int cur_ysize; + int v_acc; + int h_acc; uint32_t addr; uint32_t pitch; -} ibm8514_hwcursor_t; +} hwcursor8514_t; typedef union { uint64_t q; uint32_t d[2]; uint16_t w[4]; uint8_t b[8]; -} ibm8514_latch_t; +} latch8514_t; typedef struct ibm8514_t { rom_t bios_rom; rom_t bios_rom2; mem_mapping_t bios_mapping; - ibm8514_hwcursor_t hwcursor; - ibm8514_hwcursor_t hwcursor_latch; + uint8_t *rom1; + uint8_t *rom2; + hwcursor8514_t hwcursor; + hwcursor8514_t hwcursor_latch; uint8_t pos_regs[8]; char *rom_path; + int force_old_addr; int type; ibm8514_card_type local; int bpp; @@ -96,14 +99,18 @@ typedef struct ibm8514_t { int dac_r; int dac_g; int dac_b; + int internal_pitch; int hwcursor_on; + int modechange; uint64_t dispontime; uint64_t dispofftime; struct { uint16_t subsys_cntl; + uint16_t setup_md; uint16_t advfunc_cntl; + uint16_t advfunc_cntl_old; uint16_t cur_y; uint16_t cur_x; int16_t destx; @@ -131,51 +138,84 @@ typedef struct ibm8514_t { uint16_t clip_bottom; int16_t clip_left; int16_t clip_top; + uint8_t pix_trans[2]; + int poly_draw; int ssv_state; - + int x1; + int x2; + int x3; + int y1; + int y2; int temp_cnt; + int16_t dx_ibm; + int16_t dy_ibm; int16_t cx; + int16_t cx_back; int16_t cy; - /* oldcx was not used! */ + int16_t oldcx; int16_t oldcy; int16_t sx; int16_t sy; int16_t dx; int16_t dy; + int16_t err; uint32_t src; uint32_t dest; int x_count; - /* y_count not used */ + int xx_count; + int y_count; int input; int input2; int output; + int output2; int ssv_len; int ssv_len_back; uint8_t ssv_dir; uint8_t ssv_draw; int odd_in; + int odd_out; + uint16_t scratch; int fill_state; + int xdir; + int ydir; + int linedraw; uint32_t ge_offset; uint32_t src_ge_offset; uint32_t dst_ge_offset; uint16_t src_pitch; uint16_t dst_pitch; + int64_t cur_x_24bpp; + int64_t cur_y_24bpp; + int64_t dest_x_24bpp; + int64_t dest_y_24bpp; } accel; + uint16_t test; + int h_blankstart; + int h_blank_end_val; int hblankstart; + int hblank_end_val; int hblankend; - int vtotal_reg; - int vtotal_8514; + int hblank_ext; + int hblank_sub; + + int v_total_reg; + int v_total; int dispend; - int vsyncstart; + int v_sync_start; + int v_syncstart; int split; - int hdisp_8514; - int htotal_8514; + int h_disp; + int h_total; + int h_sync_start; + int h_sync_width; + int h_disp_time; int rowoffset; int dispon; - int hdispon; + int hdisp_on; + int linecountff; int vc; int linepos; int oddeven; @@ -196,27 +236,34 @@ typedef struct ibm8514_t { uint8_t linedbl; uint8_t data_available; + uint8_t data_available2; uint8_t rowcount; int hsync_start; int hsync_width; int htotal; - int hdisp_vga; + int hdisp; + int hdisp2; int hdisped; int scanline; + int vsyncstart; int vsyncwidth; int vtotal; - int vdisp_8514; - int vdisp_vga; + int v_disp; + int v_disp2; + int vdisp; + int vdisp2; int disp_cntl; int interlace; uint16_t subsys_cntl; uint8_t subsys_stat; atomic_int force_busy; + atomic_int force_busy2; atomic_int fifo_idx; int blitter_busy; uint64_t blitter_time; + uint64_t status_time; int pitch; int ext_pitch; int ext_crt_pitch; @@ -224,15 +271,14 @@ typedef struct ibm8514_t { ibm8514_mode_t mode; int onboard; int linear; - bool vram_is_512k; - uint32_t vram_amount; + int vram_512k_8514; int vendor_mode; int _8514on; int _8514crt; PALETTE _8514pal; - ibm8514_latch_t latch; + latch8514_t latch; void (*vblank_start)(void *priv); void (*accel_out_fifo)(void *priv, uint16_t port, uint16_t val, int len); diff --git a/src/include/86box/vid_ati_eeprom.h b/src/include/86box/vid_ati_eeprom.h index 84e09f946..c52b5bd4b 100644 --- a/src/include/86box/vid_ati_eeprom.h +++ b/src/include/86box/vid_ati_eeprom.h @@ -49,7 +49,7 @@ typedef struct ati_eeprom_t { void ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type); void ati_eeprom_load_mach8(ati_eeprom_t *eeprom, char *fn, int mca); void ati_eeprom_load_mach8_vga(ati_eeprom_t *eeprom, char *fn); -void ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat); +void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat); int ati_eeprom_read(ati_eeprom_t *eeprom); #endif /*VIDEO_ATI_EEPROM_H*/ diff --git a/src/include/86box/vid_ega.h b/src/include/86box/vid_ega.h index caa8a63d5..beef6f98d 100644 --- a/src/include/86box/vid_ega.h +++ b/src/include/86box/vid_ega.h @@ -13,18 +13,14 @@ * * Authors: Sarah Walker, * Miran Grca, - * Connor Hyde / starfrost, * * Copyright 2008-2020 Sarah Walker. * Copyright 2016-2020 Miran Grca. - * Copyright 2025 Connor Hyde. */ #ifndef VIDEO_EGA_H #define VIDEO_EGA_H -#include - #if defined(EMU_MEM_H) && defined(EMU_ROM_H) typedef struct ega_t { mem_mapping_t mapping; @@ -61,52 +57,65 @@ typedef struct ega_t { uint16_t light_pen; - int32_t vidclock; - int32_t vres; - int32_t readmode; - int32_t writemode; - int32_t readplane; - int32_t vrammask; - int32_t chain4; - int32_t chain2_read; - int32_t chain2_write; - int32_t cursorvisible; - int32_t vc; - int32_t real_vc; - int32_t scanline; - int32_t dispon; - int32_t cursoron; - int32_t blink; - int32_t fullchange; - int32_t linepos; - int32_t vslines; - int32_t linecountff; - int32_t oddeven; - int32_t interlace; - int32_t linedbl; - int32_t rowcount; - int32_t vtotal; - int32_t dispend; - int32_t vsyncstart; - int32_t split; - int32_t hdisp; - int32_t htotal; - int32_t rowoffset; - int32_t vblankstart; - int32_t scrollcache; - int32_t firstline; - int32_t lastline; - int32_t firstline_draw; - int32_t lastline_draw; - int32_t x_add; - int32_t y_add; - int32_t displine; - int32_t index; - bool remap_required; - int32_t actual_type; - int32_t chipset; + int vidclock; + int fast; + int extvram; + int vres; + int readmode; + int writemode; + int readplane; + int vrammask; + int chain4; + int chain2_read; + int chain2_write; + int cursorvisible; + int oddeven_page; + int oddeven_chain; + int vc; + int real_vc; + int scanline; + int dispon; + int hdisp_on; + int cursoron; + int blink; + int fullchange; + int linepos; + int vslines; + int linecountff; + int oddeven; + int lowres; + int interlace; + int linedbl; + int lindebl; + int rowcount; + int vtotal; + int dispend; + int vsyncstart; + int split; + int hdisp; + int hdisp_old; + int htotal; + int hdisp_time; + int rowoffset; + int vblankstart; + int scrollcache; + int firstline; + int lastline; + int firstline_draw; + int lastline_draw; + int x_add; + int y_add; + int displine; + int res_x; + int res_y; + int bpp; + int index; + int remap_required; + int actual_type; + int chipset; + int mono_display; - int32_t mda_attr_to_color_table[256][2][2]; + int mda_attr_to_color_table[256][2][2]; uint32_t charseta; uint32_t charsetb; @@ -155,7 +164,7 @@ extern const device_t jega_device; extern const device_t jvga_device; #endif -extern int32_t update_overscan; +extern int update_overscan; #define DISPLAY_RGB 0 #define DISPLAY_COMPOSITE 1 @@ -165,7 +174,7 @@ extern int32_t update_overscan; #define DISPLAY_WHITE 5 #if defined(EMU_MEM_H) && defined(EMU_ROM_H) -extern void ega_init(ega_t *ega, int32_t monitor_type, int32_t is_mono); +extern void ega_init(ega_t *ega, int monitor_type, int is_mono); extern void ega_recalctimings(struct ega_t *ega); extern void ega_recalc_remap_func(struct ega_t *ega); #endif @@ -177,18 +186,18 @@ extern void ega_write(uint32_t addr, uint8_t val, void *priv); extern uint8_t ega_read(uint32_t addr, void *priv); extern void ega_set_type(void *priv, uint32_t local); -extern int32_t firstline_draw; -extern int32_t lastline_draw; -extern int32_t displine; -extern int32_t scanline; +extern int firstline_draw; +extern int lastline_draw; +extern int displine; +extern int scanline; extern uint32_t memaddr; extern uint32_t cursoraddr; -extern int32_t cursorvisible; -extern int32_t cursoron; -extern int32_t cgablink; +extern int cursorvisible; +extern int cursoron; +extern int cgablink; -extern int32_t scrollcache; +extern int scrollcache; extern uint8_t edatlookup[4][4]; extern uint8_t egaremap2bpp[256]; diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 610372c4c..14f3c933a 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -34,7 +34,7 @@ struct monitor_t; typedef struct hwcursor_t { - int enable; + int ena; int x; int y; int xoff; @@ -99,6 +99,7 @@ typedef struct svga_t { int hdisp_time; int rowoffset; int dispon; + int hdisp_on; int vc; int scanline; int linepos; diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index a8c7e09cd..e72c7af40 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -20,7 +20,7 @@ #include <86box/rom.h> typedef struct xga_hwcursor_t { - int enable; + int ena; int x; int y; int xoff; @@ -114,16 +114,18 @@ typedef struct xga_t { int dac_pos; int dac_r; int dac_g; - int vtotal_xga; + int v_total; int dispend; + int v_syncstart; int split; - int vblankstart_xga; - int hdisp_xga; - int hdispold_xga; - int htotal_xga; + int v_blankstart; + int h_disp; + int h_disp_old; + int h_total; + int h_disp_time; int rowoffset; int dispon; - int hdispon_xga; + int h_disp_on; int vc; int scanline; int linepos; diff --git a/src/video/ramdac/vid_ramdac_bt48x.c b/src/video/ramdac/vid_ramdac_bt48x.c index 0a70afdbd..d608750e3 100644 --- a/src/video/ramdac/vid_ramdac_bt48x.c +++ b/src/video/ramdac/vid_ramdac_bt48x.c @@ -161,7 +161,7 @@ bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_ break; case 0x09: /* Command Register 2 (RS value = 1001) */ ramdac->cmd_r2 = val; - svga->dac_hwcursor.enable = !!(val & 0x03); + svga->dac_hwcursor.ena = !!(val & 0x03); bt48x_set_bpp(ramdac, svga); break; case 0x0a: diff --git a/src/video/ramdac/vid_ramdac_ibm_rgb528.c b/src/video/ramdac/vid_ramdac_ibm_rgb528.c index 947c251e9..cd7d5c1b6 100644 --- a/src/video/ramdac/vid_ramdac_ibm_rgb528.c +++ b/src/video/ramdac/vid_ramdac_ibm_rgb528.c @@ -631,7 +631,7 @@ ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *s } svga->dac_hwcursor.addr = ramdac->smlc_part; svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 0x04) ? 64 : 32; - svga->dac_hwcursor.enable = ((val & 0x03) != 0x00); + svga->dac_hwcursor.ena = ((val & 0x03) != 0x00); break; case 0x031: if (!updt_cntl) diff --git a/src/video/ramdac/vid_ramdac_tvp3026.c b/src/video/ramdac/vid_ramdac_tvp3026.c index e80aeedab..bd5a83fd0 100644 --- a/src/video/ramdac/vid_ramdac_tvp3026.c +++ b/src/video/ramdac/vid_ramdac_tvp3026.c @@ -170,7 +170,7 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svg svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.enable = !!(val & 0x03); + svga->dac_hwcursor.ena = !!(val & 0x03); ramdac->mode = val & 0x03; } break; @@ -182,13 +182,13 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svg svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.enable = !!(val & 0x03); + svga->dac_hwcursor.ena = !!(val & 0x03); ramdac->mode = val & 0x03; } else { svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.enable = !!(ramdac->dcc & 0x03); + svga->dac_hwcursor.ena = !!(ramdac->dcc & 0x03); ramdac->mode = ramdac->dcc & 0x03; } break; diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index d5cdbe64a..c8191a876 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -376,19 +376,19 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x12e8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->vtotal_reg = val; - dev->vtotal_reg &= 0x1fff; + dev->v_total_reg = val; + dev->v_total_reg &= 0x1fff; ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->vtotal_reg, val); + WRITE8(port, dev->v_total_reg, val); } break; case 0x12e9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->vtotal_reg, val >> 8); - dev->vtotal_reg &= 0x1fff; + WRITE8(port, dev->v_total_reg, val >> 8); + dev->v_total_reg &= 0x1fff; ibm8514_log("IBM 8514/A compatible: (0x%04x): vtotal=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -397,21 +397,21 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x16e8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->vdisp_8514 = val; - dev->vdisp_8514 &= 0x1fff; - ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_8514); + dev->v_disp = val; + dev->v_disp &= 0x1fff; + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->vdisp_8514, val); + WRITE8(port, dev->v_disp, val); } break; case 0x16e9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->vdisp_8514, val >> 8); - dev->vdisp_8514 &= 0x1fff; - ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp_8514); + WRITE8(port, dev->v_disp, val >> 8); + dev->v_disp &= 0x1fff; + ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -420,26 +420,25 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x1ae8: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 2) { - dev->vsyncstart = val; - dev->vsyncstart &= 0x1fff; - ibm8514_log("IBM 8514/A compatible: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); + dev->v_sync_start = val; + dev->v_sync_start &= 0x1fff; + ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val); svga_recalctimings(svga); } else { - WRITE8(port, dev->vsyncstart, val); + WRITE8(port, dev->v_sync_start, val); } break; case 0x1ae9: /*In preparation to switch from VGA to 8514/A mode*/ if (len == 1) { - WRITE8(port, dev->vsyncstart, val >> 8); - dev->vsyncstart &= 0x1fff; - dev->vsyncstart++; - // change this if it breaks + WRITE8(port, dev->v_sync_start, val >> 8); + dev->v_sync_start &= 0x1fff; + dev->v_syncstart = dev->v_sync_start + 1; if (dev->interlace) - dev->vsyncstart >>= 1; + dev->v_syncstart >>= 1; - ibm8514_log("IBM 8514/A compatible: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); + ibm8514_log("IBM 8514/A compatible: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); ibm8514_log("IBM 8514/A compatible: (0x%04x): vsyncstart=0x%02x.\n", port, val); svga_recalctimings(svga); } @@ -466,6 +465,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->subsys_stat &= ~val; if ((val & 0xc000) == 0x8000) { dev->force_busy = 0; + dev->force_busy2 = 0; } } else { WRITE8(port, dev->subsys_cntl, val); @@ -477,6 +477,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) WRITE8(port, dev->subsys_cntl, val); if ((val & 0xc0) == 0x80) { dev->force_busy = 0; + dev->force_busy2 = 0; } } break; @@ -484,7 +485,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x4ae8: WRITE8(port, dev->accel.advfunc_cntl, val); dev->on = dev->accel.advfunc_cntl & 0x01; - ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp_vga, dev->vdisp_vga); + ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); ibm8514_log("IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); svga_recalctimings(svga); break; @@ -519,6 +520,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x92e8: if (len == 2) { + dev->test = val; dev->accel.err_term = val & 0x3fff; if (val & 0x2000) dev->accel.err_term |= ~0x1fff; @@ -536,6 +538,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->accel.ssv_state = 0; if (len == 2) { dev->data_available = 0; + dev->data_available2 = 0; dev->accel.cmd = val; dev->accel.cmd_back = 1; if (dev->accel.cmd & 0x100) @@ -787,7 +790,7 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) case 0x92e8: if (len == 2) - temp = dev->accel.err_term; + temp = dev->test; break; case 0x96e8: @@ -845,12 +848,12 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) if (len == 1) { dev->fifo_idx = 0; - if (dev->force_busy) + if (dev->force_busy2) temp |= 0x02; /*Hardware busy*/ - dev->force_busy = 0; + dev->force_busy2 = 0; - if (dev->data_available) { + if (dev->data_available2) { temp |= 0x01; /*Read Data available*/ switch (dev->accel.cmd >> 13) { case 2: @@ -858,11 +861,11 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) case 4: case 6: if (dev->accel.sy < 0) - dev->data_available = 0; + dev->data_available2 = 0; break; default: if (!dev->accel.sy) - dev->data_available = 0; + dev->data_available2 = 0; break; } } @@ -908,9 +911,11 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) switch (port) { case 0x2e8: + if (dev->vc == dev->v_syncstart) { + if (dev->accel.advfunc_cntl & 0x04) + temp |= 0x02; + } - if (dev->vc == dev->vsyncstart && dev->accel.advfunc_cntl & 0x04) - temp |= 0x02; ibm8514_log("Read: Display Status1=%02x.\n", temp); break; @@ -960,10 +965,12 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) if (!dev->fifo_idx && !dev->on) { dev->force_busy = 0; + dev->force_busy2 = 0; dev->data_available = 0; + dev->data_available2 = 0; temp |= INT_FIFO_EMP; } - temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80)); + temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80)); temp |= 0x20; } break; @@ -1016,7 +1023,9 @@ ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t if (ibm8514_cpu_src(svga)) { dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 0; + dev->data_available2 = 0; return; /*Wait for data from CPU*/ } } @@ -1230,6 +1239,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.ssv_len) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1330,6 +1340,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.ssv_len) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1397,11 +1408,15 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 0; + dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 1; + dev->data_available2 = 1; return; } } @@ -1509,6 +1524,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1633,6 +1649,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1740,6 +1757,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1843,7 +1861,9 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 0; + dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { if (!(dev->accel.cmd & 0x02)) { @@ -1860,7 +1880,9 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } ibm8514_log("INPUT=%d.\n", dev->accel.input); dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 1; + dev->data_available2 = 1; return; /*Wait for data from CPU*/ } } @@ -2014,6 +2036,7 @@ skip_vector_rect_write: if (dev->accel.sy < 0) { dev->force_busy = 0; + dev->force_busy2 = 0; dev->fifo_idx = 0; dev->accel.cmd_back = 1; } @@ -2175,6 +2198,7 @@ skip_nibble_rect_write: dev->accel.cmd_back = 1; } dev->force_busy = 0; + dev->force_busy2 = 0; return; } } @@ -2408,7 +2432,7 @@ skip_nibble_rect_write: ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat); + ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back); WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } else @@ -2558,11 +2582,15 @@ skip_nibble_rect_write: if (ibm8514_cpu_src(svga)) { dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 0; + dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 1; + dev->data_available2 = 1; return; } } @@ -2631,6 +2659,7 @@ skip_nibble_rect_write: if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -2739,6 +2768,7 @@ skip_nibble_rect_write: if (!dev->accel.sy) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -2826,11 +2856,15 @@ skip_nibble_rect_write: } } dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 0; + dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { dev->force_busy = 1; + dev->force_busy2 = 1; dev->data_available = 1; + dev->data_available2 = 1; return; /*Wait for data from CPU*/ } else ibm8514_log("BitBLT normal: Parameters: DX=%d, DY=%d, CX=%d, CY=%d, dstwidth=%d, dstheight=%d, clipl=%d, clipr=%d, clipt=%d, clipb=%d.\n", dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, dev->accel.sx, dev->accel.sy, clip_l, clip_r, clip_t, clip_b); @@ -2985,6 +3019,7 @@ skip_nibble_bitblt_write: if (dev->accel.sy < 0) { dev->accel.cmd_back = 1; dev->force_busy = 0; + dev->force_busy2 = 0; dev->fifo_idx = 0; } return; @@ -3334,9 +3369,9 @@ ibm8514_render_blank(svga_t *svga) dev->lastline_draw = dev->displine; uint32_t *line_ptr = &buffer32->line[dev->displine + svga->y_add][svga->x_add]; - uint32_t line_width = (uint32_t)(dev->hdisp_8514) * sizeof(uint32_t); + uint32_t line_width = (uint32_t)(dev->h_disp) * sizeof(uint32_t); - if (dev->hdisp_8514 > 0) + if (dev->h_disp > 0) memset(line_ptr, 0, line_width); } @@ -3357,7 +3392,7 @@ ibm8514_render_8bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (int x = 0; x <= dev->hdisp_8514; x += 8) { + for (int x = 0; x <= dev->h_disp; x += 8) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[0] = dev->pallook[dat & dev->dac_mask & 0xff]; p[1] = dev->pallook[(dat >> 8) & dev->dac_mask & 0xff]; @@ -3395,7 +3430,7 @@ ibm8514_render_15bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->hdisp_8514; x += 8) { + for (x = 0; x <= dev->h_disp; x += 8) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 1)) & dev->vram_mask]); p[x] = video_15to32[dat & 0xffff]; p[x + 1] = video_15to32[dat >> 16]; @@ -3435,7 +3470,7 @@ ibm8514_render_16bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->hdisp_8514; x += 8) { + for (x = 0; x <= dev->h_disp; x += 8) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 1)) & dev->vram_mask]); p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; @@ -3474,7 +3509,7 @@ ibm8514_render_24bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (int x = 0; x <= dev->hdisp_8514; x += 4) { + for (int x = 0; x <= dev->h_disp; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = dat & 0xffffff; @@ -3510,7 +3545,7 @@ ibm8514_render_BGR(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (int x = 0; x <= dev->hdisp_8514; x += 4) { + for (int x = 0; x <= dev->h_disp; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); @@ -3547,7 +3582,7 @@ ibm8514_render_ABGR8888(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->hdisp_8514; x++) { + for (x = 0; x <= dev->h_disp; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); } @@ -3574,7 +3609,7 @@ ibm8514_render_32bpp(svga_t *svga) dev->firstline_draw = dev->displine; dev->lastline_draw = dev->displine; - for (x = 0; x <= dev->hdisp_8514; x++) { + for (x = 0; x <= dev->h_disp; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); p[x] = dat & 0xffffff; } @@ -3589,7 +3624,7 @@ ibm8514_render_overscan_left(ibm8514_t *dev, svga_t *svga) if ((dev->displine + svga->y_add) < 0) return; - if (svga->scrblank || (dev->hdisp_8514 == 0)) + if (svga->scrblank || (dev->h_disp == 0)) return; for (int i = 0; i < svga->x_add; i++) @@ -3604,12 +3639,12 @@ ibm8514_render_overscan_right(ibm8514_t *dev, svga_t *svga) if ((dev->displine + svga->y_add) < 0) return; - if (svga->scrblank || (dev->hdisp_8514 == 0)) + if (svga->scrblank || (dev->h_disp == 0)) return; right = (overscan_x >> 1); for (int i = 0; i < right; i++) - buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->hdisp_8514 + i] = svga->overscan_color; + buffer32->line[dev->displine + svga->y_add][svga->x_add + dev->h_disp + i] = svga->overscan_color; } void @@ -3631,12 +3666,12 @@ ibm8514_poll(void *priv) if (dev->on) { ibm8514_log("ON!\n"); if (!dev->linepos) { - if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.enable) { + if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) { dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - dev->hwcursor_latch.yoff; dev->hwcursor_oddeven = 0; } - if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.enable && dev->interlace) { + if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.ena && dev->interlace) { dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1); dev->hwcursor_oddeven = 1; } @@ -3646,6 +3681,7 @@ ibm8514_poll(void *priv) dev->linepos = 1; if (dev->dispon) { + dev->hdisp_on = 1; dev->memaddr &= dev->vram_mask; @@ -3688,6 +3724,7 @@ ibm8514_poll(void *priv) timer_advance_u64(&svga->timer, dev->dispontime); if (dev->dispon) svga->cgastat &= ~1; + dev->hdisp_on = 0; dev->linepos = 0; if (dev->dispon) { @@ -3722,10 +3759,10 @@ ibm8514_poll(void *priv) if (svga->fullchange) svga->fullchange--; } - if (dev->vc == dev->vsyncstart) { + if (dev->vc == dev->v_syncstart) { dev->dispon = 0; svga->cgastat |= 8; - x = dev->hdisp_8514; + x = dev->h_disp; if (dev->interlace && !dev->oddeven) dev->lastline++; @@ -3755,7 +3792,7 @@ ibm8514_poll(void *priv) dev->memaddr = (dev->memaddr << 2); dev->memaddr_backup = (dev->memaddr_backup << 2); } - if (dev->vc == dev->vtotal_8514) { + if (dev->vc == dev->v_total) { dev->vc = 0; dev->scanline = (svga->crtc[0x8] & 0x1f); dev->dispon = 1; @@ -3781,48 +3818,43 @@ ibm8514_recalctimings(svga_t *svga) ati8514_recalctimings(svga); } else { if (dev->on) { - dev->hdisp_vga = (dev->hdisped + 1) << 3; - dev->htotal_8514 = dev->htotal + 1; + dev->hdisp = (dev->hdisped + 1) << 3; + dev->h_total = dev->htotal + 1; - if (dev->htotal_8514 == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ - dev->htotal_8514 = 0x9e; + if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ + dev->h_total = 0x9e; - dev->vdisp_vga = (dev->vdisp_8514 + 1) >> 1; - if ((dev->vdisp_vga == 478) || (dev->vdisp_vga == 766)) - dev->vdisp_vga += 2; - - dev->vtotal_8514 = dev->vtotal_reg + 1; - if (dev->vtotal_8514 == 1) - dev->vtotal_8514 = 0x0669; - + dev->vdisp = (dev->v_disp + 1) >> 1; + if ((dev->vdisp == 478) || (dev->vdisp == 766)) + dev->vdisp += 2; + dev->v_total = dev->v_total_reg + 1; + if (dev->v_total == 1) + dev->v_total = 0x0669; if (dev->interlace) - dev->vtotal_8514 >>= 1; - - dev->vsyncstart++; - - dev->vsyncstart_8514 = dev-vsyncstart_8514 + 1; - if (dev->vsyncstart_8514 == 1) - dev->vsyncstart_8514 = 0x0601; + dev->v_total >>= 1; + dev->v_syncstart = dev->v_sync_start + 1; + if (dev->v_syncstart == 1) + dev->v_syncstart = 0x0601; if (dev->interlace) - dev->vsyncstart >>= 1; + dev->v_syncstart >>= 1; dev->rowcount = !!(dev->disp_cntl & 0x08); - if ((dev->hdisp_vga != 640) && (dev->hdisp_vga != 1024)) { + if ((dev->hdisp != 640) && (dev->hdisp != 1024)) { if (dev->accel.advfunc_cntl & 0x04) { - dev->hdisp_vga = 1024; - dev->vdisp_vga = 768; + dev->hdisp = 1024; + dev->vdisp = 768; } else { - dev->hdisp_vga = 640; - dev->vdisp_vga = 480; + dev->hdisp = 640; + dev->vdisp = 480; } } - dev->hdisp_8514 = dev->hdisp_vga; - dev->dispend = dev->vdisp_vga; - + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + dev->h_disp_time = dev->hdisp >> 3; if (dev->accel.advfunc_cntl & 0x04) svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0; @@ -3837,8 +3869,8 @@ ibm8514_recalctimings(svga_t *svga) dev->pitch = 1024; dev->rowoffset = 0x80; - if (dev->vram_is_512k) { - if (dev->hdisp_8514 == 640) + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) dev->pitch = 640; } dev->accel_bpp = 8; @@ -3846,7 +3878,7 @@ ibm8514_recalctimings(svga_t *svga) ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->accel.advfunc_cntl & 4, !ibm8514_standalone_enabled); } } - ibm8514_log("8514 enabled, hdisp_vga=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp_vga, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); + ibm8514_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); } static uint8_t @@ -3922,7 +3954,7 @@ ibm8514_init(const device_t *info) svga->ext8514 = NULL; dev->vram_amount = device_get_config_int("memory"); - dev->vram_is_512k = dev->vram_amount == 512; + dev->vram_512k_8514 = dev->vram_amount == 512; dev->vram_size = dev->vram_amount << 10; dev->vram = calloc(dev->vram_size, 1); dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1); diff --git a/src/video/vid_ati_eeprom.c b/src/video/vid_ati_eeprom.c index 1efb506d1..a057f1f39 100644 --- a/src/video/vid_ati_eeprom.c +++ b/src/video/vid_ati_eeprom.c @@ -107,18 +107,18 @@ ati_eeprom_save(ati_eeprom_t *eeprom) } void -ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat) +ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat) { - if (!enable) + if (!ena) eeprom->out = 1; if (clk && !eeprom->oldclk) { - if (enable && !eeprom->oldena) { + if (ena && !eeprom->oldena) { eeprom->state = EEPROM_WAIT; eeprom->opcode = 0; eeprom->count = 3; eeprom->out = 1; - } else if (enable) { + } else if (ena) { switch (eeprom->state) { case EEPROM_WAIT: if (!dat) @@ -231,9 +231,9 @@ ati_eeprom_write(ati_eeprom_t *eeprom, int enable, int clk, int dat) break; } } - eeprom->oldena = enable; + eeprom->oldena = ena; } else if (!clk && eeprom->oldclk) { - if (enable) { + if (ena) { switch (eeprom->state) { case EEPROM_OUTPUT: eeprom->out = (eeprom->dat & 0x10000) ? 1 : 0; diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index a428b5ed3..2b89bddf4 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -256,6 +256,9 @@ typedef struct mach64_t { event_t *wake_fifo_thread; event_t *fifo_not_full_event; + uint64_t blitter_time; + uint64_t status_time; + uint16_t pci_id; uint32_t config_chip_id; uint32_t block_decoded_io; @@ -1187,6 +1190,8 @@ fifo_thread(void *param) thread_reset_event(mach64->wake_fifo_thread); mach64->blitter_busy = 1; while (!FIFO_EMPTY) { + uint64_t start_time = plat_timer_read(); + uint64_t end_time; fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_read_idx & FIFO_MASK]; switch (fifo->addr_type & FIFO_TYPE) { @@ -1209,6 +1214,9 @@ fifo_thread(void *param) if (FIFO_ENTRIES > 0xe000) thread_set_event(mach64->fifo_not_full_event); + + end_time = plat_timer_read(); + mach64->blitter_time += end_time - start_time; } mach64->blitter_busy = 0; } @@ -2298,7 +2306,7 @@ mach64_vblank_start(svga_t *svga) svga->overlay.addr = mach64->buf_offset[0] & 0x3ffff8; svga->overlay.pitch = mach64->buf_pitch[0] & 0xfff; - svga->overlay.enable = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1); + svga->overlay.ena = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1); mach64->overlay_v_acc = 0; mach64->scaler_update = 1; @@ -3345,9 +3353,9 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv) ati_eeprom_write(&mach64->eeprom, mach64->gen_test_cntl & 0x10, mach64->gen_test_cntl & 2, mach64->gen_test_cntl & 1); mach64->gen_test_cntl = (mach64->gen_test_cntl & ~8) | (ati_eeprom_read(&mach64->eeprom) ? 8 : 0); if (mach64->type == MACH64_GX) - svga->dac_hwcursor.enable = !!(mach64->gen_test_cntl & 0x80); + svga->dac_hwcursor.ena = !!(mach64->gen_test_cntl & 0x80); else - svga->hwcursor.enable = !!(mach64->gen_test_cntl & 0x80); + svga->hwcursor.ena = !!(mach64->gen_test_cntl & 0x80); break; case 0xdc: diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index 842e56320..df8965caf 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -371,14 +371,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Extended Bresenham Write pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; + dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Extended Bresenham Read pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; + dev->data_available2 = 1; return; } } @@ -526,6 +530,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (cpu_input) { mach->force_busy = 0; dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -534,6 +539,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (cpu_input) { mach->force_busy = 0; dev->force_busy = 0; + dev->force_busy2 = 0; } dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -734,6 +740,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if ((mono_src == 1) && !count) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -742,6 +749,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 } else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -951,14 +959,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Non-Conforming BitBLT Write pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; + dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Non-Conforming BitBLT Read pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; + dev->data_available2 = 1; return; } } @@ -977,6 +989,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 mach_log("No DEST.\n"); if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -988,6 +1001,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach->accel.sx_end == mach->accel.sx_start) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } mach_log("No SRC.\n"); @@ -1004,6 +1018,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sy == mach->accel.height) { mach_log("No Blit on DPCONFIG=3251.\n"); dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; dev->fifo_idx = 0; dev->accel.cmd_back = 1; @@ -1213,6 +1228,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sy >= mach->accel.height) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1260,14 +1276,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Direct Linedraw Write pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; + dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Direct Linedraw Read pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; + dev->data_available2 = 1; return; } } @@ -1372,6 +1392,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (!count) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1517,6 +1538,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sx >= mach->accel.width) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1637,6 +1659,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (!count) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1774,6 +1797,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.sx >= mach->accel.width) { if (cpu_input) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; } dev->fifo_idx = 0; @@ -1906,14 +1930,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (mach_pixel_write(mach)) { mach_log("Scan To X Write pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 0; + dev->data_available2 = 0; return; } else if (mach_pixel_read(mach)) { mach_log("Scan To X Read pixtrans.\n"); dev->force_busy = 1; + dev->force_busy2 = 1; mach->force_busy = 1; dev->data_available = 1; + dev->data_available2 = 1; return; } } @@ -2010,6 +2038,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->fifo_idx = 0; dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; dev->accel.cmd_back = 1; dev->accel.cur_x = dev->accel.dx; @@ -2183,6 +2212,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->fifo_idx = 0; dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; dev->accel.cmd_back = 1; return; @@ -2597,7 +2627,7 @@ ati_render_24bpp(svga_t *svga) dev->lastline_draw = dev->displine; if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/ - for (int x = 0; x <= dev->hdisp_8514; x += 4) { + for (int x = 0; x <= dev->h_disp; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); @@ -2613,7 +2643,7 @@ ati_render_24bpp(svga_t *svga) dev->memaddr += 12; } } else { /*RGB, Red-(23:16), Green-(15:8), Blue-(7:0)*/ - for (int x = 0; x <= dev->hdisp_8514; x += 4) { + for (int x = 0; x <= dev->h_disp; x += 4) { dat = *(uint32_t *) (&dev->vram[dev->memaddr & dev->vram_mask]); p[x] = dat & 0xffffff; @@ -2653,12 +2683,12 @@ ati_render_32bpp(svga_t *svga) dev->lastline_draw = dev->displine; if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/ - for (x = 0; x <= dev->hdisp_8514; x++) { + for (x = 0; x <= dev->h_disp; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); *p++ = ((dat & 0x00ff0000) >> 16) | (dat & 0x0000ff00) | ((dat & 0x000000ff) << 16); } } else { /*RGB, Red-(31:24), Green-(23:16), Blue-(15:8)*/ - for (x = 0; x <= dev->hdisp_8514; x++) { + for (x = 0; x <= dev->h_disp; x++) { dat = *(uint32_t *) (&dev->vram[(dev->memaddr + (x << 2)) & dev->vram_mask]); *p++ = ((dat & 0xffffff00) >> 8); } @@ -2677,84 +2707,72 @@ mach_set_resolution(mach_t *mach, svga_t *svga) { ibm8514_t *dev = (ibm8514_t *) svga->dev8514; - dev->htotal_8514 = dev->htotal + 1; + dev->h_total = (dev->htotal + 1); + if (dev->h_total == 8) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ + dev->h_total = 0x9e; - if (dev->htotal_8514 == 8) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/ - dev->htotal_8514 = 0x9e; - dev->hdisp_vga = (dev->hdisped + 1) << 3; + dev->hdisp = (dev->hdisped + 1) << 3; + dev->vdisp = (dev->v_disp + 1) >> 1; + if ((dev->vdisp == 478) || (dev->vdisp == 598) || (dev->vdisp == 766) || (dev->vdisp == 898) || (dev->vdisp == 1022)) + dev->vdisp += 2; - dev->vdisp_vga = (dev->vdisp_8514 + 1) >> 1; - if ((dev->vdisp_vga == 478) || (dev->vdisp_vga == 598) || (dev->vdisp_vga == 766) || (dev->vdisp_vga == 1022)) - dev->vdisp_vga += 2; + dev->v_total = dev->v_total_reg + 1; + if (dev->v_total == 1) + dev->v_total = 0x0669; - dev->vtotal_8514 = dev->vtotal_reg + 1; + dev->v_syncstart = dev->v_sync_start + 1; + if (dev->v_syncstart == 1) + dev->v_syncstart = 0x0601; - dev->vsyncstart++; + mach_log("ATI Mode: set=%02x, dispcntl=%02x, h_total=%d, hdisp=%d, vdisp=%d, v_total=%04x, v_syncstart=%04x, hsync_start=%d, hsync_width=%d, clocksel=%02x, advancedcntl=%02x.\n", mach->shadow_set & 0x03, dev->disp_cntl, dev->h_total, dev->hdisp, dev->vdisp, dev->v_total, dev->v_syncstart, dev->hsync_start, dev->hsync_width, mach->accel.clock_sel & 0xff, dev->accel.advfunc_cntl & 0x05); + if ((dev->disp_cntl >> 5) == 1) { /*Enable the 8514/A subsystem and set modes according to the shadow sets if needed.*/ + switch (mach->shadow_set & 0x03) { + case 0x01: + if (!(dev->accel.advfunc_cntl & 0x04)) { + dev->h_total = 0x64; + dev->hdisp = 640; + dev->vdisp = 480; + dev->v_total = 0x0419; + dev->v_syncstart = 0x03d7; + } + break; + case 0x02: + if (dev->accel.advfunc_cntl & 0x04) { + dev->h_total = 0x9e; + dev->hdisp = 1024; + dev->vdisp = 768; + dev->v_total = 0x0669; + dev->v_syncstart = 0x0601; + } + break; - mach_log("VSYNCSTART=%d, VTOTAL=%d, interlace=%02x, vdisp=%d.\n", dev->vsyncstart, dev->vtotal_8514, dev->interlace, dev->vdisp_vga); - - if (!ATI_MACH32) { - if ((mach->accel.clock_sel & 0x01) && - !(dev->accel.advfunc_cntl & 0x01)) - ret = 2; - else if ((dev->accel.advfunc_cntl & 0x01) && - !(mach->accel.clock_sel & 0x01)) - ret = 1; - else if ((!(dev->accel.advfunc_cntl & 0x01) && (mach->old_on1 & 0x01)) || - (!(mach->accel.clock_sel & 0x01) && (mach->old_on2 & 0x01))) - ret = 0; - } else { - if ((mach->accel.clock_sel & 0x01) && !(mach->old_on2 & 0x01) && - !(dev->accel.advfunc_cntl & 0x01)) - ret = 2; - else if ((dev->accel.advfunc_cntl & 0x01) && !(mach->old_on1 & 0x01) && - !(mach->accel.clock_sel & 0x01)) - ret = 1; - else if ((!(dev->accel.advfunc_cntl & 0x01) && (mach->old_on1 & 0x01)) || - (!(mach->accel.clock_sel & 0x01) && (mach->old_on2 & 0x01))) - ret = 0; - } - - if (ret) { - if (ret == 2) - svga_recalctimings(svga); - else { - switch (mach->shadow_set & 0x03) { - case 0x00: - if (mach->crt_resolution) - svga_recalctimings(svga); - else { - if (dev->accel.advfunc_cntl & 0x04) { - if (dev->hdisp_vga == 640) { - dev->hdisp_vga = 1024; - dev->vdisp_vga = 768; - mach_log("1024x768.\n"); - } - } else { - if (dev->hdisp_vga == 1024) { - dev->hdisp_vga = 640; - dev->vdisp_vga = 480; - mach_log("640x480.\n"); - } - } - svga_recalctimings(svga); - } - break; - case 0x01: - mach->crt_resolution = 0x01; - break; - case 0x02: - mach->crt_resolution = 0x02; - break; - default: - break; + default: + break; + } + svga_recalctimings(svga); + } else if ((dev->disp_cntl >> 5) == 2) { /*Reset 8514/A to defaults if needed.*/ + if (dev->accel.advfunc_cntl & 0x04) { + if (dev->hdisp == 640) { + dev->h_total = 0x9e; + dev->hdisp = 1024; + dev->vdisp = 768; + dev->v_total = 0x0669; + dev->v_syncstart = 0x0601; + svga_recalctimings(svga); + } + } else { + if (dev->hdisp == 1024) { + dev->h_total = 0x64; + dev->hdisp = 640; + dev->vdisp = 480; + dev->v_total = 0x0419; + dev->v_syncstart = 0x03d7; + svga_recalctimings(svga); } } } else /*No change (type 0) or reset type 3.*/ svga_recalctimings(svga); - - mach_log("Shadow set ATI=%x, shadow set 8514/A and on1=%x, on2=%x, resolution h=%d, v=%d, vtotal=%d, vsyncstart=%d, crtres=%d, ret=%d, actual passthrough=%x.\n", mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01, dev->hdisp_vga, dev->vdisp_vga, dev->vtotal_8514, dev->v_syncstart, mach->crt_resolution, ret, dev->on); } void @@ -2775,7 +2793,7 @@ ati8514_recalctimings(svga_t *svga) dev->accel.ge_offset -= mach->accel.crt_offset; mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n", - dev->hdisp_vga, dev->vdisp_vga, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01); + dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01); mach->accel.src_pitch = dev->pitch; mach->accel.dst_pitch = dev->pitch; @@ -2786,11 +2804,11 @@ ati8514_recalctimings(svga_t *svga) mach_log("8514/A ON, pitch=%d, GE offset=%08x.\n", ((mach->accel.ge_pitch & 0xff) << 3), dev->accel.ge_offset); - dev->hdisp_8514 = dev->hdisp_vga; - dev->dispend = dev->vdisp_vga; + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; if (dev->dispend == 600) - dev->hdisp_8514 = 800; - else if (dev->hdisp_8514 == 640) + dev->h_disp = 800; + else if (dev->h_disp == 640) dev->dispend = 480; if (dev->accel.advfunc_cntl & 0x04) @@ -2802,10 +2820,10 @@ ati8514_recalctimings(svga_t *svga) dev->dispend >>= 1; mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n", - dev->accel.advfunc_cntl & 0x04, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset, + dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace); - if (dev->vram_is_512k) { - if (dev->hdisp_8514 == 640) + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) dev->pitch = 640; else dev->pitch = 1024; @@ -2886,7 +2904,7 @@ mach_recalctimings(svga_t *svga) mach->accel.crt_offset <<= 2; } - if (ATI_MACH32 && !dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (ATI_MACH32 && !dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { dev->accel.ge_offset <<= 1; mach->accel.crt_offset <<= 1; } @@ -2895,17 +2913,17 @@ mach_recalctimings(svga_t *svga) mach_log("RowCount=%x, rowoffset=%x, pitch=%d, geoffset=%x, crtoffset=%x.\n", dev->rowcount, dev->rowoffset, dev->pitch, dev->accel.ge_offset, mach->accel.crt_offset); mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x, interlace=%x.\n", - dev->hdisp_vga, dev->vdisp_vga, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, + dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0xfe, dev->interlace); - dev->hdisp_8514 = dev->hdisp_vga; - dev->dispend = dev->vdisp_vga; + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; if (dev->dispend == 959) { /*FIXME: vertical resolution mess on EEPROM tests on Mach8*/ dev->dispend >>= 1; dev->dispend++; } else if (dev->dispend == 600) - dev->hdisp_8514 = 800; - else if (dev->hdisp_8514 == 640) + dev->h_disp = 800; + else if (dev->h_disp == 640) dev->dispend = 480; dev->h_disp_time = dev->hdisp >> 3; @@ -2931,7 +2949,7 @@ mach_recalctimings(svga_t *svga) mach->accel.src_ge_offset <<= 2; mach->accel.dst_ge_offset <<= 2; } - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { mach->accel.src_ge_offset <<= 1; mach->accel.dst_ge_offset <<= 1; } @@ -2950,7 +2968,7 @@ mach_recalctimings(svga_t *svga) else mach->accel.dst_ge_offset <<= 2; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) mach->accel.dst_ge_offset <<= 1; mach->accel.dst_ge_offset -= mach->accel.crt_offset; @@ -2965,7 +2983,7 @@ mach_recalctimings(svga_t *svga) else mach->accel.src_ge_offset <<= 2; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) mach->accel.src_ge_offset <<= 1; mach->accel.src_ge_offset -= mach->accel.crt_offset; @@ -2976,19 +2994,19 @@ mach_recalctimings(svga_t *svga) break; } mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n", - dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset, + dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace, svga->hdisp); mach_log("EXTGECONFIG bits 11-15=%04x.\n", mach->accel.ext_ge_config & 0x8800); if ((mach->accel.ext_ge_config & 0x800) || (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800))) { mach_log("hv=%d,%d, pitch=%d, rowoffset=%d, gextconfig=%03x, bpp=%d, shadow=%x, vgahdisp=%d.\n", - dev->hdisp_8514, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0, + dev->h_disp, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0, dev->accel_bpp, mach->shadow_set & 0x03, svga->hdisp); switch (dev->accel_bpp) { case 8: if ((mach->accel.ext_ge_config & 0x30) == 0x00) { - if (dev->vram_is_512k) { - if (dev->hdisp_8514 == 640) + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) dev->pitch = 640; else dev->pitch = 1024; @@ -3026,10 +3044,10 @@ mach_recalctimings(svga_t *svga) mach->accel.dst_ge_offset -= mach->accel.crt_offset; mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n", - dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->hdisp_8514, dev->dispend, dev->pitch, dev->rowoffset, + dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 0x03, dev->interlace, svga->hdisp); - if (dev->vram_is_512k) { - if (dev->hdisp_8514 == 640) + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) dev->pitch = 640; else dev->pitch = 1024; @@ -3171,15 +3189,15 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10) && val) { - dev->vtotal_reg = val; - dev->vtotal_reg &= 0x1fff; + dev->v_total_reg = val; + dev->v_total_reg &= 0x1fff; } } } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10)) { - WRITE8(port, dev->vtotal_reg, val); - dev->vtotal_reg &= 0x1fff; + WRITE8(port, dev->v_total_reg, val); + dev->v_total_reg &= 0x1fff; } } } @@ -3191,8 +3209,8 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { if (!(mach->shadow_cntl & 0x10)) { /*For 8514/A mode, take the shadow sets into account.*/ - WRITE8(port, dev->vtotal_reg, val >> 8); - dev->vtotal_reg &= 0x1fff; + WRITE8(port, dev->v_total_reg, val >> 8); + dev->v_total_reg &= 0x1fff; } } mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val); @@ -3204,17 +3222,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20) && val) { - dev->vdisp_8514 = val; - dev->vdisp_8514 &= 0x1fff; + dev->v_disp = val; + dev->v_disp &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->vdisp_8514); + mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20)) { - WRITE8(port, dev->vdisp_8514, val); - dev->vdisp_8514 &= 0x1fff; + WRITE8(port, dev->v_disp, val); + dev->v_disp &= 0x1fff; } } } @@ -3224,11 +3242,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x20)) { - WRITE8(port, dev->vdisp_8514, val >> 8); - dev->vdisp_8514 &= 0x1fff; + WRITE8(port, dev->v_disp, val >> 8); + dev->v_disp &= 0x1fff; } } - mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->vdisp_8514); + mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); } svga_recalctimings(svga); @@ -3238,17 +3256,17 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10) && val) { - dev->vsyncstart = val; - dev->vsyncstart &= 0x1fff; + dev->v_sync_start = val; + dev->v_sync_start &= 0x1fff; } } - mach_log("ATI 8514/A: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); + mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val); } else { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10)) { - WRITE8(port, dev->vsyncstart, val); - dev->vsyncstart &= 0x1fff; + WRITE8(port, dev->v_sync_start, val); + dev->v_sync_start &= 0x1fff; } } } @@ -3258,11 +3276,11 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 1) { if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/ if (!(mach->shadow_cntl & 0x10)) { - WRITE8(port, dev->vsyncstart, val >> 8); - dev->vsyncstart &= 0x1fff; + WRITE8(port, dev->v_sync_start, val >> 8); + dev->v_sync_start &= 0x1fff; } } - mach_log("ATI 8514/A: VSYNCSTART write 1AE8 = %d\n", dev->vsyncstart); + mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val); } svga_recalctimings(svga); @@ -3294,6 +3312,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if ((dev->subsys_cntl & 0xc000) == 0x8000) { mach->force_busy = 0; dev->force_busy = 0; + dev->force_busy2 = 0; } break; @@ -3319,7 +3338,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->mode = IBM_MODE; mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, valxor=%x, shadow crt=%x, hdisp=%d, vdisp=%d, extmode=%02x, accelbpp=%d, crt=%d, crtres=%d.\n", - CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp_vga, dev->vdisp_vga, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution); + CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution); if (ATI_MACH32) { mach_set_resolution(mach, svga); @@ -3502,7 +3521,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u } } } - mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy); + mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy2); break; case 0xaae8: @@ -3565,7 +3584,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u } mach->cursor_offset_lo = mach->cursor_offset_lo_reg; dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2); - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) dev->hwcursor.addr <<= 1; break; @@ -3575,10 +3594,10 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u if (len == 2) { WRITE8(port + 1, mach->cursor_offset_hi_reg, val >> 8); } - dev->hwcursor.enable = !!(mach->cursor_offset_hi_reg & 0x8000); + dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000); mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f; dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2); - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) dev->hwcursor.addr <<= 1; break; @@ -3764,7 +3783,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->mode = ATI_MODE; mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, val=%04x, xor=%d, hdisp=%d, vdisp=%d, accelbpp=%d.\n", - CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp_vga, dev->vdisp_vga, dev->accel_bpp); + CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp, dev->vdisp, dev->accel_bpp); mach_log("Vendor ATI mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); @@ -3976,6 +3995,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach->accel.bres_count = val & 0x7ff; mach_log("BresenhamDraw=%04x.\n", mach->accel.dp_config); dev->data_available = 0; + dev->data_available2 = 0; mach->accel.cmd_type = 1; frgd_sel = (mach->accel.dp_config >> 13) & 7; bkgd_sel = (mach->accel.dp_config >> 7) & 3; @@ -4028,6 +4048,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach->accel.dest_y_end = 0; } dev->data_available = 0; + dev->data_available2 = 0; mach_log("BitBLT=%04x, pattidx=%d.\n", mach->accel.dp_config, mach->accel.patt_idx); mach_log(".\n"); mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ @@ -4090,6 +4111,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach->accel.scan_to_x = 0; } dev->data_available = 0; + dev->data_available2 = 0; mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ mach_log("ScanToX len=%d.\n", val); mach_log(".\n"); @@ -4111,6 +4133,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u mach_log("Data Path Configuration (%04x) write val=%04x, len=%d.\n", port, val, len); if (len == 2) { dev->data_available = 0; + dev->data_available2 = 0; mach->accel.dp_config = val; } break; @@ -4348,26 +4371,26 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in if (len == 1) { dev->fifo_idx = 0; - if (dev->force_busy) + if (dev->force_busy2) temp |= 0x02; /*Hardware busy*/ - dev->force_busy = 0; + dev->force_busy2 = 0; - if (dev->data_available) { + if (dev->data_available2) { temp |= 0x01; /*Read Data available*/ if (mach->accel.cmd_type >= 0) { switch (mach->accel.cmd_type) { case 2: if (dev->accel.sy >= mach->accel.height) - dev->data_available = 0; + dev->data_available2 = 0; break; case 5: if (dev->accel.sx >= mach->accel.width) - dev->data_available = 0; + dev->data_available2 = 0; break; default: if (dev->accel.sy < 0) - dev->data_available = 0; + dev->data_available2 = 0; break; } } else { @@ -4377,11 +4400,11 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 4: case 6: if (dev->accel.sy < 0) - dev->data_available = 0; + dev->data_available2 = 0; break; default: if (!dev->accel.sy) - dev->data_available = 0; + dev->data_available2 = 0; break; } } @@ -4572,35 +4595,35 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 0xc2ee: if (len == 2) - temp = dev->vtotal_reg; + temp = dev->v_total_reg; else - temp = dev->vtotal_reg & 0xff; + temp = dev->v_total_reg & 0xff; break; case 0xc2ef: if (len == 1) - temp = dev->vtotal_reg >> 8; + temp = dev->v_total_reg >> 8; break; case 0xc6ee: if (len == 2) - temp = dev->vdisp_8514; + temp = dev->v_disp; else - temp = dev->vdisp_8514 & 0xff; + temp = dev->v_disp & 0xff; break; case 0xc6ef: if (len == 1) - temp = dev->vdisp_8514 >> 8; + temp = dev->v_disp >> 8; break; case 0xcaee: if (len == 2) - temp = dev->vsyncstart; + temp = dev->v_sync_start; else - temp = dev->vsyncstart & 0xff; + temp = dev->v_sync_start & 0xff; break; case 0xcaef: if (len == 1) - temp = dev->vsyncstart >> 8; + temp = dev->v_sync_start >> 8; break; case 0xceee: @@ -4764,12 +4787,14 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) if (!dev->fifo_idx && !dev->on) { dev->force_busy = 0; + dev->force_busy2 = 0; mach->force_busy = 0; dev->data_available = 0; + dev->data_available2 = 0; temp |= INT_FIFO_EMP; mach_log("Fifo Empty.\n"); } - temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80)); + temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80)); if (mach->accel.ext_ge_config & 0x08) temp |= ((mach->accel.ext_ge_config & 0x07) << 4); else @@ -5199,19 +5224,19 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t ibm8514_t *dev = (ibm8514_t *) svga->dev8514; int writemask2 = svga->writemask; int reset_wm = 0; - ibm8514_latch_t vall; + latch8514_t vall; uint8_t wm = svga->writemask; uint8_t i; cycles -= svga->monitor->mon_video_timing_write_b; if (linear) { - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { switch (addr & 0x06) { case 0x00: case 0x06: @@ -5362,7 +5387,7 @@ mach32_write(uint32_t addr, uint8_t val, void *priv) return; } - if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; switch (addr & 0x06) { case 0x00: @@ -5402,7 +5427,7 @@ mach32_writew(uint32_t addr, uint16_t val, void *priv) return; } - if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; if (addr & 0x04) { mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga); @@ -5437,7 +5462,7 @@ mach32_writel(uint32_t addr, uint32_t val, void *priv) return; } - if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; mach32_write_common(addr, val & 0x0f, 0, mach, svga); mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga); @@ -5680,12 +5705,12 @@ mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach) ibm8514_t *dev = (ibm8514_t *) svga->dev8514; cycles -= svga->monitor->mon_video_timing_write_w; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { if (addr & 0x04) { dev->vram[addr - 2] = val & 0x0f; dev->vram[addr - 1] = (val >> 4) & 0x0f; @@ -5709,12 +5734,12 @@ mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach) cycles -= svga->monitor->mon_video_timing_write_l; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { dev->vram[addr] = val & 0x0f; dev->vram[addr + 1] = (val >> 4) & 0x0f; dev->vram[addr + 4] = (val >> 8) & 0x0f; @@ -5740,11 +5765,11 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) cycles -= svga->monitor->mon_video_timing_read_b; if (linear) { - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) addr <<= 1; addr &= dev->vram_mask; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { switch ((addr & 0x06) >> 1) { case 0x00: case 0x03: @@ -5854,7 +5879,7 @@ mach32_read(uint32_t addr, void *priv) (void) xga_read_test(addr, svga); addr = (addr & svga->banked_mask) + svga->read_bank; - if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; switch ((addr & 0x06) >> 1) { case 0x00: @@ -5891,7 +5916,7 @@ mach32_readw(uint32_t addr, void *priv) (void) xga_read_test(addr, svga); addr = (addr & svga->banked_mask) + svga->read_bank; - if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; if (addr & 0x04) { ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f; @@ -5923,7 +5948,7 @@ mach32_readl(uint32_t addr, void *priv) (void) xga_read_test(addr, svga); addr = (addr & svga->banked_mask) + svga->read_bank; - if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; ret = mach32_read_common(addr, 0, mach, svga) & 0x0f; ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4); @@ -5951,7 +5976,7 @@ mach32_readw_linear(uint32_t addr, mach_t *mach) uint16_t ret; cycles -= svga->monitor->mon_video_timing_read_w; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; addr &= dev->vram_mask; if (addr & 0x04) { @@ -5979,7 +6004,7 @@ mach32_readl_linear(uint32_t addr, mach_t *mach) uint32_t ret; cycles -= svga->monitor->mon_video_timing_read_l; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { addr <<= 1; addr &= dev->vram_mask; ret = dev->vram[addr] & 0x0f; @@ -6276,7 +6301,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine) int shift = 0; offset = dev->hwcursor_latch.x - dev->hwcursor_latch.xoff; - if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) shift = 1; mach_log("BPP=%d, displine=%d.\n", dev->accel_bpp, displine); @@ -7014,6 +7039,7 @@ mach_reset(void *priv) mach_disable_handlers(mach); mach->force_busy = 0; dev->force_busy = 0; + dev->force_busy2 = 0; if (mach->pci_bus) reset_state->pci_slot = mach->pci_slot; @@ -7044,7 +7070,7 @@ mach8_init(const device_t *info) mach->has_bios = !(info->local & 0xff00); mach->ramdac_type = mach->pci_bus ? device_get_config_int("ramdac") : ATI_68875; dev->vram_amount = device_get_config_int("memory"); - dev->vram_is_512k = dev->vram_amount == 512; + dev->vram_512k_8514 = dev->vram_amount == 512; if (ATI_MACH32) { if (mach->pci_bus) { @@ -7223,10 +7249,10 @@ ati8514_init(svga_t *svga, void *ext8514, void *dev8514) dev->accel_bpp = 8; dev->rowoffset = 0x80; dev->hdisped = 0x7f; - dev->vdisp_8514 = 0x05ff; + dev->v_disp = 0x05ff; dev->htotal = 0x9d; - dev->vtotal_reg = 0x0668; - dev->vsyncstart = 0x0600; + dev->v_total_reg = 0x0668; + dev->v_sync_start = 0x0600; dev->disp_cntl = 0x33; mach->accel.clock_sel = 0x1c; dev->accel.cmd_back = 1; diff --git a/src/video/vid_chips_69000.c b/src/video/vid_chips_69000.c index c63886b04..70b2b9e16 100644 --- a/src/video/vid_chips_69000.c +++ b/src/video/vid_chips_69000.c @@ -1906,7 +1906,7 @@ chips_69000_write_ext_reg(chips_69000_t* chips, uint8_t val) break; case 0xA0: chips->ext_regs[chips->ext_index] = val; - chips->svga.hwcursor.enable = ((val & 7) == 0b101) || ((val & 7) == 0b1); + chips->svga.hwcursor.ena = ((val & 7) == 0b101) || ((val & 7) == 0b1); chips->svga.hwcursor.cur_xsize = chips->svga.hwcursor.cur_ysize = ((val & 7) == 0b1) ? 32 : 64; break; case 0xA2: diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index ddaccd49f..fff344f3a 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -814,7 +814,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv) else svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; svga_recalctimings(svga); - svga->hwcursor.enable = val & CIRRUS_CURSOR_SHOW; + svga->hwcursor.ena = val & CIRRUS_CURSOR_SHOW; if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) && @@ -1245,7 +1245,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv) break; case 0x3e: gd54xx->overlay.mode = (val >> 1) & 7; - svga->overlay.enable = (val & 1) != 0; + svga->overlay.ena = (val & 1) != 0; gd54xx_update_overlay(gd54xx); break; diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index b928a5293..21671f4b3 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -665,6 +665,7 @@ ega_recalctimings(ega_t *ega) ega->hdisp *= (ega->seqregs[1] & 8) ? 16 : 8; ega->render = ega_render_graphics; } + ega->hdisp_old = ega->hdisp; } if (ega->chipset) { @@ -842,6 +843,7 @@ ega_poll(void *priv) ega->linepos = 1; if (ega->dispon) { + ega->hdisp_on = 1; ega->memaddr &= ega->vrammask; if (ega->firstline == 2000) { @@ -897,6 +899,7 @@ ega_poll(void *priv) if (ega->dispon) ega->status &= ~1; + ega->hdisp_on = 0; ega->linepos = 0; if ((ega->scanline == (ega->crtc[11] & 31)) || (ega->scanline == ega->rowcount)) @@ -1538,8 +1541,10 @@ ega_init(ega_t *ega, int monitor_type, int is_mono) old_overscan_color = 0; ega->miscout |= 0x22; + ega->oddeven_page = 0; ega->seqregs[4] |= 2; + ega->extvram = 1; update_overscan = 0; diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index 27f33a834..2e9a7796a 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -277,7 +277,7 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv) et4000->regs[et4000->index] = val; svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8); svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8); - svga->hwcursor.enable = !!(et4000->regs[0xF7] & 0x80); + svga->hwcursor.ena = !!(et4000->regs[0xF7] & 0x80); svga->hwcursor.xoff = et4000->regs[0xE2]; svga->hwcursor.yoff = et4000->regs[0xE6]; svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || ((et4000->type == ET4000W32) && (et4000->regs[0xe2] >= 0x1f) && (et4000->regs[0xe6] >= 0x1f))) ? 128 : 64; diff --git a/src/video/vid_ht216.c b/src/video/vid_ht216.c index 061b70246..3089ae26d 100644 --- a/src/video/vid_ht216.c +++ b/src/video/vid_ht216.c @@ -299,7 +299,7 @@ ht216_out(uint16_t addr, uint8_t val, void *priv) break; case 0xa5: - svga->hwcursor.enable = !!(val & 0x80); + svga->hwcursor.ena = !!(val & 0x80); break; case 0xc0: diff --git a/src/video/vid_mga.c b/src/video/vid_mga.c index e5ac55648..294e6ce75 100644 --- a/src/video/vid_mga.c +++ b/src/video/vid_mga.c @@ -474,6 +474,8 @@ typedef struct mystique_t { atomic_uint status; atomic_bool softrap_status_read; + uint64_t blitter_time, status_time; + pc_timer_t softrap_pending_timer, wake_timer; fifo_entry_t fifo[FIFO_SIZE]; @@ -1380,7 +1382,7 @@ mystique_write_xreg(mystique_t *mystique, int reg, uint8_t val) case XREG_XCURCTRL: mystique->xcurctrl = val; - svga->hwcursor.enable = (val & 3) ? 1 : 0; + svga->hwcursor.ena = (val & 3) ? 1 : 0; break; case XREG_XCURCOL0R: @@ -6046,6 +6048,8 @@ static void mystique_start_blit(mystique_t *mystique) { svga_t *svga = &mystique->svga; + uint64_t start_time = plat_timer_read(); + uint64_t end_time; /*Make sure we don't get any artifacts.*/ svga->chain2_write = 0; @@ -6115,6 +6119,9 @@ mystique_start_blit(mystique_t *mystique) fatal("mystique_start_blit: unknown blit %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK); break; } + + end_time = plat_timer_read(); + mystique->blitter_time += end_time - start_time; } static void diff --git a/src/video/vid_ps55da2.c b/src/video/vid_ps55da2.c index 29eefabbf..938e4bf6b 100644 --- a/src/video/vid_ps55da2.c +++ b/src/video/vid_ps55da2.c @@ -356,6 +356,7 @@ typedef struct da2_t { uint64_t da2const; int dispon; + int hdisp_on; uint32_t memaddr, memaddr_backup, cursoraddr; int vc; @@ -3019,6 +3020,7 @@ da2_poll(void *priv) da2->linepos = 1; if (da2->dispon) { + da2->hdisp_on = 1; da2->memaddr &= da2->vram_display_mask; if (da2->firstline == 2000) { @@ -3050,6 +3052,7 @@ da2_poll(void *priv) if (da2->dispon) da2->cgastat &= ~1; + da2->hdisp_on = 0; da2->linepos = 0; if (da2->scanline == (da2->crtc[LC_CURSOR_ROW_END] & 31)) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 4f890dcdf..d0495dca0 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -375,6 +375,8 @@ typedef struct s3_t { event_t *fifo_not_full_event; atomic_int blitter_busy; + uint64_t blitter_time; + uint64_t status_time; uint8_t subsys_cntl, subsys_stat; @@ -3037,7 +3039,7 @@ s3_out(uint16_t addr, uint8_t val, void *priv) case 0x45: if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968)) break; - svga->hwcursor.enable = val & 1; + svga->hwcursor.ena = val & 1; break; case 0x46: case 0x47: @@ -4442,13 +4444,13 @@ s3_trio64v_recalctimings(svga_t *svga) else svga->overlay.addr = s3->streams.sec_fb0; - svga->overlay.enable = (svga->overlay.x >= 0); + svga->overlay.ena = (svga->overlay.x >= 0); svga->overlay.h_acc = s3->streams.dda_horiz_accumulator; svga->overlay.v_acc = s3->streams.dda_vert_accumulator; svga->rowoffset = s3->streams.pri_stride >> 3; - if (svga->overlay.enable) { - svga->overlay.enable = (((s3->streams.blend_ctrl >> 24) & 7) == 0b000) || + if (svga->overlay.ena) { + svga->overlay.ena = (((s3->streams.blend_ctrl >> 24) & 7) == 0b000) || (((s3->streams.blend_ctrl >> 24) & 7) == 0b101); } switch ((s3->streams.pri_ctrl >> 24) & 0x7) { @@ -9696,6 +9698,8 @@ static void fifo_thread(void *param) { s3_t *s3 = (s3_t *) param; + uint64_t start_time; + uint64_t end_time; while (s3->fifo_thread_run) { thread_set_event(s3->fifo_not_full_event); @@ -9703,6 +9707,7 @@ fifo_thread(void *param) thread_reset_event(s3->wake_fifo_thread); s3->blitter_busy = 1; while (!FIFO_EMPTY) { + start_time = plat_timer_read(); fifo_entry_t *fifo = &s3->fifo[s3->fifo_read_idx & FIFO_MASK]; switch (fifo->addr_type & FIFO_TYPE) { @@ -9734,6 +9739,9 @@ fifo_thread(void *param) if (FIFO_ENTRIES > 0xe000) thread_set_event(s3->fifo_not_full_event); + + end_time = plat_timer_read(); + s3->blitter_time += (end_time - start_time); } s3->blitter_busy = 0; s3->subsys_stat |= INT_FIFO_EMP; diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 1258b549a..774b0d4b7 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -585,7 +585,7 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv) break; case 0x45: - svga->hwcursor.enable = val & 1; + svga->hwcursor.ena = val & 1; break; case 0x46: case 0x47: @@ -966,19 +966,19 @@ s3_virge_recalctimings(svga_t *svga) else svga->overlay.addr = virge->streams.sec_fb0; - svga->overlay.enable = (svga->overlay.x >= 0); + svga->overlay.ena = (svga->overlay.x >= 0); svga->overlay.h_acc = virge->streams.dda_horiz_accumulator; svga->overlay.v_acc = virge->streams.dda_vert_accumulator; if (virge->chip < S3_VIRGEGX2) svga->rowoffset = virge->streams.pri_stride >> 3; - if (virge->chip <= S3_VIRGEDX && svga->overlay.enable) { - svga->overlay.enable = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101); - } else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.enable) { + if (virge->chip <= S3_VIRGEDX && svga->overlay.ena) { + svga->overlay.ena = (((virge->streams.blend_ctrl >> 24) & 7) == 0b000) || (((virge->streams.blend_ctrl >> 24) & 7) == 0b101); + } else if (virge->chip >= S3_VIRGEGX2 && svga->overlay.ena) { /* 0x20 = Secondary Stream enabled */ /* 0x2000 = Primary Stream enabled */ - svga->overlay.enable = !!(virge->streams.blend_ctrl & 0x20); + svga->overlay.ena = !!(virge->streams.blend_ctrl & 0x20); } if (virge->chip >= S3_VIRGEGX2) { diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 2ba2863b7..8ed71645e 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -984,6 +984,61 @@ svga_recalctimings(svga_t *svga) } } +#if TBD + if (ibm8514_active && (svga->dev8514 != NULL)) { + if (dev->on) { + uint32_t _8514_dot = dev->h_sync_start; + uint32_t _8514_adj_dot = dev->h_sync_start; + uint32_t _8514_eff_mask = (dev->h_blank_end_val & ~0x0000001f) ? dev->h_blank_end_mask : 0x0000001f; + dev->h_blank_sub = 0; + + mach_log("8514/A: HDISP=%d, HDISPED=%d, Blank: %04i-%04i, Total: %04i, " + "Mask: %02X, ADJ_DOT=%04i.\n", dev->hdisp, (dev->hdisped + 1) << 3, + dev->h_sync_start, dev->h_blank_end_val, + dev->h_total, _8514_eff_mask, _8514_adj_dot); + + while (_8514_adj_dot < (dev->h_total << 1)) { + if (_8514_dot == dev->h_total) + _8514_dot = 0; + + if (_8514_adj_dot >= dev->h_total) + dev->h_blank_sub++; + + mach_log("8514/A: Loop: adjdot=%d, htotal=%d, dotmask=%02x, " + "hblankendvalmask=%02x, blankendval=%02x.\n", adj_dot, + dev->h_total, _8514_dot & _8514_eff_mask, dev->h_blank_end_val & _8514_eff_mask, + dev->h_blank_end_val); + if ((_8514_dot & _8514_eff_mask) == (dev->h_blank_end_val & _8514_eff_mask)) + break; + + _8514_dot++; + _8514_adj_dot++; + } + + uint32_t _8514_hd = dev->hdisp; + dev->hdisp -= dev->h_blank_sub; + + svga->left_overscan = svga->x_add = (dev->h_total - _8514_adj_dot - 1) << 3; + svga->monitor->mon_overscan_x = svga->x_add + (dev->h_sync_start << 3) - _8514_hd + 8; + svga->monitor->mon_overscan_x++; + + if ((dev->hdisp >= 2048) || (svga->left_overscan < 0)) { + svga->left_overscan = svga->x_add = 0; + svga->monitor->mon_overscan_x = 0; + } + + /* - 1 because + 1 but also - 2 to compensate for the + 2 added to vtotal above. */ + svga->y_add = svga->vtotal - svga->vblankend - 1; + svga->monitor->mon_overscan_y = svga->y_add + abs(svga->vblankstart - svga->dispend); + + if ((dev->dispend >= 2048) || (svga->y_add < 0)) { + svga->y_add = 0; + svga->monitor->mon_overscan_y = 0; + } + } + } +#endif + if (svga->vblankstart < svga->dispend) { svga_log("DISPEND > VBLANKSTART.\n"); svga->dispend = svga->vblankstart; @@ -1038,16 +1093,16 @@ svga_recalctimings(svga_t *svga) if (ibm8514_active && (svga->dev8514 != NULL)) { if (dev->on) { - disptime8514 = dev->htotal_8514; - _dispontime8514 = dev->hdisp_8514; - svga_log("HTOTAL=%d, HDISP=%d.\n", dev->htotal_8514, dev->hdisp_8514); + disptime8514 = dev->h_total; + _dispontime8514 = dev->h_disp_time; + svga_log("HTOTAL=%d, HDISP=%d.\n", dev->h_total, dev->h_disp); } } if (xga_active && (svga->xga != NULL)) { if (xga->on) { - disptime_xga = xga->htotal_xga ? xga->htotal_xga : TIMER_USEC; - _dispontime_xga = xga->hdisp_xga; + disptime_xga = xga->h_total ? xga->h_total : TIMER_USEC; + _dispontime_xga = xga->h_disp; } } @@ -1253,32 +1308,32 @@ svga_poll(void *priv) svga_log("SVGA Poll.\n"); if (!svga->linepos) { - if (svga->displine == ((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) && svga->hwcursor_latch.enable) { + if (svga->displine == ((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) && svga->hwcursor_latch.ena) { svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - svga->hwcursor_latch.yoff; svga->hwcursor_oddeven = 0; } - if (svga->displine == (((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) + 1) && svga->hwcursor_latch.enable && svga->interlace) { + if (svga->displine == (((svga->hwcursor_latch.y < 0) ? 0 : svga->hwcursor_latch.y) + 1) && svga->hwcursor_latch.ena && svga->interlace) { svga->hwcursor_on = svga->hwcursor_latch.cur_ysize - (svga->hwcursor_latch.yoff + 1); svga->hwcursor_oddeven = 1; } - if (svga->displine == ((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) && svga->dac_hwcursor_latch.enable) { + if (svga->displine == ((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) && svga->dac_hwcursor_latch.ena) { svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - svga->dac_hwcursor_latch.yoff; svga->dac_hwcursor_oddeven = 0; } - if (svga->displine == (((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) + 1) && svga->dac_hwcursor_latch.enable && svga->interlace) { + if (svga->displine == (((svga->dac_hwcursor_latch.y < 0) ? 0 : svga->dac_hwcursor_latch.y) + 1) && svga->dac_hwcursor_latch.ena && svga->interlace) { svga->dac_hwcursor_on = svga->dac_hwcursor_latch.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1); svga->dac_hwcursor_oddeven = 1; } - if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.enable) { + if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.ena) { svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; svga->overlay_oddeven = 0; } - if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.enable && svga->interlace) { + if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.ena && svga->interlace) { svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; svga->overlay_oddeven = 1; } @@ -1288,6 +1343,7 @@ svga_poll(void *priv) svga->linepos = 1; if (svga->dispon) { + svga->hdisp_on = 1; svga->memaddr &= svga->vram_display_mask; if (svga->firstline == 2000) { @@ -1334,6 +1390,7 @@ svga_poll(void *priv) if (svga->dispon) svga->cgastat &= ~1; + svga->hdisp_on = 0; svga->linepos = 0; if ((svga->scanline == (svga->crtc[11] & 31)) || (svga->scanline == svga->rowcount)) diff --git a/src/video/vid_tgui9440.c b/src/video/vid_tgui9440.c index c0ba06a07..5cc3a8a78 100644 --- a/src/video/vid_tgui9440.c +++ b/src/video/vid_tgui9440.c @@ -530,7 +530,7 @@ tgui_out(uint16_t addr, uint8_t val, void *priv) case 0x50: if (tgui->type >= TGUI_9440) { - svga->hwcursor.enable = !!(val & 0x80); + svga->hwcursor.ena = !!(val & 0x80); svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & 1) ? 64 : 32); } break; diff --git a/src/video/vid_voodoo_banshee.c b/src/video/vid_voodoo_banshee.c index 12cccdccb..4bcf8a479 100644 --- a/src/video/vid_voodoo_banshee.c +++ b/src/video/vid_voodoo_banshee.c @@ -679,7 +679,7 @@ banshee_recalctimings(svga_t *svga) svga->interlace = !!(banshee->vidProcCfg & VIDPROCCFG_INTERLACE); - svga->overlay.enable = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE; + svga->overlay.ena = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE; svga->overlay.x = voodoo->overlay.start_x; svga->overlay.y = voodoo->overlay.start_y; @@ -689,8 +689,8 @@ banshee_recalctimings(svga_t *svga) if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) svga->overlay.pitch *= 128 * 32; if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0) - svga->overlay.enable = 0; - if (svga->overlay.enable) { + svga->overlay.ena = 0; + if (svga->overlay.ena) { #if 0 banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", voodoo->overlay.start_x, voodoo->overlay.start_y, @@ -894,7 +894,7 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *priv) banshee_log("vidProcCfg=%08x\n", val); #endif banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT; - svga->hwcursor.enable = val & VIDPROCCFG_HWCURSOR_ENA; + svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA; svga->fullchange = changeframecount; svga->lut_map = !(val & VIDPROCCFG_DESKTOP_CLUT_BYPASS) && (svga->bpp < 24); svga_recalctimings(svga); diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index f7a1464e5..8f4dc0d0e 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -257,9 +257,9 @@ xga_render_blank(svga_t *svga) xga->lastline_draw = xga->displine; uint32_t *line_ptr = &svga->monitor->target_buffer->line[xga->displine + svga->y_add][svga->x_add]; - uint32_t line_width = (uint32_t)(xga->hdisp_xga) * sizeof(uint32_t); + uint32_t line_width = (uint32_t)(xga->h_disp) * sizeof(uint32_t); - if (xga->hdisp_xga > 0) + if (xga->h_disp > 0) memset(line_ptr, 0, line_width); } @@ -268,14 +268,14 @@ xga_recalctimings(svga_t *svga) { xga_t *xga = (xga_t *) svga->xga; if (xga->on) { - xga->htotal_xga = xga->htotal + 1; - xga->vtotal_xga = xga->vtotal + 1; + xga->h_total = xga->htotal + 1; + xga->v_total = xga->vtotal + 1; xga->dispend = xga->vdispend + 1; - xga->vsyncstart++; + xga->v_syncstart = xga->vsyncstart + 1; xga->split = xga->linecmp + 1; - xga->vblankstart_xga = xga->vblankstart + 1; + xga->v_blankstart = xga->vblankstart + 1; - xga->hdisp_xga = (xga->hdisp + 1) << 3; + xga->h_disp = (xga->hdisp + 1) << 3; xga->rowoffset = xga->pix_map_width; @@ -283,11 +283,11 @@ xga_recalctimings(svga_t *svga) xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; if (xga->interlace) { - xga->vtotal_xga >>= 1; + xga->v_total >>= 1; xga->dispend >>= 1; - xga->vsyncstart >>= 1; + xga->v_syncstart >>= 1; xga->split >>= 1; - xga->vblankstart_xga >>= 1; + xga->v_blankstart >>= 1; } xga->memaddr_latch = xga->disp_start_addr; @@ -296,14 +296,14 @@ xga_recalctimings(svga_t *svga) xga_log("XGA ClkSel1 = %d, ClkSel2 = %02x, dispcntl2=%02x.\n", (xga->clk_sel_1 >> 2) & 3, xga->clk_sel_2 & 0x80, xga->disp_cntl_2 & 0xc0); switch ((xga->clk_sel_1 >> 2) & 3) { case 0: - xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->hdisp_xga); + xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp); if (xga->clk_sel_2 & 0x80) svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 41539000.0; else svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 25175000.0; break; case 1: - xga_log("HDISP VGA1 = %d, XGA = %d.\n", svga->hdisp, xga->hdisp_xga); + xga_log("HDISP VGA1 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp); svga->clock_xga = (cpuclock * (double) (1ULL << 32)) / 28322000.0; break; case 3: @@ -424,7 +424,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x36: xga->hwc_control = val; - xga->hwcursor.enable = xga->hwc_control & 1; + xga->hwcursor.ena = xga->hwc_control & 1; break; case 0x38: @@ -1555,7 +1555,7 @@ xga_bitblt(svga_t *svga) if (srcheight == 7) xga->accel.pattern = 1; else { - if ((dstwidth == (xga->hdisp_xga - 1)) && (srcwidth == 1)) { + if ((dstwidth == (xga->h_disp - 1)) && (srcwidth == 1)) { if ((xga->accel.dst_map == 1) && (xga->accel.src_map == 2)) { if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px_map_format[xga->accel.src_map] >= 0x0a)) xga->accel.pattern = 1; @@ -1640,8 +1640,8 @@ xga_bitblt(svga_t *svga) else if ((xga->accel.src_map == 1) && (patwidth == 7)) xga->accel.pattern = 1; } else { - if (dstwidth == (xga->hdisp_xga - 1)) { - if (srcwidth == (xga->hdisp_xga - 1)) { + if (dstwidth == (xga->h_disp - 1)) { + if (srcwidth == (xga->h_disp - 1)) { if ((xga->accel.src_map == 1) && (xga->accel.dst_map == 1) && (xga->accel.pat_src == 2)) { if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px <= 7) && (xga->accel.py <= 3)) xga->accel.pattern = 1; @@ -2591,7 +2591,7 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga) if ((xga->displine + svga->y_add) < 0) return; - if (svga->scrblank || (xga->hdisp_xga == 0)) + if (svga->scrblank || (xga->h_disp == 0)) return; uint32_t *line_ptr = buffer32->line[xga->displine + svga->y_add]; @@ -2607,10 +2607,10 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga) if ((xga->displine + svga->y_add) < 0) return; - if (svga->scrblank || (xga->hdisp_xga == 0)) + if (svga->scrblank || (xga->h_disp == 0)) return; - uint32_t *line_ptr = &buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->hdisp_xga]; + uint32_t *line_ptr = &buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp]; right = (overscan_x >> 1); for (int i = 0; i < right; i++) *line_ptr++ = svga->overscan_color; @@ -2634,7 +2634,7 @@ xga_render_4bpp(svga_t *svga) xga->lastline_draw = xga->displine; - for (int x = 0; x <= xga->hdisp_xga; x += 8) { + for (int x = 0; x <= xga->h_disp; x += 8) { dat = *(uint32_t *) (&xga->vram[xga->memaddr & xga->vram_mask]); p[0] = xga->pallook[dat & 0x0f]; p[1] = xga->pallook[(dat >> 8) & 0x0f]; @@ -2671,7 +2671,7 @@ xga_render_8bpp(svga_t *svga) xga->firstline_draw = xga->displine; xga->lastline_draw = xga->displine; - for (int x = 0; x <= xga->hdisp_xga; x += 8) { + for (int x = 0; x <= xga->h_disp; x += 8) { dat = *(uint32_t *) (&xga->vram[xga->memaddr & xga->vram_mask]); p[0] = xga->pallook[dat & 0xff]; p[1] = xga->pallook[(dat >> 8) & 0xff]; @@ -2709,7 +2709,7 @@ xga_render_16bpp(svga_t *svga) xga->firstline_draw = xga->displine; xga->lastline_draw = xga->displine; - for (x = 0; x <= xga->hdisp_xga; x += 8) { + for (x = 0; x <= xga->h_disp; x += 8) { dat = *(uint32_t *) (&xga->vram[(xga->memaddr + (x << 1)) & xga->vram_mask]); p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; @@ -3092,12 +3092,12 @@ xga_poll(void *priv) xga_log("XGA Poll=%d.\n", xga->on); if (xga->on) { if (!xga->linepos) { - if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.enable) { + if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 32 : 0); xga->hwcursor_oddeven = 0; } - if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.enable && xga->interlace) { + if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) { xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 33 : 1); xga->hwcursor_oddeven = 1; } @@ -3107,7 +3107,7 @@ xga_poll(void *priv) xga->linepos = 1; if (xga->dispon) { - xga->hdispon_xga = 1; + xga->h_disp_on = 1; xga->memaddr &= xga->vram_mask; @@ -3149,7 +3149,7 @@ xga_poll(void *priv) if (xga->dispon) svga->cgastat &= ~1; - xga->hdispon_xga = 0; + xga->h_disp_on = 0; xga->linepos = 0; if (xga->dispon) { @@ -3194,10 +3194,10 @@ xga_poll(void *priv) if (svga->fullchange) svga->fullchange--; } - if (xga->vc == xga->vsyncstart) { + if (xga->vc == xga->v_syncstart) { xga->dispon = 0; svga->cgastat |= 8; - x = xga->hdisp_xga; + x = xga->h_disp; if (xga->interlace && !xga->oddeven) xga->lastline++; @@ -3227,7 +3227,7 @@ xga_poll(void *priv) xga->memaddr = (xga->memaddr << 2); xga->memaddr_backup = (xga->memaddr_backup << 2); } - if (xga->vc == xga->vtotal_xga) { + if (xga->vc == xga->v_total) { xga->vc = 0; xga->scanline = 0; xga->dispon = 1; From 204617d62abe157549e50d0b82149e65ea0f6f28 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 1 Jul 2025 02:13:09 +0200 Subject: [PATCH 20/31] Auto-update: Fix the links so they are actually correct for the given update channel. --- src/qt/qt_updatedetails.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/qt/qt_updatedetails.cpp b/src/qt/qt_updatedetails.cpp index 1d6846dd6..dceeea47c 100644 --- a/src/qt/qt_updatedetails.cpp +++ b/src/qt/qt_updatedetails.cpp @@ -102,10 +102,10 @@ UpdateDetails::visitDownloadPage(const UpdateCheck::UpdateChannel &channel) { switch (channel) { case UpdateCheck::UpdateChannel::Stable: - QDesktopServices::openUrl(QUrl("https://ci.86box.net/job/86Box/lastSuccessfulBuild/artifact/")); - break; - case UpdateCheck::UpdateChannel::CI: QDesktopServices::openUrl(QUrl("https://github.com/86Box/86Box/releases/latest")); - break; + break; + case UpdateCheck::UpdateChannel::CI: + QDesktopServices::openUrl(QUrl("https://ci.86box.net/job/86Box/lastSuccessfulBuild/artifact/")); + break; } } From 69c5e1b3492634a96c3826590b531451e5c9c287 Mon Sep 17 00:00:00 2001 From: GetDizzy Date: Mon, 30 Jun 2025 20:25:38 -0400 Subject: [PATCH 21/31] Disable update menu if EMU_BUILD_NUM == 0 --- src/qt/qt_vmmanager_mainwindow.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_vmmanager_mainwindow.cpp b/src/qt/qt_vmmanager_mainwindow.cpp index 767bbcef2..a6f598f58 100644 --- a/src/qt/qt_vmmanager_mainwindow.cpp +++ b/src/qt/qt_vmmanager_mainwindow.cpp @@ -48,8 +48,13 @@ VMManagerMainWindow(QWidget *parent) connect(ui->actionNew_Machine, &QAction::triggered, vmm, &VMManagerMain::newMachineWizard); // Set up menu actions - connect(ui->actionCheck_for_updates, &QAction::triggered, this, &VMManagerMainWindow::checkForUpdatesTriggered); - + // (Disable this if the EMU_BUILD_NUM == 0) + #if EMU_BUILD_NUM == 0 + ui->actionCheck_for_updates->setVisible(false); + #else + connect(ui->actionCheck_for_updates, &QAction::triggered, this, &VMManagerMainWindow::checkForUpdatesTriggered); + #endif + // TODO: Remove all of this (all the way to END REMOVE) once certain the search will no longer be in the toolbar. // BEGIN REMOVE // Everything is still setup here for it but it is all hidden. None of it will be From f92c907299541f82335cd2ab6470d828c5431cfd Mon Sep 17 00:00:00 2001 From: GetDizzy Date: Mon, 30 Jun 2025 20:27:48 -0400 Subject: [PATCH 22/31] Stub out background update check if EMU_BUILD_NUM is 0 --- src/qt/qt_vmmanager_main.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/qt/qt_vmmanager_main.cpp b/src/qt/qt_vmmanager_main.cpp index 7916abca8..8d59b0996 100644 --- a/src/qt/qt_vmmanager_main.cpp +++ b/src/qt/qt_vmmanager_main.cpp @@ -456,6 +456,7 @@ VMManagerMain::onPreferencesUpdated() void VMManagerMain::backgroundUpdateCheckStart() const { +#if EMU_BUILD_NUM != 0 auto updateChannel = UpdateCheck::UpdateChannel::CI; #ifdef RELEASE_BUILD updateChannel = UpdateCheck::UpdateChannel::Stable; @@ -464,6 +465,7 @@ VMManagerMain::backgroundUpdateCheckStart() const connect(updateCheck, &UpdateCheck::updateCheckComplete, this, &VMManagerMain::backgroundUpdateCheckComplete); connect(updateCheck, &UpdateCheck::updateCheckError, this, &VMManagerMain::backgroundUpdateCheckError); updateCheck->checkForUpdates(); +#endif } void From ccf43f62f9fd147eb617f2b5b6293e721d470799 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Tue, 1 Jul 2025 12:51:01 +0600 Subject: [PATCH 23/31] Make picture bouncing effect work on Copper demo --- src/video/vid_et3000.c | 12 ++++++++++++ src/video/vid_et4000.c | 13 +++++++++++++ 2 files changed, 25 insertions(+) diff --git a/src/video/vid_et3000.c b/src/video/vid_et3000.c index 482cc60a3..a75a63829 100644 --- a/src/video/vid_et3000.c +++ b/src/video/vid_et3000.c @@ -481,6 +481,17 @@ et3000_recalctimings(svga_t *svga) svga->render = svga_render_4bpp_tseng_highres; } +static int +et3000_line_compare(svga_t* svga) +{ + if (svga->split > svga->vsyncstart) { + /* Don't do line compare if we're already in vertical retrace. */ + /* This makes picture bouncing effect work on Copper demo. */ + return 0; + } + return 1; +} + static void * et3000_init(const device_t *info) { @@ -514,6 +525,7 @@ et3000_init(const device_t *info) dev->svga.miscout = 1; dev->svga.packed_chain4 = 1; + dev->svga.line_compare = et3000_line_compare; return dev; } diff --git a/src/video/vid_et4000.c b/src/video/vid_et4000.c index 7dccd9747..b19aad20a 100644 --- a/src/video/vid_et4000.c +++ b/src/video/vid_et4000.c @@ -784,6 +784,17 @@ et4000_mca_feedb(UNUSED(void *priv)) return et4000->pos_regs[2] & 1; } +static int +et4000_line_compare(svga_t* svga) +{ + if (svga->split > svga->vsyncstart) { + /* Don't do line compare if we're already in vertical retrace. */ + /* This makes picture bouncing effect work on Copper demo. */ + return 0; + } + return 1; +} + static void * et4000_init(const device_t *info) { @@ -897,6 +908,8 @@ et4000_init(const device_t *info) dev->vram_mask = dev->vram_size - 1; + dev->svga.line_compare = et4000_line_compare; + rom_init(&dev->bios_rom, fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); From e9d289f2a41b65efc3cfe1d6187fb19c4ea271d5 Mon Sep 17 00:00:00 2001 From: Lili Kurek Date: Tue, 1 Jul 2025 11:29:49 +0000 Subject: [PATCH 24/31] Manager: Allow whitespace and some special characters in machine creation wizard I'm not sure why whitespace was disallowed in the first place as Windows accepts them everywhere, including at the start of the name. The character blacklist was Windows-centric, but macOS accepts everything besides slash and colon and Linux disallows only a slash. --- src/qt/qt_vmmanager_addmachine.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_vmmanager_addmachine.cpp b/src/qt/qt_vmmanager_addmachine.cpp index db40972a1..3005c0346 100644 --- a/src/qt/qt_vmmanager_addmachine.cpp +++ b/src/qt/qt_vmmanager_addmachine.cpp @@ -210,7 +210,13 @@ NameAndLocationPage(QWidget *parent) { setTitle(tr("System name and location")); - dirValidate = QRegularExpression(R"(^[^\\/:*?"<>|\s]+$)"); +#if defined(_WIN32) + dirValidate = QRegularExpression(R"(^[^\\/:*?"<>|]+$)"); +#elif defined(__APPLE__) + dirValidate = QRegularExpression(R"(^[^/:]+$)"); +#else + dirValidate = QRegularExpression(R"(^[^/]+$)"); +#endif const auto topLabel = new QLabel(tr("Enter the name of the system and choose the location")); topLabel->setWordWrap(true); @@ -282,7 +288,7 @@ NameAndLocationPage::isComplete() const if (systemName->text().isEmpty()) { systemNameValidation->setText(tr("Please enter a system name")); } else if (!systemName->text().contains(dirValidate)) { - systemNameValidation->setText(tr("System name cannot contain a space or certain characters")); + systemNameValidation->setText(tr("System name cannot certain characters")); } else if (const QDir newDir = QDir::cleanPath(systemLocation->text() + "/" + systemName->text()); newDir.exists()) { systemNameValidation->setText(tr("System name already exists")); } else { From bef3b9e155d26b539002e1a88edd5adfc0b6c8c7 Mon Sep 17 00:00:00 2001 From: Lili Kurek Date: Tue, 1 Jul 2025 11:33:18 +0000 Subject: [PATCH 25/31] Cut too much of a string --- src/qt/qt_vmmanager_addmachine.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_vmmanager_addmachine.cpp b/src/qt/qt_vmmanager_addmachine.cpp index 3005c0346..597c2ef11 100644 --- a/src/qt/qt_vmmanager_addmachine.cpp +++ b/src/qt/qt_vmmanager_addmachine.cpp @@ -288,7 +288,7 @@ NameAndLocationPage::isComplete() const if (systemName->text().isEmpty()) { systemNameValidation->setText(tr("Please enter a system name")); } else if (!systemName->text().contains(dirValidate)) { - systemNameValidation->setText(tr("System name cannot certain characters")); + systemNameValidation->setText(tr("System name cannot contain certain characters")); } else if (const QDir newDir = QDir::cleanPath(systemLocation->text() + "/" + systemName->text()); newDir.exists()) { systemNameValidation->setText(tr("System name already exists")); } else { From e30f0864826839678819f7159056530615389d56 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 3 Jul 2025 18:22:17 -0400 Subject: [PATCH 26/31] Updates to GHA scripts --- .github/workflows/cmake_linux.yml | 20 ++----- .github/workflows/cmake_macos.yml | 45 +++----------- .github/workflows/cmake_windows_msys2.yml | 48 +++++++++------ .github/workflows/codeql_linux.yml | 40 ++++++++++--- .github/workflows/codeql_macos.yml | 40 ++++++++++--- .github/workflows/codeql_windows_msys2.yml | 68 +++++++++++++++++----- 6 files changed, 159 insertions(+), 102 deletions(-) diff --git a/.github/workflows/cmake_linux.yml b/.github/workflows/cmake_linux.yml index 83672974f..901f5864a 100644 --- a/.github/workflows/cmake_linux.yml +++ b/.github/workflows/cmake_linux.yml @@ -8,6 +8,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/cmake_linux.yml - vcpkg.json - "!**/Makefile*" @@ -18,7 +19,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" - - .github/workflows/** + - "!.github/workflows/**" - .github/workflows/cmake_linux.yml - vcpkg.json - "!**/Makefile*" @@ -26,13 +27,11 @@ on: jobs: linux: + name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64" runs-on: ubuntu-22.04 - env: - BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed - strategy: fail-fast: true matrix: @@ -90,9 +89,6 @@ jobs: with: fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis - - name: Install sonar-scanner and build-wrapper - uses: SonarSource/sonarcloud-github-c-cpp@v3 - - name: Configure CMake run: >- cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} @@ -103,15 +99,7 @@ jobs: - name: Build run: | - build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build - - - name: Run sonar-scanner - if: 0 - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} - run: | - sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}" + cmake --build build - name: Generate package run: | diff --git a/.github/workflows/cmake_macos.yml b/.github/workflows/cmake_macos.yml index 4db41304e..c917932fe 100644 --- a/.github/workflows/cmake_macos.yml +++ b/.github/workflows/cmake_macos.yml @@ -8,6 +8,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/cmake_macos.yml - vcpkg.json - "!**/Makefile*" @@ -18,7 +19,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" - - .github/workflows/** + - "!.github/workflows/**" - .github/workflows/cmake_macos.yml - vcpkg.json - "!**/Makefile*" @@ -26,13 +27,11 @@ on: jobs: macos13-x86_64: + name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64" runs-on: macos-13 - env: - BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed - strategy: fail-fast: true matrix: @@ -80,9 +79,6 @@ jobs: with: fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis - - name: Install sonar-scanner and build-wrapper - uses: SonarSource/sonarcloud-github-c-cpp@v3 - - name: Configure CMake run: >- cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} @@ -96,20 +92,10 @@ jobs: -D LIBSERIALPORT_ROOT=$(brew --prefix libserialport) - name: Build - run: | - build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build - - - name: Run sonar-scanner - if: 0 - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} - run: | - sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}" + run: cmake --build build - name: Generate package - run: | - cmake --install build + run: cmake --install build - name: Upload artifact uses: actions/upload-artifact@v4 @@ -118,13 +104,11 @@ jobs: path: build/artifacts/** macos14-arm64: + name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, arm64" runs-on: macos-14 -# env: -# BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed - strategy: fail-fast: true matrix: @@ -172,9 +156,6 @@ jobs: with: fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis -# - name: Install sonar-scanner and build-wrapper -# uses: SonarSource/sonarcloud-github-c-cpp@v3 - - name: Configure CMake run: >- cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} @@ -188,20 +169,10 @@ jobs: -D LIBSERIALPORT_ROOT=$(brew --prefix libserialport) - name: Build - run: | - cmake --build build - -# - name: Run sonar-scanner -# if: 0 -# env: -# GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} -# SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} -# run: | -# sonar-scanner --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}" + run: cmake --build build - name: Generate package - run: | - cmake --install build + run: cmake --install build - name: Upload artifact uses: actions/upload-artifact@v4 diff --git a/.github/workflows/cmake_windows_msys2.yml b/.github/workflows/cmake_windows_msys2.yml index ca48599a0..eb83d4674 100644 --- a/.github/workflows/cmake_windows_msys2.yml +++ b/.github/workflows/cmake_windows_msys2.yml @@ -8,6 +8,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/cmake_windows_msys2.yml - vcpkg.json - "!**/Makefile*" @@ -18,6 +19,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/cmake_windows_msys2.yml - vcpkg.json - "!**/Makefile*" @@ -25,13 +27,11 @@ on: jobs: msys2: + name: "${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}" runs-on: ${{ matrix.environment.runner }} - env: - BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed - defaults: run: shell: msys2 {0} @@ -40,23 +40,47 @@ jobs: fail-fast: true matrix: build: - - name: Dev Debug +# - name: Regular +# preset: regular + - name: Debug preset: dev_debug - slug: -Dev-Debug + slug: -Debug - name: Dev preset: development slug: -Dev dynarec: - name: ODR new: off + slug: -ODR - name: NDR new: on slug: -NDR + ui: + - name: Qt GUI + qt: on + static: on + slug: -Qt + packages: >- + qt5-base:p + qt5-tools:p + vulkan-headers:p environment: +# - msystem: MSYS +# toolchain: ./cmake/flags-gcc-x86_64.cmake +# slug: "-MSYS64" - msystem: MINGW64 + prefix: mingw-w64-x86_64 toolchain: ./cmake/flags-gcc-x86_64.cmake slug: "-64" runner: windows-2022 +# - msystem: CLANG64 +# prefix: mingw-w64-clang-x86_64 +# toolchain: ./cmake/llvm-win32-x86_64.cmake +# slug: "CLANG64" +# - msystem: UCRT64 +# prefix: mingw-w64-ucrt-x86_64 +# toolchain: ./cmake/flags-gcc-x86_64.cmake +# slug: "UCRT64" - msystem: CLANGARM64 toolchain: ./cmake/flags-gcc-aarch64.cmake slug: -arm64 @@ -97,9 +121,6 @@ jobs: with: fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis - # - name: Install sonar-scanner and build-wrapper - # uses: SonarSource/sonarcloud-github-c-cpp@v3 - - name: Configure CMake run: >- cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} @@ -107,20 +128,9 @@ jobs: -D NEW_DYNAREC=${{ matrix.dynarec.new }} -D CMAKE_INSTALL_PREFIX=./build/artifacts - # - name: Build - # run: | - # .sonar/build-wrapper-win-x86/build-wrapper-win-x86-64.exe --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build - - name: Build run: cmake --build build - # - name: Run sonar-scanner - # env: - # GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - # SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} - # run: | - # .sonar/sonar-scanner-5.0.1.3006-windows/bin/sonar-scanner.bat --define sonar.cfamily.build-wrapper-output="${{ env.BUILD_WRAPPER_OUT_DIR }}" - - name: Generate package run: cmake --install build diff --git a/.github/workflows/codeql_linux.yml b/.github/workflows/codeql_linux.yml index 2b542b186..b8fb93ef6 100644 --- a/.github/workflows/codeql_linux.yml +++ b/.github/workflows/codeql_linux.yml @@ -9,6 +9,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/codeql_linux.yml - vcpkg.json - "!**/Makefile*" @@ -20,7 +21,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" - - .github/workflows/** + - "!.github/workflows/**" - .github/workflows/codeql_linux.yml - vcpkg.json - "!**/Makefile*" @@ -32,10 +33,13 @@ jobs: analyze-linux: - name: "Analyze Linux GCC 11 (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)" + name: "Analyze (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)" runs-on: ubuntu-22.04 + env: + BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed + permissions: actions: read contents: read @@ -48,12 +52,12 @@ jobs: build: # - name: Regular # preset: regular -# - name: Debug -# preset: debug -# slug: -Debug - - name: Dev + - name: Debug preset: dev_debug - slug: -Dev + slug: -Debug +# - name: Dev +# preset: development +# slug: -Dev dynarec: - name: ODR new: off @@ -64,6 +68,7 @@ jobs: ui: - name: SDL GUI qt: off + static: on - name: Qt GUI qt: on slug: -Qt @@ -95,6 +100,11 @@ jobs: - name: Checkout repository uses: actions/checkout@v4 + with: + fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis + + - name: Install Build Wrapper + uses: SonarSource/sonarqube-scan-action/install-build-wrapper@v5 - name: Initialize CodeQL uses: github/codeql-action/init@v3 @@ -111,9 +121,23 @@ jobs: -D QT=${{ matrix.ui.qt }} - name: Build - run: cmake --build build + run: | + build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build - name: Perform CodeQL Analysis uses: github/codeql-action/analyze@v3 with: category: "/language:${{matrix.language}}" + + - name: SonarQube Scan + if: matrix.build.preset == 'dev_debug' && matrix.dynarec.new == 'on' && matrix.ui.qt == 'on' && env.SONAR_TOKEN != '' +# if: 0 + uses: SonarSource/sonarqube-scan-action@v5 + env: + GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} + SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} +# SONAR_ROOT_CERT: ${{ secrets.SONAR_ROOT_CERT }} + with: + # Consult https://docs.sonarsource.com/sonarqube-server/latest/analyzing-source-code/scanners/sonarscanner/ for more information and options + args: > + --define sonar.cfamily.compile-commands="${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json" diff --git a/.github/workflows/codeql_macos.yml b/.github/workflows/codeql_macos.yml index eeab0ecc8..203f385ff 100644 --- a/.github/workflows/codeql_macos.yml +++ b/.github/workflows/codeql_macos.yml @@ -9,6 +9,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/codeql_macos.yml - vcpkg.json - "!**/Makefile*" @@ -20,7 +21,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" - - .github/workflows/** + - "!.github/workflows/**" - .github/workflows/codeql_macos.yml - vcpkg.json - "!**/Makefile*" @@ -32,10 +33,13 @@ jobs: analyze-macos13-x86_64: - name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64" + name: "Analyze (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)" runs-on: macos-13 + env: + BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed + permissions: actions: read contents: read @@ -48,12 +52,12 @@ jobs: build: # - name: Regular # preset: regular -# - name: Debug -# preset: debug -# slug: -Debug - - name: Dev + - name: Debug preset: dev_debug - slug: -Dev + slug: -Debug +# - name: Dev +# preset: development +# slug: -Dev dynarec: - name: ODR new: off @@ -74,7 +78,6 @@ jobs: - name: Install dependencies run: >- brew install - ninja sdl2 rtmidi openal-soft @@ -86,6 +89,11 @@ jobs: - name: Checkout repository uses: actions/checkout@v4 + with: + fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis + + - name: Install Build Wrapper + uses: SonarSource/sonarqube-scan-action/install-build-wrapper@v5 - name: Initialize CodeQL uses: github/codeql-action/init@v3 @@ -106,9 +114,23 @@ jobs: -D LIBSERIALPORT_ROOT=$(brew --prefix libserialport) - name: Build - run: cmake --build build + run: | + build-wrapper-macosx-x86 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build - name: Perform CodeQL Analysis uses: github/codeql-action/analyze@v3 with: category: "/language:${{matrix.language}}" + + - name: SonarQube Scan +# if: matrix.build.preset == 'dev_debug' && matrix.dynarec.new == 'on' && matrix.ui.qt == 'on' && env.SONAR_TOKEN != '' + if: 0 + uses: SonarSource/sonarqube-scan-action@v5 + env: + GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} + SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} +# SONAR_ROOT_CERT: ${{ secrets.SONAR_ROOT_CERT }} + with: + # Consult https://docs.sonarsource.com/sonarqube-server/latest/analyzing-source-code/scanners/sonarscanner/ for more information and options + args: > + --define sonar.cfamily.compile-commands="${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json" diff --git a/.github/workflows/codeql_windows_msys2.yml b/.github/workflows/codeql_windows_msys2.yml index f513831e8..e8f2158b0 100644 --- a/.github/workflows/codeql_windows_msys2.yml +++ b/.github/workflows/codeql_windows_msys2.yml @@ -9,6 +9,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" + - "!.github/workflows/**" - .github/workflows/codeql_windows_msys2.yml - vcpkg.json - "!**/Makefile*" @@ -20,7 +21,7 @@ on: - cmake/** - "**/CMakeLists.txt" - "CMakePresets.json" - - .github/workflows/** + - "!.github/workflows/**" - .github/workflows/codeql_windows_msys2.yml - vcpkg.json - "!**/Makefile*" @@ -32,9 +33,12 @@ jobs: analyze-msys2: - name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}" + name: "Analyze (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})" - runs-on: windows-2022 + runs-on: ${{ matrix.environment.runner }} + + env: + BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed permissions: actions: read @@ -52,12 +56,12 @@ jobs: build: # - name: Regular # preset: regular -# - name: Debug -# preset: debug -# slug: -Debug - - name: Dev + - name: Debug preset: dev_debug - slug: -Dev + slug: -Debug +# - name: Dev +# preset: development +# slug: -Dev dynarec: - name: ODR new: off @@ -77,21 +81,37 @@ jobs: environment: # - msystem: MSYS # toolchain: ./cmake/flags-gcc-x86_64.cmake +# slug: "-MSYS64" - msystem: MINGW64 prefix: mingw-w64-x86_64 toolchain: ./cmake/flags-gcc-x86_64.cmake + slug: "-64" + runner: windows-2022 # - msystem: CLANG64 # prefix: mingw-w64-clang-x86_64 # toolchain: ./cmake/llvm-win32-x86_64.cmake - - msystem: UCRT64 - prefix: mingw-w64-ucrt-x86_64 - toolchain: ./cmake/flags-gcc-x86_64.cmake +# slug: "CLANG64" +# runner: windows-2022 +# - msystem: UCRT64 +# prefix: mingw-w64-ucrt-x86_64 +# toolchain: ./cmake/flags-gcc-x86_64.cmake +# slug: "UCRT64" +# runner: windows-2022 + - msystem: CLANGARM64 + toolchain: ./cmake/flags-gcc-aarch64.cmake + slug: -arm64 + runner: windows-11-arm + exclude: + - dynarec: + new: off + environment: + msystem: CLANGARM64 steps: - name: Prepare MSYS2 environment uses: msys2/setup-msys2@v2 with: - release: false + release: true update: true msystem: ${{ matrix.environment.msystem }} pacboy: >- @@ -109,9 +129,15 @@ jobs: fluidsynth:p libserialport:p ${{ matrix.ui.packages }} + openmp:p - name: Checkout repository uses: actions/checkout@v4 + with: + fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis + + - name: Install Build Wrapper + uses: SonarSource/sonarqube-scan-action/install-build-wrapper@v5 - name: Initialize CodeQL uses: github/codeql-action/init@v3 @@ -128,11 +154,27 @@ jobs: -D QT=${{ matrix.ui.qt }} -D STATIC_BUILD=${{ matrix.ui.static }} + # - name: Build + # run: | + # .sonar/build-wrapper-win-x86/build-wrapper-win-x86-64.exe --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build + - name: Build run: cmake --build build - - name: Perform CodeQL Analysis uses: github/codeql-action/analyze@v3 with: category: "/language:${{matrix.language}}" + + - name: SonarQube Scan +# if: matrix.build.preset == 'dev_debug' && matrix.dynarec.new == 'on' && matrix.ui.qt == 'on' && env.SONAR_TOKEN != '' + if: 0 + uses: SonarSource/sonarqube-scan-action@v5 + env: + GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} + SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }} +# SONAR_ROOT_CERT: ${{ secrets.SONAR_ROOT_CERT }} + with: + # Consult https://docs.sonarsource.com/sonarqube-server/latest/analyzing-source-code/scanners/sonarscanner/ for more information and options + args: > + --define sonar.cfamily.compile-commands="${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json" From e9554aafe0fd7c166d304d8ae2439d3b389e1a8c Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 3 Jul 2025 21:02:35 -0400 Subject: [PATCH 27/31] arm64 linux build support --- .github/workflows/cmake_linux.yml | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/.github/workflows/cmake_linux.yml b/.github/workflows/cmake_linux.yml index 901f5864a..ecfedd6ca 100644 --- a/.github/workflows/cmake_linux.yml +++ b/.github/workflows/cmake_linux.yml @@ -28,9 +28,9 @@ jobs: linux: - name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64" + name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.arch }}" - runs-on: ubuntu-22.04 + runs-on: ${{ matrix.environment.runner }} strategy: fail-fast: true @@ -65,6 +65,15 @@ jobs: qttranslations5-l10n libevdev-dev libxkbcommon-x11-dev + environment: + - arch: x86_64 + toolchain: ./cmake/flags-gcc-x86_64.cmake + slug: "-x86_64" + runner: ubuntu-22.04 + - arch: arm64 + toolchain: ./cmake/flags-gcc-aarch64.cmake + slug: -arm64 + runner: ubuntu-22.04-arm steps: - name: Install dependencies @@ -92,7 +101,7 @@ jobs: - name: Configure CMake run: >- cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} - --toolchain ./cmake/flags-gcc-x86_64.cmake + --toolchain ${{ matrix.environment.toolchain }} -D NEW_DYNAREC=${{ matrix.dynarec.new }} -D CMAKE_INSTALL_PREFIX=./build/artifacts -D QT=${{ matrix.ui.qt }} @@ -108,5 +117,5 @@ jobs: - name: Upload artifact uses: actions/upload-artifact@v4 with: - name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-UbuntuJammy-x86_64-gha${{ github.run_number }}' + name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-UbuntuJammy${{ matrix.environment.slug }}-gha${{ github.run_number }}' path: build/artifacts/** From e4994c24c0bc0c8c82b1739b177e764b1449ac54 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 3 Jul 2025 21:43:14 -0400 Subject: [PATCH 28/31] Fix codeql on arm64 windows --- .github/workflows/codeql_windows_msys2.yml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/.github/workflows/codeql_windows_msys2.yml b/.github/workflows/codeql_windows_msys2.yml index e8f2158b0..c7edae77f 100644 --- a/.github/workflows/codeql_windows_msys2.yml +++ b/.github/workflows/codeql_windows_msys2.yml @@ -97,10 +97,10 @@ jobs: # toolchain: ./cmake/flags-gcc-x86_64.cmake # slug: "UCRT64" # runner: windows-2022 - - msystem: CLANGARM64 - toolchain: ./cmake/flags-gcc-aarch64.cmake - slug: -arm64 - runner: windows-11-arm +# - msystem: CLANGARM64 +# toolchain: ./cmake/flags-gcc-aarch64.cmake +# slug: -arm64 +# runner: windows-11-arm exclude: - dynarec: new: off @@ -136,8 +136,8 @@ jobs: with: fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis - - name: Install Build Wrapper - uses: SonarSource/sonarqube-scan-action/install-build-wrapper@v5 +# - name: Install Build Wrapper +# uses: SonarSource/sonarqube-scan-action/install-build-wrapper@v5 - name: Initialize CodeQL uses: github/codeql-action/init@v3 From 5ab5c7b7c9d39be1d3f323989227cc4004cd3e50 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 3 Jul 2025 22:09:24 -0400 Subject: [PATCH 29/31] Missed bit --- .github/workflows/cmake_linux.yml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/.github/workflows/cmake_linux.yml b/.github/workflows/cmake_linux.yml index ecfedd6ca..012db79b7 100644 --- a/.github/workflows/cmake_linux.yml +++ b/.github/workflows/cmake_linux.yml @@ -74,6 +74,11 @@ jobs: toolchain: ./cmake/flags-gcc-aarch64.cmake slug: -arm64 runner: ubuntu-22.04-arm + exclude: + - dynarec: + new: off + environment: + arch: arm64 steps: - name: Install dependencies From f27e1fb8a296140ddc95e12f7c0bb988570d7288 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 11 Dec 2024 13:03:21 -0500 Subject: [PATCH 30/31] Support for Quadram Quadcolor I / I + II --- src/include/86box/vid_quadcolor.h | 93 +++ src/include/86box/video.h | 3 + src/video/CMakeLists.txt | 5 +- src/video/vid_cga_quadcolor.c | 981 ++++++++++++++++++++++++++++++ src/video/vid_table.c | 1 + 5 files changed, 1081 insertions(+), 2 deletions(-) create mode 100644 src/include/86box/vid_quadcolor.h create mode 100644 src/video/vid_cga_quadcolor.c diff --git a/src/include/86box/vid_quadcolor.h b/src/include/86box/vid_quadcolor.h new file mode 100644 index 000000000..41b39dfb0 --- /dev/null +++ b/src/include/86box/vid_quadcolor.h @@ -0,0 +1,93 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Quadram Quadcolor I / I+II emulation + * + * Authors: Benedikt Freisen, + * Jasmine Iwanek, + * + * Copyright 2024 Benedikt Freisen. + Copyright 2025 Jasmine Iwanek. + */ + +#ifndef _VID_QUADCOLOR_H_ +#define _VID_QUADCOLOR_H_ + +typedef struct quadcolor_t { + mem_mapping_t mapping; + mem_mapping_t mapping_2; + + int crtcreg; +#if 0 + uint8_t crtc[CGA_NUM_CRTC_REGS]; +#else + uint8_t crtc[32]; +#endif + uint8_t cgastat; + + uint8_t cgamode; + uint8_t cgacol; + + uint8_t lp_strobe; + + uint8_t quadcolor_ctrl; + uint8_t quadcolor_2_oe; + uint16_t page_offset; + + int fontbase; + int linepos; + int displine; + int scanline; + int vc; + int cgadispon; + int cursorvisible; // Determines if the cursor is visible FOR THE CURRENT SCANLINE. + int cursoron; + int cgablink; + int vsynctime; + int vadj; + uint16_t memaddr; + uint16_t memaddr_backup; + int oddeven; + + int qc2idx; + uint8_t qc2mask; + + uint64_t dispontime; + uint64_t dispofftime; + pc_timer_t timer; + + int firstline; + int lastline; + + int drawcursor; + + int fullchange; + + uint8_t *vram; + uint8_t *vram_2; + + uint8_t charbuffer[256]; + + int revision; + int composite; + int rgb_type; + int double_type; + + int has_2nd_charset; + int has_quadcolor_2; +} quadcolor_t; + +void quadcolor_init(quadcolor_t *quadcolor); +void quadcolor_out(uint16_t addr, uint8_t val, void *priv); +uint8_t quadcolor_in(uint16_t addr, void *priv); +void quadcolor_write(uint32_t addr, uint8_t val, void *priv); +uint8_t quadcolor_read(uint32_t addr, void *priv); +void quadcolor_recalctimings(quadcolor_t *quadcolor); +void quadcolor_poll(void *priv); + +#endif /* _VID_QUADCOLOR_H_ */ diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 986529d6f..70d031a4f 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -491,6 +491,9 @@ extern const device_t paradise_wd90c11_megapc_device; extern const device_t paradise_wd90c11_device; extern const device_t paradise_wd90c30_device; +/* Quadram Quadcolor I / I + II */ +extern const device_t quadcolor_device; + /* Realtek (S)VGA */ extern const device_t realtek_rtg3105_device; extern const device_t realtek_rtg3106_device; diff --git a/src/video/CMakeLists.txt b/src/video/CMakeLists.txt index 4cac8b76d..1159c93e2 100644 --- a/src/video/CMakeLists.txt +++ b/src/video/CMakeLists.txt @@ -55,8 +55,9 @@ add_library(vid OBJECT vid_cga_colorplus.c vid_cga_ncr.c vid_cga_olivetti.c - vid_cga_toshiba_t1000.c - vid_cga_toshiba_t3100e.c + vid_cga_quadcolor.c + vid_cga_toshiba_t1000.c + vid_cga_toshiba_t3100e.c # PCJr/Tandy vid_pcjr.c diff --git a/src/video/vid_cga_quadcolor.c b/src/video/vid_cga_quadcolor.c new file mode 100644 index 000000000..5974682c8 --- /dev/null +++ b/src/video/vid_cga_quadcolor.c @@ -0,0 +1,981 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Quadram Quadcolor I / I+II emulation + * + * Authors: Sarah Walker, + * Miran Grca, + * W. M. Martinez, + * Benedikt Freisen, + * Jasmine Iwanek, + * + * Copyright 2008-2019 Sarah Walker. + * Copyright 2016-2019 Miran Grca. + * Copyright 2023 W. M. Martinez + * Copyright 2024 Benedikt Freisen. + * Copyright 2025 Jasmine Iwanek. + */ + +/* This has been derived from CGA emulation */ +/* omissions: simulated snow (Quadcolor has dual-ported RAM), single and dual 8x16 font configuration */ +/* additions: ports 0x3dd and 0x3de, 2nd char set, 2nd VRAM bank, hi-res bg color, Quadcolor II memory and mode */ +/* assumptions: MA line 12 XORed with Bank Select, hi-res bg is also border color, QC2 mode has simple address counter */ + +#include +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include "cpu.h" +#include <86box/io.h> +#include <86box/timer.h> +#include <86box/pit.h> +#include <86box/mem.h> +#include <86box/rom.h> +#include <86box/device.h> +#include <86box/video.h> +#include <86box/vid_cga.h> +#include <86box/vid_quadcolor.h> +#include <86box/vid_cga_comp.h> +#include <86box/plat_unused.h> + +#define CGA_RGB 0 +#define CGA_COMPOSITE 1 + +#define COMPOSITE_OLD 0 +#define COMPOSITE_NEW 1 + +#define DOUBLE_NONE 0 +#define DOUBLE_SIMPLE 1 +#define DOUBLE_INTERPOLATE_SRGB 2 +#define DOUBLE_INTERPOLATE_LINEAR 3 + +#define DEVICE_VRAM 0x8000 +#define DEVICE_VRAM_MASK 0x7fff + +typedef union { + uint32_t color; + struct { + uint8_t b; + uint8_t g; + uint8_t r; + uint8_t a; + }; +} color_t; + +static uint8_t crtcmask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +static uint8_t interp_lut[2][256][256]; + +static video_timings_t timing_quadcolor = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; + +void quadcolor_recalctimings(quadcolor_t *quadcolor); + +static void +quadcolor_update_latch(quadcolor_t *quadcolor) +{ + uint32_t lp_latch = quadcolor->displine * quadcolor->crtc[CGA_CRTC_HDISP]; + + quadcolor->crtc[CGA_CRTC_LIGHT_PEN_ADDR_HIGH] = (lp_latch >> 8) & 0x3f; + quadcolor->crtc[CGA_CRTC_LIGHT_PEN_ADDR_LOW] = lp_latch & 0xff; +} + +void +quadcolor_out(uint16_t addr, uint8_t val, void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + uint8_t old; + + if ((addr >= 0x3d0) && (addr <= 0x3d7)) + addr = (addr & 0xff9) | 0x004; + + switch (addr) { + case CGA_REGISTER_CRTC_INDEX: + quadcolor->crtcreg = val & 31; + return; + case CGA_REGISTER_CRTC_DATA: + old = quadcolor->crtc[quadcolor->crtcreg]; + quadcolor->crtc[quadcolor->crtcreg] = val & crtcmask[quadcolor->crtcreg]; + if (old != val) { + // Recalc the timings if we are writing any invalid CRTC register or a valid CRTC register + // except the CURSOR and LIGHT PEN registers + if ((quadcolor->crtcreg < 0xe) || (quadcolor->crtcreg > 0x11)) { + quadcolor->fullchange = changeframecount; + quadcolor_recalctimings(quadcolor); + } + } + return; + case CGA_REGISTER_MODE_CONTROL: + old = quadcolor->cgamode; + quadcolor->cgamode = val; + + if (old ^ val) { + if ((old ^ val) & 0x07) + update_cga16_color(val); + + quadcolor_recalctimings(quadcolor); + } + return; + case CGA_REGISTER_COLOR_SELECT: + old = quadcolor->cgacol; + quadcolor->cgacol = val; + if (old ^ val) + quadcolor_recalctimings(quadcolor); + return; + + case CGA_REGISTER_CLEAR_LIGHT_PEN_LATCH: + if (quadcolor->lp_strobe == 1) + quadcolor->lp_strobe = 0; + return; + case CGA_REGISTER_SET_LIGHT_PEN_LATCH: + if (quadcolor->lp_strobe == 0) { + quadcolor->lp_strobe = 1; + quadcolor_update_latch(quadcolor); + } + return; + + case 0x3dd: + quadcolor->quadcolor_ctrl = val & 0x3f; + /* helper variable that can be XORed onto the VRAM address to select the page to display */ + quadcolor->page_offset = (val & 0x10) << 8; + /* in dual 8x8 font configuration, use fontbase 256 if "Character Set Select" bit is set */ + if (quadcolor->has_2nd_charset) + quadcolor->fontbase = (val & 0x20) << 3; + return; + case 0x3de: + /* NOTE: the polarity of this register is the opposite of what the manual says */ + if (quadcolor->has_quadcolor_2) + quadcolor->quadcolor_2_oe = !(val & 0x10); + return; + + default: + break; + } +} + +uint8_t +quadcolor_in(uint16_t addr, void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + uint8_t ret = 0xff; + + if ((addr >= 0x3d0) && (addr <= 0x3d7)) + addr = (addr & 0xff9) | 0x004; + + switch (addr) { + case CGA_REGISTER_CRTC_INDEX: + ret = quadcolor->crtcreg; + break; + case CGA_REGISTER_CRTC_DATA: + ret = quadcolor->crtc[quadcolor->crtcreg]; + break; + case CGA_REGISTER_STATUS: + ret = quadcolor->cgastat; + break; + case CGA_REGISTER_CLEAR_LIGHT_PEN_LATCH: + if (quadcolor->lp_strobe == 1) + quadcolor->lp_strobe = 0; + break; + case CGA_REGISTER_SET_LIGHT_PEN_LATCH: + if (quadcolor->lp_strobe == 0) { + quadcolor->lp_strobe = 1; + quadcolor_update_latch(quadcolor); + } + break; + + default: + break; + } + + return ret; +} + +void +quadcolor_waitstates(UNUSED(void *priv)) +{ + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; + int ws; + + ws = ws_array[cycles & 0xf]; + cycles -= ws; +} + +void +quadcolor_write(uint32_t addr, uint8_t val, void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + + quadcolor->vram[addr & DEVICE_VRAM_MASK] = val; + quadcolor_waitstates(quadcolor); +} + +uint8_t +quadcolor_read(uint32_t addr, void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + + quadcolor_waitstates(quadcolor); + return quadcolor->vram[addr & DEVICE_VRAM_MASK]; +} + +void +quadcolor_2_write(uint32_t addr, uint8_t val, void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + quadcolor->vram_2[addr & 0xffff] = val; +} + +uint8_t +quadcolor_2_read(uint32_t addr, void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + return quadcolor->vram_2[addr & 0xffff]; +} + +void +quadcolor_recalctimings(quadcolor_t *quadcolor) +{ + double disptime; + double _dispontime; + double _dispofftime; + + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) { + disptime = (double) (quadcolor->crtc[CGA_CRTC_HTOTAL] + 1); + _dispontime = (double) quadcolor->crtc[CGA_CRTC_HDISP]; + } else { + disptime = (double) ((quadcolor->crtc[CGA_CRTC_HTOTAL] + 1) << 1); + _dispontime = (double) (quadcolor->crtc[CGA_CRTC_HDISP] << 1); + } + _dispofftime = disptime - _dispontime; + _dispontime = _dispontime * CGACONST; + _dispofftime = _dispofftime * CGACONST; + quadcolor->dispontime = (uint64_t) (_dispontime); + quadcolor->dispofftime = (uint64_t) (_dispofftime); +} + +static inline uint8_t +get_next_qc2_pixel(quadcolor_t *quadcolor) +{ + uint8_t mask = quadcolor->qc2mask; + quadcolor->qc2mask = ~quadcolor->qc2mask; + uint8_t pixel = (quadcolor->vram_2[quadcolor->qc2idx] & mask) >> (quadcolor->qc2mask & 4); + + quadcolor->qc2idx += quadcolor->qc2mask >> 7; + + return quadcolor->quadcolor_2_oe ? pixel : 0; +} + +static void +quadcolor_render(quadcolor_t *quadcolor, int line) +{ + uint16_t cursoraddr = (quadcolor->crtc[CGA_CRTC_CURSOR_ADDR_LOW] | (quadcolor->crtc[CGA_CRTC_CURSOR_ADDR_HIGH] << 8)) & DEVICE_VRAM_MASK; + int drawcursor; + int x; + int column; + uint8_t chr; + uint8_t attr; + uint16_t dat; + int cols[4]; + int col; + + int32_t highres_graphics_flag = (CGA_MODE_FLAG_HIGHRES_GRAPHICS | CGA_MODE_FLAG_GRAPHICS); + + if (((quadcolor->cgamode & highres_graphics_flag) == highres_graphics_flag)) { + for (column = 0; column < 8; ++column) { + buffer32->line[line][column] = 0; + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) + buffer32->line[line][column + (quadcolor->crtc[CGA_CRTC_HDISP] << 3) + 8] = (quadcolor->quadcolor_ctrl & 15); /* TODO: Is Quadcolor bg color actually relevant, here? */ + else + buffer32->line[line][column + (quadcolor->crtc[CGA_CRTC_HDISP] << 4) + 8] = (quadcolor->quadcolor_ctrl & 15); /* TODO: Is Quadcolor bg color actually relevant, here? */ + } + } else { + for (column = 0; column < 8; ++column) { + buffer32->line[line][column] = (quadcolor->cgacol & 15) + 16; + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) + buffer32->line[line][column + (quadcolor->crtc[CGA_CRTC_HDISP] << 3) + 8] = (quadcolor->cgacol & 15) + 16; + else + buffer32->line[line][column + (quadcolor->crtc[CGA_CRTC_HDISP] << 4) + 8] = (quadcolor->cgacol & 15) + 16; + } + } + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) { /* 80-column text */ + for (x = 0; x < quadcolor->crtc[CGA_CRTC_HDISP]; x++) { + if (quadcolor->cgamode & CGA_MODE_FLAG_VIDEO_ENABLE) { + chr = quadcolor->charbuffer[x << 1]; + attr = quadcolor->charbuffer[(x << 1) + 1]; + } else + chr = attr = 0; + drawcursor = ((quadcolor->memaddr == cursoraddr) && quadcolor->cursorvisible && quadcolor->cursoron); + cols[1] = (attr & 15) + 16; + if (quadcolor->cgamode & CGA_MODE_FLAG_BLINK) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((quadcolor->cgablink & 8) && (attr & 0x80) && !quadcolor->drawcursor) + cols[1] = cols[0]; + } else + cols[0] = (attr >> 4) + 16; + if (drawcursor) { + for (column = 0; column < 8; column++) { + buffer32->line[line][(x << 3) + column + 8] + = (cols[(fontdat[chr + quadcolor->fontbase][quadcolor->scanline & 7] & (1 << (column ^ 7))) ? 1 : 0] ^ 15) | get_next_qc2_pixel(quadcolor); + } + } else { + for (column = 0; column < 8; column++) { + buffer32->line[line][(x << 3) + column + 8] + = cols[(fontdat[chr + quadcolor->fontbase][quadcolor->scanline & 7] & (1 << (column ^ 7))) ? 1 : 0] | get_next_qc2_pixel(quadcolor); + } + } + quadcolor->memaddr++; + } + } else if (!(quadcolor->cgamode & CGA_MODE_FLAG_GRAPHICS)) { /* not graphics (nor 80-column text) => 40-column text */ + for (x = 0; x < quadcolor->crtc[CGA_CRTC_HDISP]; x++) { + if (quadcolor->cgamode & CGA_MODE_FLAG_VIDEO_ENABLE) { + chr = quadcolor->vram[(quadcolor->page_offset ^ (quadcolor->memaddr << 1)) & DEVICE_VRAM_MASK]; + attr = quadcolor->vram[(quadcolor->page_offset ^ ((quadcolor->memaddr << 1) + 1)) & DEVICE_VRAM_MASK]; + } else + chr = attr = 0; + drawcursor = ((quadcolor->memaddr == cursoraddr) && quadcolor->cursorvisible && quadcolor->cursoron); + cols[1] = (attr & 15) + 16; + if (quadcolor->cgamode & CGA_MODE_FLAG_BLINK) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((quadcolor->cgablink & 8) && (attr & 0x80)) + cols[1] = cols[0]; + } else + cols[0] = (attr >> 4) + 16; + quadcolor->memaddr++; + if (drawcursor) { + for (column = 0; column < 8; column++) { + dat = (cols[(fontdat[chr + quadcolor->fontbase][quadcolor->scanline & 7] & (1 << (column ^ 7))) ? 1 : 0] ^ 15); + buffer32->line[line][(x << 4) + (column << 1) + 8] = dat | get_next_qc2_pixel(quadcolor); + buffer32->line[line][(x << 4) + (column << 1) + 9] = dat | get_next_qc2_pixel(quadcolor); + + } + } else { + for (column = 0; column < 8; column++) { + dat = cols[(fontdat[chr + quadcolor->fontbase][quadcolor->scanline & 7] & (1 << (column ^ 7))) ? 1 : 0]; + buffer32->line[line][(x << 4) + (column << 1) + 8] = dat | get_next_qc2_pixel(quadcolor); + buffer32->line[line][(x << 4) + (column << 1) + 9] = dat | get_next_qc2_pixel(quadcolor); + + } + } + } + } else if (!(quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES_GRAPHICS)) { /* not hi-res (but graphics) => 4-color mode */ + cols[0] = (quadcolor->cgacol & 15) | 16; + col = (quadcolor->cgacol & 16) ? 24 : 16; + if (quadcolor->cgamode & CGA_MODE_FLAG_BW) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 7; /* White */ + } else if (quadcolor->cgacol & 32) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 5; /* Magenta */ + cols[3] = col | 7; /* White */ + } else { + cols[1] = col | 2; /* Green */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 6; /* Yellow */ + } + for (x = 0; x < quadcolor->crtc[CGA_CRTC_HDISP]; x++) { + if (quadcolor->cgamode & CGA_MODE_FLAG_VIDEO_ENABLE) + dat = (quadcolor->vram[quadcolor->page_offset ^ (((quadcolor->memaddr << 1) & 0x1fff) + ((quadcolor->scanline & 1) * 0x2000))] << 8) | + quadcolor->vram[quadcolor->page_offset ^ (((quadcolor->memaddr << 1) & 0x1fff) + ((quadcolor->scanline & 1) * 0x2000) + 1)]; + else + dat = 0; + quadcolor->memaddr++; + for (column = 0; column < 8; column++) { + buffer32->line[line][(x << 4) + (column << 1) + 8] = cols[dat >> 14] | get_next_qc2_pixel(quadcolor); + buffer32->line[line][(x << 4) + (column << 1) + 9] = cols[dat >> 14] | get_next_qc2_pixel(quadcolor); + dat <<= 2; + } + } + } else { /* 2-color hi-res graphics mode */ + cols[0] = quadcolor->quadcolor_ctrl & 15; /* background color (Quadcolor-specific) */; + cols[1] = (quadcolor->cgacol & 15) + 16; + for (x = 0; x < quadcolor->crtc[CGA_CRTC_HDISP]; x++) { + if (quadcolor->cgamode & CGA_MODE_FLAG_VIDEO_ENABLE) /* video enabled */ + dat = (quadcolor->vram[quadcolor->page_offset ^ (((quadcolor->memaddr << 1) & 0x1fff) + ((quadcolor->scanline & 1) * 0x2000))] << 8) | + quadcolor->vram[quadcolor->page_offset ^ (((quadcolor->memaddr << 1) & 0x1fff) + ((quadcolor->scanline & 1) * 0x2000) + 1)]; + else + dat = quadcolor->quadcolor_ctrl & 15; /* TODO: Is Quadcolor bg color actually relevant, here? Probably. See QC2 manual p.46 1. */; + quadcolor->memaddr++; + for (column = 0; column < 16; column++) { + buffer32->line[line][(x << 4) + column + 8] = cols[dat >> 15] | get_next_qc2_pixel(quadcolor); + dat <<= 1; + } + } + } +} + +static void +quadcolor_render_blank(quadcolor_t *quadcolor, int line) +{ + int32_t highres_graphics_flag = (CGA_MODE_FLAG_HIGHRES_GRAPHICS | CGA_MODE_FLAG_GRAPHICS); + + /* `+ 16` isn't in PCem's version */ + int col = ((quadcolor->cgamode & highres_graphics_flag) == highres_graphics_flag) ? (quadcolor->quadcolor_ctrl & 15) + 16 : (quadcolor->cgacol & 15) + 16; /* TODO: Is Quadcolor bg color actually relevant, here? */ + + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) + hline(buffer32, 0, line, (quadcolor->crtc[CGA_CRTC_HDISP] << 3) + 16, col); + else + hline(buffer32, 0, line, (quadcolor->crtc[CGA_CRTC_HDISP] << 4) + 16, col); +} + +static void +quadcolor_render_process(quadcolor_t *quadcolor, int line) +{ + int x; + uint8_t border; + int32_t highres_graphics_flag = (CGA_MODE_FLAG_HIGHRES_GRAPHICS | CGA_MODE_FLAG_GRAPHICS); + + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) + x = (quadcolor->crtc[CGA_CRTC_HDISP] << 3) + 16; + else + x = (quadcolor->crtc[CGA_CRTC_HDISP] << 4) + 16; + + if (quadcolor->composite) { + border = ((quadcolor->cgamode & highres_graphics_flag) == highres_graphics_flag) ? 0 : (quadcolor->cgacol & 15); + + Composite_Process(quadcolor->cgamode, border, x >> 2, buffer32->line[line]); + } else + video_process_8(x, line); +} + +static uint8_t +quadcolor_interpolate_srgb(uint8_t co1, uint8_t co2, double fraction) +{ + uint8_t ret = ((co2 - co1) * fraction + co1); + + return ret; +} + +static uint8_t +quadcolor_interpolate_linear(uint8_t co1, uint8_t co2, double fraction) +{ + double c1, c2; + double r1, r2; + uint8_t ret; + + c1 = ((double) co1) / 255.0; + c1 = pow((co1 >= 0) ? c1 : -c1, 2.19921875); + if (co1 <= 0) + c1 = -c1; + c2 = ((double) co2) / 255.0; + c2 = pow((co2 >= 0) ? c2 : -c2, 2.19921875); + if (co2 <= 0) + c2 = -c2; + r1 = ((c2 - c1) * fraction + c1); + r2 = pow((r1 >= 0.0) ? r1 : -r1, 1.0 / 2.19921875); + if (r1 <= 0.0) + r2 = -r2; + ret = (uint8_t) round(r2 * 255.0); + + return ret; +} + +static color_t +quadcolor_interpolate_lookup(quadcolor_t *quadcolor, color_t color1, color_t color2, UNUSED(double fraction)) +{ + color_t ret; + uint8_t dt = quadcolor->double_type - DOUBLE_INTERPOLATE_SRGB; + + ret.a = 0x00; + ret.r = interp_lut[dt][color1.r][color2.r]; + ret.g = interp_lut[dt][color1.g][color2.g]; + ret.b = interp_lut[dt][color1.b][color2.b]; + + return ret; +} + +static void +quadcolor_interpolate(quadcolor_t *quadcolor, int x, int y, int w, int h) +{ + double quotient = 0.5; + + for (int i = y; i < (y + h); i++) { + if (i & 1) for (int j = x; j < (x + w); j++) { + int prev = i - 1; + int next = i + 1; + color_t prev_color, next_color; + color_t black; + color_t interim_1, interim_2; + color_t final; + + if (i < 0) + continue; + + black.color = 0x00000000; + + if ((prev >= 0) && (prev < (y + h))) + prev_color.color = buffer32->line[prev][j]; + else + prev_color.color = 0x00000000; + + if ((next >= 0) && (next < (y + h))) + next_color.color = buffer32->line[next][j]; + else + next_color.color = 0x00000000; + + interim_1 = quadcolor_interpolate_lookup(quadcolor, prev_color, black, quotient); + interim_2 = quadcolor_interpolate_lookup(quadcolor, black, next_color, quotient); + final = quadcolor_interpolate_lookup(quadcolor, interim_1, interim_2, quotient); + + buffer32->line[i][j] = final.color; + } + } +} + +static void +quadcolor_blit_memtoscreen(quadcolor_t *quadcolor, int x, int y, int w, int h) +{ + if (quadcolor->double_type > DOUBLE_SIMPLE) + quadcolor_interpolate(quadcolor, x, y, w, h); + + video_blit_memtoscreen(x, y, w, h); +} + +void +quadcolor_poll(void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + int x; + int scanline_old; + int oldvc; + int xs_temp; + int ys_temp; + int old_ma; + + if (!quadcolor->linepos) { + timer_advance_u64(&quadcolor->timer, quadcolor->dispofftime); + quadcolor->cgastat |= 1; + quadcolor->linepos = 1; + scanline_old = quadcolor->scanline; + if ((quadcolor->crtc[CGA_CRTC_INTERLACE] & 3) == 3) + quadcolor->scanline = ((quadcolor->scanline << 1) + quadcolor->oddeven) & 7; + if (quadcolor->cgadispon) { + if (quadcolor->displine < quadcolor->firstline) { + quadcolor->firstline = quadcolor->displine; + video_wait_for_buffer(); + } + quadcolor->lastline = quadcolor->displine; + switch (quadcolor->double_type) { + default: + quadcolor_render(quadcolor, quadcolor->displine << 1); + quadcolor_render_blank(quadcolor, (quadcolor->displine << 1) + 1); + break; + case DOUBLE_NONE: + quadcolor_render(quadcolor, quadcolor->displine); + break; + case DOUBLE_SIMPLE: + old_ma = quadcolor->memaddr; + quadcolor_render(quadcolor, quadcolor->displine << 1); + quadcolor->memaddr = old_ma; + quadcolor_render(quadcolor, (quadcolor->displine << 1) + 1); + break; + } + } else { + switch (quadcolor->double_type) { + default: + quadcolor_render_blank(quadcolor, quadcolor->displine << 1); + break; + case DOUBLE_NONE: + quadcolor_render_blank(quadcolor, quadcolor->displine); + break; + case DOUBLE_SIMPLE: + quadcolor_render_blank(quadcolor, quadcolor->displine << 1); + quadcolor_render_blank(quadcolor, (quadcolor->displine << 1) + 1); + break; + } + } + + switch (quadcolor->double_type) { + default: + quadcolor_render_process(quadcolor, quadcolor->displine << 1); + quadcolor_render_process(quadcolor, (quadcolor->displine << 1) + 1); + break; + case DOUBLE_NONE: + quadcolor_render_process(quadcolor, quadcolor->displine); + break; + } + + quadcolor->scanline = scanline_old; + if (quadcolor->vc == quadcolor->crtc[CGA_CRTC_VSYNC] && !quadcolor->scanline) + quadcolor->cgastat |= 8; + quadcolor->displine++; + if (quadcolor->displine >= 360) + quadcolor->displine = 0; + } else { + timer_advance_u64(&quadcolor->timer, quadcolor->dispontime); + quadcolor->linepos = 0; + if (quadcolor->vsynctime) { + quadcolor->vsynctime--; + if (!quadcolor->vsynctime) + quadcolor->cgastat &= ~8; + quadcolor->qc2idx = 0; + quadcolor->qc2mask = 0xf0; + } + if (quadcolor->scanline == (quadcolor->crtc[CGA_CRTC_CURSOR_END] & 31) || ((quadcolor->crtc[CGA_CRTC_INTERLACE] & 3) == 3 && + quadcolor->scanline == ((quadcolor->crtc[CGA_CRTC_CURSOR_END] & 31) >> 1))) { + quadcolor->cursorvisible = 0; + } + if ((quadcolor->crtc[CGA_CRTC_INTERLACE] & 3) == 3 && quadcolor->scanline == (quadcolor->crtc[CGA_CRTC_MAX_SCANLINE_ADDR] >> 1)) + quadcolor->memaddr_backup = quadcolor->memaddr; + if (quadcolor->vadj) { + quadcolor->scanline++; + quadcolor->scanline &= 31; + quadcolor->memaddr = quadcolor->memaddr_backup; + quadcolor->vadj--; + if (!quadcolor->vadj) { + quadcolor->cgadispon = 1; + quadcolor->memaddr = quadcolor->memaddr_backup = (quadcolor->crtc[CGA_CRTC_START_ADDR_LOW] | (quadcolor->crtc[CGA_CRTC_START_ADDR_HIGH] << 8)) & DEVICE_VRAM_MASK; + quadcolor->scanline = 0; + } + } else if (quadcolor->scanline == quadcolor->crtc[CGA_CRTC_MAX_SCANLINE_ADDR]) { + quadcolor->memaddr_backup = quadcolor->memaddr; + quadcolor->scanline = 0; + oldvc = quadcolor->vc; + quadcolor->vc++; + quadcolor->vc &= 127; + + if (quadcolor->vc == quadcolor->crtc[CGA_CRTC_VDISP]) + quadcolor->cgadispon = 0; + + if (oldvc == quadcolor->crtc[CGA_CRTC_VTOTAL]) { + quadcolor->vc = 0; + quadcolor->vadj = quadcolor->crtc[CGA_CRTC_VTOTAL_ADJUST]; + if (!quadcolor->vadj) { + quadcolor->cgadispon = 1; + quadcolor->memaddr = quadcolor->memaddr_backup = (quadcolor->crtc[CGA_CRTC_START_ADDR_LOW] | (quadcolor->crtc[CGA_CRTC_START_ADDR_HIGH] << 8)) & DEVICE_VRAM_MASK; + } + + switch (quadcolor->crtc[CGA_CRTC_CURSOR_START] & 0x60) { + case 0x20: + quadcolor->cursoron = 0; + break; + case 0x60: + quadcolor->cursoron = quadcolor->cgablink & 0x10; + break; + default: + quadcolor->cursoron = quadcolor->cgablink & 0x08; + break; + } + } + + if (quadcolor->vc == quadcolor->crtc[CGA_CRTC_VSYNC]) { + quadcolor->cgadispon = 0; + quadcolor->displine = 0; + quadcolor->vsynctime = 16; + if (quadcolor->crtc[CGA_CRTC_VSYNC]) { + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) + x = (quadcolor->crtc[CGA_CRTC_HDISP] << 3) + 16; + else + x = (quadcolor->crtc[CGA_CRTC_HDISP] << 4) + 16; + quadcolor->lastline++; + + xs_temp = x; + ys_temp = quadcolor->lastline - quadcolor->firstline; + if (quadcolor->double_type > DOUBLE_NONE) + ys_temp <<= 1; + + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 656; + if (ys_temp < 32) + ys_temp = 200; + if (!enable_overscan) + xs_temp -= 16; + + if ((quadcolor->cgamode & CGA_MODE_FLAG_VIDEO_ENABLE) && ((xs_temp != xsize) || + (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + if (quadcolor->double_type > DOUBLE_NONE) + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + else + set_screen_size(xsize, ysize + (enable_overscan ? 8 : 0)); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + + if (quadcolor->double_type > DOUBLE_NONE) { + if (enable_overscan) + quadcolor_blit_memtoscreen(quadcolor, 0, (quadcolor->firstline - 4) << 1, + xsize, ((quadcolor->lastline - quadcolor->firstline) << 1) + 16); + else + quadcolor_blit_memtoscreen(quadcolor, 8, quadcolor->firstline << 1, + xsize, (quadcolor->lastline - quadcolor->firstline) << 1); + } else { + if (enable_overscan) + video_blit_memtoscreen(0, quadcolor->firstline - 4, + xsize, (quadcolor->lastline - quadcolor->firstline) + 8); + else + video_blit_memtoscreen(8, quadcolor->firstline, + xsize, quadcolor->lastline - quadcolor->firstline); + } + } + + frames++; + + video_res_x = xsize; + video_res_y = ysize; + if (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES) { + video_res_x /= 8; + video_res_y /= quadcolor->crtc[CGA_CRTC_MAX_SCANLINE_ADDR] + 1; + video_bpp = 0; + } else if (!(quadcolor->cgamode & CGA_MODE_FLAG_GRAPHICS)) { + video_res_x /= 16; + video_res_y /= quadcolor->crtc[CGA_CRTC_MAX_SCANLINE_ADDR] + 1; + video_bpp = 0; + } else if (!(quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES_GRAPHICS)) { + video_res_x /= 2; + video_bpp = 2; + } else + video_bpp = 1; + } + quadcolor->firstline = 1000; + quadcolor->lastline = 0; + quadcolor->cgablink++; + quadcolor->oddeven ^= 1; + } + } else { + quadcolor->scanline++; + quadcolor->scanline &= 31; + quadcolor->memaddr = quadcolor->memaddr_backup; + } + if (quadcolor->cgadispon) + quadcolor->cgastat &= ~1; + if (quadcolor->scanline == (quadcolor->crtc[CGA_CRTC_CURSOR_START] & 31) || ((quadcolor->crtc[CGA_CRTC_INTERLACE] & 3) == 3 && + quadcolor->scanline == ((quadcolor->crtc[CGA_CRTC_CURSOR_START] & 31) >> 1))) + quadcolor->cursorvisible = 1; + if (quadcolor->cgadispon && (quadcolor->cgamode & CGA_MODE_FLAG_HIGHRES)) { + for (x = 0; x < (quadcolor->crtc[CGA_CRTC_HDISP] << 1); x++) + quadcolor->charbuffer[x] = quadcolor->vram[(quadcolor->page_offset ^ ((quadcolor->memaddr << 1) + x)) & DEVICE_VRAM_MASK]; + } + } +} + +void +quadcolor_init(quadcolor_t *quadcolor) +{ + timer_add(&quadcolor->timer, quadcolor_poll, quadcolor, 1); + quadcolor->composite = 0; +} + +void * +quadcolor_standalone_init(UNUSED(const device_t *info)) +{ + int display_type; + quadcolor_t *quadcolor = calloc(1, sizeof(quadcolor_t)); + + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_quadcolor); + + display_type = device_get_config_int("display_type"); + quadcolor->composite = (display_type != CGA_RGB); + quadcolor->revision = device_get_config_int("composite_type"); + quadcolor->has_2nd_charset = device_get_config_int("has_2nd_charset"); + quadcolor->has_quadcolor_2 = device_get_config_int("has_quadcolor_2"); + + quadcolor->vram = malloc(DEVICE_VRAM); + quadcolor->vram_2 = malloc(0x10000); + + cga_comp_init(quadcolor->revision); + timer_add(&quadcolor->timer, quadcolor_poll, quadcolor, 1); + mem_mapping_add(&quadcolor->mapping, 0xb8000, 0x08000, quadcolor_read, NULL, NULL, quadcolor_write, NULL, NULL, NULL /*quadcolor->vram*/, MEM_MAPPING_EXTERNAL, quadcolor); + /* add mapping for vram_2 at 0xd0000, mirrored at 0xe0000 */ + if (quadcolor->has_quadcolor_2) + mem_mapping_add(&quadcolor->mapping_2, 0xd0000, 0x20000, quadcolor_2_read, NULL, NULL, quadcolor_2_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, + quadcolor); + + io_sethandler(0x03d0, 0x0010, quadcolor_in, NULL, NULL, quadcolor_out, NULL, NULL, quadcolor); + + overscan_x = overscan_y = 16; + + quadcolor->rgb_type = device_get_config_int("rgb_type"); + cga_palette = (quadcolor->rgb_type << 1); + cgapal_rebuild(); + update_cga16_color(quadcolor->cgamode); + + quadcolor->double_type = device_get_config_int("double_type"); + + for (uint16_t i = 0; i < 256; i++) { + for (uint16_t j = 0; j < 256; j++) { + interp_lut[0][i][j] = quadcolor_interpolate_srgb(i, j, 0.5); + interp_lut[1][i][j] = quadcolor_interpolate_linear(i, j, 0.5); + } + } + + switch(device_get_config_int("font")) { + case 0: + loadfont(FONT_IBM_MDA_437_PATH, 0); + break; + case 1: + loadfont(FONT_IBM_MDA_437_NORDIC_PATH, 0); + break; + case 4: + loadfont(FONT_TULIP_DGA_PATH, 0); + break; + } + + return quadcolor; +} + +void +quadcolor_close(void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + + free(quadcolor->vram); + free(quadcolor->vram_2); + free(quadcolor); +} + +void +quadcolor_speed_changed(void *priv) +{ + quadcolor_t *quadcolor = (quadcolor_t *) priv; + + quadcolor_recalctimings(quadcolor); +} + +// clang-format off +const device_config_t quadcolor_config[] = { + { + .name = "display_type", + .description = "Display type", + .type = CONFIG_SELECTION, + .default_string = NULL, + .default_int = CGA_RGB, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { + { .description = "RGB", .value = CGA_RGB }, + { .description = "Composite", .value = CGA_COMPOSITE }, + { .description = "" } + }, + .bios = { { 0 } } + }, + { + .name = "composite_type", + .description = "Composite type", + .type = CONFIG_SELECTION, + .default_string = NULL, + .default_int = COMPOSITE_OLD, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { + { .description = "Old", .value = COMPOSITE_OLD }, + { .description = "New", .value = COMPOSITE_NEW }, + { .description = "" } + }, + .bios = { { 0 } } + }, + { + .name = "rgb_type", + .description = "RGB type", + .type = CONFIG_SELECTION, + .default_string = NULL, + .default_int = 5, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { + { .description = "Color (generic)", .value = 0 }, + { .description = "Green Monochrome", .value = 1 }, + { .description = "Amber Monochrome", .value = 2 }, + { .description = "Gray Monochrome", .value = 3 }, + { .description = "Color (no brown)", .value = 4 }, + { .description = "Color (IBM 5153)", .value = 5 }, + { .description = "" } + }, + .bios = { { 0 } } + }, + { + .name = "double_type", + .description = "Line doubling type", + .type = CONFIG_SELECTION, + .default_string = NULL, + .default_int = DOUBLE_NONE, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { + { .description = "None", .value = DOUBLE_NONE }, + { .description = "Simple doubling", .value = DOUBLE_SIMPLE }, + { .description = "sRGB interpolation", .value = DOUBLE_INTERPOLATE_SRGB }, + { .description = "Linear interpolation", .value = DOUBLE_INTERPOLATE_LINEAR }, + { .description = "" } + }, + .bios = { { 0 } } + }, + { + .name = "font", + .description = "Font", + .type = CONFIG_SELECTION, + .default_string = NULL, + .default_int = 0, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { + { .description = "US (CP 437)", .value = 0 }, + { .description = "IBM Nordic (CP 437-Nordic)", .value = 1 }, + { .description = "Tulip DGA", .value = 4 }, + { .description = "" } + }, + .bios = { { 0 } } + }, + { + .name = "has_2nd_charset", + .description = "Has secondary 8x8 character set", + .type = CONFIG_BINARY, + .default_string = NULL, + .default_int = 0, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { { 0 } }, + .bios = { { 0 } } + }, + { + .name = "has_quadcolor_2", + .description = "Has Quadcolor II daughter board", + .type = CONFIG_BINARY, + .default_string = NULL, + .default_int = 1, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { { 0 } }, + .bios = { { 0 } } + }, + { + .name = "contrast", + .description = "Alternate monochrome contrast", + .type = CONFIG_BINARY, + .default_string = NULL, + .default_int = 0, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { { 0 } }, + .bios = { { 0 } } + }, + { .name = "", .description = "", .type = CONFIG_END } +}; +// clang-format on + +const device_t quadcolor_device = { + .name = "Quadram Quadcolor I / I+II", + .internal_name = "quadcolor", + .flags = DEVICE_ISA, + .local = 0, + .init = quadcolor_standalone_init, + .close = quadcolor_close, + .reset = NULL, + .available = NULL, + .speed_changed = quadcolor_speed_changed, + .force_redraw = NULL, + .config = quadcolor_config +}; diff --git a/src/video/vid_table.c b/src/video/vid_table.c index b97defe8c..2e42e5c2c 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -67,6 +67,7 @@ video_cards[] = { { .device = &ati18800_device, .flags = VIDEO_FLAG_TYPE_NONE }, { .device = &ati18800_wonder_device, .flags = VIDEO_FLAG_TYPE_NONE }, { .device = &cga_device, .flags = VIDEO_FLAG_TYPE_NONE }, + { .device = &quadcolor_device, .flags = VIDEO_FLAG_TYPE_NONE }, { .device = &sega_device, .flags = VIDEO_FLAG_TYPE_NONE }, { .device = &jega_device, .flags = VIDEO_FLAG_TYPE_NONE }, { .device = &gd5401_isa_device, .flags = VIDEO_FLAG_TYPE_NONE }, From 6814a11ae6c0140af6227e6f7341a023eb9cdfc1 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 29 Jun 2025 19:42:57 -0400 Subject: [PATCH 31/31] Minor changes in cga --- src/include/86box/vid_cga.h | 29 ++++++++++++----------------- src/include/86box/video.h | 7 +++++++ src/machine/m_xt_zenith.c | 2 +- src/video/vid_cga.c | 15 ++++++--------- src/video/vid_cga_olivetti.c | 1 + 5 files changed, 27 insertions(+), 27 deletions(-) diff --git a/src/include/86box/vid_cga.h b/src/include/86box/vid_cga.h index 04616431e..2198154ed 100644 --- a/src/include/86box/vid_cga.h +++ b/src/include/86box/vid_cga.h @@ -8,15 +8,13 @@ * * Emulation of the old and new IBM CGA graphics cards. * - * - * * Authors: Sarah Walker, - * Miran Grca, , + * Miran Grca, * Connor Hyde / starfrost, * * Copyright 2008-2018 Sarah Walker. * Copyright 2016-2018 Miran Grca. - * Copyright 2025 starfrost (refactoring) + * Copyright 2025 starfrost (refactoring). */ #ifndef VIDEO_CGA_H @@ -24,8 +22,7 @@ // Mode flags for the CGA. // Set by writing to 3D8 -typedef enum cga_mode_flags_e -{ +typedef enum cga_mode_flags_e { CGA_MODE_FLAG_HIGHRES = 1 << 0, // 80-column text mode CGA_MODE_FLAG_GRAPHICS = 1 << 1, // Graphics mode CGA_MODE_FLAG_BW = 1 << 2, // Black and white @@ -35,8 +32,7 @@ typedef enum cga_mode_flags_e } cga_mode_flags; // Motorola MC6845 CRTC registers -typedef enum cga_crtc_registers_e -{ +typedef enum cga_crtc_registers_e { CGA_CRTC_HTOTAL = 0x0, // Horizontal total (total number of characters incl. hsync) CGA_CRTC_HDISP = 0x1, // Horizontal display CGA_CRTC_HSYNC_POS = 0x2, // Horizontal position of horizontal ysnc @@ -58,8 +54,7 @@ typedef enum cga_crtc_registers_e } cga_crtc_registers; // Registers for the CGA -typedef enum cga_registers_e -{ +typedef enum cga_registers_e { CGA_REGISTER_CRTC_INDEX = 0x3D4, CGA_REGISTER_CRTC_DATA = 0x3D5, CGA_REGISTER_MODE_CONTROL = 0x3D8, @@ -129,11 +124,11 @@ uint8_t cga_read(uint32_t addr, void *priv); void cga_recalctimings(cga_t *cga); void cga_poll(void *priv); -#ifdef EMU_DEVICE_H -extern const device_config_t cga_config[]; - -extern const device_t cga_device; -extern const device_t cga_pravetz_device; -#endif - +//#ifdef EMU_DEVICE_H +//extern const device_config_t cga_config[]; +// +//extern const device_t cga_device; +//extern const device_t cga_pravetz_device; +//#endif +// #endif /*VIDEO_CGA_H*/ diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 70d031a4f..62fea0b9a 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -399,6 +399,13 @@ extern const device_t gd5446_pci_device; extern const device_t gd5446_stb_pci_device; extern const device_t gd5480_pci_device; + +/* IBM CGA*/ +extern const device_t cga_device; + +/* pravetz CGA */ +extern const device_t cga_pravetz_device; + /* Compaq CGA */ extern const device_t compaq_cga_device; extern const device_t compaq_cga_2_device; diff --git a/src/machine/m_xt_zenith.c b/src/machine/m_xt_zenith.c index 62c6496d1..2159c18e5 100644 --- a/src/machine/m_xt_zenith.c +++ b/src/machine/m_xt_zenith.c @@ -45,7 +45,7 @@ #include <86box/serial.h> #include <86box/machine.h> #include <86box/io.h> -#include <86box/vid_cga.h> +#include <86box/video.h> #include <86box/plat_unused.h> typedef struct { diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index 2abfe6a5c..1ca742890 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -8,15 +8,13 @@ * * Emulation of the old and new IBM CGA graphics cards. * - * - * * Authors: Sarah Walker, * Miran Grca, * W. M. Martinez, * * Copyright 2008-2019 Sarah Walker. * Copyright 2016-2019 Miran Grca. - * Copyright 2023 W. M. Martinez + * Copyright 2023 W. M. Martinez */ #include #include @@ -284,7 +282,7 @@ cga_render(cga_t *cga, int line) buffer32->line[line][column + (cga->crtc[CGA_CRTC_HDISP] << 4) + 8] = (cga->cgacol & 15) + 16; } } - if (cga->cgamode & CGA_MODE_FLAG_HIGHRES) { + if (cga->cgamode & CGA_MODE_FLAG_HIGHRES) { /* 80-column text */ for (x = 0; x < cga->crtc[CGA_CRTC_HDISP]; x++) { if (cga->cgamode & CGA_MODE_FLAG_VIDEO_ENABLE) { chr = cga->charbuffer[x << 1]; @@ -342,7 +340,7 @@ cga_render(cga_t *cga, int line) } } } - } else if (!(cga->cgamode & CGA_MODE_FLAG_HIGHRES_GRAPHICS)) { + } else if (!(cga->cgamode & CGA_MODE_FLAG_HIGHRES_GRAPHICS)) { /* not hi-res (but graphics) => 4-color mode */ cols[0] = (cga->cgacol & 15) | 16; col = (cga->cgacol & 16) ? 24 : 16; if (cga->cgamode & CGA_MODE_FLAG_BW) { @@ -372,7 +370,7 @@ cga_render(cga_t *cga, int line) dat <<= 2; } } - } else { + } else { /* 2-color hi-res graphics mode */ cols[0] = 0; cols[1] = (cga->cgacol & 15) + 16; for (x = 0; x < cga->crtc[CGA_CRTC_HDISP]; x++) { @@ -500,7 +498,7 @@ cga_interpolate(cga_t *cga, int x, int y, int w, int h) interim_1 = cga_interpolate_lookup(cga, prev_color, black, quotient); interim_2 = cga_interpolate_lookup(cga, black, next_color, quotient); - final = cga_interpolate_lookup(cga, interim_1, interim_2, quotient); + final = cga_interpolate_lookup(cga, interim_1, interim_2, quotient); buffer32->line[i][j] = final.color; } @@ -746,9 +744,8 @@ void * cga_standalone_init(UNUSED(const device_t *info)) { int display_type; - cga_t *cga = malloc(sizeof(cga_t)); + cga_t *cga = calloc(1, sizeof(cga_t)); - memset(cga, 0, sizeof(cga_t)); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_cga); display_type = device_get_config_int("display_type"); diff --git a/src/video/vid_cga_olivetti.c b/src/video/vid_cga_olivetti.c index 8be40ee2e..147529f6e 100644 --- a/src/video/vid_cga_olivetti.c +++ b/src/video/vid_cga_olivetti.c @@ -38,6 +38,7 @@ #include <86box/rom.h> #include <86box/device.h> #include <86box/vid_cga.h> +extern const device_config_t cga_config[]; /* defined in vid_cga.c */ #include <86box/vid_ogc.h> #include <86box/vid_cga_comp.h> #include <86box/plat_unused.h>