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Merge remote-tracking branch 'origin/master' into version/4.1

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This commit is contained in:
OBattler
2023-08-07 03:18:29 +02:00
parent 83c0efa042 c30d5d90b7
commit 036dcbf2a6
92 changed files with 3015 additions and 2503 deletions
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3
src/include/86box/acpi.h
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@@ -113,7 +113,8 @@ typedef struct acpi_regs_t {
typedef struct acpi_t {
acpi_regs_t regs;
uint8_t gpireg2_default;
uint8_t pad[3];
uint8_t irq_state;
uint8_t pad[2];
uint8_t gporeg_default[4];
uint8_t suspend_types[8];
uint16_t io_base;

4
src/include/86box/hdc_ide_sff8038i.h
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@@ -26,11 +26,11 @@ typedef struct sff8038i_t {
uint8_t ptr0;
uint8_t enabled;
uint8_t dma_mode;
uint8_t irq_state;
uint8_t pad;
uint8_t pad0;
uint8_t pad1;
uint16_t base;
uint16_t pad2;
uint16_t pad1;
uint32_t ptr;
uint32_t ptr_cur;
uint32_t addr;

300
src/include/86box/pci.h
View File

@@ -11,146 +11,260 @@
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <https://pcem-emulator.co.uk/>
*
* Copyright 2016-2020 Miran Grca.
* Copyright 2017-2020 Fred N. van Kempen.
* Copyright 2008-2020 Sarah Walker.
* Copyright 2023 Miran Grca.
*/
#ifndef EMU_PCI_H
#define EMU_PCI_H
#define PCI_REG_COMMAND 0x04
#define PCI_REG_VENDOR_ID_L 0x00
#define PCI_REG_VENDOR_ID_H 0x01
#define PCI_REG_DEVICE_ID_L 0x02
#define PCI_REG_DEVICE_ID_H 0x03
#define PCI_REG_COMMAND_L 0x04
#define PCI_REG_COMMAND_H 0x05
#define PCI_REG_STATUS_L 0x06
#define PCI_REG_STATUS_H 0x07
#define PCI_REG_REVISION 0x08
#define PCI_REG_PROG_IF 0x09
#define PCI_REG_SUBCLASS 0x0a
#define PCI_REG_CLASS 0x0b
#define PCI_REG_CACHELINE_SIZE 0x0c
#define PCI_REG_LATENCY_TIMER 0x0d
#define PCI_REG_HEADER_TYPE 0x0e
#define PCI_REG_BIST 0x0f
#define PCI_COMMAND_IO 0x01
#define PCI_COMMAND_MEM 0x02
#define PCI_COMMAND_L_IO 0x01
#define PCI_COMMAND_L_MEM 0x02
#define PCI_COMMAND_L_BM 0x04
#define PCI_COMMAND_L_SPECIAL 0x08
#define PCI_COMMAND_L_MEM_WIEN 0x10
#define PCI_COMMAND_L_VGASNOOP 0x20
#define PCI_COMMAND_L_PARITY 0x40
#define PCI_NO_IRQ_STEERING 0x8000
#define PCI_CAN_SWITCH_TYPE 0x10000
#define PCI_NO_BRIDGES 0x20000
#define PCI_ALWAYS_EXPOSE_DEV0 0x40000
#define PCI_COMMAND_H_SERR 0x01
#define PCI_COMMAND_H_FAST_B2B 0x02
#define PCI_COMMAND_H_INT_DIS 0x04
#define PCI_CONFIG_TYPE_1 1
#define PCI_CONFIG_TYPE_2 2
#define PCI_STATUS_L_INT 0x08
#define PCI_STATUS_L_CAPAB 0x10
#define PCI_STATUS_L_66MHZ 0x20
#define PCI_STATUS_L_FAST_B2B 0x80
#define PCI_CONFIG_TYPE_MASK 0x7fff
#define PCI_STATUS_H_MDPERR 0x01 /* Master Data Parity Error */
#define PCI_STATUS_H_DEVSEL 0x06
#define PCI_STATUS_H_STA 0x08 /* Signaled Target Abort */
#define PCI_STATUS_H_RTA 0x10 /* Received Target Abort */
#define PCI_STATUS_H_RMA 0x20 /* Received Master Abort */
#define PCI_STATUS_H_SSE 0x40 /* Signaled System Error */
#define PCI_STATUS_H_DPERR 0x80 /* Detected Parity Error */
#define PCI_INTA 1
#define PCI_INTB 2
#define PCI_INTC 3
#define PCI_INTD 4
#define PCI_DEVSEL_FAST 0x00
#define PCI_DEVSEL_MEDIUM 0x02
#define PCI_DEVSEL_SLOW 0x04
#define PCI_MIRQ0 0
#define PCI_MIRQ1 1
#define PCI_MIRQ2 2
#define PCI_MIRQ3 3
#define PCI_MIRQ4 4
#define PCI_MIRQ5 5
#define PCI_MIRQ6 6
#define PCI_MIRQ7 7
#define FLAG_MECHANISM_1 0x00000001
#define FLAG_MECHANISM_2 0x00000002
#define FLAG_MECHANISM_SWITCH 0x00000004
#define FLAG_CONFIG_IO_ON 0x00000008
#define FLAG_CONFIG_DEV0_IO_ON 0x00000010
#define FLAG_CONFIG_M1_IO_ON 0x00000020
#define FLAG_NO_IRQ_STEERING 0x00000040
#define FLAG_NO_BRIDGES 0x00000080
#define PCI_IRQ_DISABLED -1
#define FLAG_MECHANISM_MASK FLAG_MECHANISM_1 | FLAG_MECHANISM_2
#define FLAG_MASK 0x0000007f
#define PCI_ADD_STRICT 0x80
#define PCI_INTA 1
#define PCI_INTB 2
#define PCI_INTC 3
#define PCI_INTD 4
#define PCI_MIRQ0 0
#define PCI_MIRQ1 1
#define PCI_MIRQ2 2
#define PCI_MIRQ3 3
#define PCI_MIRQ4 4
#define PCI_MIRQ5 5
#define PCI_MIRQ6 6
#define PCI_MIRQ7 7
#define PCI_IRQ_DISABLED -1
#define PCI_ADD_STRICT 0x40
#define PCI_ADD_MASK (PCI_ADD_STRICT - 1)
#define PCI_ADD_VFIO 0x80
#define PCI_ADD_VFIO_MASK (PCI_ADD_VFIO - 1)
#define PCI_CARD_VFIO PCI_ADD_VFIO
#define PCI_BUS_INVALID 0xff
#define PCI_IGNORE_NO_SLOT 0xff
/* The number of an invalid PCI card. */
#define PCI_CARD_INVALID 0xef
/* PCI cards (currently 32). */
#define PCI_CARDS_NUM 0x20
#define PCI_CARD_MAX (PCI_CARDS_NUM - 1)
/* The number of PCI card INT pins - always at 4 per the PCI specification. */
#define PCI_INT_PINS_NUM 4
/* The base for MIRQ lines accepted by pci_irq(). */
#define PCI_MIRQ_BASE PCI_CARDS_NUM
/* PCI MIRQ lines (currently 8, this many are needed by the ALi M1543(C). */
#define PCI_MIRQS_NUM 8
#define PCI_MIRQ_MAX (PCI_MIRQS_NUM - 1)
/* The base for direct IRQ lines accepted by pci_irq(). */
#define PCI_DIRQ_BASE 0xf0
/* PCI direct IRQ lines (currently 16 because we only emulate the legacy PIC). */
#define PCI_DIRQS_NUM 16
#define PCI_DIRQ_MAX (PCI_DIRQS_NUM - 1)
/* PCI IRQ routings (currently 16, this many are needed by the OPTi 822). */
#define PCI_IRQS_NUM 16
#define PCI_IRQ_MAX (PCI_IRQS_NUM - 1)
/* Legacy flags. */
#define PCI_REG_COMMAND PCI_REG_COMMAND_L
#define PCI_COMMAND_IO PCI_COMMAND_L_IO
#define PCI_COMMAND_MEM PCI_COMMAND_L_MEM
#define PCI_CONFIG_TYPE_1 FLAG_MECHANISM_1
#define PCI_CONFIG_TYPE_2 FLAG_MECHANISM_2
#define PCI_CAN_SWITCH_TYPE FLAG_MECHANISM_SWITCH
#define PCI_ALWAYS_EXPOSE_DEV0 FLAG_CONFIG_DEV0_IO_ON
#define PCI_NO_IRQ_STEERING FLAG_NO_IRQ_STEERING
#define PCI_NO_BRIDGES FLAG_NO_BRIDGES
#define PCI_CONFIG_TYPE_MASK FLAG_MECHANISM_MASK
#define bar_t pci_bar_t
#define trc_init pci_trc_init
#define pci_register_slot(card, type, inta, intb, intc, intd) \
pci_register_bus_slot(0, card, type, inta, intb, intc, intd)
#define pci_set_mirq(mirq, level, irq_state) \
pci_irq(PCI_MIRQ_BASE | mirq, 0, level, 1, irq_state)
#define pci_set_irq(slot, pci_int, irq_state) \
pci_irq(slot, pci_int, 0, 1, irq_state)
#define pci_clear_mirq(mirq, level, irq_state) \
pci_irq(PCI_MIRQ_BASE | mirq, 0, level, 0, irq_state)
#define pci_clear_irq(slot, pci_int, irq_state) \
pci_irq(slot, pci_int, 0, 0, irq_state)
enum {
PCI_CARD_NORTHBRIDGE = 0,
PCI_CARD_AGPBRIDGE = 1,
PCI_CARD_SOUTHBRIDGE = 2,
PCI_CARD_SOUTHBRIDGE_IDE = 3,
PCI_CARD_SOUTHBRIDGE_PMU = 4,
PCI_CARD_SOUTHBRIDGE_USB = 5,
PCI_CARD_NORTHBRIDGE_SEC = 1,
PCI_CARD_AGPBRIDGE = 2,
PCI_CARD_SOUTHBRIDGE = 3,
PCI_CARD_SOUTHBRIDGE_IDE = 4,
PCI_CARD_SOUTHBRIDGE_PMU = 5,
PCI_CARD_SOUTHBRIDGE_USB = 6,
PCI_CARD_AGP = 0x0f,
PCI_CARD_NORMAL = 0x10,
PCI_CARD_VIDEO = 0x11,
PCI_CARD_SCSI = 0x12,
PCI_CARD_SOUND = 0x13,
PCI_CARD_IDE = 0x14,
PCI_CARD_NETWORK = 0x15,
PCI_CARD_BRIDGE = 0x16
PCI_CARD_HANGUL = 0x12,
PCI_CARD_IDE = 0x13,
PCI_CARD_SCSI = 0x14,
PCI_CARD_SOUND = 0x15,
PCI_CARD_MODEM = 0x16,
PCI_CARD_NETWORK = 0x17,
PCI_CARD_UART = 0x18,
PCI_CARD_USB = 0x19,
PCI_CARD_BRIDGE = 0x1a
};
enum {
PCI_ADD_NORTHBRIDGE = 0,
PCI_ADD_AGPBRIDGE = 1,
PCI_ADD_SOUTHBRIDGE = 2,
PCI_ADD_SOUTHBRIDGE_IDE = 3,
PCI_ADD_SOUTHBRIDGE_PMU = 4,
PCI_ADD_SOUTHBRIDGE_USB = 5,
PCI_ADD_NORTHBRIDGE_SEC = 1,
PCI_ADD_AGPBRIDGE = 2,
PCI_ADD_SOUTHBRIDGE = 3,
PCI_ADD_SOUTHBRIDGE_IDE = 4,
PCI_ADD_SOUTHBRIDGE_PMU = 5,
PCI_ADD_SOUTHBRIDGE_USB = 6,
PCI_ADD_AGP = 0x0f,
PCI_ADD_NORMAL = 0x10,
PCI_ADD_VIDEO = 0x11,
PCI_ADD_SCSI = 0x12,
PCI_ADD_SOUND = 0x13,
PCI_ADD_IDE = 0x14,
PCI_ADD_NETWORK = 0x15,
PCI_ADD_BRIDGE = 0x16
PCI_ADD_HANGUL = 0x12,
PCI_ADD_IDE = 0x13,
PCI_ADD_SCSI = 0x14,
PCI_ADD_SOUND = 0x15,
PCI_ADD_MODEM = 0x16,
PCI_ADD_NETWORK = 0x17,
PCI_ADD_UART = 0x18,
PCI_ADD_USB = 0x19,
PCI_ADD_BRIDGE = 0x1a
};
typedef union {
uint32_t addr;
uint8_t addr_regs[4];
} bar_t;
} pci_bar_t;
extern int pci_burst_time;
extern int agp_burst_time;
extern int pci_nonburst_time;
extern int agp_nonburst_time;
#define PCI_IO_ON 0x01
#define PCI_IO_DEV0 0x02
extern int pci_flags;
extern uint32_t pci_base;
extern uint32_t pci_size;
extern int pci_burst_time;
extern int agp_burst_time;
extern int pci_nonburst_time;
extern int agp_nonburst_time;
extern int pci_take_over_io;
extern void pci_set_irq_routing(int pci_int, int irq);
extern void pci_set_irq_level(int pci_int, int level);
extern void pci_enable_mirq(int mirq);
extern void pci_set_mirq_routing(int mirq, int irq);
extern uint32_t pci_base;
extern uint32_t pci_size;
/* PCI raise IRQ: the first parameter is slot if < PCI_MIRQ_BASE, MIRQ if >= PCI_MIRQ_BASE
and < PCI_DIRQ_BASE, and direct IRQ line if >= PCI_DIRQ_BASE (RichardG's
hack that may no longer be needed). */
extern void pci_irq(uint8_t slot, uint8_t pci_int, int level, int set, uint8_t *irq_state);
extern uint8_t pci_get_int(uint8_t slot, uint8_t pci_int);
extern void pci_type2_write(uint16_t port, uint8_t val, void *priv);
extern void pci_type2_writew(uint16_t port, uint16_t val, void *priv);
extern void pci_type2_writel(uint16_t port, uint32_t val, void *priv);
extern uint8_t pci_type2_read(uint16_t port, void *priv);
extern uint16_t pci_type2_readw(uint16_t port, void *priv);
extern uint32_t pci_type2_readl(uint16_t port, void *priv);
/* Relocate a PCI device to a new slot, required for the configurable
IDSEL's of ALi M1543(c). */
extern void pci_relocate_slot(int type, int new_slot);
extern void pci_set_irq_routing(int pci_int, int irq);
extern void pci_set_irq_level(int pci_int, int level);
/* Write PCI enable/disable key, split for the ALi M1435. */
extern void pci_key_write(uint8_t val);
extern void pci_enable_mirq(int mirq);
extern void pci_set_mirq_routing(int mirq, int irq);
/* Set PMC (ie. change PCI configuration mechanism), 0 = #2, 1 = #1. */
extern void pci_set_pmc(uint8_t pmc);
extern int pci_irq_is_level(int irq);
extern void pci_pic_reset(void);
extern void pci_reset(void);
extern void pci_set_mirq(uint8_t mirq, int level);
extern void pci_set_irq(uint8_t card, uint8_t pci_int);
extern void pci_clear_mirq(uint8_t mirq, int level);
extern void pci_clear_irq(uint8_t card, uint8_t pci_int);
extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int);
/* Needed for the io.c handling of configuration mechanism #2 ports C000-CFFF. */
extern void pci_write(uint16_t port, uint8_t val, void *priv);
extern void pci_writew(uint16_t port, uint16_t val, void *priv);
extern void pci_writel(uint16_t port, uint32_t val, void *priv);
extern uint8_t pci_read(uint16_t port, void *priv);
extern uint16_t pci_readw(uint16_t port, void *priv);
extern uint32_t pci_readl(uint16_t port, void *priv);
extern void pci_reset(void);
extern void pci_init(int type);
extern uint8_t pci_register_bus(void);
extern void pci_set_pmc(uint8_t pmc);
extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number);
extern void pci_relocate_slot(int type, int new_slot);
extern void pci_register_slot(int card, int type,
int inta, int intb, int intc, int intd);
extern void pci_register_bus_slot(int bus, int card, int type,
int inta, int intb, int intc, int intd);
extern void pci_close(void);
extern uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv);
extern uint8_t pci_register_bus(void);
extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number);
extern void pci_register_bus_slot(int bus, int card, int type, int inta, int intb, int intc, int intd);
extern void trc_init(void);
/* Add a PCI card. */
extern void pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv),
void (*write)(int func, int addr, uint8_t val, void *priv), void *priv, uint8_t *slot);
extern uint8_t trc_read(uint16_t port, void *priv);
extern void trc_write(uint16_t port, uint8_t val, void *priv);
/* Add an instance of the PCI bridge. */
extern uint8_t pci_add_bridge(uint8_t (*read)(int func, int addr, void *priv),
void (*write)(int func, int addr, uint8_t val, void *priv), void *priv);
extern void pci_bridge_set_ctl(void *priv, uint8_t ctl);
/* Register the cards that have been added into slots. */
extern void pci_register_cards(void);
extern void pci_pic_reset(void);
extern void pci_init(int flags);
/* PCI bridge stuff. */
extern void pci_bridge_set_ctl(void *priv, uint8_t ctl);
#ifdef EMU_DEVICE_H
extern const device_t dec21150_device;

32
src/include/86box/pic.h
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@@ -19,6 +19,13 @@
#ifndef EMU_PIC_H
#define EMU_PIC_H
typedef struct pic_latch {
uint8_t d;
uint8_t e;
uint8_t q;
uint8_t nq;
} pic_latch_t;
typedef struct pic {
uint8_t icw1;
uint8_t icw2;
@@ -38,8 +45,13 @@ typedef struct pic {
uint8_t special_mask_mode;
uint8_t auto_eoi_rotate;
uint8_t interrupt;
uint8_t lines;
uint8_t data_bus;
uint8_t irq_latch;
uint8_t has_slaves;
uint8_t flags;
uint8_t edge_lines;
uint8_t pad;
uint32_t lines[8];
uint32_t at;
struct pic *slaves[8];
} pic_t;
@@ -70,12 +82,22 @@ extern void pic2_init(void);
extern void pic_reset(void);
extern int picint_is_level(int irq);
extern void picint_common(uint16_t num, int level, int set);
extern void picint(uint16_t num);
extern void picintlevel(uint16_t num);
extern void picintc(uint16_t num);
extern void picint_common(uint16_t num, int level, int set, uint8_t *irq_state);
extern int picinterrupt(void);
#define PIC_IRQ_EDGE 0
#define PIC_IRQ_LEVEL 1
#define PIC_SLAVE_PENDING 0x01
#define PIC_FREEZE 0x02
#define PIC_MASTER_CLEAR 0x04
/* Legacy defines. */
#define picint(num) picint_common(num, PIC_IRQ_EDGE, 1, NULL)
#define picintlevel(num, irq_state) picint_common(num, PIC_IRQ_LEVEL, 1, irq_state)
#define picintc(num) picint_common(num, PIC_IRQ_EDGE, 0, NULL)
#define picintclevel(num, irq_state) picint_common(num, PIC_IRQ_LEVEL, 0, irq_state)
extern uint8_t pic_irq_ack(void);
#endif /*EMU_PIC_H*/

6
src/include/86box/scsi_x54x.h
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@@ -396,6 +396,10 @@ typedef struct x54x_t {
uint8_t setup_info_len;
uint8_t max_id;
uint8_t pci_slot;
uint8_t irq_state;
uint8_t pad;
uint8_t pad0;
uint8_t pad1;
uint8_t temp_cdb[12];
/* for multi-threading, keep these volatile */
@@ -437,7 +441,7 @@ typedef struct x54x_t {
volatile int PendingInterrupt;
volatile int Lock;
volatile int target_data_len;
volatile int pad0;
volatile int pad2;
uint32_t Base;
uint32_t fdc_address;

4
src/include/86box/serial.h
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@@ -74,13 +74,13 @@ typedef struct serial_s {
uint8_t out;
uint8_t msr_set;
uint8_t pad;
uint8_t irq_state;
uint8_t pad0;
uint8_t pad1;
uint16_t dlab;
uint16_t base_address;
uint16_t out_new;
uint16_t pad2;
uint16_t pad1;
uint8_t rcvr_fifo_pos;
uint8_t xmit_fifo_pos;

16
src/include/86box/vid_8514a.h
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@@ -31,9 +31,13 @@ typedef struct ibm8514_t {
uint32_t vram_mask;
PALETTE vgapal;
uint8_t dac_mask, dac_status;
uint8_t dac_mask;
uint8_t dac_status;
uint32_t *map8;
int dac_addr, dac_pos, dac_r, dac_g;
int dac_addr;
int dac_pos;
int dac_r;
int dac_g;
int internal_pitch;
struct {
@@ -83,11 +87,11 @@ typedef struct ibm8514_t {
int16_t dy;
int16_t err;
uint32_t src;
uint16_t dest;
uint32_t dest;
uint32_t newsrc_blt;
uint16_t newdest_blt;
uint32_t newdest_blt;
uint32_t newdest_in;
uint16_t newdest_out;
uint32_t newdest_out;
uint8_t *writemono;
uint8_t *nibbleset;
int x_count;
@@ -143,7 +147,7 @@ typedef struct ibm8514_t {
uint8_t *vram;
uint8_t *changedvram;
uint8_t linedbl;
uint8_t linedbl;
uint8_t data_available;
uint8_t data_available2;

10
src/include/86box/vid_cga.h
View File

@@ -69,12 +69,12 @@ typedef struct cga_t {
} cga_t;
void cga_init(cga_t *cga);
void cga_out(uint16_t addr, uint8_t val, void *p);
uint8_t cga_in(uint16_t addr, void *p);
void cga_write(uint32_t addr, uint8_t val, void *p);
uint8_t cga_read(uint32_t addr, void *p);
void cga_out(uint16_t addr, uint8_t val, void *priv);
uint8_t cga_in(uint16_t addr, void *priv);
void cga_write(uint32_t addr, uint8_t val, void *priv);
uint8_t cga_read(uint32_t addr, void *priv);
void cga_recalctimings(cga_t *cga);
void cga_poll(void *p);
void cga_poll(void *priv);
#ifdef EMU_DEVICE_H
extern const device_config_t cga_config[];

8
src/include/86box/vid_cga_comp.h
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@@ -21,13 +21,11 @@
#ifndef VIDEO_CGA_COMP_H
#define VIDEO_CGA_COMP_H
#define Bit8u uint8_t
#define Bit32u uint32_t
#define Bitu unsigned int
#define bool uint8_t
#define Bitu unsigned int
#define bool uint8_t
void update_cga16_color(uint8_t cgamode);
void cga_comp_init(int revision);
Bit32u *Composite_Process(uint8_t cgamode, Bit8u border, Bit32u blocks /*, bool doublewidth*/, Bit32u *TempLine);
Bit32u *Composite_Process(uint8_t cgamode, uint8_t border, uint32_t blocks /*, bool doublewidth*/, uint32_t *TempLine);
#endif /*VIDEO_CGA_COMP_H*/

2
src/include/86box/vid_ega_render_remap.h
View File

@@ -85,7 +85,7 @@ ega_recalc_remap_func(ega_t *ega)
func_nr = VAR_DWORD_MODE;
else if (ega->crtc[0x17] & 0x40)
func_nr = VAR_BYTE_MODE;
else if ((ega->crtc[0x17] & 0x20) && ega->vram_limit > 64*1024)
else if ((ega->crtc[0x17] & 0x20) && ega->vram_limit > 64 * 1024)
func_nr = VAR_WORD_MODE_MA15;
else
func_nr = VAR_WORD_MODE_MA13;

10
src/include/86box/vid_mda.h
View File

@@ -52,12 +52,12 @@ typedef struct mda_t {
void mda_init(mda_t *mda);
void mda_setcol(int chr, int blink, int fg, uint8_t cga_ink);
void mda_out(uint16_t addr, uint8_t val, void *p);
uint8_t mda_in(uint16_t addr, void *p);
void mda_write(uint32_t addr, uint8_t val, void *p);
uint8_t mda_read(uint32_t addr, void *p);
void mda_out(uint16_t addr, uint8_t val, void *priv);
uint8_t mda_in(uint16_t addr, void *priv);
void mda_write(uint32_t addr, uint8_t val, void *priv);
uint8_t mda_read(uint32_t addr, void *priv);
void mda_recalctimings(mda_t *mda);
void mda_poll(void *p);
void mda_poll(void *priv);
#ifdef EMU_DEVICE_H
extern const device_t mda_device;

190
src/include/86box/vid_svga.h
View File

@@ -31,7 +31,7 @@
# define FLAG_NOSKEW 16
# define FLAG_ADDR_BY16 32
# define FLAG_RAMDAC_SHIFT 64
# define FLAG_ATI 128
# define FLAG_ATI 128
# define FLAG_S3_911_16BIT 256
# define FLAG_512K_MASK 512
struct monitor_t;
@@ -144,24 +144,24 @@ typedef struct svga_t {
For the example memory map, decode_mask would be 4MB-1 (4MB address space), vram_max would be 2MB
(present video memory only responds to first 2MB), vram_mask would be 1MB-1 (video memory wraps at 1MB)
*/
uint32_t decode_mask;
uint32_t vram_max;
uint32_t vram_mask;
uint32_t charseta;
uint32_t charsetb;
uint32_t adv_flags;
uint32_t ma_latch;
uint32_t ca_adj;
uint32_t ma;
uint32_t maback;
uint32_t write_bank;
uint32_t read_bank;
uint32_t extra_banks[2];
uint32_t banked_mask;
uint32_t ca;
uint32_t overscan_color;
uint32_t decode_mask;
uint32_t vram_max;
uint32_t vram_mask;
uint32_t charseta;
uint32_t charsetb;
uint32_t adv_flags;
uint32_t ma_latch;
uint32_t ca_adj;
uint32_t ma;
uint32_t maback;
uint32_t write_bank;
uint32_t read_bank;
uint32_t extra_banks[2];
uint32_t banked_mask;
uint32_t ca;
uint32_t overscan_color;
uint32_t *map8;
uint32_t pallook[512];
uint32_t pallook[512];
PALETTE vgapal;
@@ -183,8 +183,8 @@ typedef struct svga_t {
void (*render)(struct svga_t *svga);
void (*recalctimings_ex)(struct svga_t *svga);
void (*video_out)(uint16_t addr, uint8_t val, void *p);
uint8_t (*video_in)(uint16_t addr, void *p);
void (*video_out)(uint16_t addr, uint8_t val, void *priv);
uint8_t (*video_in)(uint16_t addr, void *priv);
void (*hwcursor_draw)(struct svga_t *svga, int displine);
@@ -195,7 +195,7 @@ typedef struct svga_t {
void (*vblank_start)(struct svga_t *svga);
void (*ven_write)(struct svga_t *svga, uint8_t val, uint32_t addr);
float (*getclock)(int clock, void *p);
float (*getclock)(int clock, void *priv);
/* Called when VC=R18 and friends. If this returns zero then MA resetting
is skipped. Matrox Mystique in Power mode reuses this counter for
@@ -205,17 +205,17 @@ typedef struct svga_t {
/*Called at the start of vertical sync*/
void (*vsync_callback)(struct svga_t *svga);
uint32_t (*translate_address)(uint32_t addr, void *p);
uint32_t (*translate_address)(uint32_t addr, void *priv);
/*If set then another device is driving the monitor output and the SVGA
card should not attempt to display anything */
int override;
void *priv;
uint8_t crtc[256];
uint8_t gdcreg[256];
uint8_t attrregs[32];
uint8_t seqregs[256];
uint8_t egapal[16];
uint8_t crtc[256];
uint8_t gdcreg[256];
uint8_t attrregs[32];
uint8_t seqregs[256];
uint8_t egapal[16];
uint8_t *vram;
uint8_t *changedvram;
@@ -266,55 +266,55 @@ typedef struct svga_t {
uint8_t monitor_index;
/* Pointer to monitor */
monitor_t* monitor;
monitor_t *monitor;
} svga_t;
extern int vga_on;
extern int ibm8514_on;
extern void ibm8514_poll(ibm8514_t *dev, svga_t *svga);
extern void ibm8514_recalctimings(svga_t *svga);
extern uint8_t ibm8514_ramdac_in(uint16_t port, void *p);
extern void ibm8514_ramdac_out(uint16_t port, uint8_t val, void *p);
extern int ibm8514_cpu_src(svga_t *svga);
extern int ibm8514_cpu_dest(svga_t *svga);
extern void ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint16_t val, int len);
extern void ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, uint8_t ssv, int len);
extern void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, int len);
extern void ibm8514_poll(ibm8514_t *dev, svga_t *svga);
extern void ibm8514_recalctimings(svga_t *svga);
extern uint8_t ibm8514_ramdac_in(uint16_t port, void *priv);
extern void ibm8514_ramdac_out(uint16_t port, uint8_t val, void *priv);
extern int ibm8514_cpu_src(svga_t *svga);
extern int ibm8514_cpu_dest(svga_t *svga);
extern void ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint16_t val, int len);
extern void ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, uint8_t ssv, int len);
extern void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, int len);
extern void xga_poll(xga_t *xga, svga_t *svga);
extern void xga_recalctimings(svga_t *svga);
extern int svga_init(const device_t *info, svga_t *svga, void *p, int memsize,
extern int svga_init(const device_t *info, svga_t *svga, void *priv, int memsize,
void (*recalctimings_ex)(struct svga_t *svga),
uint8_t (*video_in)(uint16_t addr, void *p),
void (*video_out)(uint16_t addr, uint8_t val, void *p),
uint8_t (*video_in)(uint16_t addr, void *priv),
void (*video_out)(uint16_t addr, uint8_t val, void *priv),
void (*hwcursor_draw)(struct svga_t *svga, int displine),
void (*overlay_draw)(struct svga_t *svga, int displine));
extern void svga_recalctimings(svga_t *svga);
extern void svga_close(svga_t *svga);
uint8_t svga_read(uint32_t addr, void *p);
uint16_t svga_readw(uint32_t addr, void *p);
uint32_t svga_readl(uint32_t addr, void *p);
void svga_write(uint32_t addr, uint8_t val, void *p);
void svga_writew(uint32_t addr, uint16_t val, void *p);
void svga_writel(uint32_t addr, uint32_t val, void *p);
uint8_t svga_read_linear(uint32_t addr, void *p);
uint8_t svga_readb_linear(uint32_t addr, void *p);
uint16_t svga_readw_linear(uint32_t addr, void *p);
uint32_t svga_readl_linear(uint32_t addr, void *p);
void svga_write_linear(uint32_t addr, uint8_t val, void *p);
void svga_writeb_linear(uint32_t addr, uint8_t val, void *p);
void svga_writew_linear(uint32_t addr, uint16_t val, void *p);
void svga_writel_linear(uint32_t addr, uint32_t val, void *p);
uint8_t svga_read(uint32_t addr, void *priv);
uint16_t svga_readw(uint32_t addr, void *priv);
uint32_t svga_readl(uint32_t addr, void *priv);
void svga_write(uint32_t addr, uint8_t val, void *priv);
void svga_writew(uint32_t addr, uint16_t val, void *priv);
void svga_writel(uint32_t addr, uint32_t val, void *priv);
uint8_t svga_read_linear(uint32_t addr, void *priv);
uint8_t svga_readb_linear(uint32_t addr, void *priv);
uint16_t svga_readw_linear(uint32_t addr, void *priv);
uint32_t svga_readl_linear(uint32_t addr, void *priv);
void svga_write_linear(uint32_t addr, uint8_t val, void *priv);
void svga_writeb_linear(uint32_t addr, uint8_t val, void *priv);
void svga_writew_linear(uint32_t addr, uint16_t val, void *priv);
void svga_writel_linear(uint32_t addr, uint32_t val, void *priv);
void svga_add_status_info(char *s, int max_len, void *p);
void svga_add_status_info(char *s, int max_len, void *priv);
extern uint8_t svga_rotate[8][256];
void svga_out(uint16_t addr, uint8_t val, void *p);
uint8_t svga_in(uint16_t addr, void *p);
void svga_out(uint16_t addr, uint8_t val, void *priv);
uint8_t svga_in(uint16_t addr, void *priv);
svga_t *svga_get_pri(void);
void svga_set_override(svga_t *svga, int val);
@@ -334,65 +334,65 @@ enum {
/* We need a way to add a device with a pointer to a parent device so it can attach itself to it, and
possibly also a second ATi 68860 RAM DAC type that auto-sets SVGA render on RAM DAC render change. */
extern void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga);
extern uint8_t ati68860_ramdac_in(uint16_t addr, void *p, svga_t *svga);
extern void ati68860_set_ramdac_type(void *p, int type);
extern void ati68860_ramdac_set_render(void *p, svga_t *svga);
extern void ati68860_ramdac_set_pallook(void *p, int i, uint32_t col);
extern void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
extern uint8_t ati68860_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
extern void ati68860_set_ramdac_type(void *priv, int type);
extern void ati68860_ramdac_set_render(void *priv, svga_t *svga);
extern void ati68860_ramdac_set_pallook(void *priv, int i, uint32_t col);
extern void ati68860_hwcursor_draw(svga_t *svga, int displine);
extern void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
extern uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern float av9194_getclock(int clock, void *p);
extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
extern float av9194_getclock(int clock, void *priv);
extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga);
extern uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga);
extern void bt48x_recalctimings(void *p, svga_t *svga);
extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
extern uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
extern void bt48x_recalctimings(void *priv, svga_t *svga);
extern void bt48x_hwcursor_draw(svga_t *svga, int displine);
extern void ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t ibm_rgb528_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern void ibm_rgb528_recalctimings(void *p, svga_t *svga);
extern void ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
extern uint8_t ibm_rgb528_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
extern void ibm_rgb528_recalctimings(void *priv, svga_t *svga);
extern void ibm_rgb528_hwcursor_draw(svga_t *svga, int displine);
extern void icd2061_write(void *p, int val);
extern float icd2061_getclock(int clock, void *p);
extern void icd2061_write(void *priv, int val);
extern float icd2061_getclock(int clock, void *priv);
/* The code is the same, the #define's are so that the correct name can be used. */
# define ics9161_write icd2061_write
# define ics9161_getclock icd2061_getclock
extern float ics2494_getclock(int clock, void *p);
extern float ics2494_getclock(int clock, void *priv);
extern void ics2595_write(void *p, int strobe, int dat);
extern double ics2595_getclock(void *p);
extern void ics2595_setclock(void *p, double clock);
extern void ics2595_write(void *priv, int strobe, int dat);
extern double ics2595_getclock(void *priv);
extern void ics2595_setclock(void *priv, double clock);
extern void sc1148x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t sc1148x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern void sc1148x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
extern uint8_t sc1148x_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
extern void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga);
extern uint8_t sc1502x_ramdac_in(uint16_t addr, void *p, svga_t *svga);
extern void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
extern uint8_t sc1502x_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
extern void sdac_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t sdac_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern float sdac_getclock(int clock, void *p);
extern void sdac_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga);
extern uint8_t sdac_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga);
extern float sdac_getclock(int clock, void *priv);
extern void stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga);
extern uint8_t stg_ramdac_in(uint16_t addr, void *p, svga_t *svga);
extern float stg_getclock(int clock, void *p);
extern void stg_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
extern uint8_t stg_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
extern float stg_getclock(int clock, void *priv);
extern void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga);
extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *p, svga_t *svga);
extern void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga);
extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga);
extern void tvp3026_recalctimings(void *p, svga_t *svga);
extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
extern void tvp3026_recalctimings(void *priv, svga_t *svga);
extern void tvp3026_hwcursor_draw(svga_t *svga, int displine);
extern float tvp3026_getclock(int clock, void *p);
extern float tvp3026_getclock(int clock, void *priv);
# ifdef EMU_DEVICE_H
extern const device_t ati68860_ramdac_device;

4
src/include/86box/vid_vga.h
View File

@@ -30,7 +30,7 @@ typedef struct vga_t {
static video_timings_t timing_vga = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 };
void vga_out(uint16_t addr, uint8_t val, void *p);
uint8_t vga_in(uint16_t addr, void *p);
void vga_out(uint16_t addr, uint8_t val, void *priv);
uint8_t vga_in(uint16_t addr, void *priv);
#endif /*VIDEO_VGA_H*/

2
src/include/86box/vid_voodoo_common.h
View File

@@ -271,6 +271,8 @@ typedef struct voodoo_t {
int pci_enable;
uint8_t pci_slot;
uint8_t dac_data[8];
int dac_reg;
int dac_reg_ff;

136
src/include/86box/vid_xga.h
View File

@@ -20,7 +20,7 @@
#include <86box/rom.h>
typedef struct {
typedef struct xga_hwcursor_t {
int ena;
int x;
int y;
@@ -36,12 +36,15 @@ typedef struct xga_t {
mem_mapping_t linear_mapping;
mem_mapping_t video_mapping;
rom_t bios_rom;
rom_t vga_bios_rom;
xga_hwcursor_t hwcursor, hwcursor_latch;
rom_t vga_bios_rom;
xga_hwcursor_t hwcursor;
xga_hwcursor_t hwcursor_latch;
PALETTE extpal;
uint8_t test, atest[2], testpixel;
;
uint8_t test;
uint8_t atest[2];
uint8_t testpixel;
uint8_t pos_regs[8];
uint8_t disp_addr;
uint8_t cfg_reg;
@@ -54,34 +57,44 @@ typedef struct xga_t {
uint8_t regs_idx;
uint8_t hwc_hotspot_x;
uint8_t hwc_hotspot_y;
uint8_t disp_cntl_1, disp_cntl_2;
uint8_t clk_sel_1, clk_sel_2;
uint8_t disp_cntl_1;
uint8_t disp_cntl_2;
uint8_t clk_sel_1;
uint8_t clk_sel_2;
uint8_t hwc_control;
uint8_t bus_arb;
uint8_t isa_pos_enable;
uint8_t hwcursor_oddeven;
uint8_t cfg_reg_instance;
uint8_t rowcount;
uint8_t pal_idx, pal_idx_prefetch;
uint8_t pal_idx;
uint8_t pal_idx_prefetch;
uint8_t pal_seq;
uint8_t pal_mask;
uint8_t pal_r, pal_r_prefetch;
uint8_t pal_g, pal_g_prefetch;
uint8_t pal_b, pal_b_prefetch;
uint8_t pal_r;
uint8_t pal_r_prefetch;
uint8_t pal_g;
uint8_t pal_g_prefetch;
uint8_t pal_b;
uint8_t pal_b_prefetch;
uint8_t sprite_data[1024];
uint8_t scrollcache;
uint8_t border_color;
uint8_t direct_color;
uint8_t dma_channel;
uint8_t instance_isa, instance_num, ext_mem_addr;
uint8_t *vram, *changedvram;
uint8_t instance_isa;
uint8_t instance_num;
uint8_t ext_mem_addr;
uint8_t *vram;
uint8_t *changedvram;
int16_t hwc_pos_x;
int16_t hwc_pos_y;
uint16_t pos_idx;
uint16_t htotal;
uint16_t sprite_idx, sprite_idx_prefetch;
uint16_t sprite_idx;
uint16_t sprite_idx_prefetch;
uint16_t hdisp;
uint16_t vtotal;
uint16_t vdispend;
@@ -89,41 +102,74 @@ typedef struct xga_t {
uint16_t vsyncstart;
uint16_t linecmp;
uint16_t pix_map_width;
uint16_t sprite_pal_addr_idx, old_pal_addr_idx;
uint16_t sprite_pal_addr_idx;
uint16_t old_pal_addr_idx;
uint16_t sprite_pal_addr_idx_prefetch;
int v_total, dispend, v_syncstart, split, v_blankstart,
h_disp, h_disp_old, h_total, h_disp_time, rowoffset,
dispon, h_disp_on, vc, sc, linepos, oddeven, firstline, lastline,
firstline_draw, lastline_draw, displine, fullchange, interlace,
char_width, hwcursor_on;
int pal_pos, pal_pos_prefetch;
int v_total;
int dispend;
int v_syncstart;
int split;
int v_blankstart;
int h_disp;
int h_disp_old;
int h_total;
int h_disp_time;
int rowoffset;
int dispon;
int h_disp_on;
int vc;
int sc;
int linepos;
int oddeven;
int firstline;
int lastline;
int firstline_draw;
int lastline_draw;
int displine;
int fullchange;
int interlace;
int char_width;
int hwcursor_on;
int pal_pos;
int pal_pos_prefetch;
int on;
int op_mode_reset, linear_endian_reverse;
int sprite_pos, sprite_pos_prefetch, cursor_data_on;
int pal_test, a5_test;
int type, bus;
int op_mode_reset;
int linear_endian_reverse;
int sprite_pos;
int sprite_pos_prefetch;
int cursor_data_on;
int pal_test;
int a5_test;
int type;
int bus;
uint32_t linear_base, linear_size, banked_mask;
uint32_t linear_base;
uint32_t linear_size;
uint32_t banked_mask;
uint32_t base_addr_1mb;
uint32_t hwc_color0, hwc_color1;
uint32_t hwc_color0;
uint32_t hwc_color1;
uint32_t disp_start_addr;
uint32_t ma_latch;
uint32_t vram_size;
uint32_t vram_mask;
uint32_t rom_addr;
uint32_t ma, maback;
uint32_t ma;
uint32_t maback;
uint32_t extpallook[256];
uint32_t read_bank, write_bank;
uint32_t read_bank;
uint32_t write_bank;
uint32_t px_map_base;
uint64_t dispontime, dispofftime;
uint64_t dispontime;
uint64_t dispofftime;
struct
{
struct {
uint8_t control;
uint8_t px_map_idx;
uint8_t frgd_mix, bkgd_mix;
uint8_t frgd_mix;
uint8_t bkgd_mix;
uint8_t cc_cond;
uint8_t octant;
uint8_t draw_mode;
@@ -134,15 +180,19 @@ typedef struct xga_t {
uint8_t short_stroke_vector4;
int16_t bres_err_term;
int16_t bres_k1, bres_k2;
int16_t bres_k1;
int16_t bres_k2;
uint16_t blt_width;
uint16_t blt_height;
uint16_t mask_map_origin_x_off;
uint16_t mask_map_origin_y_off;
uint16_t src_map_x, src_map_y;
uint16_t dst_map_x, dst_map_y;
uint16_t pat_map_x, pat_map_y;
uint16_t src_map_x;
uint16_t src_map_y;
uint16_t dst_map_x;
uint16_t dst_map_y;
uint16_t pat_map_x;
uint16_t pat_map_y;
int ssv_state;
int pat_src;
@@ -150,7 +200,14 @@ typedef struct xga_t {
int dst_map;
int bkgd_src;
int fore_src;
int x, y, sx, sy, dx, dy, px, py;
int x;
int y;
int sx;
int sy;
int dx;
int dy;
int px;
int py;
int pattern;
int command_len;
@@ -158,7 +215,8 @@ typedef struct xga_t {
uint32_t color_cmp;
uint32_t carry_chain;
uint32_t plane_mask;
uint32_t frgd_color, bkgd_color;
uint32_t frgd_color;
uint32_t bkgd_color;
uint32_t command;
uint32_t dir_cmd;