Improvements to the OPTi 597 machine.

- Add emulation of the FDC37C661 Super I/O
- Fix Pentium VLB timing (was running VLB at 2x bus speed instead of 1/2 bus speed)
- Fix the cache register on the OPTi 5x7 chipset
- The actual minimum RAM amount is 2 MB, not 1 MB.
- Fix chipset naming consistency

src/pit.c

@@ -1030,7 +1030,7 @@ pit_set_clock(int clock)
 
     isa_timing = (cpuclock / (double)8000000.0);
     if (cpu_64bitbus)
-    bus_timing = (cpuclock / ((double)cpu_busspeed) / 2);
+    bus_timing = (cpuclock / ((double)cpu_busspeed / 2));
     else
     bus_timing = (cpuclock / (double)cpu_busspeed);	    
     pci_timing = (cpuclock / (double)cpu_pci_speed);