Improvements to the OPTi 597 machine.

- Add emulation of the FDC37C661 Super I/O
- Fix Pentium VLB timing (was running VLB at 2x bus speed instead of 1/2 bus speed)
- Fix the cache register on the OPTi 5x7 chipset
- The actual minimum RAM amount is 2 MB, not 1 MB.
- Fix chipset naming consistency

src/win/Makefile.mingw

@@ -592,7 +592,7 @@ DEVOBJ		:= bugger.o hwm.o hwm_lm75.o hwm_lm78.o ibm_5161.o isamem.o isartc.o lpt
 
 SIOOBJ		:= sio_acc3221.o \
 		    sio_f82c710.o \
-		    sio_fdc37c66x.o sio_fdc37c669.o \
+		    sio_fdc37c661.o sio_fdc37c66x.o sio_fdc37c669.o \
 		    sio_fdc37c93x.o \
 		    sio_pc87306.o sio_pc87307.o sio_pc87309.o sio_pc87332.o \
 		    sio_w83787f.o \