sonarlint vid_ati_mach64.c
This commit is contained in:
@@ -91,7 +91,8 @@ typedef struct mach64_t {
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uint8_t regs[256];
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uint8_t regs[256];
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int index;
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int index;
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int type, pci;
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int type;
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int pci;
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uint8_t pci_regs[256];
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uint8_t pci_regs[256];
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uint8_t int_line;
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uint8_t int_line;
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@@ -503,7 +504,7 @@ mach64_in(uint16_t addr, void *priv)
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void
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void
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mach64_recalctimings(svga_t *svga)
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mach64_recalctimings(svga_t *svga)
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{
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{
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mach64_t *mach64 = (mach64_t *) svga->priv;
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const mach64_t *mach64 = (mach64_t *) svga->priv;
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if (((mach64->crtc_gen_cntl >> 24) & 3) == 3) {
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if (((mach64->crtc_gen_cntl >> 24) & 3) == 3) {
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svga->vtotal = (mach64->crtc_v_total_disp & 2047) + 1;
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svga->vtotal = (mach64->crtc_v_total_disp & 2047) + 1;
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@@ -678,7 +679,7 @@ mach64_wait_fifo_idle(mach64_t *mach64)
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}
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}
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#define READ8(addr, var) \
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#define READ8(addr, var) \
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switch ((addr) & 3) { \
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switch ((addr) &3) { \
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case 0: \
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case 0: \
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ret = (var) &0xff; \
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ret = (var) &0xff; \
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break; \
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break; \
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@@ -694,7 +695,7 @@ mach64_wait_fifo_idle(mach64_t *mach64)
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}
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}
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#define WRITE8(addr, var, val) \
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#define WRITE8(addr, var, val) \
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switch ((addr) & 3) { \
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switch ((addr) &3) { \
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case 0: \
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case 0: \
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var = (var & 0xffffff00) | (val); \
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var = (var & 0xffffff00) | (val); \
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break; \
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break; \
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@@ -749,7 +750,7 @@ mach64_accel_write_fifo(mach64_t *mach64, uint32_t addr, uint8_t val)
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case 0x11f:
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case 0x11f:
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WRITE8(addr, mach64->dst_height_width, val);
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WRITE8(addr, mach64->dst_height_width, val);
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#ifdef FALLTHROUGH_ANNOTATION
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#ifdef FALLTHROUGH_ANNOTATION
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[[fallthrough]];
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[[fallthrough]];
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#endif
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#endif
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case 0x113:
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case 0x113:
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if (((addr & 0x3ff) == 0x11b || (addr & 0x3ff) == 0x11f || (addr & 0x3ff) == 0x113) && !(val & 0x80)) {
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if (((addr & 0x3ff) == 0x11b || (addr & 0x3ff) == 0x11f || (addr & 0x3ff) == 0x113) && !(val & 0x80)) {
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@@ -974,7 +975,7 @@ mach64_accel_write_fifo(mach64_t *mach64, uint32_t addr, uint8_t val)
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case 0x2a5:
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case 0x2a5:
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addr += 2;
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addr += 2;
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#ifdef FALLTHROUGH_ANNOTATION
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#ifdef FALLTHROUGH_ANNOTATION
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[[fallthrough]];
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[[fallthrough]];
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#endif
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#endif
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case 0x2aa:
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case 0x2aa:
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case 0x2ab:
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case 0x2ab:
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@@ -991,7 +992,7 @@ mach64_accel_write_fifo(mach64_t *mach64, uint32_t addr, uint8_t val)
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case 0x2b1:
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case 0x2b1:
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addr += 2;
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addr += 2;
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#ifdef FALLTHROUGH_ANNOTATION
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#ifdef FALLTHROUGH_ANNOTATION
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[[fallthrough]];
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[[fallthrough]];
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#endif
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#endif
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case 0x2b6:
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case 0x2b6:
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case 0x2b7:
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case 0x2b7:
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@@ -1245,8 +1246,8 @@ mach64_queue(mach64_t *mach64, uint32_t addr, uint32_t val, uint32_t type)
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void
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void
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mach64_start_fill(mach64_t *mach64)
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mach64_start_fill(mach64_t *mach64)
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{
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{
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mach64->accel.dst_x = 0;
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mach64->accel.dst_x = 0;
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mach64->accel.dst_y = 0;
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mach64->accel.dst_y = 0;
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mach64->accel.dst_x_start = (mach64->dst_y_x >> 16) & 0xfff;
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mach64->accel.dst_x_start = (mach64->dst_y_x >> 16) & 0xfff;
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if ((mach64->dst_y_x >> 16) & 0x1000)
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if ((mach64->dst_y_x >> 16) & 0x1000)
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@@ -1263,11 +1264,11 @@ mach64_start_fill(mach64_t *mach64)
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mach64->accel.dst_width = (mach64->accel.dst_width & ~7) + 8;
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mach64->accel.dst_width = (mach64->accel.dst_width & ~7) + 8;
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}
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}
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mach64->accel.x_count = mach64->accel.dst_width;
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mach64->accel.x_count = mach64->accel.dst_width;
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mach64->accel.xx_count = 0;
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mach64->accel.xx_count = 0;
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mach64->accel.src_x = 0;
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mach64->accel.src_x = 0;
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mach64->accel.src_y = 0;
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mach64->accel.src_y = 0;
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mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff;
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mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff;
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if ((mach64->src_y_x >> 16) & 0x1000)
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if ((mach64->src_y_x >> 16) & 0x1000)
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@@ -1571,12 +1572,12 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
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switch (mach64->accel.op) {
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switch (mach64->accel.op) {
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case OP_RECT:
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case OP_RECT:
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while (count) {
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while (count) {
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uint8_t write_mask = 0;
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uint8_t write_mask = 0;
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uint32_t src_dat = 0;
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uint32_t src_dat = 0;
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uint32_t dest_dat;
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uint32_t dest_dat;
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uint32_t host_dat = 0;
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uint32_t host_dat = 0;
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uint32_t old_dest_dat;
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uint32_t old_dest_dat;
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int mix = 0;
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int mix = 0;
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int dst_x;
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int dst_x;
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int dst_y;
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int dst_y;
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int src_x;
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int src_x;
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@@ -1710,7 +1711,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
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}
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}
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if (!(mach64->dst_cntl & DST_POLYGON_EN) || mach64->accel.poly_draw) {
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if (!(mach64->dst_cntl & DST_POLYGON_EN) || mach64->accel.poly_draw) {
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READ(mach64->accel.dst_offset + ((dst_y) * mach64->accel.dst_pitch) + (dst_x), dest_dat, mach64->accel.dst_size);
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READ(mach64->accel.dst_offset + ((dst_y) *mach64->accel.dst_pitch) + (dst_x), dest_dat, mach64->accel.dst_size);
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switch (mach64->accel.clr_cmp_fn) {
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switch (mach64->accel.clr_cmp_fn) {
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case 1: /*TRUE*/
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case 1: /*TRUE*/
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@@ -1777,8 +1778,8 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
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mach64->accel.x_count--;
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mach64->accel.x_count--;
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if (mach64->accel.x_count <= 0) {
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if (mach64->accel.x_count <= 0) {
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mach64->accel.xx_count = 0;
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mach64->accel.xx_count = 0;
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mach64->accel.x_count = mach64->accel.dst_width;
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mach64->accel.x_count = mach64->accel.dst_width;
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mach64->accel.dst_x = 0;
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mach64->accel.dst_x = 0;
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mach64->accel.dst_y += mach64->accel.yinc;
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mach64->accel.dst_y += mach64->accel.yinc;
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mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff;
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mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff;
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mach64->accel.src_x_count = mach64->accel.src_width1;
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mach64->accel.src_x_count = mach64->accel.src_width1;
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@@ -1830,7 +1831,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
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if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) {
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if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) {
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int x = 0;
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int x = 0;
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while (count) {
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while (count) {
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uint32_t src_dat = 0;
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uint32_t src_dat = 0;
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uint32_t dest_dat;
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uint32_t dest_dat;
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uint32_t host_dat = 0;
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uint32_t host_dat = 0;
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int mix = 0;
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int mix = 0;
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@@ -1965,7 +1966,7 @@ mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
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}
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}
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} else {
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} else {
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while (count) {
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while (count) {
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uint32_t src_dat = 0;
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uint32_t src_dat = 0;
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uint32_t dest_dat;
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uint32_t dest_dat;
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uint32_t host_dat = 0;
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uint32_t host_dat = 0;
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int mix = 0;
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int mix = 0;
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@@ -2879,8 +2880,9 @@ mach64_ext_readb(uint32_t addr, void *priv)
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uint16_t
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uint16_t
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mach64_ext_readw(uint32_t addr, void *priv)
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mach64_ext_readw(uint32_t addr, void *priv)
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{
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{
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mach64_t *mach64 = (mach64_t *) priv;
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const mach64_t *mach64 = (mach64_t *) priv;
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uint16_t ret;
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uint16_t ret;
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if (!(addr & 0x400)) {
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if (!(addr & 0x400)) {
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mach64_log("nmach64_ext_readw: addr=%04x\n", addr);
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mach64_log("nmach64_ext_readw: addr=%04x\n", addr);
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ret = 0xffff;
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ret = 0xffff;
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@@ -2907,8 +2909,9 @@ mach64_ext_readw(uint32_t addr, void *priv)
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uint32_t
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uint32_t
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mach64_ext_readl(uint32_t addr, void *priv)
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mach64_ext_readl(uint32_t addr, void *priv)
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{
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{
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mach64_t *mach64 = (mach64_t *) priv;
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const mach64_t *mach64 = (mach64_t *) priv;
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uint32_t ret;
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uint32_t ret;
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if (!(addr & 0x400)) {
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if (!(addr & 0x400)) {
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mach64_log("nmach64_ext_readl: addr=%04x\n", addr);
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mach64_log("nmach64_ext_readl: addr=%04x\n", addr);
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ret = 0xffffffff;
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ret = 0xffffffff;
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@@ -3317,7 +3320,7 @@ uint8_t
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mach64_ext_inb(uint16_t port, void *priv)
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mach64_ext_inb(uint16_t port, void *priv)
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{
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{
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mach64_t *mach64 = (mach64_t *) priv;
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mach64_t *mach64 = (mach64_t *) priv;
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uint8_t ret = 0xff;
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uint8_t ret = 0xff;
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switch (port) {
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switch (port) {
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case 0x02ec:
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case 0x02ec:
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@@ -4036,9 +4039,9 @@ mach64_overlay_draw(svga_t *svga, int displine)
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}
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}
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} else {
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} else {
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for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) {
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for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) {
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int h = h_acc >> 12;
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int h = h_acc >> 12;
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int gr_cmp = 0;
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int gr_cmp = 0;
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int vid_cmp = 0;
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int vid_cmp = 0;
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int use_video = 0;
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int use_video = 0;
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switch (video_key_fn) {
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switch (video_key_fn) {
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@@ -4216,7 +4219,7 @@ mach64_io_set(mach64_t *mach64)
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uint8_t
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uint8_t
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mach64_pci_read(UNUSED(int func), int addr, void *priv)
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mach64_pci_read(UNUSED(int func), int addr, void *priv)
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{
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{
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mach64_t *mach64 = (mach64_t *) priv;
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const mach64_t *mach64 = (mach64_t *) priv;
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switch (addr) {
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switch (addr) {
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case 0x00:
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case 0x00:
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@@ -4448,7 +4451,7 @@ mach64gx_init(const device_t *info)
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mach64->type = MACH64_GX;
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mach64->type = MACH64_GX;
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mach64->pci = !!(info->flags & DEVICE_PCI);
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mach64->pci = !!(info->flags & DEVICE_PCI);
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mach64->pci_id = (int) 'X' | ((int) 'G' << 8);
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mach64->pci_id = 'X' | ('G' << 8);
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mach64->config_chip_id = 0x000000d7;
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mach64->config_chip_id = 0x000000d7;
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mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/
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mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/
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mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/
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mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/
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