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Bit 0 to 4 of LSR are now all writeable, always, fixes Error D on the IBM PCjr.

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OBattler
2021-03-30 00:37:09 +02:00
parent 3fbed427da
commit 0cf651ff95
1 changed files with 8 additions and 10 deletions
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18
src/device/serial.c
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@@ -484,16 +484,14 @@ serial_write(uint16_t addr, uint8_t val, void *p)
}
break;
case 5:
if (dev->mctrl & 0x10) {
dev->lsr = (dev->lsr & 0xe3) | (val & 0x1c);
if (dev->lsr & 0x01)
dev->int_status |= SERIAL_INT_RECEIVE;
if (dev->lsr & 0x1e)
dev->int_status |= SERIAL_INT_LSR;
if (dev->lsr & 0x20)
dev->int_status |= SERIAL_INT_TRANSMIT;
serial_update_ints(dev);
}
dev->lsr = (dev->lsr & 0xe0) | (val & 0x1f);
if (dev->lsr & 0x01)
dev->int_status |= SERIAL_INT_RECEIVE;
if (dev->lsr & 0x1e)
dev->int_status |= SERIAL_INT_LSR;
if (dev->lsr & 0x20)
dev->int_status |= SERIAL_INT_TRANSMIT;
serial_update_ints(dev);
break;
case 6:
dev->msr = val;