Fixed an IDE log line and fixed a bug in the implementation of the STPC chipsets caused by an erratum in the STPC Atlas programming manual (corrected in the other STPC chipsets' programming manuals).

This commit is contained in:
OBattler
2020-07-11 00:42:38 +02:00
parent 7ebe8f5018
commit 0d2e69142d
2 changed files with 19 additions and 6 deletions

View File

@@ -399,6 +399,10 @@ stpc_ide_write(int func, int addr, uint8_t val, void *priv)
stpc_ide_bm_handlers(dev); stpc_ide_bm_handlers(dev);
break; break;
case 0x3c:
dev->pci_conf[2][addr] = val;
break;
case 0x40: case 0x41: case 0x42: case 0x43: case 0x40: case 0x41: case 0x42: case 0x43:
case 0x44: case 0x45: case 0x46: case 0x47: case 0x44: case 0x45: case 0x46: case 0x47:
dev->pci_conf[2][addr] = val; dev->pci_conf[2][addr] = val;
@@ -478,8 +482,8 @@ stpc_isab_read(int func, int addr, void *priv)
stpc_t *dev = (stpc_t *) priv; stpc_t *dev = (stpc_t *) priv;
uint8_t ret; uint8_t ret;
if (func == 1 && !(dev->local & STPC_IDE_ATLAS)) if ((func == 1) && !(dev->local & STPC_IDE_ATLAS))
return stpc_ide_read(0, addr, priv); ret = stpc_ide_read(0, addr, priv);
else if (func > 0) else if (func > 0)
ret = 0xff; ret = 0xff;
else else
@@ -727,7 +731,10 @@ stpc_setup(stpc_t *dev)
dev->pci_conf[1][0x0a] = 0x01; dev->pci_conf[1][0x0a] = 0x01;
dev->pci_conf[1][0x0b] = 0x06; dev->pci_conf[1][0x0b] = 0x06;
dev->pci_conf[1][0x0e] = 0x40; /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other
STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual
indicates as well, and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */
dev->pci_conf[1][0x0e] = /*0x40*/ 0x80;
/* IDE */ /* IDE */
dev->pci_conf[2][0x00] = 0x4a; dev->pci_conf[2][0x00] = 0x4a;
@@ -747,7 +754,10 @@ stpc_setup(stpc_t *dev)
dev->pci_conf[2][0x0a] = 0x01; dev->pci_conf[2][0x0a] = 0x01;
dev->pci_conf[2][0x0b] = 0x01; dev->pci_conf[2][0x0b] = 0x01;
dev->pci_conf[2][0x0e] = 0x40; /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other
STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual
indicates as well, and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */
dev->pci_conf[2][0x0e] = /*0x40*/ 0x80;
dev->pci_conf[2][0x10] = 0x01; dev->pci_conf[2][0x10] = 0x01;
dev->pci_conf[2][0x14] = 0x01; dev->pci_conf[2][0x14] = 0x01;
@@ -778,7 +788,10 @@ stpc_setup(stpc_t *dev)
dev->pci_conf[3][0x0a] = 0x03; dev->pci_conf[3][0x0a] = 0x03;
dev->pci_conf[3][0x0b] = 0x0c; dev->pci_conf[3][0x0b] = 0x0c;
dev->pci_conf[3][0x0e] = 0x40; /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other
STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual
indicates as well, and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */
dev->pci_conf[3][0x0e] = /*0x40*/ 0x80;
} }
/* PCI setup */ /* PCI setup */

View File

@@ -1051,7 +1051,7 @@ ide_atapi_packet_read(ide_t *ide, int length)
return 0; return 0;
if (dev->packet_status == PHASE_DATA_IN) if (dev->packet_status == PHASE_DATA_IN)
ide_log("PHASE_DATA_IN read: %i, %i< %i, %i\n", dev->request_pos, dev->max_transfer_len, dev->pos, dev->packet_len); ide_log("PHASE_DATA_IN read: %i, %i, %i, %i\n", dev->request_pos, dev->max_transfer_len, dev->pos, dev->packet_len);
bufferw = (uint16_t *) dev->temp_buffer; bufferw = (uint16_t *) dev->temp_buffer;
bufferl = (uint32_t *) dev->temp_buffer; bufferl = (uint32_t *) dev->temp_buffer;