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Add PCI and AGP speed control to i4x0 and VIA northbridges

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This commit is contained in:
RichardG867
2021-03-14 19:43:25 -03:00
parent dfee1165ea
commit 0f80e956d5
2 changed files with 35 additions and 12 deletions
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9
src/chipset/intel_4x0.c
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@@ -1540,6 +1540,15 @@ static void
cpu_update_waitstates();
}
/* Out-of-spec PCI and AGP clocks with overclocked bus. */
if ((dev->type <= INTEL_440FX) && (cpu_busspeed >= 66666666))
cpu_set_pci_speed(cpu_busspeed / 2);
if ((dev->type >= INTEL_440BX) && (cpu_busspeed >= 100000000))
cpu_set_agp_speed(cpu_busspeed / 1.5);
else if (dev->type >= INTEL_440LX)
cpu_set_agp_speed(cpu_busspeed);
i4x0_write(regs[0x59], 0x59, 0x00, dev);
i4x0_write(regs[0x5a], 0x5a, 0x00, dev);
i4x0_write(regs[0x5b], 0x5b, 0x00, dev);