Initial implementation of STPC chipsets and machines
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@@ -61,7 +61,7 @@
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#endif
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#include "x87_timings.h"
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/*#define ENABLE_CPU_LOG 1*/
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#define ENABLE_CPU_LOG 1
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static void cpu_write(uint16_t addr, uint8_t val, void *priv);
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static uint8_t cpu_read(uint16_t addr, void *priv);
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@@ -399,9 +399,9 @@ cpu_set(void)
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hasfpu = (fpu_type != FPU_NONE);
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hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
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#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
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cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86 || cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86MX || cpu_s->cpu_type == CPU_Cx6x86L || cpu_s->cpu_type == CPU_CxGX1);
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cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx486DX2 || cpu_s->cpu_type == CPU_Cx5x86 || cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86MX || cpu_s->cpu_type == CPU_Cx6x86L || cpu_s->cpu_type == CPU_CxGX1);
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#else
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cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86);
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cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx486DX2 || cpu_s->cpu_type == CPU_Cx5x86);
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#endif
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cpu_16bitbus = (cpu_s->cpu_type == CPU_286 || cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC );
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@@ -132,15 +132,18 @@ extern CPU cpus_Am386SX[];
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extern CPU cpus_Am386DX[];
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extern CPU cpus_486SLC[];
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extern CPU cpus_486DLC[];
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extern CPU cpus_IBM386SLC[];
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extern CPU cpus_IBM486SLC[];
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extern CPU cpus_IBM486BL[];
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extern CPU cpus_i486S1[];
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extern CPU cpus_IBM386SLC[];
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extern CPU cpus_IBM486SLC[];
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extern CPU cpus_IBM486BL[];
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extern CPU cpus_i486S1[];
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extern CPU cpus_Am486S1[];
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extern CPU cpus_Cx486S1[];
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extern CPU cpus_i486[];
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extern CPU cpus_Am486[];
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extern CPU cpus_Cx486[];
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#if defined(DEV_BRANCH) && defined(USE_STPC)
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extern CPU cpus_STPC[];
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#endif
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extern CPU cpus_WinChip[];
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extern CPU cpus_WinChip_SS7[];
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extern CPU cpus_Pentium5V[];
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@@ -366,6 +366,14 @@ CPU cpus_Cx486[] = {
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{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
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};
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#if defined(DEV_BRANCH) && defined(USE_STPC)
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CPU cpus_STPC[] = {
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{"STPC 100", CPU_Cx486DX2, fpus_internal, 100000000, 1.0, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
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{"STPC 133", CPU_Cx486DX2, fpus_internal, 133333333, 2.0, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
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{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
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};
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#endif
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#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
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CPU cpus_6x863V[] = {
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/*Cyrix 6x86*/
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