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Also reverted all the video changes.

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This commit is contained in:
OBattler
2021-11-13 23:25:07 +01:00
parent bfb3c0c324
commit 11431213ed
10 changed files with 92 additions and 636 deletions
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4
src/video/CMakeLists.txt
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@@ -20,8 +20,8 @@ add_library(vid OBJECT video.c vid_table.c vid_cga.c vid_cga_comp.c
vid_svga_render.c vid_ddc.c vid_vga.c vid_ati_eeprom.c vid_ati18800.c vid_svga_render.c vid_ddc.c vid_vga.c vid_ati_eeprom.c vid_ati18800.c
vid_ati28800.c vid_ati_mach64.c vid_ati68860_ramdac.c vid_bt48x_ramdac.c vid_ati28800.c vid_ati_mach64.c vid_ati68860_ramdac.c vid_bt48x_ramdac.c
vid_av9194.c vid_icd2061.c vid_ics2494.c vid_ics2595.c vid_cl54xx.c vid_av9194.c vid_icd2061.c vid_ics2494.c vid_ics2595.c vid_cl54xx.c
vid_et3000.c vid_et4000.c vid_sc1148x_ramdac.c vid_sc1502x_ramdac.c vid_et4000.c vid_sc1148x_ramdac.c vid_sc1502x_ramdac.c vid_et4000w32.c
vid_et4000w32.c vid_stg_ramdac.c vid_ht216.c vid_oak_oti.c vid_paradise.c vid_rtg310x.c vid_stg_ramdac.c vid_ht216.c vid_oak_oti.c vid_paradise.c vid_rtg310x.c
vid_f82c425.c vid_ti_cf62011.c vid_tvga.c vid_tgui9440.c vid_tkd8001_ramdac.c vid_f82c425.c vid_ti_cf62011.c vid_tvga.c vid_tgui9440.c vid_tkd8001_ramdac.c
vid_att20c49x_ramdac.c vid_s3.c vid_s3_virge.c vid_ibm_rgb528_ramdac.c vid_att20c49x_ramdac.c vid_s3.c vid_s3_virge.c vid_ibm_rgb528_ramdac.c
vid_sdac_ramdac.c vid_ogc.c vid_nga.c vid_tvp3026_ramdac.c) vid_sdac_ramdac.c vid_ogc.c vid_nga.c vid_tvp3026_ramdac.c)

22
src/video/vid_cl54xx.c
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@@ -1780,28 +1780,6 @@ gd54xx_recalctimings(svga_t *svga)
} }
svga->vram_display_mask = (svga->crtc[0x1b] & 2) ? gd54xx->vram_mask : 0x3ffff; svga->vram_display_mask = (svga->crtc[0x1b] & 2) ? gd54xx->vram_mask : 0x3ffff;
pclog("svga->crtc[0x1a] = %02X\n", svga->crtc[0x1a]);
pclog("svga->crtc[0x1b] = %02X\n", svga->crtc[0x1b]);
pclog("svga->crtc[0x1c] = %02X\n", svga->crtc[0x1c]);
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5430)
svga->htotal += ((svga->crtc[0x1c] >> 3) & 0x07);
if (svga->crtc[0x1b] & ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5424) ? 0xa0 : 0x20)) {
/* Special blanking mode: the blank start and end become components of the window generator,
and the actual blanking comes from the display enable signal. */
/* Start blanking at the first character clock after the last active one. */
svga->hblankstart = svga->crtc[1] + 1;
svga->hblank_end_val = (svga->htotal + 6) & 0x3f;
/* In this mode, the dots per clock are always 8 or 16, never 9 or 18. */
if (!svga->scrblank && svga->attr_palette_enable)
svga->dots_per_clock = (svga->seqregs[1] & 8) ? 16 : 8;
/* No overscan in this mode. */
svga->hblank_overscan = 0;
/* Also make sure vertical blanking starts on display end. */
svga->vblankstart = svga->dispend;
}
} }

308
src/video/vid_et3000.c
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@@ -1,308 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the Tseng Labs ET3000.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/io.h>
#include <86box/mca.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/timer.h>
#include <86box/video.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#define BIOS_ROM_PATH "roms/video/et3000/Tseng ET3000AX ISA VGA-VGA ULTRA.bin"
typedef struct {
const char *name;
int type;
svga_t svga;
rom_t bios_rom;
uint8_t banking;
} et3000_t;
static video_timings_t timing_et3000_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10};
static uint8_t et3000_in(uint16_t addr, void *priv);
static void et3000_out(uint16_t addr, uint8_t val, void *priv);
static uint8_t
et3000_in(uint16_t addr, void *priv)
{
et3000_t *dev = (et3000_t *)priv;
svga_t *svga = &dev->svga;
if (((addr & 0xfff0) == 0x3d0 ||
(addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60;
switch (addr) {
case 0x3cd: /*Banking*/
return dev->banking;
case 0x3d4:
return svga->crtcreg;
case 0x3d5:
return svga->crtc[svga->crtcreg];
}
return svga_in(addr, svga);
}
static void
et3000_out(uint16_t addr, uint8_t val, void *priv)
{
et3000_t *dev = (et3000_t *)priv;
svga_t *svga = &dev->svga;
uint8_t old;
if (((addr & 0xfff0) == 0x3d0 ||
(addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60;
switch (addr) {
case 0x3c0:
case 0x3c1:
if (svga->attrff && (svga->attraddr == 0x16)) {
svga->attrregs[0x16] = val;
svga->chain4 &= ~0x10;
if (svga->gdcreg[5] & 0x40)
svga->chain4 |= (svga->attrregs[0x16] & 0x10);
svga_recalctimings(svga);
}
break;
case 0x3c5:
if (svga->seqaddr == 4) {
svga->seqregs[4] = val;
svga->chain2_write = !(val & 4);
svga->chain4 = (svga->chain4 & ~8) | (val & 8);
svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) &&
!svga->gdcreg[1]) && svga->chain4 && !(svga->adv_flags & FLAG_ADDR_BY8);
return;
}
break;
case 0x3cf:
if ((svga->gdcaddr & 15) == 5) {
svga->chain4 &= ~0x10;
if (val & 0x40)
svga->chain4 |= (svga->attrregs[0x16] & 0x10);
}
break;
case 0x3cd: /*Banking*/
dev->banking = val;
if (!(svga->crtc[0x23] & 0x80) && !(svga->gdcreg[6] & 0x08)) {
switch ((val >> 6) & 3) {
case 0: /*128K segments*/
svga->write_bank = (val & 7) << 17;
svga->read_bank = ((val >> 3) & 7) << 17;
break;
case 1: /*64K segments*/
svga->write_bank = (val & 7) << 16;
svga->read_bank = ((val >> 3) & 7) << 16;
break;
}
}
return;
case 0x3d4:
svga->crtcreg = val & 0x3f;
return;
case 0x3d5:
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
return;
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg];
svga->crtc[svga->crtcreg] = val;
if (old != val) {
if (svga->crtcreg < 0x0e || svga->crtcreg > 0x10) {
svga->fullchange = changeframecount;
svga_recalctimings(svga);
}
}
break;
}
svga_out(addr, val, svga);
}
static void
et3000_recalctimings(svga_t *svga)
{
svga->ma_latch |= (svga->crtc[0x23] & 2) << 15;
if (svga->crtc[0x25] & 1) svga->vblankstart |= 0x400;
if (svga->crtc[0x25] & 2) svga->vtotal |= 0x400;
if (svga->crtc[0x25] & 4) svga->dispend |= 0x400;
if (svga->crtc[0x25] & 8) svga->vsyncstart |= 0x400;
if (svga->crtc[0x25] & 0x10) svga->split |= 0x400;
svga->interlace = !!(svga->crtc[0x25] & 0x80);
if (svga->attrregs[0x16] & 0x10) {
svga->ma_latch <<= (1 << 0);
svga->rowoffset <<= (1 << 0);
switch (svga->gdcreg[5] & 0x60) {
case 0x00:
svga->render = svga_render_4bpp_highres;
svga->hdisp *= 2;
break;
case 0x20:
svga->render = svga_render_2bpp_highres;
break;
case 0x40: case 0x60:
svga->render = svga_render_8bpp_highres;
break;
}
}
/* pclog("HDISP = %i, HTOTAL = %i, ROWOFFSET = %i, INTERLACE = %i\n",
svga->hdisp, svga->htotal, svga->rowoffset, svga->interlace); */
switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x24] << 1) & 4)) {
case 0:
case 1:
break;
case 3:
svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0;
break;
case 5:
svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0;
break;
default:
svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0;
break;
}
}
static void *
et3000_init(const device_t *info)
{
const char *fn;
et3000_t *dev;
dev = (et3000_t *)malloc(sizeof(et3000_t));
memset(dev, 0x00, sizeof(et3000_t));
dev->name = info->name;
dev->type = info->local;
fn = BIOS_ROM_PATH;
switch(dev->type) {
case 0: /* ISA ET3000AX */
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et3000_isa);
svga_init(info, &dev->svga, dev, device_get_config_int("memory") << 10,
et3000_recalctimings, et3000_in, et3000_out,
NULL, NULL);
io_sethandler(0x03c0, 32,
et3000_in,NULL,NULL, et3000_out,NULL,NULL, dev);
break;
}
rom_init(&dev->bios_rom, (char *) fn,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
dev->svga.bpp = 8;
dev->svga.miscout = 1;
return(dev);
}
static void
et3000_close(void *priv)
{
et3000_t *dev = (et3000_t *)priv;
svga_close(&dev->svga);
free(dev);
}
static void
et3000_speed_changed(void *priv)
{
et3000_t *dev = (et3000_t *)priv;
svga_recalctimings(&dev->svga);
}
static void
et3000_force_redraw(void *priv)
{
et3000_t *dev = (et3000_t *)priv;
dev->svga.fullchange = changeframecount;
}
static int
et3000_available(void)
{
return rom_present(BIOS_ROM_PATH);
}
static const device_config_t et3000_config[] =
{
{
"memory", "Memory size", CONFIG_SELECTION, "", 512, "", { 0 },
{
{
"256 KB", 256
},
{
"512 KB", 512
},
{
"1 MB", 1024
},
{
""
}
}
},
{
"", "", -1
}
};
const device_t et3000_isa_device = {
"Tseng Labs ET3000AX (ISA)",
DEVICE_ISA,
0,
et3000_init, et3000_close, NULL,
{ et3000_available },
et3000_speed_changed,
et3000_force_redraw,
et3000_config
};

162
src/video/vid_et4000.c
View File

@@ -55,7 +55,6 @@
#define BIOS_ROM_PATH "roms/video/et4000/et4000.bin" #define BIOS_ROM_PATH "roms/video/et4000/et4000.bin"
#define TC6058AF_BIOS_ROM_PATH "roms/video/et4000/Tseng_Labs_VGA-4000_BIOS_V1.1.bin"
#define KOREAN_BIOS_ROM_PATH "roms/video/et4000/tgkorvga.bin" #define KOREAN_BIOS_ROM_PATH "roms/video/et4000/tgkorvga.bin"
#define KOREAN_FONT_ROM_PATH "roms/video/et4000/tg_ksc5601.rom" #define KOREAN_FONT_ROM_PATH "roms/video/et4000/tg_ksc5601.rom"
#define KASAN_BIOS_ROM_PATH "roms/video/et4000/et4000_kasan16.bin" #define KASAN_BIOS_ROM_PATH "roms/video/et4000/et4000_kasan16.bin"
@@ -110,14 +109,13 @@ et4000_in(uint16_t addr, void *priv)
{ {
et4000_t *dev = (et4000_t *)priv; et4000_t *dev = (et4000_t *)priv;
svga_t *svga = &dev->svga; svga_t *svga = &dev->svga;
uint8_t ret;
if (((addr & 0xfff0) == 0x3d0 || if (((addr & 0xfff0) == 0x3d0 ||
(addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60;
switch (addr) { switch (addr) {
case 0x3c2: case 0x3c2:
if (dev->type == 2) { if (dev->type == 1) {
if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e) if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e)
return 0; return 0;
else else
@@ -134,9 +132,7 @@ et4000_in(uint16_t addr, void *priv)
case 0x3c7: case 0x3c7:
case 0x3c8: case 0x3c8:
case 0x3c9: case 0x3c9:
if (dev->type >= 1) return sc1502x_ramdac_in(addr, svga->ramdac, svga);
return sc1502x_ramdac_in(addr, svga->ramdac, svga);
break;
case 0x3cd: /*Banking*/ case 0x3cd: /*Banking*/
return dev->banking; return dev->banking;
@@ -146,26 +142,6 @@ et4000_in(uint16_t addr, void *priv)
case 0x3d5: case 0x3d5:
return svga->crtc[svga->crtcreg]; return svga->crtc[svga->crtcreg];
case 0x3da:
svga->attrff = 0;
if (svga->cgastat & 0x01)
svga->cgastat &= ~0x30;
else
svga->cgastat ^= 0x30;
ret = svga->cgastat;
if ((svga->fcr & 0x08) && svga->dispon)
ret |= 0x08;
if (ret & 0x08)
ret &= 0x7f;
else
ret |= 0x80;
return ret;
} }
return svga_in(addr, svga); return svga_in(addr, svga);
@@ -247,34 +223,12 @@ et4000_out(uint16_t addr, uint8_t val, void *priv)
(addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60;
switch (addr) { switch (addr) {
case 0x3c5:
if (svga->seqaddr == 4) {
svga->seqregs[4] = val;
svga->chain2_write = !(val & 4);
svga->chain4 = (svga->chain4 & ~8) | (val & 8);
svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) &&
!svga->gdcreg[1]) && svga->chain4 && !(svga->adv_flags & FLAG_ADDR_BY8);
return;
} else if (svga->seqaddr == 0x0e) {
svga->seqregs[0x0e] = val;
svga->chain4 &= ~0x02;
if (svga->gdcreg[5] & 0x40)
svga->chain4 |= (svga->seqregs[0x0e] & 0x02);
svga_recalctimings(svga);
return;
}
break;
case 0x3c6: case 0x3c6:
case 0x3c7: case 0x3c7:
case 0x3c8: case 0x3c8:
case 0x3c9: case 0x3c9:
if (dev->type >= 1) { sc1502x_ramdac_out(addr, val, svga->ramdac, svga);
sc1502x_ramdac_out(addr, val, svga->ramdac, svga); return;
return;
}
break;
case 0x3cd: /*Banking*/ case 0x3cd: /*Banking*/
if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) {
@@ -285,11 +239,7 @@ et4000_out(uint16_t addr, uint8_t val, void *priv)
return; return;
case 0x3cf: case 0x3cf:
if ((svga->gdcaddr & 15) == 5) { if ((svga->gdcaddr & 15) == 6) {
svga->chain4 &= ~0x02;
if (val & 0x40)
svga->chain4 |= (svga->seqregs[0x0e] & 0x02);
} else if ((svga->gdcaddr & 15) == 6) {
if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) { if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) {
svga->write_bank = (dev->banking & 0x0f) * 0x10000; svga->write_bank = (dev->banking & 0x0f) * 0x10000;
svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000; svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000;
@@ -470,8 +420,7 @@ et4000_kasan_out(uint16_t addr, uint8_t val, void *priv)
break; break;
case 1: case 1:
case 2: case 2:
if ((et4000->kasan_cfg_index - 0xF0) <= 16) et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0] = val;
et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0] = val;
io_removehandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000); io_removehandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000);
et4000->kasan_access_addr = (et4000->kasan_cfg_regs[2] << 8) | et4000->kasan_cfg_regs[1]; et4000->kasan_access_addr = (et4000->kasan_cfg_regs[2] << 8) | et4000->kasan_cfg_regs[1];
io_sethandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000); io_sethandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000);
@@ -514,10 +463,8 @@ et4000_kasan_out(uint16_t addr, uint8_t val, void *priv)
case 3: case 3:
case 4: case 4:
case 5: case 5:
if (et4000->kasan_cfg_regs[0] & 1) { if (et4000->kasan_cfg_regs[0] & 1)
if ((addr - (((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1])) + 3)) <= 4) et4000->kasan_font_data[addr - (((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1])) + 3)] = val;
et4000->kasan_font_data[addr - (((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1])) + 3)] = val;
}
break; break;
case 6: case 6:
if ((et4000->kasan_cfg_regs[0] & 1) && (et4000->kasan_font_data[3] & !(val & 0x80)) && (et4000->get_korean_font_base & 0x7F) >= 0x20 && (et4000->get_korean_font_base & 0x7F) < 0x7F) { if ((et4000->kasan_cfg_regs[0] & 1) && (et4000->kasan_font_data[3] & !(val & 0x80)) && (et4000->get_korean_font_base & 0x7F) >= 0x20 && (et4000->get_korean_font_base & 0x7F) < 0x7F) {
@@ -601,13 +548,13 @@ et4000_recalctimings(svga_t *svga)
et4000_t *dev = (et4000_t *)svga->p; et4000_t *dev = (et4000_t *)svga->p;
svga->ma_latch |= (svga->crtc[0x33] & 3) << 16; svga->ma_latch |= (svga->crtc[0x33] & 3) << 16;
if (svga->crtc[0x35] & 1) svga->vblankstart |= 0x400; if (svga->crtc[0x35] & 1) svga->vblankstart += 0x400;
if (svga->crtc[0x35] & 2) svga->vtotal |= 0x400; if (svga->crtc[0x35] & 2) svga->vtotal += 0x400;
if (svga->crtc[0x35] & 4) svga->dispend |= 0x400; if (svga->crtc[0x35] & 4) svga->dispend += 0x400;
if (svga->crtc[0x35] & 8) svga->vsyncstart |= 0x400; if (svga->crtc[0x35] & 8) svga->vsyncstart += 0x400;
if (svga->crtc[0x35] & 0x10) svga->split |= 0x400; if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
if (!svga->rowoffset) svga->rowoffset = 0x100; if (!svga->rowoffset) svga->rowoffset = 0x100;
if (svga->crtc[0x3f] & 1) svga->htotal |= 0x100; if (svga->crtc[0x3f] & 1) svga->htotal += 256;
if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1; if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1;
switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4)) { switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4)) {
@@ -636,7 +583,7 @@ et4000_recalctimings(svga_t *svga)
break; break;
} }
if (dev->type == 3 || dev->type == 4 || dev->type == 5) { if (dev->type == 2 || dev->type == 3 || dev->type == 4) {
if ((svga->render == svga_render_text_80) && ((svga->crtc[0x37] & 0x0A) == 0x0A)) { if ((svga->render == svga_render_text_80) && ((svga->crtc[0x37] & 0x0A) == 0x0A)) {
if (dev->port_32cb_val & 0x80) { if (dev->port_32cb_val & 0x80) {
svga->ma_latch -= 2; svga->ma_latch -= 2;
@@ -647,19 +594,6 @@ et4000_recalctimings(svga_t *svga)
} }
} }
} }
if ((svga->seqregs[0x0e] & 0x02) && ((svga->gdcreg[5] & 0x60) >= 0x40)) {
svga->ma_latch <<= (1 << 0);
svga->rowoffset <<= (1 << 0);
svga->render = svga_render_8bpp_highres;
}
if (dev->type == 0) {
if (svga->render == svga_render_8bpp_lowres)
svga->render = svga_render_8bpp_tseng_lowres;
else if (svga->render == svga_render_8bpp_highres)
svga->render = svga_render_8bpp_tseng_highres;
}
} }
static void static void
@@ -673,7 +607,6 @@ et4000_kasan_recalctimings(svga_t *svga)
svga->ma_latch -= 3; svga->ma_latch -= 3;
svga->ca_adj = (et4000->kasan_cfg_regs[0] >> 6) - 3; svga->ca_adj = (et4000->kasan_cfg_regs[0] >> 6) - 3;
svga->ksc5601_sbyte_mask = (et4000->kasan_cfg_regs[0] & 4) << 5; svga->ksc5601_sbyte_mask = (et4000->kasan_cfg_regs[0] & 4) << 5;
/* TODO: Are we sure this doesn't use Attribute register 16h bit 6 (two-byte character code enable)? */
if((et4000->kasan_cfg_regs[0] & 0x23) == 0x20 && (et4000->kasan_cfg_regs[4] & 0x80) && ((svga->crtc[0x37] & 0x0B) == 0x0A)) if((et4000->kasan_cfg_regs[0] & 0x23) == 0x20 && (et4000->kasan_cfg_regs[4] & 0x80) && ((svga->crtc[0x37] & 0x0B) == 0x0A))
svga->render = svga_render_text_80_ksc5601; svga->render = svga_render_text_80_ksc5601;
} }
@@ -722,8 +655,7 @@ et4000_init(const device_t *info)
fn = BIOS_ROM_PATH; fn = BIOS_ROM_PATH;
switch(dev->type) { switch(dev->type) {
case 0: /* ISA ET4000AX (TC6058AF) */ case 0: /* ISA ET4000AX */
case 1: /* ISA ET4000AX */
dev->vram_size = device_get_config_int("memory") << 10; dev->vram_size = device_get_config_int("memory") << 10;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa);
svga_init(info, &dev->svga, dev, dev->vram_size, svga_init(info, &dev->svga, dev, dev->vram_size,
@@ -731,11 +663,9 @@ et4000_init(const device_t *info)
NULL, NULL); NULL, NULL);
io_sethandler(0x03c0, 32, io_sethandler(0x03c0, 32,
et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev); et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev);
if (dev->type == 0)
fn = TC6058AF_BIOS_ROM_PATH;
break; break;
case 2: /* MCA ET4000AX */ case 1: /* MCA ET4000AX */
dev->vram_size = 1024 << 10; dev->vram_size = 1024 << 10;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_mca); video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_mca);
svga_init(info, &dev->svga, dev, dev->vram_size, svga_init(info, &dev->svga, dev, dev->vram_size,
@@ -748,8 +678,8 @@ et4000_init(const device_t *info)
mca_add(et4000_mca_read, et4000_mca_write, et4000_mca_feedb, NULL, dev); mca_add(et4000_mca_read, et4000_mca_write, et4000_mca_feedb, NULL, dev);
break; break;
case 3: /* Korean ET4000 */ case 2: /* Korean ET4000 */
case 4: /* Trigem 286M ET4000 */ case 3: /* Trigem 286M ET4000 */
dev->vram_size = device_get_config_int("memory") << 10; dev->vram_size = device_get_config_int("memory") << 10;
dev->port_22cb_val = 0x60; dev->port_22cb_val = 0x60;
dev->port_32cb_val = 0; dev->port_32cb_val = 0;
@@ -773,7 +703,7 @@ et4000_init(const device_t *info)
loadfont(KOREAN_FONT_ROM_PATH, 6); loadfont(KOREAN_FONT_ROM_PATH, 6);
fn = KOREAN_BIOS_ROM_PATH; fn = KOREAN_BIOS_ROM_PATH;
break; break;
case 5: /* Kasan ET4000 */ case 4: /* Kasan ET4000 */
dev->vram_size = device_get_config_int("memory") << 10; dev->vram_size = device_get_config_int("memory") << 10;
dev->svga.ksc5601_sbyte_mask = 0; dev->svga.ksc5601_sbyte_mask = 0;
dev->svga.ksc5601_udc_area_msb[0] = 0xC9; dev->svga.ksc5601_udc_area_msb[0] = 0xC9;
@@ -809,8 +739,7 @@ et4000_init(const device_t *info)
} }
if (dev->type >= 1) dev->svga.ramdac = device_add(&sc1502x_ramdac_device);
dev->svga.ramdac = device_add(&sc1502x_ramdac_device);
dev->vram_mask = dev->vram_size - 1; dev->vram_mask = dev->vram_size - 1;
@@ -854,13 +783,6 @@ et4000_force_redraw(void *priv)
} }
static int
et4000_tc6058af_available(void)
{
return rom_present(TC6058AF_BIOS_ROM_PATH);
}
static int static int
et4000_available(void) et4000_available(void)
{ {
@@ -882,27 +804,6 @@ et4000_kasan_available(void)
rom_present(KASAN_FONT_ROM_PATH); rom_present(KASAN_FONT_ROM_PATH);
} }
static const device_config_t et4000_tc6058af_config[] =
{
{
"memory", "Memory size", CONFIG_SELECTION, "", 1024, "", { 0 },
{
{
"256 KB", 256
},
{
"512 KB", 512
},
{
""
}
}
},
{
"", "", -1
}
};
static const device_config_t et4000_config[] = static const device_config_t et4000_config[] =
{ {
{ {
@@ -927,21 +828,10 @@ static const device_config_t et4000_config[] =
} }
}; };
const device_t et4000_tc6058af_isa_device = {
"Tseng Labs ET4000AX (TC6058AF) (ISA)",
DEVICE_ISA,
0,
et4000_init, et4000_close, NULL,
{ et4000_tc6058af_available },
et4000_speed_changed,
et4000_force_redraw,
et4000_tc6058af_config
};
const device_t et4000_isa_device = { const device_t et4000_isa_device = {
"Tseng Labs ET4000AX (ISA)", "Tseng Labs ET4000AX (ISA)",
DEVICE_ISA, DEVICE_ISA,
1, 0,
et4000_init, et4000_close, NULL, et4000_init, et4000_close, NULL,
{ et4000_available }, { et4000_available },
et4000_speed_changed, et4000_speed_changed,
@@ -952,7 +842,7 @@ const device_t et4000_isa_device = {
const device_t et4000_mca_device = { const device_t et4000_mca_device = {
"Tseng Labs ET4000AX (MCA)", "Tseng Labs ET4000AX (MCA)",
DEVICE_MCA, DEVICE_MCA,
2, 1,
et4000_init, et4000_close, NULL, et4000_init, et4000_close, NULL,
{ et4000_available }, { et4000_available },
et4000_speed_changed, et4000_speed_changed,
@@ -963,7 +853,7 @@ const device_t et4000_mca_device = {
const device_t et4000k_isa_device = { const device_t et4000k_isa_device = {
"Trigem Korean VGA (Tseng Labs ET4000AX Korean)", "Trigem Korean VGA (Tseng Labs ET4000AX Korean)",
DEVICE_ISA, DEVICE_ISA,
3, 2,
et4000_init, et4000_close, NULL, et4000_init, et4000_close, NULL,
{ et4000k_available }, { et4000k_available },
et4000_speed_changed, et4000_speed_changed,
@@ -974,7 +864,7 @@ const device_t et4000k_isa_device = {
const device_t et4000k_tg286_isa_device = { const device_t et4000k_tg286_isa_device = {
"Trigem Korean VGA (Trigem 286M)", "Trigem Korean VGA (Trigem 286M)",
DEVICE_ISA, DEVICE_ISA,
4, 3,
et4000_init, et4000_close, NULL, et4000_init, et4000_close, NULL,
{ et4000k_available }, { et4000k_available },
et4000_speed_changed, et4000_speed_changed,
@@ -985,7 +875,7 @@ const device_t et4000k_tg286_isa_device = {
const device_t et4000_kasan_isa_device = { const device_t et4000_kasan_isa_device = {
"Kasan Hangulmadang-16 VGA (Tseng Labs ET4000AX Korean)", "Kasan Hangulmadang-16 VGA (Tseng Labs ET4000AX Korean)",
DEVICE_ISA, DEVICE_ISA,
5, 4,
et4000_init, et4000_close, NULL, et4000_init, et4000_close, NULL,
{ et4000_kasan_available }, { et4000_kasan_available },
et4000_speed_changed, et4000_speed_changed,

7
src/video/vid_et4000w32.c
View File

@@ -397,7 +397,6 @@ et4000w32p_recalctimings(svga_t *svga)
svga->clock = (cpuclock * (double)(1ull << 32)) / svga->getclock((svga->miscout >> 2) & 3, svga->clock_gen); svga->clock = (cpuclock * (double)(1ull << 32)) / svga->getclock((svga->miscout >> 2) & 3, svga->clock_gen);
#if 0
if (svga->adv_flags & FLAG_NOSKEW) { if (svga->adv_flags & FLAG_NOSKEW) {
/* On the Cardex ET4000/W32p-based cards, adjust text mode clocks by 1. */ /* On the Cardex ET4000/W32p-based cards, adjust text mode clocks by 1. */
if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /* Text mode */ if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /* Text mode */
@@ -414,10 +413,10 @@ et4000w32p_recalctimings(svga_t *svga)
svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18;
else else
svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9;
} } else if ((svga->gdcreg[5] & 0x40) == 0)
svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9;
} }
} }
#endif
if (et4000->type == ET4000W32) { if (et4000->type == ET4000W32) {
if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) {
@@ -464,10 +463,8 @@ et4000w32p_recalctimings(svga_t *svga)
else else
svga->render = svga_render_text_80; svga->render = svga_render_text_80;
} else { } else {
#if 0
if (svga->adv_flags & FLAG_NOSKEW) if (svga->adv_flags & FLAG_NOSKEW)
svga->ma_latch--; svga->ma_latch--;
#endif
switch (svga->gdcreg[5] & 0x60) { switch (svga->gdcreg[5] & 0x60) {
case 0x00: case 0x00:

38
src/video/vid_oak_oti.c
View File

@@ -31,7 +31,9 @@
#include <86box/vid_svga_render.h> #include <86box/vid_svga_render.h>
#define BIOS_037C_PATH "roms/video/oti/bios.bin" #define BIOS_037C_PATH "roms/video/oti/bios.bin"
#define BIOS_067_AMA932J_PATH "roms/machines/ama932j/oti067.bin" #define BIOS_067_AMA932J_PATH "roms/machines/ama932j/oti067.bin"
#define BIOS_067_M300_08_PATH "roms/machines/olivetti_m300_08/EVC_BIOS.ROM"
#define BIOS_067_M300_15_PATH "roms/machines/olivetti_m300_15/EVC_BIOS.ROM"
#define BIOS_077_PATH "roms/video/oti/oti077.vbi" #define BIOS_077_PATH "roms/video/oti/oti077.vbi"
@@ -39,6 +41,7 @@ enum {
OTI_037C, OTI_037C,
OTI_067 = 2, OTI_067 = 2,
OTI_067_AMA932J, OTI_067_AMA932J,
OTI_067_M300 = 4,
OTI_077 = 5 OTI_077 = 5
}; };
@@ -394,6 +397,16 @@ oti_init(const device_t *info)
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break; break;
case OTI_067_M300:
if (rom_present(BIOS_067_M300_15_PATH))
romfn = BIOS_067_M300_15_PATH;
else
romfn = BIOS_067_M300_08_PATH;
oti->vram_size = device_get_config_int("memory");
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break;
case OTI_067: case OTI_067:
case OTI_077: case OTI_077:
romfn = BIOS_077_PATH; romfn = BIOS_077_PATH;
@@ -463,20 +476,27 @@ oti037c_available(void)
return(rom_present(BIOS_037C_PATH)); return(rom_present(BIOS_037C_PATH));
} }
static int static int
oti067_ama932j_available(void) oti067_ama932j_available(void)
{ {
return(rom_present(BIOS_067_AMA932J_PATH)); return(rom_present(BIOS_067_AMA932J_PATH));
} }
static int static int
oti067_077_available(void) oti067_077_available(void)
{ {
return(rom_present(BIOS_077_PATH)); return(rom_present(BIOS_077_PATH));
} }
static int
oti067_m300_available(void)
{
if (rom_present(BIOS_067_M300_15_PATH))
return(rom_present(BIOS_067_M300_15_PATH));
else
return(rom_present(BIOS_067_M300_08_PATH));
}
static const device_config_t oti067_config[] = static const device_config_t oti067_config[] =
{ {
@@ -569,6 +589,18 @@ const device_t oti067_device =
oti067_config oti067_config
}; };
const device_t oti067_m300_device =
{
"Oak OTI-067 (Olivetti M300-08/15)",
DEVICE_ISA,
4,
oti_init, oti_close, NULL,
{ oti067_m300_available },
oti_speed_changed,
oti_force_redraw,
oti067_config
};
const device_t oti067_ama932j_device = const device_t oti067_ama932j_device =
{ {
"Oak OTI-067 (AMA-932J)", "Oak OTI-067 (AMA-932J)",

32
src/video/vid_s3.c
View File

@@ -2801,8 +2801,6 @@ static void s3_recalctimings(svga_t *svga)
s3_t *s3 = (s3_t *)svga->p; s3_t *s3 = (s3_t *)svga->p;
int clk_sel = (svga->miscout >> 2) & 3; int clk_sel = (svga->miscout >> 2) & 3;
svga->hdisp = svga->hdisp_old;
if (!svga->scrblank && svga->attr_palette_enable) { if (!svga->scrblank && svga->attr_palette_enable) {
if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) {
if (svga->crtc[0x3a] & 0x10) { /*256+ color register*/ if (svga->crtc[0x3a] & 0x10) { /*256+ color register*/
@@ -2812,12 +2810,13 @@ static void s3_recalctimings(svga_t *svga)
} }
svga->ma_latch |= (s3->ma_ext << 16); svga->ma_latch |= (s3->ma_ext << 16);
if (s3->chip >= S3_86C928) { if (s3->chip >= S3_86C928) {
svga->hdisp = svga->hdisp_old;
if (svga->crtc[0x5d] & 0x01) svga->htotal |= 0x100; if (svga->crtc[0x5d] & 0x01) svga->htotal |= 0x100;
if (svga->crtc[0x5d] & 0x02) { if (svga->crtc[0x5d] & 0x02) {
svga->hdisp_time |= 0x100; svga->hdisp_time |= 0x100;
svga->hdisp |= 0x100 * svga->dots_per_clock; svga->hdisp |= 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8);
} }
if (svga->crtc[0x5e] & 0x01) svga->vtotal |= 0x400; if (svga->crtc[0x5e] & 0x01) svga->vtotal |= 0x400;
if (svga->crtc[0x5e] & 0x02) svga->dispend |= 0x400; if (svga->crtc[0x5e] & 0x02) svga->dispend |= 0x400;
@@ -2826,7 +2825,7 @@ static void s3_recalctimings(svga_t *svga)
if (svga->crtc[0x5e] & 0x40) svga->split |= 0x400; if (svga->crtc[0x5e] & 0x40) svga->split |= 0x400;
if (svga->crtc[0x51] & 0x30) svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; if (svga->crtc[0x51] & 0x30) svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4;
else if (svga->crtc[0x43] & 0x04) svga->rowoffset |= 0x100; else if (svga->crtc[0x43] & 0x04) svga->rowoffset |= 0x100;
} else if (svga->crtc[0x43] & 0x04) svga->rowoffset |= 0x100; }
if (!svga->rowoffset) svga->rowoffset = 256; if (!svga->rowoffset) svga->rowoffset = 256;
if ((s3->chip == S3_VISION964) || (s3->chip == S3_86C928)) { if ((s3->chip == S3_VISION964) || (s3->chip == S3_86C928)) {
@@ -3066,28 +3065,6 @@ static void s3_recalctimings(svga_t *svga)
} }
} }
} }
if (s3->chip >= S3_86C801) {
if (!svga->scrblank && svga->attr_palette_enable && (svga->crtc[0x43] & 0x80)) {
/* TODO: In case of bug reports, disable 9-dots-wide character clocks in graphics modes. */
svga->dots_per_clock = ((svga->seqregs[1] & 1) ? 16 : 18);
}
if (svga->crtc[0x5d] & 0x04)
svga->hblankstart += 0x100;
if (s3->chip >= S3_VISION964) {
/* NOTE: The S3 Trio64V+ datasheet says this is bit 7, but then where is bit 6?
The datasheets for the pre-Trio64V+ cards say +64, which implies bit 6,
and, contrary to VGADOC, it also exists on Trio32, Trio64, Vision868,
and Vision968. */
// pclog("svga->crtc[0x5d] = %02X\n", svga->crtc[0x5d]);
if (svga->crtc[0x5d] & 0x08)
svga->hblank_ext = 0x40;
svga->hblank_end_len = 0x00000040;
}
}
svga->hblank_overscan = !(svga->crtc[0x33] & 0x20);
} }
static void s3_trio64v_recalctimings(svga_t *svga) static void s3_trio64v_recalctimings(svga_t *svga)
@@ -8138,3 +8115,4 @@ const device_t s3_trio64v2_dx_onboard_pci_device =
s3_force_redraw, s3_force_redraw,
s3_standard_config s3_standard_config
}; };

152
src/video/vid_svga.c
View File

@@ -20,13 +20,11 @@
* Copyright 2016-2019 Miran Grca. * Copyright 2016-2019 Miran Grca.
*/ */
#include <inttypes.h> #include <inttypes.h>
#include <stdarg.h>
#include <stdio.h> #include <stdio.h>
#include <stdint.h> #include <stdint.h>
#include <stdlib.h>
#include <string.h> #include <string.h>
#include <stdlib.h>
#include <wchar.h> #include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h> #include <86box/86box.h>
#include "cpu.h" #include "cpu.h"
#include <86box/device.h> #include <86box/device.h>
@@ -55,27 +53,6 @@ uint8_t svga_rotate[8][256];
static svga_t *svga_pri; static svga_t *svga_pri;
// #define ENABLE_SVGA_LOG 1
#ifdef ENABLE_SVGA_LOG
int svga_do_log = ENABLE_SVGA_LOG;
static void
svga_log(const char *fmt, ...)
{
va_list ap;
if (svga_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define svga_log(fmt, ...)
#endif
svga_t svga_t
*svga_get_pri() *svga_get_pri()
{ {
@@ -199,7 +176,7 @@ svga_out(uint16_t addr, uint8_t val, void *p)
break; break;
case 4: case 4:
svga->chain2_write = !(val & 4); svga->chain2_write = !(val & 4);
svga->chain4 = (svga->chain4 & ~8) | (val & 8); svga->chain4 = val & 8;
svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) &&
!svga->gdcreg[1]) && ((svga->chain4 && svga->packed_chain4) || svga->fb_only) && !(svga->adv_flags & FLAG_ADDR_BY8); !svga->gdcreg[1]) && ((svga->chain4 && svga->packed_chain4) || svga->fb_only) && !(svga->adv_flags & FLAG_ADDR_BY8);
break; break;
@@ -260,7 +237,7 @@ svga_out(uint16_t addr, uint8_t val, void *p)
break; break;
case 6: case 6:
if ((svga->gdcreg[6] & 0xc) != (val & 0xc)) { if ((svga->gdcreg[6] & 0xc) != (val & 0xc)) {
switch (val & 0xc) { switch (val&0xC) {
case 0x0: /*128k at A0000*/ case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff; svga->banked_mask = 0xffff;
@@ -291,9 +268,6 @@ svga_out(uint16_t addr, uint8_t val, void *p)
((svga->gdcaddr & 15) == 6 && (val ^ o) & 1)) ((svga->gdcaddr & 15) == 6 && (val ^ o) & 1))
svga_recalctimings(svga); svga_recalctimings(svga);
break; break;
case 0x3da:
svga->fcr = val;
break;
} }
} }
@@ -361,9 +335,6 @@ svga_in(uint16_t addr, void *p)
if (svga->adv_flags & FLAG_RAMDAC_SHIFT) if (svga->adv_flags & FLAG_RAMDAC_SHIFT)
ret >>= 2; ret >>= 2;
break; break;
case 0x3ca:
ret = svga->fcr;
break;
case 0x3cc: case 0x3cc:
ret = svga->miscout; ret = svga->miscout;
break; break;
@@ -397,11 +368,7 @@ svga_in(uint16_t addr, void *p)
svga->cgastat &= ~0x30; svga->cgastat &= ~0x30;
else else
svga->cgastat ^= 0x30; svga->cgastat ^= 0x30;
ret = svga->cgastat; ret = svga->cgastat;
if ((svga->fcr & 0x08) && svga->dispon)
ret |= 0x08;
break; break;
} }
@@ -433,10 +400,6 @@ void
svga_recalctimings(svga_t *svga) svga_recalctimings(svga_t *svga)
{ {
double crtcconst, _dispontime, _dispofftime, disptime; double crtcconst, _dispontime, _dispofftime, disptime;
#ifdef ENABLE_SVGA_LOG
int vsyncend, vblankend;
int hdispstart, hdispend, hsyncstart, hsyncend;
#endif
svga->vtotal = svga->crtc[6]; svga->vtotal = svga->crtc[6];
svga->dispend = svga->crtc[0x12]; svga->dispend = svga->crtc[0x12];
@@ -474,9 +437,12 @@ svga_recalctimings(svga_t *svga)
svga->vblankstart |= 0x200; svga->vblankstart |= 0x200;
svga->vblankstart++; svga->vblankstart++;
svga->hdisp = svga->crtc[1] - ((svga->crtc[3] & 0x60) >> 5); svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5);
svga->hdisp++; svga->hdisp++;
svga->htotal = svga->crtc[0];
svga->htotal += 6; /*+6 is required for Tyrian*/
svga->rowoffset = svga->crtc[0x13]; svga->rowoffset = svga->crtc[0x13];
svga->clock = (svga->vidclock) ? VGACONST2 : VGACONST1; svga->clock = (svga->vidclock) ? VGACONST2 : VGACONST1;
@@ -493,19 +459,20 @@ svga_recalctimings(svga_t *svga)
svga->hdisp_time = svga->hdisp; svga->hdisp_time = svga->hdisp;
svga->render = svga_render_blank; svga->render = svga_render_blank;
if (!svga->scrblank && svga->attr_palette_enable) { if (!svga->scrblank && svga->attr_palette_enable) {
/* TODO: In case of bug reports, disable 9-dots-wide character clocks in graphics modes. */
if (svga->seqregs[1] & 8)
svga->hdisp *= (svga->seqregs[1] & 1) ? 16 : 18;
else
svga->hdisp *= (svga->seqregs[1] & 1) ? 8 : 9;
if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/
if (svga->seqregs[1] & 8) /*40 column*/ if (svga->seqregs[1] & 8) /*40 column*/ {
svga->render = svga_render_text_40; svga->render = svga_render_text_40;
else svga->hdisp *= (svga->seqregs[1] & 1) ? 16 : 18;
/* Character clock is off by 1 now in 40-line modes, on all cards. */
svga->ma_latch--;
svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18;
} else {
svga->render = svga_render_text_80; svga->render = svga_render_text_80;
svga->hdisp *= (svga->seqregs[1] & 1) ? 8 : 9;
}
svga->hdisp_old = svga->hdisp; svga->hdisp_old = svga->hdisp;
} else { } else {
svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8;
svga->hdisp_old = svga->hdisp; svga->hdisp_old = svga->hdisp;
switch (svga->gdcreg[5] & 0x60) { switch (svga->gdcreg[5] & 0x60) {
@@ -567,7 +534,7 @@ svga_recalctimings(svga_t *svga)
} }
svga->linedbl = svga->crtc[9] & 0x80; svga->linedbl = svga->crtc[9] & 0x80;
svga->char_width = (svga->seqregs[1] & 1) ? 8 : 9; svga->char_width = (svga->seqregs[1] & 1) ? 8 : 9;
if (enable_overscan) { if (enable_overscan) {
overscan_y = (svga->rowcount + 1) << 1; overscan_y = (svga->rowcount + 1) << 1;
@@ -584,41 +551,9 @@ svga_recalctimings(svga_t *svga)
} else } else
overscan_x = 16; overscan_x = 16;
svga->htotal = svga->crtc[0];
svga->hblankstart = svga->crtc[4] + 1;
svga->hblank_end_val = (svga->crtc[3] & 0x1f) | ((svga->crtc[5] & 0x80) ? 0x20 : 0x00);
// pclog("htotal = %i, hblankstart = %i, hblank_end_val = %02X\n", svga->htotal, svga->hblankstart, svga->hblank_end_val);
svga->hblank_end_len = 0x00000040;
svga->hblank_overscan = 1;
if (!svga->scrblank && svga->attr_palette_enable) {
/* TODO: In case of bug reports, disable 9-dots-wide character clocks in graphics modes. */
if (svga->seqregs[1] & 8)
svga->dots_per_clock = ((svga->seqregs[1] & 1) ? 16 : 18);
else
svga->dots_per_clock = ((svga->seqregs[1] & 1) ? 8 : 9);
} else
svga->dots_per_clock = 1;
/* Do svga->recalctimings_ex() here so that the above five variables can be
updated by said function. */
if (svga->recalctimings_ex) if (svga->recalctimings_ex)
svga->recalctimings_ex(svga); svga->recalctimings_ex(svga);
svga->htotal += 6; /*+6 is required for Tyrian*/
svga->hblankend = (svga->hblankstart & ~(svga->hblank_end_len - 1)) | svga->hblank_end_val;
if (svga->hblankend <= svga->hblankstart)
svga->hblankend += svga->hblank_end_len;
svga->hblankend += svga->hblank_ext;
svga->hblank_sub = 0;
if (svga->hblankend > svga->htotal) {
svga->hblankend &= (svga->hblank_end_len - 1);
svga->hblank_sub = svga->hblankend + svga->hblank_overscan;
svga->hdisp -= (svga->hblank_sub * svga->dots_per_clock);
}
svga->y_add = (overscan_y >> 1) - (svga->crtc[8] & 0x1f); svga->y_add = (overscan_y >> 1) - (svga->crtc[8] & 0x1f);
svga->x_add = (overscan_x >> 1); svga->x_add = (overscan_x >> 1);
@@ -627,44 +562,6 @@ svga_recalctimings(svga_t *svga)
crtcconst = svga->clock * svga->char_width; crtcconst = svga->clock * svga->char_width;
#ifdef ENABLE_SVGA_LOG
vsyncend = (svga->vsyncstart & 0xfffffff0) | (svga->crtc[0x11] & 0x0f);
if (vsyncend <= svga->vsyncstart)
vsyncend += 0x00000010;
vblankend = (svga->vblankstart & 0xffffff80) | (svga->crtc[0x16] & 0x7f);
if (vblankend <= svga->vblankstart)
vblankend += 0x00000080;
hdispstart = ((svga->crtc[3] >> 5) & 3);
hdispend = svga->crtc[1] + 1;
hsyncstart = svga->crtc[4] + ((svga->crtc[5] >> 5) & 3) + 1;
hsyncend = (hsyncstart & 0xffffffe0) | (svga->crtc[5] & 0x1f);
if (hsyncend <= hsyncstart)
hsyncend += 0x00000020;
#endif
svga_log("Last scanline in the vertical period: %i\n"
"First scanline after the last of active display: %i\n"
"First scanline with vertical retrace asserted: %i\n"
"First scanline after the last with vertical retrace asserted: %i\n"
"First scanline of blanking: %i\n"
"First scanline after the last of blanking: %i\n"
"\n"
"Last character in the horizontal period: %i\n"
"First character of active display: %i\n"
"First character after the last of active display: %i\n"
"First character with horizontal retrace asserted: %i\n"
"First character after the last with horizontal retrace asserted: %i\n"
"First character of blanking: %i\n"
"First character after the last of blanking: %i\n"
"\n"
"\n",
svga->vtotal, svga->dispend, svga->vsyncstart, vsyncend,
svga->vblankstart, vblankend,
svga->htotal, hdispstart, hdispend, hsyncstart, hsyncend,
svga->hblankstart, svga->hblankend
);
disptime = svga->htotal; disptime = svga->htotal;
_dispontime = svga->hdisp_time; _dispontime = svga->hdisp_time;
@@ -750,8 +647,6 @@ svga_poll(void *p)
uint32_t x, blink_delay; uint32_t x, blink_delay;
int wx, wy; int wx, wy;
int ret, old_ma; int ret, old_ma;
// int lines_num = (svga->vtotal > svga->vsyncstart) ? svga->vtotal : svga->vsyncstart;
// int lines_num = svga->vsyncstart + 3 + 19;
if (!svga->linepos) { if (!svga->linepos) {
if (svga->displine == svga->hwcursor_latch.y && svga->hwcursor_latch.ena) { if (svga->displine == svga->hwcursor_latch.y && svga->hwcursor_latch.ena) {
@@ -830,7 +725,7 @@ svga_poll(void *p)
svga->displine++; svga->displine++;
if (svga->interlace) if (svga->interlace)
svga->displine++; svga->displine++;
if ((svga->cgastat & 8) && ((svga->displine & 15) == (svga->crtc[0x11] & 15))) if ((svga->cgastat & 8) && ((svga->displine & 15) == (svga->crtc[0x11] & 15)) && svga->vslines)
svga->cgastat &= ~8; svga->cgastat &= ~8;
svga->vslines++; svga->vslines++;
if (svga->displine > 1500) if (svga->displine > 1500)
@@ -882,12 +777,11 @@ svga_poll(void *p)
if (ret) { if (ret) {
if (svga->interlace && svga->oddeven) if (svga->interlace && svga->oddeven)
svga->ma = svga->maback = (svga->rowoffset << 1) + ((svga->crtc[3] & 0x60) >> 5) + svga->hblank_sub; svga->ma = svga->maback = (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5);
else else
svga->ma = svga->maback = ((svga->crtc[3] & 0x60) >> 5) + svga->hblank_sub; svga->ma = svga->maback = ((svga->crtc[5] & 0x60) >> 5);
svga->ma = (svga->ma << 2); svga->ma = (svga->ma << 2);
svga->maback = (svga->maback << 2); svga->maback = (svga->maback << 2);
svga->sc = 0; svga->sc = 0;
if (svga->attrregs[0x10] & 0x20) { if (svga->attrregs[0x10] & 0x20) {
svga->scrollcache = 0; svga->scrollcache = 0;
@@ -952,9 +846,9 @@ svga_poll(void *p)
svga->vslines = 0; svga->vslines = 0;
if (svga->interlace && svga->oddeven) if (svga->interlace && svga->oddeven)
svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[3] & 0x60) >> 5) + svga->hblank_sub; svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5);
else else
svga->ma = svga->maback = svga->ma_latch + ((svga->crtc[3] & 0x60) >> 5) + svga->hblank_sub; svga->ma = svga->maback = svga->ma_latch + ((svga->crtc[5] & 0x60) >> 5);
svga->ca = ((svga->crtc[0xe] << 8) | svga->crtc[0xf]) + ((svga->crtc[0xb] & 0x60) >> 5) + svga->ca_adj; svga->ca = ((svga->crtc[0xe] << 8) | svga->crtc[0xf]) + ((svga->crtc[0xb] & 0x60) >> 5) + svga->ca_adj;
svga->ma = (svga->ma << 2); svga->ma = (svga->ma << 2);
@@ -964,7 +858,6 @@ svga_poll(void *p)
if (svga->vsync_callback) if (svga->vsync_callback)
svga->vsync_callback(svga); svga->vsync_callback(svga);
} }
// if (svga->vc == lines_num) {
if (svga->vc == svga->vtotal) { if (svga->vc == svga->vtotal) {
svga->vc = 0; svga->vc = 0;
svga->sc = 0; svga->sc = 0;
@@ -1084,7 +977,6 @@ svga_init(const device_t *info, svga_t *svga, void *p, int memsize,
svga->ramdac_type = RAMDAC_6BIT; svga->ramdac_type = RAMDAC_6BIT;
svga->map8 = svga->pallook; svga->map8 = svga->pallook;
svga->hblank_overscan = 1; /* Do at least 1 character of overscan after horizontal blanking. */
return 0; return 0;
} }

2
src/video/vid_table.c
View File

@@ -112,8 +112,6 @@ video_cards[] = {
{ "tvga9000b", &tvga9000b_device }, { "tvga9000b", &tvga9000b_device },
{ "tgkorvga", &et4000k_isa_device }, { "tgkorvga", &et4000k_isa_device },
{ "et2000", &et2000_device }, { "et2000", &et2000_device },
{ "et3000ax", &et3000_isa_device },
{ "et4000ax_tc6058af", &et4000_tc6058af_isa_device },
{ "et4000ax", &et4000_isa_device }, { "et4000ax", &et4000_isa_device },
{ "et4000w32", &et4000w32_device }, { "et4000w32", &et4000w32_device },
{ "et4000w32i", &et4000w32i_isa_device }, { "et4000w32i", &et4000w32i_isa_device },

1
src/win/Makefile.mingw
View File

@@ -744,7 +744,6 @@ VIDOBJ := video.o \
vid_bt48x_ramdac.o \ vid_bt48x_ramdac.o \
vid_av9194.o vid_icd2061.o vid_ics2494.o vid_ics2595.o \ vid_av9194.o vid_icd2061.o vid_ics2494.o vid_ics2595.o \
vid_cl54xx.o \ vid_cl54xx.o \
vid_et3000.o \
vid_et4000.o vid_sc1148x_ramdac.o \ vid_et4000.o vid_sc1148x_ramdac.o \
vid_sc1502x_ramdac.o \ vid_sc1502x_ramdac.o \
vid_et4000w32.o vid_stg_ramdac.o \ vid_et4000w32.o vid_stg_ramdac.o \