Wells AT, DataExpert 386WB, Genoa Unknown 486, Gigabyte GA-486L, Alaris Cougar, and updates to CMakeLists.txt and chipset.h. to finally include opti391.c and opti499.c.

src/chipset/CMakeLists.txt

@@ -17,7 +17,7 @@ add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali14
     ali1531.c ali1541.c ali1543.c ali1621.c ali6117.c ali1409.c headland.c ims8848.c intel_82335.c
     compaq_386.c contaq_82c59x.c cs4031.c intel_420ex.c intel_4x0.c intel_i450kx.c
     intel_sio.c intel_piix.c ../ioapic.c neat.c opti283.c opti291.c opti391.c opti495.c
-    opti602.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c
+    opti499.c opti602.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c
     sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c sis_5581.c sis_5591.c sis_5600.c
     sis_5511_h2p.c sis_5571_h2p.c sis_5581_h2p.c sis_5591_h2p.c sis_5600_h2p.c
     sis_5513_p2i.c sis_5513_ide.c sis_5572_usb.c sis_5595_pmu.c sis_55xx.c via_vt82c49x.c

src/chipset/compaq_386.c

@@ -746,6 +746,25 @@ compaq_386_init(UNUSED(const device_t *info))
     return dev;
 }
 
+static void
+compaq_genoa_outw(uint16_t port, uint16_t val, void *priv)
+{
+    if (port == 0x0c02) {
+        if (val)
+            mem_set_mem_state(0x000e0000, 0x00020000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+        else
+            mem_set_mem_state(0x000e0000, 0x00020000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+    }
+}
+
+static void *
+compaq_genoa_init(UNUSED(const device_t *info))
+{
+    io_sethandler(0x0c02, 3, NULL, NULL, NULL, NULL, compaq_genoa_outw, NULL, ram);
+
+    return ram;
+}
+
 const device_t compaq_386_device = {
     .name          = "Compaq 386 Memory Control",
     .internal_name = "compaq_386",
@@ -759,3 +778,17 @@ const device_t compaq_386_device = {
     .force_redraw  = NULL,
     .config        = NULL
 };
+
+const device_t compaq_genoa_device = {
+    .name          = "Compaq Genoa Memory Control",
+    .internal_name = "compaq_genoa",
+    .flags         = 0,
+    .local         = 0,
+    .init          = compaq_genoa_init,
+    .close         = NULL,
+    .reset         = NULL,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};

src/chipset/opti391.c

@@ -54,10 +54,34 @@ typedef struct mem_remapping_t {
 } mem_remapping_t;
 
 typedef struct opti391_t {
+    uint8_t type;
+    uint8_t reg_base;
+    uint8_t min_reg;
+    uint8_t max_reg;
+
+    uint16_t shadowed;
+    uint16_t old_start;
+
     uint8_t index;
     uint8_t regs[256];
 } opti391_t;
 
+static void
+opti391_recalcremap(opti391_t *dev)
+{
+    if (dev->type < 2) {
+        if ((mem_size > 8192) || (dev->shadowed & 0x0ff0) ||
+            !(dev->regs[0x01] & 0x0f) || !(dev->regs[0x01] & 0x10)) {
+            mem_remap_top_ex(0, dev->old_start);
+            dev->old_start = 1024;
+        } else {
+            mem_remap_top_ex(0, dev->old_start);
+            dev->old_start = (dev->regs[0x01] & 0x0f) * 1024;
+            mem_remap_top_ex(-256, dev->old_start);
+        }
+    }
+}
+
 static void
 opti391_shadow_recalc(opti391_t *dev)
 {
@@ -70,24 +94,25 @@ opti391_shadow_recalc(opti391_t *dev)
     shadowbios = shadowbios_write = 0;
 
     /* F0000-FFFFF */
-    sh_enable = !(dev->regs[0x22] & 0x80);
+    sh_enable = (dev->regs[0x02] & 0x80);
     if (sh_enable)
         mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
     else
         mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
+    dev->shadowed |= 0xf000;
 
-    sh_write_internal = (dev->regs[0x26] & 0x40);
+    sh_write_internal = (dev->regs[0x06] & 0x40);
     /* D0000-EFFFF */
     for (uint8_t i = 0; i < 8; i++) {
         base = 0xd0000 + (i << 14);
         if (base >= 0xe0000) {
-            sh_master = (dev->regs[0x22] & 0x40);
+            sh_master = (dev->regs[0x02] & 0x40);
-            sh_wp     = (dev->regs[0x22] & 0x10);
+            sh_wp     = (dev->regs[0x02] & 0x10);
         } else {
-            sh_master = (dev->regs[0x22] & 0x20);
+            sh_master = (dev->regs[0x02] & 0x20);
-            sh_wp     = (dev->regs[0x22] & 0x08);
+            sh_wp     = (dev->regs[0x02] & 0x08);
         }
-        sh_enable = dev->regs[0x23] & (1 << i);
+        sh_enable = dev->regs[0x03] & (1 << i);
 
         if (sh_master) {
             if (sh_enable) {
@@ -95,22 +120,29 @@ opti391_shadow_recalc(opti391_t *dev)
                     mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
                 else
                     mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-            } else if (sh_write_internal)
+                dev->shadowed |= (1 << (i + 4));
+            } else if (sh_write_internal) {
                 mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
-            else
+                dev->shadowed |= (1 << (i + 4));
+            } else {
                 mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
-        } else if (sh_write_internal)
+                dev->shadowed &= ~(1 << (i + 4));
+            }
+        } else if (sh_write_internal) {
             mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
-        else
+            dev->shadowed |= (1 << (i + 4));
+        } else {
             mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+            dev->shadowed &= ~(1 << (i + 4));
+        }
     }
 
     /* C0000-CFFFF */
-    sh_master = !(dev->regs[0x26] & 0x10);
+    sh_master = (dev->regs[0x06] & 0x10); /* OPTi 391 datasheet erratum! */
-    sh_wp     = (dev->regs[0x26] & 0x20);
+    sh_wp     = (dev->regs[0x06] & 0x20);
     for (uint8_t i = 0; i < 4; i++) {
         base      = 0xc0000 + (i << 14);
-        sh_enable = dev->regs[0x26] & (1 << i);
+        sh_enable = dev->regs[0x06] & (1 << i);
 
         if (sh_master) {
             if (sh_enable) {
@@ -118,15 +150,24 @@ opti391_shadow_recalc(opti391_t *dev)
                     mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
                 else
                     mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-            } else if (sh_write_internal)
+                dev->shadowed |= (1 << i);
+            } else if (sh_write_internal) {
                 mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
-            else
+                dev->shadowed |= (1 << i);
-                mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+            } else {
-        } else if (sh_write_internal)
-            mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
-        else
                 mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+                dev->shadowed &= ~(1 << i);
             }
+        } else if (sh_write_internal) {
+            mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
+            dev->shadowed |= (1 << i);
+        } else {
+            mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+            dev->shadowed &= ~(1 << i);
+        }
+    }
+
+    opti391_recalcremap(dev);
 }
 
 static void
@@ -134,6 +175,8 @@ opti391_write(uint16_t addr, uint8_t val, void *priv)
 {
     opti391_t *dev = (opti391_t *) priv;
 
+    opti391_log("[W] %04X = %02X\n", addr, val);
+
     switch (addr) {
         case 0x22:
             dev->index = val;
@@ -142,26 +185,76 @@ opti391_write(uint16_t addr, uint8_t val, void *priv)
         case 0x24:
             opti391_log("OPTi 391: dev->regs[%02x] = %02x\n", dev->index, val);
 
-            switch (dev->index) {
+            if ((dev->index <= 0x01) && (dev->type < 2))  switch (dev->index) {
-                case 0x20:
+                case 0x00:
-                    dev->regs[dev->index] = (dev->regs[dev->index] & 0xc0) | (val & 0x3f);
+                    if (!(dev->regs[0x10] & 0x20) && (val & 0x20)) {
+                        softresetx86(); /* Pulse reset! */
+                        cpu_set_edx();
+                        flushmmucache();
+                    }
+                    dev->regs[dev->index + 0x10] = val;
                     break;
 
-                case 0x21:
+                case 0x01:
-                case 0x24:
+                    dev->regs[dev->index + 0x10] = val;
-                case 0x25:
+                    reset_on_hlt = !!(val & 0x02);
-                case 0x27:
+                    break;
-                case 0x28:
+            } else  switch (dev->index - dev->reg_base) {
-                case 0x29:
+                case 0x00:
-                case 0x2a:
+                    if (dev->type == 2) {
-                case 0x2b:
+                        reset_on_hlt = !!(val & 0x02);
-                    dev->regs[dev->index] = val;
+                        if (!(dev->regs[dev->index - dev->reg_base] & 0x01) && (val & 0x01)) {
+                            softresetx86(); /* Pulse reset! */
+                            cpu_set_edx();
+                            flushmmucache();
+                        }
+                        dev->regs[dev->index - dev->reg_base] =
+                            (dev->regs[dev->index - dev->reg_base] & 0xc0) | (val & 0x3f);
+                    }
                     break;
 
-                case 0x22:
+                case 0x01:
-                case 0x23:
+                    dev->regs[dev->index - dev->reg_base] = val;
-                case 0x26:
+                    if (dev->type == 2) {
-                    dev->regs[dev->index] = val;
+                        cpu_cache_ext_enabled = !!(dev->regs[0x01] & 0x10);
+                        cpu_update_waitstates();
+                    } else
+                        opti391_recalcremap(dev);
+                    break;
+
+                case 0x04:
+                case 0x05:
+                case 0x09:
+                case 0x0a:
+                case 0x0b:
+                    dev->regs[dev->index - dev->reg_base] = val;
+                    break;
+
+                case 0x07:
+                    dev->regs[dev->index - dev->reg_base] = val;
+                    if (dev->type < 2) {
+                        mem_a20_alt = val & 0x08;
+                        mem_a20_recalc();
+                    }
+                    break;
+                case 0x08:
+                    dev->regs[dev->index - dev->reg_base] = val;
+                    if (dev->type < 2) {
+                        cpu_cache_ext_enabled = !!(dev->regs[0x02] & 0x40);
+                        cpu_update_waitstates();
+                    }
+                    break;
+                case 0x0c:
+                case 0x0d:
+                    if (dev->type < 2)
+                        dev->regs[dev->index - dev->reg_base] = val;
+                    break;
+
+                case 0x02:
+                case 0x03:
+                case 0x06:
+                    pclog("Write %02X: %02X\n", dev->index - dev->reg_base, val);
+                    dev->regs[dev->index - dev->reg_base] = val;
                     opti391_shadow_recalc(dev);
                     break;
 
@@ -181,8 +274,14 @@ opti391_read(uint16_t addr, void *priv)
     const opti391_t *dev = (opti391_t *) priv;
     uint8_t          ret = 0xff;
 
-    if (addr == 0x24)
+    if (addr == 0x24) {
-        ret = dev->regs[dev->index];
+        if ((dev->index <= 0x01) && (dev->type < 2))
+            ret = dev->regs[dev->index + 0x10];
+        else if ((dev->index >= dev->min_reg) && (dev->index <= dev->max_reg))
+            ret = dev->regs[dev->index - dev->reg_base];
+    }
+
+    opti391_log("[R] %04X = %02X\n", addr, ret);
 
     return ret;
 }
@@ -196,32 +295,68 @@ opti391_close(void *priv)
 }
 
 static void *
-opti391_init(UNUSED(const device_t *info))
+opti391_init(const device_t *info)
 {
-    opti391_t *dev = (opti391_t *) malloc(sizeof(opti391_t));
+    opti391_t *dev = (opti391_t *) calloc(1, sizeof(opti391_t));
-    memset(dev, 0x00, sizeof(opti391_t));
 
     io_sethandler(0x0022, 0x0001, opti391_read, NULL, NULL, opti391_write, NULL, NULL, dev);
     io_sethandler(0x0024, 0x0001, opti391_read, NULL, NULL, opti391_write, NULL, NULL, dev);
 
-    dev->regs[0x21] = 0x84;
+    dev->type = info->local;
-    dev->regs[0x24] = 0x07;
+
-    dev->regs[0x25] = 0xf0;
+    if (info->local == 2) {
-    dev->regs[0x26] = 0x30;
+        dev->reg_base   = 0x20;
-    dev->regs[0x27] = 0x91;
+        dev->min_reg    = 0x20;
-    dev->regs[0x28] = 0x80;
+        dev->max_reg    = 0x2b;
-    dev->regs[0x29] = 0x10;
+
-    dev->regs[0x2a] = 0x80;
+        dev->regs[0x02] = 0x84;
-    dev->regs[0x2b] = 0x10;
+        dev->regs[0x04] = 0x07;
+        dev->regs[0x05] = 0xf0;
+        dev->regs[0x06] = 0x30;
+        dev->regs[0x07] = 0x91;
+        dev->regs[0x08] = 0x80;
+        dev->regs[0x09] = 0x10;
+        dev->regs[0x0a] = 0x80;
+        dev->regs[0x0b] = 0x10;
+    } else {
+        dev->reg_base   = 0x0f;
+        dev->min_reg    = 0x10;
+        dev->max_reg    = 0x1c;
+
+        dev->regs[0x01] = 0x01;
+        dev->regs[0x02] = 0xe0;
+        if (info->local == 1)
+            /* Guess due to no OPTi 48x datasheet. */
+            dev->regs[0x04] = 0x07;
+        else
+            dev->regs[0x04] = 0x77;
+        dev->regs[0x05] = 0x60;
+        dev->regs[0x06] = 0x10;
+        dev->regs[0x07] = 0x50;
+        if (info->local == 1) {
+            /* Guess due to no OPTi 48x datasheet. */
+            dev->regs[0x09] = 0x80; /* Non-Cacheable Block 1 */
+            dev->regs[0x0b] = 0x80; /* Non-Cacheable Block 2 */
+            dev->regs[0x0d] = 0x91; /* Cacheable Area */
+        } else {
+            dev->regs[0x09] = 0xe0; /* Non-Cacheable Block 1 */
+            dev->regs[0x0b] = 0x10; /* Non-Cacheable Block 2 */
+            dev->regs[0x0d] = 0x80; /* Cacheable Area */
+        }
+        dev->regs[0x0a] = 0x10;
+        dev->regs[0x0c] = 0x10;
+    }
+
+    dev->old_start = 1024;
 
     opti391_shadow_recalc(dev);
 
     return dev;
 }
 
-const device_t opti391_device = {
+const device_t opti381_device = {
-    .name          = "OPTi 82C391",
+    .name          = "OPTi 82C381",
-    .internal_name = "opti391",
+    .internal_name = "opti381",
     .flags         = 0,
     .local         = 0,
     .init          = opti391_init,
@@ -232,3 +367,31 @@ const device_t opti391_device = {
     .force_redraw  = NULL,
     .config        = NULL
 };
+
+const device_t opti481_device = {
+    .name          = "OPTi 82C481",
+    .internal_name = "opti481",
+    .flags         = 0,
+    .local         = 1,
+    .init          = opti391_init,
+    .close         = opti391_close,
+    .reset         = NULL,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};
+
+const device_t opti391_device = {
+    .name          = "OPTi 82C391",
+    .internal_name = "opti391",
+    .flags         = 0,
+    .local         = 2,
+    .init          = opti391_init,
+    .close         = opti391_close,
+    .reset         = NULL,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};

src/chipset/opti499.c

@@ -84,7 +84,7 @@ opti499_recalc(opti499_t *dev)
             shflags = MEM_READ_INTERNAL;
             shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
         } else {
-            if (dev->regs[0x2d] && (1 << ((i >> 1) + 2)))
+            if (dev->regs[0x2d] & (1 << ((i >> 1) + 2)))
                 shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
             else
                 shflags = MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL;
@@ -101,13 +101,13 @@ opti499_recalc(opti499_t *dev)
             shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
         } else {
             if (dev->regs[0x26] & 0x40) {
-                if (dev->regs[0x2d] && (1 << (i >> 1)))
+                if (dev->regs[0x2d] & (1 << (i >> 1)))
                     shflags = MEM_READ_EXTANY;
                 else
                     shflags = MEM_READ_EXTERNAL;
                 shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
             } else {
-                if (dev->regs[0x2d] && (1 << (i >> 1)))
+                if (dev->regs[0x2d] & (1 << (i >> 1)))
                     shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
                 else
                     shflags = MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL;

src/include/86box/chipset.h

@@ -39,6 +39,7 @@ extern const device_t amd640_device;
 
 /* Compaq */
 extern const device_t compaq_386_device;
+extern const device_t compaq_genoa_device;
 
 /* Contaq/Cypress */
 extern const device_t contaq_82c596a_device;
@@ -110,8 +111,12 @@ extern const device_t ioapic_device;
 /* OPTi */
 extern const device_t opti283_device;
 extern const device_t opti291_device;
+extern const device_t opti381_device;
+extern const device_t opti391_device;
+extern const device_t opti481_device;
 extern const device_t opti493_device;
 extern const device_t opti495_device;
+extern const device_t opti499_device;
 extern const device_t opti601_device;
 extern const device_t opti602_device;
 extern const device_t opti802g_device;

src/include/86box/machine.h

@@ -232,6 +232,9 @@ enum {
     MACHINE_CHIPSET_INTEL_440GX,
     MACHINE_CHIPSET_OPTI_283,
     MACHINE_CHIPSET_OPTI_291,
+    MACHINE_CHIPSET_OPTI_381,
+    MACHINE_CHIPSET_OPTI_391,
+    MACHINE_CHIPSET_OPTI_481,
     MACHINE_CHIPSET_OPTI_493,
     MACHINE_CHIPSET_OPTI_495,
     MACHINE_CHIPSET_OPTI_499,
@@ -274,6 +277,7 @@ enum {
     MACHINE_CHIPSET_VLSI_VL82C481,
     MACHINE_CHIPSET_VLSI_VL82C486,
     MACHINE_CHIPSET_WD76C10,
+    MACHINE_CHIPSET_ZYMOS_POACH,
     MACHINE_CHIPSET_MAX
 };
 
@@ -432,6 +436,7 @@ extern int machine_at_ibmxt286_init(const machine_t *);
 
 extern int machine_at_siemens_init(const machine_t *); // Siemens PCD-2L. N82330 discrete machine. It segfaults in some places
 
+extern int machine_at_wellamerastar_init(const machine_t *); // Wells American A*Star with custom award BIOS 
 #if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
 extern int machine_at_openat_init(const machine_t *);
 #endif
@@ -488,6 +493,14 @@ extern int machine_at_awardsx_init(const machine_t *);
 extern int machine_at_pc916sx_init(const machine_t *);
 
 /* m_at_386dx_486.c */
+/* Note to jriwanek: When merging this into my branch, please make
+   sure this appear here (and in the .c file) in the order and position
+   in which they appear in the machine table. */
+extern int machine_at_dataexpert386wb_init(const machine_t *);
+extern int machine_at_genoa486_init(const machine_t *);
+extern int machine_at_ga486l_init(const machine_t *);
+extern int machine_at_cougar_init(const machine_t *);
+
 extern int machine_at_acc386_init(const machine_t *);
 extern int machine_at_asus386_init(const machine_t *);
 extern int machine_at_ecs386_init(const machine_t *);

src/include/86box/mem.h

@@ -451,6 +451,7 @@ extern void mem_a20_recalc(void);
 extern void mem_init(void);
 extern void mem_close(void);
 extern void mem_reset(void);
+extern void mem_remap_top_ex(int kb, uint32_t start);
 extern void mem_remap_top(int kb);
 
 extern void umc_smram_recalc(uint32_t start, int set);

src/machine/m_at.c

@@ -258,6 +258,23 @@ machine_at_siemens_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_wellamerastar_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_interleaved("roms/machines/wellamerastar/W_3.031_L.BIN",
+                                "roms/machines/wellamerastar/W_3.031_H.BIN",
+                                0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_ibm_common_init(model);
+
+    return ret;
+}
+
 #if defined(DEV_BRANCH) && defined(USE_OPEN_AT)
 int
 machine_at_openat_init(const machine_t *model)

src/machine/m_at_386dx_486.c

@@ -41,6 +41,7 @@
 #include <86box/sio.h>
 #include <86box/hdc.h>
 #include <86box/port_6x.h>
+#include <86box/port_92.h>
 #include <86box/video.h>
 #include <86box/flash.h>
 #include <86box/scsi_ncr53c8xx.h>
@@ -2295,3 +2296,95 @@ machine_at_atc1762_init(const machine_t *model)
 
     return ret;
 }
+
+int
+machine_at_dataexpert386wb_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/dataexpert386wb/st0386-wb-ver2-0-618f078c738cb397184464.bin",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    device_add(&opti391_device);
+    device_add(&keyboard_at_ami_device);
+
+    if (fdc_current[0] == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}
+
+int
+machine_at_genoa486_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/genoa486/AMI486.BIO",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    device_add(&compaq_genoa_device);
+    device_add(&port_92_device);
+
+    device_add(&keyboard_at_ami_device);
+
+    if (fdc_current[0] == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}
+
+int
+machine_at_ga486l_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ga486l/ga-486l_bios.bin",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+    device_add(&opti381_device);
+    device_add(&keyboard_at_ami_device);
+
+    if (fdc_current[0] == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}
+
+int
+machine_at_cougar_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/cougar/COUGRMRB.BIN",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+    device_add(&ide_vlb_device);
+
+    device_add(&opti499_device);
+    device_add(&fdc37c665_ide_pri_device);
+
+    device_add(&keyboard_at_ami_device);
+
+    if (fdc_current[0] == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}

src/machine/machine_table.c

@@ -126,6 +126,9 @@ const machine_filter_t machine_chipsets[] = {
     { "Intel 440GX",                MACHINE_CHIPSET_INTEL_440GX         },
     { "OPTi 283",                   MACHINE_CHIPSET_OPTI_283            },
     { "OPTi 291",                   MACHINE_CHIPSET_OPTI_291            },
+    { "OPTi 381",                   MACHINE_CHIPSET_OPTI_381            },
+    { "OPTi 391",                   MACHINE_CHIPSET_OPTI_391            },
+    { "OPTi 481",                   MACHINE_CHIPSET_OPTI_481            },
     { "OPTi 493",                   MACHINE_CHIPSET_OPTI_493            },
     { "OPTi 495",                   MACHINE_CHIPSET_OPTI_495            },
     { "OPTi 499",                   MACHINE_CHIPSET_OPTI_499            },
@@ -2921,6 +2924,46 @@ const machine_t machines[] = {
         .snd_device = NULL,
         .net_device = NULL
     },
+    /* Has Chips & Technologies KBC firmware. */
+    {
+        .name = "[ISA] Wells American A*Star ",
+        .internal_name = "wellamerastar",
+        .type = MACHINE_TYPE_286,
+        .chipset = MACHINE_CHIPSET_DISCRETE,
+        .init = machine_at_wellamerastar_init,
+        .p1_handler = NULL,
+        .gpio_handler = NULL,
+        .available_flag = MACHINE_AVAILABLE,
+        .gpio_acpi_handler = NULL,
+        .cpu = {
+            .package = CPU_PKG_286,
+            .block = CPU_BLOCK_NONE,
+            .min_bus = 6000000,
+            .max_bus = 14000000,
+            .min_voltage = 0,
+            .max_voltage = 0,
+            .min_multi = 0,
+            .max_multi = 0
+        },
+        .bus_flags = MACHINE_AT,
+        .flags = MACHINE_FLAGS_NONE,
+        .ram = {
+            .min = 512,
+            .max = 1024,
+            .step = 512
+        },
+        .nvrmask = 63,
+        .kbc_device = NULL,
+        .kbc_p1 = 0xff,
+        .gpio = 0xffffffff,
+        .gpio_acpi = 0xffffffff,
+        .device = NULL,
+        .fdc_device = NULL,
+        .sio_device = NULL,
+        .vid_device = NULL,
+        .snd_device = NULL,
+        .net_device = NULL
+    },
 #if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
     /* Has Olivetti KBC firmware. */
     {
@@ -5221,6 +5264,46 @@ const machine_t machines[] = {
         .vid_device = NULL,
         .snd_device = NULL,
         .net_device = NULL
+    },
+    /* Has AMIKey 'F' KBC firmware. */
+    {
+        .name = "[OPTi 391] DataExpert 386WB",
+        .internal_name = "dataexpert386wb",
+        .type = MACHINE_TYPE_386DX,
+        .chipset = MACHINE_CHIPSET_OPTI_391,
+        .init = machine_at_dataexpert386wb_init,
+        .p1_handler = NULL,
+        .gpio_handler = NULL,
+        .available_flag = MACHINE_AVAILABLE,
+        .gpio_acpi_handler = NULL,
+        .cpu = {
+            .package = CPU_PKG_386DX, /* Actual machine only supports 386DXes */
+            .block = CPU_BLOCK_NONE,
+            .min_bus = 0,
+            .max_bus = 0,
+            .min_voltage = 0,
+            .max_voltage = 0,
+            .min_multi = 0,
+            .max_multi = 0
+        },
+        .bus_flags = MACHINE_AT,
+        .flags = MACHINE_FLAGS_NONE,
+        .ram = {
+            .min = 1024,
+            .max = 32768,
+            .step = 1024
+        },
+        .nvrmask = 127,
+        .kbc_device = NULL,
+        .kbc_p1 = 0xff,
+        .gpio = 0xffffffff,
+        .gpio_acpi = 0xffffffff,
+        .device = NULL,
+        .fdc_device = NULL,
+        .sio_device = NULL,
+        .vid_device = NULL,
+        .snd_device = NULL,
+        .net_device = NULL
     },
      /* The board has a "ASII KB-100" which I was not able to find any information about,
         but the BIOS sends commands C9 without a parameter and D5, both of which are
@@ -5550,6 +5633,86 @@ const machine_t machines[] = {
     },
 
     /* 486 machines - Socket 1 */
+    /* Has AMI KF KBC firmware. */
+    {
+        .name = "[ZyMOS Poach] Genoa Unknown 486",
+        .internal_name = "genoa486",
+        .type = MACHINE_TYPE_486,
+        .chipset = MACHINE_CHIPSET_ZYMOS_POACH,
+        .init = machine_at_genoa486_init,
+        .p1_handler = NULL,
+        .gpio_handler = NULL,
+        .available_flag = MACHINE_AVAILABLE,
+        .gpio_acpi_handler = NULL,
+        .cpu = {
+            .package = CPU_PKG_SOCKET1,
+            .block = CPU_BLOCK_NONE,
+            .min_bus = 0,
+            .max_bus = 0,
+            .min_voltage = 0,
+            .max_voltage = 0,
+            .min_multi = 0,
+            .max_multi = 0
+        },
+        .bus_flags = MACHINE_AT,
+        .flags = MACHINE_APM,
+        .ram = {
+            .min = 1024,
+            .max = 65536,
+            .step = 1024
+        },
+        .nvrmask = 127,
+        .kbc_device = NULL,
+        .kbc_p1 = 0xff,
+        .gpio = 0xffffffff,
+        .gpio_acpi = 0xffffffff,
+        .device = NULL,
+        .fdc_device = NULL,
+        .sio_device = NULL,
+        .vid_device = NULL,
+        .snd_device = NULL,
+        .net_device = NULL
+    },
+    /* Has AMI KF KBC firmware. */
+    {
+        .name = "[OPTi 381] Gigabyte GA-486L",
+        .internal_name = "ga486l",
+        .type = MACHINE_TYPE_486,
+        .chipset = MACHINE_CHIPSET_OPTI_381,
+        .init = machine_at_ga486l_init,
+        .p1_handler = NULL,
+        .gpio_handler = NULL,
+        .available_flag = MACHINE_AVAILABLE,
+        .gpio_acpi_handler = NULL,
+        .cpu = {
+            .package = CPU_PKG_SOCKET1,
+            .block = CPU_BLOCK_NONE,
+            .min_bus = 0,
+            .max_bus = 0,
+            .min_voltage = 0,
+            .max_voltage = 0,
+            .min_multi = 0,
+            .max_multi = 0
+        },
+        .bus_flags = MACHINE_AT,
+        .flags = MACHINE_APM,
+        .ram = {
+            .min = 1024,
+            .max = 16384,
+            .step = 1024
+        },
+        .nvrmask = 127,
+        .kbc_device = NULL,
+        .kbc_p1 = 0xff,
+        .gpio = 0xffffffff,
+        .gpio_acpi = 0xffffffff,
+        .device = NULL,
+        .fdc_device = NULL,
+        .sio_device = NULL,
+        .vid_device = NULL,
+        .snd_device = NULL,
+        .net_device = NULL
+    },
     /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F.
        It also has those Ex commands also seen on the VIA VT82C42N (the BIOS
        supposedly sends command EF.
@@ -6204,6 +6367,46 @@ const machine_t machines[] = {
         .snd_device = NULL,
         .net_device = NULL
     },
+    /* Has AMIKey-2 'H' KBC firmware. */
+    {
+        .name = "[OPTi 499] Alaris COUGAR 486BL",
+        .internal_name = "cougar",
+        .type = MACHINE_TYPE_486_S2,
+        .chipset = MACHINE_CHIPSET_OPTI_499,
+        .init = machine_at_cougar_init,
+        .p1_handler = NULL,
+        .gpio_handler = NULL,
+        .available_flag = MACHINE_AVAILABLE,
+        .gpio_acpi_handler = NULL,
+        .cpu = {
+            .package = CPU_PKG_SOCKET3,
+            .block = CPU_BLOCK_NONE,
+            .min_bus = 0,
+            .max_bus = 0,
+            .min_voltage = 0,
+            .max_voltage = 0,
+            .min_multi = 0,
+            .max_multi = 0
+        },
+        .bus_flags = MACHINE_VLB,
+        .flags = MACHINE_APM,
+        .ram = {
+            .min = 1024,
+            .max = 65536,
+            .step = 1024
+        },
+        .nvrmask = 127,
+        .kbc_device = NULL,
+        .kbc_p1 = 0xff,
+        .gpio = 0xffffffff,
+        .gpio_acpi = 0xffffffff,
+        .device = NULL,
+        .fdc_device = NULL,
+        .sio_device = NULL,
+        .vid_device = NULL,
+        .snd_device = NULL,
+        .net_device = NULL
+    },
     /* Uses an Intel KBC with Phoenix MultiKey KBC firmware. */
     {
         .name = "[SiS 461] DEC DECpc LPV",

src/mem/mem.c

@@ -2968,10 +2968,9 @@ umc_smram_recalc(uint32_t start, int set)
 }
 
 void
-mem_remap_top(int kb)
+mem_remap_top_ex(int kb, uint32_t start)
 {
     uint32_t   c;
-    uint32_t   start = (mem_size >= 1024) ? mem_size : 1024;
     int        offset;
     int        size = mem_size - 640;
     int        set        = 1;
@@ -3097,6 +3096,12 @@ mem_remap_top(int kb)
     flushmmucache();
 }
 
+void
+mem_remap_top(int kb)
+{
+    mem_remap_top_ex(kb, (mem_size >= 1024) ? mem_size : 1024);
+}
+
 void
 mem_reset_page_blocks(void)
 {