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Moved the AMD K5 and K6 CPU's and the ATi VGA Wonder XL24 to the Dev branch;

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Turned the char arrays in gameport.h into const char pointers;
The makefile no longer links in the (unfinished) PIIX4 emulation code (which is currently not used by anything even in the Dev branch).
This commit is contained in:
OBattler
2018-02-18 13:43:49 +01:00
parent e0a9de85c9
commit 1405d9b10b
13 changed files with 120 additions and 18 deletions
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10
src/cpu/386_ops.h
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@@ -8,7 +8,7 @@
*
* 286/386+ instruction handlers list.
*
* Version: @(#)386_ops.h 1.0.1 2018/01/01
* Version: @(#)386_ops.h 1.0.2 2018/02/18
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei,
@@ -148,7 +148,11 @@ static int ILLEGAL(uint32_t fetchdat)
}
#include "x86seg.h"
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#include "x86_ops_amd.h"
#endif
#endif
#include "x86_ops_arith.h"
#include "x86_ops_atomic.h"
#include "x86_ops_bcd.h"
@@ -778,6 +782,8 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
OpFn OP_TABLE(k6_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
@@ -868,6 +874,8 @@ OpFn OP_TABLE(k6_0f)[1024] =
/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
#endif
#endif
OpFn OP_TABLE(c6x86mx_0f)[1024] =
{

22
src/cpu/cpu.c
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@@ -8,7 +8,7 @@
*
* CPU type handler.
*
* Version: @(#)cpu.c 1.0.10 2018/02/01
* Version: @(#)cpu.c 1.0.11 2018/02/18
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei,
@@ -156,11 +156,15 @@ uint64_t ecx570_msr = 0;
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
/* AMD K5 and K6 MSR's. */
uint64_t ecx83_msr = 0;
/* These are K6-only. */
uint64_t star = 0;
uint64_t sfmask = 0;
#endif
#endif
int timing_rr;
int timing_mr, timing_mrl;
@@ -1068,6 +1072,8 @@ void cpu_set()
ccr4 = 0x80;
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
case CPU_K5:
case CPU_5K86:
#ifdef USE_DYNAREC
@@ -1120,6 +1126,8 @@ void cpu_set()
codegen_timing_set(&codegen_timing_pentium);
#endif
break;
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
@@ -1391,6 +1399,8 @@ void cpu_CPUID()
EAX = 0;
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
case CPU_K5:
if (!EAX)
{
@@ -1522,6 +1532,8 @@ void cpu_CPUID()
else
EAX = 0;
break;
#endif
#endif
case CPU_PENTIUMMMX:
if (!EAX)
@@ -1728,6 +1740,8 @@ void cpu_RDMSR()
}
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
case CPU_K5:
case CPU_5K86:
case CPU_K6:
@@ -1761,6 +1775,8 @@ void cpu_RDMSR()
break;
}
break;
#endif
#endif
case CPU_PENTIUM:
case CPU_PENTIUMMMX:
@@ -1953,6 +1969,8 @@ void cpu_WRMSR()
break;
}
break;
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
case CPU_K5:
case CPU_5K86:
case CPU_K6:
@@ -1975,6 +1993,8 @@ void cpu_WRMSR()
break;
}
break;
#endif
#endif
case CPU_PENTIUM:
case CPU_PENTIUMMMX:

8
src/cpu/cpu.h
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@@ -45,9 +45,13 @@
#define CPU_Cx6x86MX 20
#define CPU_Cx6x86L 21
#define CPU_CxGX1 22
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
#define CPU_K5 23
#define CPU_5K86 24
#define CPU_K6 25
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
#define CPU_PENTIUMPRO 26 /* 686 class CPUs */
@@ -101,8 +105,12 @@ extern CPU cpus_WinChip[];
extern CPU cpus_Pentium5V[];
extern CPU cpus_Pentium5V50[];
extern CPU cpus_PentiumS5[];
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
extern CPU cpus_K5[];
extern CPU cpus_K56[];
#endif
#endif
extern CPU cpus_Pentium[];
extern CPU cpus_6x86[];
#ifdef DEV_BRANCH

6
src/cpu/cpu_table.c
View File

@@ -29,7 +29,7 @@
* 16 = 180 MHz
* 17 = 200 MHz
*
* Version: @(#)cpu_table.c 1.0.3 2018/02/01
* Version: @(#)cpu_table.c 1.0.4 2018/02/18
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei,
@@ -382,6 +382,8 @@ CPU cpus_Pentium[] = {
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
CPU cpus_K5[] = {
/*AMD K5 (Socket 5)*/
{"K5 (5k86) 75 (P75)", CPU_K5, 9, 75000000, 2, 25000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4, 9},
@@ -420,6 +422,8 @@ CPU cpus_K56[] = {
{"K6 (Model 7) 300", CPU_K6, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686

8
src/cpu/x86_ops.h
View File

@@ -48,7 +48,11 @@ extern OpFn dynarec_ops_pentium_0f[1024];
extern OpFn dynarec_ops_pentiummmx_0f[1024];
extern OpFn dynarec_ops_c6x86mx_0f[1024];
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
extern OpFn dynarec_ops_k6_0f[1024];
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
@@ -140,7 +144,11 @@ extern OpFn ops_pentiummmx_0f[1024];
extern OpFn ops_c6x86mx_0f[1024];
#ifdef DEV_BRANCH
#ifdef USE_AMD_K
extern OpFn ops_k6_0f[1024];
#endif
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686