From 1433d9a0739e79d9fdedc985cad8e87ec82c2f86 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 15 Aug 2016 01:34:46 +0200 Subject: [PATCH] Applied both mainline PCem commits; Fixed the RTL8029AS again (one of my "fixes" broke it); RTL8029AS PCI register 4 is now written to; Added incomplete (and currently commented out) emulation of the AWE64 PCI; Replaced sector-based floppy emulation with more accurate code. --- src/386.c | 28 +- src/386_common.h | 18 +- src/386_dynarec.c | 28 +- src/386_dynarec_ops.c | 6 +- src/808x.c | 446 +++++++++++++++--------------- src/Makefile.mingw | 8 +- src/Makefile.mingw64 | 2 +- src/codegen_ops_x86.h | 8 +- src/codegen_x86-64.c | 110 +++----- src/codegen_x86.c | 113 +++----- src/cpu.c | 15 +- src/disc_img.c | 5 + src/disc_sector.c | 353 +++++------------------- src/disc_sector.h | 1 + src/disc_sector_86box.c | 592 ++++++++++++++++++++++++++++++++++++++++ src/fdc.c | 34 ++- src/ibm.h | 15 + src/ide.c | 6 + src/mem.c | 16 +- src/model.c | 1 + src/ne2000.c | 21 +- src/sound.c | 1 + src/sound_mpu401_uart.c | 10 + src/sound_mpu401_uart.h | 2 + src/sound_sb.c | 249 +++++++++++++++++ src/sound_sb.h | 1 + src/x86.h | 1 - src/x86_ops.h | 7 +- src/x86_ops_arith.h | 234 ++++++++-------- src/x86_ops_atomic.h | 76 +++--- src/x86_ops_bit.h | 40 +-- src/x86_ops_bitscan.h | 16 +- src/x86_ops_call.h | 40 +-- src/x86_ops_i686.h | 26 +- src/x86_ops_inc_dec.h | 4 +- src/x86_ops_jump.h | 72 ++--- src/x86_ops_misc.h | 74 +++-- src/x86_ops_mmx.h | 4 +- src/x86_ops_mmx_arith.h | 400 +++++++++++++-------------- src/x86_ops_mmx_cmp.h | 112 ++++---- src/x86_ops_mmx_logic.h | 16 +- src/x86_ops_mmx_mov.h | 56 ++-- src/x86_ops_mmx_pack.h | 208 +++++++------- src/x86_ops_mmx_shift.h | 108 ++++---- src/x86_ops_mov.h | 180 ++++++------ src/x86_ops_mov_ctrl.h | 68 ++--- src/x86_ops_mov_seg.h | 84 +++--- src/x86_ops_movx.h | 40 +-- src/x86_ops_mul.h | 40 +-- src/x86_ops_pmode.h | 22 +- src/x86_ops_shift.h | 74 +++-- src/x86_ops_stack.h | 36 +-- src/x86_ops_xchg.h | 36 +-- 53 files changed, 2335 insertions(+), 1828 deletions(-) create mode 100644 src/disc_sector_86box.c diff --git a/src/386.c b/src/386.c index 6dddc4088..ba81a5753 100644 --- a/src/386.c +++ b/src/386.c @@ -66,11 +66,11 @@ static inline void fetch_ea_32_long(uint32_t rmdat) eal_r = eal_w = NULL; easeg = ea_seg->base; ea_rseg = ea_seg->seg; - if (rm == 4) + if (cpu_rm == 4) { uint8_t sib = rmdat >> 8; - switch (mod) + switch (cpu_mod) { case 0: eaaddr = cpu_state.regs[sib & 7].l; @@ -87,7 +87,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat) break; } /*SIB byte present*/ - if ((sib & 7) == 5 && !mod) + if ((sib & 7) == 5 && !cpu_mod) eaaddr = getlong(); else if ((sib & 6) == 4 && !ssegs) { @@ -100,16 +100,16 @@ static inline void fetch_ea_32_long(uint32_t rmdat) } else { - eaaddr = cpu_state.regs[rm].l; - if (mod) + eaaddr = cpu_state.regs[cpu_rm].l; + if (cpu_mod) { - if (rm == 5 && !ssegs) + if (cpu_rm == 5 && !ssegs) { easeg = ss; ea_rseg = SS; ea_seg = &_ss; } - if (mod == 1) + if (cpu_mod == 1) { eaaddr += ((uint32_t)(int8_t)(rmdat >> 8)); cpu_state.pc++; @@ -119,7 +119,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat) eaaddr += getlong(); } } - else if (rm == 5) + else if (cpu_rm == 5) { eaaddr = getlong(); } @@ -139,13 +139,13 @@ static inline void fetch_ea_16_long(uint32_t rmdat) eal_r = eal_w = NULL; easeg = ea_seg->base; ea_rseg = ea_seg->seg; - if (!mod && rm == 6) + if (!cpu_mod && cpu_rm == 6) { eaaddr = getword(); } else { - switch (mod) + switch (cpu_mod) { case 0: eaaddr = 0; @@ -157,8 +157,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat) eaaddr = getword(); break; } - eaaddr += (*mod1add[0][rm]) + (*mod1add[1][rm]); - if (mod1seg[rm] == &ss && !ssegs) + eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); + if (mod1seg[cpu_rm] == &ss && !ssegs) { easeg = ss; ea_rseg = SS; @@ -176,8 +176,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat) } } -#define fetch_ea_16(rmdat) cpu_state.pc++; mod=(rmdat >> 6) & 3; reg=(rmdat >> 3) & 7; rm = rmdat & 7; if (mod != 3) { fetch_ea_16_long(rmdat); if (abrt) return 0; } -#define fetch_ea_32(rmdat) cpu_state.pc++; mod=(rmdat >> 6) & 3; reg=(rmdat >> 3) & 7; rm = rmdat & 7; if (mod != 3) { fetch_ea_32_long(rmdat); } if (abrt) return 0 +#define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_16_long(rmdat); if (abrt) return 0; } +#define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_32_long(rmdat); } if (abrt) return 0 #include "x86_flags.h" diff --git a/src/386_common.h b/src/386_common.h index 3477f19a6..2741c4492 100644 --- a/src/386_common.h +++ b/src/386_common.h @@ -259,8 +259,8 @@ static inline uint64_t getquad() static inline uint8_t geteab() { - if (mod == 3) - return (rm & 4) ? cpu_state.regs[rm & 3].b.h : cpu_state.regs[rm&3].b.l; + if (cpu_mod == 3) + return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm&3].b.l; if (eal_r) return *(uint8_t *)eal_r; return readmemb(easeg, eaaddr); @@ -268,8 +268,8 @@ static inline uint8_t geteab() static inline uint16_t geteaw() { - if (mod == 3) - return cpu_state.regs[rm].w; + if (cpu_mod == 3) + return cpu_state.regs[cpu_rm].w; // cycles-=3; if (eal_r) return *(uint16_t *)eal_r; @@ -278,8 +278,8 @@ static inline uint16_t geteaw() static inline uint32_t geteal() { - if (mod == 3) - return cpu_state.regs[rm].l; + if (cpu_mod == 3) + return cpu_state.regs[cpu_rm].l; // cycles-=3; if (eal_r) return *eal_r; @@ -312,9 +312,9 @@ static inline void seteaq(uint64_t v) writememql(easeg, eaaddr, v); } -#define seteab(v) if (mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,eaaddr,v); } else if (rm&4) cpu_state.regs[rm&3].b.h=v; else cpu_state.regs[rm].b.l=v -#define seteaw(v) if (mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,eaaddr,v); } else cpu_state.regs[rm].w=v -#define seteal(v) if (mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg,eaaddr,v); } else cpu_state.regs[rm].l=v +#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v +#define seteaw(v) if (cpu_mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,eaaddr,v); } else cpu_state.regs[cpu_rm].w=v +#define seteal(v) if (cpu_mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg,eaaddr,v); } else cpu_state.regs[cpu_rm].l=v #define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,eaaddr,v); #define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,eaaddr,v); diff --git a/src/386_dynarec.c b/src/386_dynarec.c index 4a7478473..d07c3f21a 100644 --- a/src/386_dynarec.c +++ b/src/386_dynarec.c @@ -74,11 +74,11 @@ static inline void fetch_ea_32_long(uint32_t rmdat) eal_r = eal_w = NULL; easeg = ea_seg->base; ea_rseg = ea_seg->seg; - if (rm == 4) + if (cpu_rm == 4) { uint8_t sib = rmdat >> 8; - switch (mod) + switch (cpu_mod) { case 0: eaaddr = cpu_state.regs[sib & 7].l; @@ -95,7 +95,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat) break; } /*SIB byte present*/ - if ((sib & 7) == 5 && !mod) + if ((sib & 7) == 5 && !cpu_mod) eaaddr = getlong(); else if ((sib & 6) == 4 && !ssegs) { @@ -108,16 +108,16 @@ static inline void fetch_ea_32_long(uint32_t rmdat) } else { - eaaddr = cpu_state.regs[rm].l; - if (mod) + eaaddr = cpu_state.regs[cpu_rm].l; + if (cpu_mod) { - if (rm == 5 && !ssegs) + if (cpu_rm == 5 && !ssegs) { easeg = ss; ea_rseg = SS; ea_seg = &_ss; } - if (mod == 1) + if (cpu_mod == 1) { eaaddr += ((uint32_t)(int8_t)(rmdat >> 8)); cpu_state.pc++; @@ -127,7 +127,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat) eaaddr += getlong(); } } - else if (rm == 5) + else if (cpu_rm == 5) { eaaddr = getlong(); } @@ -148,13 +148,13 @@ static inline void fetch_ea_16_long(uint32_t rmdat) eal_r = eal_w = NULL; easeg = ea_seg->base; ea_rseg = ea_seg->seg; - if (!mod && rm == 6) + if (!cpu_mod && cpu_rm == 6) { eaaddr = getword(); } else { - switch (mod) + switch (cpu_mod) { case 0: eaaddr = 0; @@ -166,8 +166,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat) eaaddr = getword(); break; } - eaaddr += (*mod1add[0][rm]) + (*mod1add[1][rm]); - if (mod1seg[rm] == &ss && !ssegs) + eaaddr += (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); + if (mod1seg[cpu_rm] == &ss && !ssegs) { easeg = ss; ea_rseg = SS; @@ -186,8 +186,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat) cpu_state.last_ea = eaaddr; } -#define fetch_ea_16(rmdat) cpu_state.pc++; mod=(rmdat >> 6) & 3; reg=(rmdat >> 3) & 7; rm = rmdat & 7; if (mod != 3) { fetch_ea_16_long(rmdat); if (abrt) return 1; } -#define fetch_ea_32(rmdat) cpu_state.pc++; mod=(rmdat >> 6) & 3; reg=(rmdat >> 3) & 7; rm = rmdat & 7; if (mod != 3) { fetch_ea_32_long(rmdat); } if (abrt) return 1 +#define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_16_long(rmdat); if (abrt) return 1; } +#define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_32_long(rmdat); } if (abrt) return 1 #include "x86_flags.h" diff --git a/src/386_dynarec_ops.c b/src/386_dynarec_ops.c index a3101a828..c1797a885 100644 --- a/src/386_dynarec_ops.c +++ b/src/386_dynarec_ops.c @@ -47,10 +47,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat) cpu_state.last_ea = eaaddr; } -#define fetch_ea_16(rmdat) cpu_state.pc++; if (mod != 3) fetch_ea_16_long(rmdat); -#define fetch_ea_32(rmdat) cpu_state.pc++; if (mod != 3) fetch_ea_32_long(rmdat); - - +#define fetch_ea_16(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_16_long(rmdat); +#define fetch_ea_32(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_32_long(rmdat); #define OP_TABLE(name) dynarec_ops_ ## name #define CLOCK_CYCLES(c) diff --git a/src/808x.c b/src/808x.c index f985bb811..7f1e93537 100644 --- a/src/808x.c +++ b/src/808x.c @@ -65,10 +65,10 @@ void refreshread() { /*pclog("Refreshread\n"); */FETCHCOMPLETE(); memcycs+=4; } #undef fetchea #define fetchea() { rmdat=FETCH(); \ - reg=(rmdat>>3)&7; \ - mod=(rmdat>>6)&3; \ - rm=rmdat&7; \ - if (mod!=3) fetcheal(); } + cpu_reg=(rmdat>>3)&7; \ + cpu_mod=(rmdat>>6)&3; \ + cpu_rm=rmdat&7; \ + if (cpu_mod!=3) fetcheal(); } void writemembl(uint32_t addr, uint8_t val); void writememb(uint32_t a, uint8_t v) @@ -342,7 +342,7 @@ reg = If mod=11, (depending on data size, 16 bits/8 bits, 32 bits=extend 16 bit int cycles=0; uint32_t easeg,eaaddr; -int rm,reg,mod,rmdat; +int rmdat; uint16_t zero=0; uint16_t *mod1add[2][8]; @@ -363,32 +363,32 @@ void makemod1table() static void fetcheal() { - if (!mod && rm==6) { eaaddr=getword(); easeg=ds; FETCHADD(6); } + if (!cpu_mod && cpu_rm==6) { eaaddr=getword(); easeg=ds; FETCHADD(6); } else { - switch (mod) + switch (cpu_mod) { case 0: eaaddr=0; - if (rm&4) FETCHADD(5); - else FETCHADD(7+slowrm[rm]); + if (cpu_rm&4) FETCHADD(5); + else FETCHADD(7+slowrm[cpu_rm]); break; case 1: eaaddr=(uint16_t)(int8_t)FETCH(); - if (rm&4) FETCHADD(9); - else FETCHADD(11+slowrm[rm]); + if (cpu_rm&4) FETCHADD(9); + else FETCHADD(11+slowrm[cpu_rm]); break; case 2: eaaddr=getword(); - if (rm&4) FETCHADD(9); - else FETCHADD(11+slowrm[rm]); + if (cpu_rm&4) FETCHADD(9); + else FETCHADD(11+slowrm[cpu_rm]); break; case 3: - if (!(rm&4)) FETCHADD(2+slowrm[rm]); + if (!(cpu_rm&4)) FETCHADD(2+slowrm[cpu_rm]); return; } - eaaddr+=(*mod1add[0][rm])+(*mod1add[1][rm]); - easeg=*mod1seg[rm]; + eaaddr+=(*mod1add[0][cpu_rm])+(*mod1add[1][cpu_rm]); + easeg=*mod1seg[cpu_rm]; eaaddr&=0xFFFF; } cpu_state.last_ea = eaaddr; @@ -396,35 +396,35 @@ static void fetcheal() static inline uint8_t geteab() { - if (mod == 3) - return (rm & 4) ? cpu_state.regs[rm & 3].b.h : cpu_state.regs[rm & 3].b.l; + if (cpu_mod == 3) + return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm & 3].b.l; return readmemb(easeg+eaaddr); } static inline uint16_t geteaw() { - if (mod == 3) - return cpu_state.regs[rm].w; + if (cpu_mod == 3) + return cpu_state.regs[cpu_rm].w; // if (output==3) printf("GETEAW %04X:%08X\n",easeg,eaaddr); return readmemw(easeg,eaaddr); } static inline uint16_t geteaw2() { - if (mod == 3) - return cpu_state.regs[rm].w; + if (cpu_mod == 3) + return cpu_state.regs[cpu_rm].w; // printf("Getting addr from %04X:%04X %05X\n",easeg,eaaddr+2,easeg+eaaddr+2); return readmemw(easeg,(eaaddr+2)&0xFFFF); } static inline void seteab(uint8_t val) { - if (mod == 3) + if (cpu_mod == 3) { - if (rm & 4) - cpu_state.regs[rm & 3].b.h = val; + if (cpu_rm & 4) + cpu_state.regs[cpu_rm & 3].b.h = val; else - cpu_state.regs[rm & 3].b.l = val; + cpu_state.regs[cpu_rm & 3].b.l = val; } else { @@ -434,8 +434,8 @@ static inline void seteab(uint8_t val) static inline void seteaw(uint16_t val) { - if (mod == 3) - cpu_state.regs[rm].w = val; + if (cpu_mod == 3) + cpu_state.regs[cpu_rm].w = val; else { writememw(easeg,eaaddr,val); @@ -1133,32 +1133,32 @@ void execx86(int cycs) // readkey(); }*/ temp=geteab(); - setadd8(temp,getr8(reg)); - temp+=getr8(reg); + setadd8(temp,getr8(cpu_reg)); + temp+=getr8(cpu_reg); seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x01: /*ADD 16,reg*/ fetchea(); tempw=geteaw(); - setadd16(tempw, cpu_state.regs[reg].w); - tempw += cpu_state.regs[reg].w; + setadd16(tempw, cpu_state.regs[cpu_reg].w); + tempw += cpu_state.regs[cpu_reg].w; seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x02: /*ADD reg,8*/ + case 0x02: /*ADD cpu_reg,8*/ fetchea(); temp=geteab(); - setadd8(getr8(reg),temp); - setr8(reg,getr8(reg)+temp); - cycles-=((mod==3)?3:13); + setadd8(getr8(cpu_reg),temp); + setr8(cpu_reg,getr8(cpu_reg)+temp); + cycles-=((cpu_mod==3)?3:13); break; - case 0x03: /*ADD reg,16*/ + case 0x03: /*ADD cpu_reg,16*/ fetchea(); tempw=geteaw(); - setadd16(cpu_state.regs[reg].w,tempw); - cpu_state.regs[reg].w+=tempw; - cycles-=((mod==3)?3:13); + setadd16(cpu_state.regs[cpu_reg].w,tempw); + cpu_state.regs[cpu_reg].w+=tempw; + cycles-=((cpu_mod==3)?3:13); break; case 0x04: /*ADD AL,#8*/ temp=FETCH(); @@ -1192,38 +1192,38 @@ void execx86(int cycs) case 0x08: /*OR 8,reg*/ fetchea(); temp=geteab(); - temp|=getr8(reg); + temp|=getr8(cpu_reg); setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x09: /*OR 16,reg*/ fetchea(); tempw=geteaw(); - tempw|=cpu_state.regs[reg].w; + tempw|=cpu_state.regs[cpu_reg].w; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x0A: /*OR reg,8*/ + case 0x0A: /*OR cpu_reg,8*/ fetchea(); temp=geteab(); - temp|=getr8(reg); + temp|=getr8(cpu_reg); setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); - setr8(reg,temp); - cycles-=((mod==3)?3:13); + setr8(cpu_reg,temp); + cycles-=((cpu_mod==3)?3:13); break; case 0x0B: /*OR reg,16*/ fetchea(); tempw=geteaw(); - tempw|=cpu_state.regs[reg].w; + tempw|=cpu_state.regs[cpu_reg].w; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cpu_state.regs[reg].w=tempw; - cycles-=((mod==3)?3:13); + cpu_state.regs[cpu_reg].w=tempw; + cycles-=((cpu_mod==3)?3:13); break; case 0x0C: /*OR AL,#8*/ AL|=FETCH(); @@ -1257,34 +1257,34 @@ void execx86(int cycs) case 0x10: /*ADC 8,reg*/ fetchea(); temp=geteab(); - temp2=getr8(reg); + temp2=getr8(cpu_reg); setadc8(temp,temp2); temp+=temp2+tempc; seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x11: /*ADC 16,reg*/ fetchea(); tempw=geteaw(); - tempw2=cpu_state.regs[reg].w; + tempw2=cpu_state.regs[cpu_reg].w; setadc16(tempw,tempw2); tempw+=tempw2+tempc; seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x12: /*ADC reg,8*/ + case 0x12: /*ADC cpu_reg,8*/ fetchea(); temp=geteab(); - setadc8(getr8(reg),temp); - setr8(reg,getr8(reg)+temp+tempc); - cycles-=((mod==3)?3:13); + setadc8(getr8(cpu_reg),temp); + setr8(cpu_reg,getr8(cpu_reg)+temp+tempc); + cycles-=((cpu_mod==3)?3:13); break; - case 0x13: /*ADC reg,16*/ + case 0x13: /*ADC cpu_reg,16*/ fetchea(); tempw=geteaw(); - setadc16(cpu_state.regs[reg].w,tempw); - cpu_state.regs[reg].w+=tempw+tempc; - cycles-=((mod==3)?3:13); + setadc16(cpu_state.regs[cpu_reg].w,tempw); + cpu_state.regs[cpu_reg].w+=tempw+tempc; + cycles-=((cpu_mod==3)?3:13); break; case 0x14: /*ADC AL,#8*/ tempw=FETCH(); @@ -1320,38 +1320,38 @@ void execx86(int cycs) case 0x18: /*SBB 8,reg*/ fetchea(); temp=geteab(); - temp2=getr8(reg); + temp2=getr8(cpu_reg); setsbc8(temp,temp2); temp-=(temp2+tempc); seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x19: /*SBB 16,reg*/ fetchea(); tempw=geteaw(); - tempw2=cpu_state.regs[reg].w; + tempw2=cpu_state.regs[cpu_reg].w; // printf("%04X:%04X SBB %04X-%04X,%i\n",cs>>4,pc,tempw,tempw2,tempc); setsbc16(tempw,tempw2); tempw-=(tempw2+tempc); seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x1A: /*SBB reg,8*/ + case 0x1A: /*SBB cpu_reg,8*/ fetchea(); temp=geteab(); - setsbc8(getr8(reg),temp); - setr8(reg,getr8(reg)-(temp+tempc)); - cycles-=((mod==3)?3:13); + setsbc8(getr8(cpu_reg),temp); + setr8(cpu_reg,getr8(cpu_reg)-(temp+tempc)); + cycles-=((cpu_mod==3)?3:13); break; - case 0x1B: /*SBB reg,16*/ + case 0x1B: /*SBB cpu_reg,16*/ fetchea(); tempw=geteaw(); - tempw2=cpu_state.regs[reg].w; + tempw2=cpu_state.regs[cpu_reg].w; // printf("%04X:%04X SBB %04X-%04X,%i\n",cs>>4,pc,tempw,tempw2,tempc); setsbc16(tempw2,tempw); tempw2-=(tempw+tempc); - cpu_state.regs[reg].w=tempw2; - cycles-=((mod==3)?3:13); + cpu_state.regs[cpu_reg].w=tempw2; + cycles-=((cpu_mod==3)?3:13); break; case 0x1C: /*SBB AL,#8*/ temp=FETCH(); @@ -1386,38 +1386,38 @@ void execx86(int cycs) case 0x20: /*AND 8,reg*/ fetchea(); temp=geteab(); - temp&=getr8(reg); + temp&=getr8(cpu_reg); setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x21: /*AND 16,reg*/ fetchea(); tempw=geteaw(); - tempw&=cpu_state.regs[reg].w; + tempw&=cpu_state.regs[cpu_reg].w; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x22: /*AND reg,8*/ + case 0x22: /*AND cpu_reg,8*/ fetchea(); temp=geteab(); - temp&=getr8(reg); + temp&=getr8(cpu_reg); setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); - setr8(reg,temp); - cycles-=((mod==3)?3:13); + setr8(cpu_reg,temp); + cycles-=((cpu_mod==3)?3:13); break; - case 0x23: /*AND reg,16*/ + case 0x23: /*AND cpu_reg,16*/ fetchea(); tempw=geteaw(); - tempw&=cpu_state.regs[reg].w; + tempw&=cpu_state.regs[cpu_reg].w; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cpu_state.regs[reg].w=tempw; - cycles-=((mod==3)?3:13); + cpu_state.regs[cpu_reg].w=tempw; + cycles-=((cpu_mod==3)?3:13); break; case 0x24: /*AND AL,#8*/ AL&=FETCH(); @@ -1465,34 +1465,34 @@ void execx86(int cycs) case 0x28: /*SUB 8,reg*/ fetchea(); temp=geteab(); - setsub8(temp,getr8(reg)); - temp-=getr8(reg); + setsub8(temp,getr8(cpu_reg)); + temp-=getr8(cpu_reg); seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x29: /*SUB 16,reg*/ fetchea(); tempw=geteaw(); -// printf("%04X:%04X %04X-%04X\n",cs>>4,pc,tempw,cpu_state.regs[reg].w); - setsub16(tempw,cpu_state.regs[reg].w); - tempw-=cpu_state.regs[reg].w; +// printf("%04X:%04X %04X-%04X\n",cs>>4,pc,tempw,cpu_state.regs[cpu_reg].w); + setsub16(tempw,cpu_state.regs[cpu_reg].w); + tempw-=cpu_state.regs[cpu_reg].w; seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x2A: /*SUB reg,8*/ + case 0x2A: /*SUB cpu_reg,8*/ fetchea(); temp=geteab(); - setsub8(getr8(reg),temp); - setr8(reg,getr8(reg)-temp); - cycles-=((mod==3)?3:13); + setsub8(getr8(cpu_reg),temp); + setr8(cpu_reg,getr8(cpu_reg)-temp); + cycles-=((cpu_mod==3)?3:13); break; - case 0x2B: /*SUB reg,16*/ + case 0x2B: /*SUB cpu_reg,16*/ fetchea(); tempw=geteaw(); -// printf("%04X:%04X %04X-%04X\n",cs>>4,pc,cpu_state.regs[reg].w,tempw); - setsub16(cpu_state.regs[reg].w,tempw); - cpu_state.regs[reg].w-=tempw; - cycles-=((mod==3)?3:13); +// printf("%04X:%04X %04X-%04X\n",cs>>4,pc,cpu_state.regs[cpu_reg].w,tempw); + setsub16(cpu_state.regs[cpu_reg].w,tempw); + cpu_state.regs[cpu_reg].w-=tempw; + cycles-=((cpu_mod==3)?3:13); break; case 0x2C: /*SUB AL,#8*/ temp=FETCH(); @@ -1538,38 +1538,38 @@ void execx86(int cycs) case 0x30: /*XOR 8,reg*/ fetchea(); temp=geteab(); - temp^=getr8(reg); + temp^=getr8(cpu_reg); setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x31: /*XOR 16,reg*/ fetchea(); tempw=geteaw(); - tempw^=cpu_state.regs[reg].w; + tempw^=cpu_state.regs[cpu_reg].w; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; - case 0x32: /*XOR reg,8*/ + case 0x32: /*XOR cpu_reg,8*/ fetchea(); temp=geteab(); - temp^=getr8(reg); + temp^=getr8(cpu_reg); setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); - setr8(reg,temp); - cycles-=((mod==3)?3:13); + setr8(cpu_reg,temp); + cycles-=((cpu_mod==3)?3:13); break; - case 0x33: /*XOR reg,16*/ + case 0x33: /*XOR cpu_reg,16*/ fetchea(); tempw=geteaw(); - tempw^=cpu_state.regs[reg].w; + tempw^=cpu_state.regs[cpu_reg].w; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cpu_state.regs[reg].w=tempw; - cycles-=((mod==3)?3:13); + cpu_state.regs[cpu_reg].w=tempw; + cycles-=((cpu_mod==3)?3:13); break; case 0x34: /*XOR AL,#8*/ AL^=FETCH(); @@ -1609,30 +1609,30 @@ void execx86(int cycs) case 0x38: /*CMP 8,reg*/ fetchea(); temp=geteab(); -// if (output) printf("CMP %02X-%02X\n",temp,getr8(reg)); - setsub8(temp,getr8(reg)); - cycles-=((mod==3)?3:13); +// if (output) printf("CMP %02X-%02X\n",temp,getr8(cpu_reg)); + setsub8(temp,getr8(cpu_reg)); + cycles-=((cpu_mod==3)?3:13); break; case 0x39: /*CMP 16,reg*/ fetchea(); tempw=geteaw(); -// if (output) printf("CMP %04X-%04X\n",tempw,cpu_state.regs[reg].w); - setsub16(tempw,cpu_state.regs[reg].w); - cycles-=((mod==3)?3:13); +// if (output) printf("CMP %04X-%04X\n",tempw,cpu_state.regs[cpu_reg].w); + setsub16(tempw,cpu_state.regs[cpu_reg].w); + cycles-=((cpu_mod==3)?3:13); break; - case 0x3A: /*CMP reg,8*/ + case 0x3A: /*CMP cpu_reg,8*/ fetchea(); temp=geteab(); -// if (output) printf("CMP %02X-%02X\n",getr8(reg),temp); - setsub8(getr8(reg),temp); - cycles-=((mod==3)?3:13); +// if (output) printf("CMP %02X-%02X\n",getr8(cpu_reg),temp); + setsub8(getr8(cpu_reg),temp); + cycles-=((cpu_mod==3)?3:13); break; - case 0x3B: /*CMP reg,16*/ + case 0x3B: /*CMP cpu_reg,16*/ fetchea(); tempw=geteaw(); -// printf("CMP %04X-%04X\n",cpu_state.regs[reg].w,tempw); - setsub16(cpu_state.regs[reg].w,tempw); - cycles-=((mod==3)?3:13); +// printf("CMP %04X-%04X\n",cpu_state.regs[cpu_reg].w,tempw); + setsub16(cpu_state.regs[cpu_reg].w,tempw); + cycles-=((cpu_mod==3)?3:13); break; case 0x3C: /*CMP AL,#8*/ temp=FETCH(); @@ -1812,49 +1812,49 @@ void execx86(int cycs) case 0x00: /*ADD b,#8*/ setadd8(temp,temp2); seteab(temp+temp2); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x08: /*OR b,#8*/ temp|=temp2; setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteab(temp); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x10: /*ADC b,#8*/ // temp2+=(flags&C_FLAG); setadc8(temp,temp2); seteab(temp+temp2+tempc); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x18: /*SBB b,#8*/ // temp2+=(flags&C_FLAG); setsbc8(temp,temp2); seteab(temp-(temp2+tempc)); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x20: /*AND b,#8*/ temp&=temp2; setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteab(temp); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x28: /*SUB b,#8*/ setsub8(temp,temp2); seteab(temp-temp2); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x30: /*XOR b,#8*/ temp^=temp2; setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteab(temp); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x38: /*CMP b,#8*/ setsub8(temp,temp2); - cycles-=((mod==3)?4:14); + cycles-=((cpu_mod==3)?4:14); break; // default: @@ -1874,52 +1874,52 @@ void execx86(int cycs) setadd16(tempw,tempw2); tempw+=tempw2; seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x08: /*OR w,#16*/ tempw|=tempw2; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x10: /*ADC w,#16*/ // tempw2+=(flags&C_FLAG); setadc16(tempw,tempw2); tempw+=tempw2+tempc; seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x20: /*AND w,#16*/ tempw&=tempw2; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x18: /*SBB w,#16*/ // tempw2+=(flags&C_FLAG); setsbc16(tempw,tempw2); seteaw(tempw-(tempw2+tempc)); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x28: /*SUB w,#16*/ setsub16(tempw,tempw2); tempw-=tempw2; seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x30: /*XOR w,#16*/ tempw^=tempw2; setznp16(tempw); flags&=~(C_FLAG|V_FLAG|A_FLAG); seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x38: /*CMP w,#16*/ // printf("CMP %04X %04X\n",tempw,tempw2); setsub16(tempw,tempw2); - cycles-=((mod==3)?4:14); + cycles-=((cpu_mod==3)?4:14); break; // default: @@ -1940,52 +1940,52 @@ void execx86(int cycs) setadd16(tempw,tempw2); tempw+=tempw2; seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x08: /*OR w,#8*/ tempw|=tempw2; setznp16(tempw); seteaw(tempw); flags&=~(C_FLAG|A_FLAG|V_FLAG); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x10: /*ADC w,#8*/ // tempw2+=(flags&C_FLAG); setadc16(tempw,tempw2); tempw+=tempw2+tempc; seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x18: /*SBB w,#8*/ // tempw2+=(flags&C_FLAG); setsbc16(tempw,tempw2); tempw-=(tempw2+tempc); seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x20: /*AND w,#8*/ tempw&=tempw2; setznp16(tempw); seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); flags&=~(C_FLAG|A_FLAG|V_FLAG); break; case 0x28: /*SUB w,#8*/ setsub16(tempw,tempw2); tempw-=tempw2; seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); break; case 0x30: /*XOR w,#8*/ tempw^=tempw2; setznp16(tempw); seteaw(tempw); - cycles-=((mod==3)?4:23); + cycles-=((cpu_mod==3)?4:23); flags&=~(C_FLAG|A_FLAG|V_FLAG); break; case 0x38: /*CMP w,#8*/ setsub16(tempw,tempw2); - cycles-=((mod==3)?4:14); + cycles-=((cpu_mod==3)?4:14); break; // default: @@ -1998,55 +1998,55 @@ void execx86(int cycs) case 0x84: /*TEST b,reg*/ fetchea(); temp=geteab(); - temp2=getr8(reg); + temp2=getr8(cpu_reg); setznp8(temp&temp2); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cycles-=((mod==3)?3:13); + cycles-=((cpu_mod==3)?3:13); break; case 0x85: /*TEST w,reg*/ fetchea(); tempw=geteaw(); - tempw2=cpu_state.regs[reg].w; + tempw2=cpu_state.regs[cpu_reg].w; setznp16(tempw&tempw2); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cycles-=((mod==3)?3:13); + cycles-=((cpu_mod==3)?3:13); break; case 0x86: /*XCHG b,reg*/ fetchea(); temp=geteab(); - seteab(getr8(reg)); - setr8(reg,temp); - cycles-=((mod==3)?4:25); + seteab(getr8(cpu_reg)); + setr8(cpu_reg,temp); + cycles-=((cpu_mod==3)?4:25); break; case 0x87: /*XCHG w,reg*/ fetchea(); tempw=geteaw(); - seteaw(cpu_state.regs[reg].w); - cpu_state.regs[reg].w=tempw; - cycles-=((mod==3)?4:25); + seteaw(cpu_state.regs[cpu_reg].w); + cpu_state.regs[cpu_reg].w=tempw; + cycles-=((cpu_mod==3)?4:25); break; case 0x88: /*MOV b,reg*/ fetchea(); - seteab(getr8(reg)); - cycles-=((mod==3)?2:13); + seteab(getr8(cpu_reg)); + cycles-=((cpu_mod==3)?2:13); break; case 0x89: /*MOV w,reg*/ fetchea(); - seteaw(cpu_state.regs[reg].w); - cycles-=((mod==3)?2:13); + seteaw(cpu_state.regs[cpu_reg].w); + cycles-=((cpu_mod==3)?2:13); break; - case 0x8A: /*MOV reg,b*/ + case 0x8A: /*MOV cpu_reg,b*/ fetchea(); temp=geteab(); - setr8(reg,temp); - cycles-=((mod==3)?2:12); + setr8(cpu_reg,temp); + cycles-=((cpu_mod==3)?2:12); break; - case 0x8B: /*MOV reg,w*/ + case 0x8B: /*MOV cpu_reg,w*/ fetchea(); tempw=geteaw(); - cpu_state.regs[reg].w=tempw; - cycles-=((mod==3)?2:12); + cpu_state.regs[cpu_reg].w=tempw; + cycles-=((cpu_mod==3)?2:12); break; case 0x8C: /*MOV w,sreg*/ @@ -2068,12 +2068,12 @@ void execx86(int cycs) seteaw(SS); break; } - cycles-=((mod==3)?2:13); + cycles-=((cpu_mod==3)?2:13); break; case 0x8D: /*LEA*/ fetchea(); - cpu_state.regs[reg].w=(mod == 3)?cpu_state.last_ea:eaaddr; + cpu_state.regs[cpu_reg].w=(cpu_mod == 3)?cpu_state.last_ea:eaaddr; cycles-=2; break; @@ -2104,7 +2104,7 @@ void execx86(int cycs) // printf("SS loaded with %04X %04X:%04X %04X %04X %04X\n",ss>>4,cs>>4,pc,CX,DX,es>>4); break; } - cycles-=((mod==3)?2:12); + cycles-=((cpu_mod==3)?2:12); skipnextprint=1; noint=1; break; @@ -2320,7 +2320,7 @@ void execx86(int cycs) BH=FETCH(); cycles-=4; break; - case 0xB8: case 0xB9: case 0xBA: case 0xBB: /*MOV reg,#16*/ + case 0xB8: case 0xB9: case 0xBA: case 0xBB: /*MOV cpu_reg,#16*/ case 0xBC: case 0xBD: case 0xBE: case 0xBF: cpu_state.regs[opcode&7].w=getword(); cycles-=4; @@ -2349,14 +2349,14 @@ void execx86(int cycs) break; case 0xC4: /*LES*/ fetchea(); - cpu_state.regs[reg].w=readmemw(easeg,eaaddr); //geteaw(); + cpu_state.regs[cpu_reg].w=readmemw(easeg,eaaddr); //geteaw(); tempw=readmemw(easeg,(eaaddr+2)&0xFFFF); //geteaw2(); loadseg(tempw,&_es); cycles-=24; break; case 0xC5: /*LDS*/ fetchea(); - cpu_state.regs[reg].w=readmemw(easeg,eaaddr); + cpu_state.regs[cpu_reg].w=readmemw(easeg,eaaddr); tempw=readmemw(easeg,(eaaddr+2)&0xFFFF); loadseg(tempw,&_ds); if (ssegs) oldds=ds; @@ -2366,13 +2366,13 @@ void execx86(int cycs) fetchea(); temp=FETCH(); seteab(temp); - cycles-=((mod==3)?4:14); + cycles-=((cpu_mod==3)?4:14); break; case 0xC7: /*MOV w,#16*/ fetchea(); tempw=getword(); seteaw(tempw); - cycles-=((mod==3)?4:14); + cycles-=((cpu_mod==3)?4:14); break; case 0xC8: /*RETF alias*/ @@ -2459,7 +2459,7 @@ void execx86(int cycs) // setznp8(temp); if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x08: /*ROR b,1*/ if (temp&1) flags|=C_FLAG; @@ -2470,7 +2470,7 @@ void execx86(int cycs) // setznp8(temp); if ((temp^(temp>>1))&0x40) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x10: /*RCL b,1*/ temp2=flags&C_FLAG; @@ -2482,7 +2482,7 @@ void execx86(int cycs) // setznp8(temp); if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x18: /*RCR b,1*/ temp2=flags&C_FLAG; @@ -2494,7 +2494,7 @@ void execx86(int cycs) // setznp8(temp); if ((temp^(temp>>1))&0x40) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x20: case 0x30: /*SHL b,1*/ if (temp&0x80) flags|=C_FLAG; @@ -2504,7 +2504,7 @@ void execx86(int cycs) temp<<=1; seteab(temp); setznp8(temp); - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); flags|=A_FLAG; break; case 0x28: /*SHR b,1*/ @@ -2515,7 +2515,7 @@ void execx86(int cycs) temp>>=1; seteab(temp); setznp8(temp); - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); flags|=A_FLAG; break; case 0x38: /*SAR b,1*/ @@ -2525,7 +2525,7 @@ void execx86(int cycs) if (temp&0x40) temp|=0x80; seteab(temp); setznp8(temp); - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); flags|=A_FLAG; flags&=~V_FLAG; break; @@ -2551,7 +2551,7 @@ void execx86(int cycs) // setznp16(tempw); if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x08: /*ROR w,1*/ if (tempw&1) flags|=C_FLAG; @@ -2562,7 +2562,7 @@ void execx86(int cycs) // setznp16(tempw); if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x10: /*RCL w,1*/ temp2=flags&C_FLAG; @@ -2573,7 +2573,7 @@ void execx86(int cycs) seteaw(tempw); if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x18: /*RCR w,1*/ temp2=flags&C_FLAG; @@ -2585,7 +2585,7 @@ void execx86(int cycs) // setznp16(tempw); if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); break; case 0x20: case 0x30: /*SHL w,1*/ if (tempw&0x8000) flags|=C_FLAG; @@ -2595,7 +2595,7 @@ void execx86(int cycs) tempw<<=1; seteaw(tempw); setznp16(tempw); - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); flags|=A_FLAG; break; case 0x28: /*SHR w,1*/ @@ -2606,7 +2606,7 @@ void execx86(int cycs) tempw>>=1; seteaw(tempw); setznp16(tempw); - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); flags|=A_FLAG; break; @@ -2617,7 +2617,7 @@ void execx86(int cycs) if (tempw&0x4000) tempw|=0x8000; seteaw(tempw); setznp16(tempw); - cycles-=((mod==3)?2:23); + cycles-=((cpu_mod==3)?2:23); flags|=A_FLAG; flags&=~V_FLAG; break; @@ -2652,7 +2652,7 @@ void execx86(int cycs) // setznp8(temp); if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x08: /*ROR b,CL*/ while (c>0) @@ -2668,7 +2668,7 @@ void execx86(int cycs) seteab(temp); if ((temp^(temp>>1))&0x40) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x10: /*RCL b,CL*/ // printf("RCL %i %02X %02X\n",c,CL,temp); @@ -2687,7 +2687,7 @@ void execx86(int cycs) seteab(temp); if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x18: /*RCR b,CL*/ while (c>0) @@ -2706,7 +2706,7 @@ void execx86(int cycs) seteab(temp); if ((temp^(temp>>1))&0x40) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x20: case 0x30: /*SHL b,CL*/ if ((temp<<(c-1))&0x80) flags|=C_FLAG; @@ -2715,7 +2715,7 @@ void execx86(int cycs) seteab(temp); setznp8(temp); cycles-=(c*4); - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); flags|=A_FLAG; break; case 0x28: /*SHR b,CL*/ @@ -2725,7 +2725,7 @@ void execx86(int cycs) seteab(temp); setznp8(temp); cycles-=(c*4); - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); flags|=A_FLAG; break; case 0x38: /*SAR b,CL*/ @@ -2740,7 +2740,7 @@ void execx86(int cycs) } seteab(temp); setznp8(temp); - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); flags|=A_FLAG; break; @@ -2773,7 +2773,7 @@ void execx86(int cycs) seteaw(tempw); if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x08: /*ROR w,CL*/ while (c>0) @@ -2788,7 +2788,7 @@ void execx86(int cycs) seteaw(tempw); if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x10: /*RCL w,CL*/ while (c>0) @@ -2805,7 +2805,7 @@ void execx86(int cycs) seteaw(tempw); if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x18: /*RCR w,CL*/ while (c>0) @@ -2823,7 +2823,7 @@ void execx86(int cycs) seteaw(tempw); if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG; else flags&=~V_FLAG; - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); break; case 0x20: case 0x30: /*SHL w,CL*/ @@ -2841,7 +2841,7 @@ void execx86(int cycs) seteaw(tempw); setznp16(tempw); cycles-=(c*4); - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); flags|=A_FLAG; break; @@ -2852,7 +2852,7 @@ void execx86(int cycs) seteaw(tempw); setznp16(tempw); cycles-=(c*4); - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); flags|=A_FLAG; break; @@ -2868,7 +2868,7 @@ void execx86(int cycs) } seteaw(tempw); setznp16(tempw); - cycles-=((mod==3)?8:28); + cycles-=((cpu_mod==3)?8:28); flags|=A_FLAG; break; @@ -3053,18 +3053,18 @@ void execx86(int cycs) temp&=temp2; setznp8(temp); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cycles-=((mod==3)?5:11); + cycles-=((cpu_mod==3)?5:11); break; case 0x10: /*NOT b*/ temp=~temp; seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x18: /*NEG b*/ setsub8(0,temp); temp=0-temp; seteab(temp); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x20: /*MUL AL,b*/ setznp8(AL); @@ -3190,17 +3190,17 @@ void execx86(int cycs) tempw2=getword(); setznp16(tempw&tempw2); flags&=~(C_FLAG|V_FLAG|A_FLAG); - cycles-=((mod==3)?5:11); + cycles-=((cpu_mod==3)?5:11); break; case 0x10: /*NOT w*/ seteaw(~tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x18: /*NEG w*/ setsub16(0,tempw); tempw=0-tempw; seteaw(tempw); - cycles-=((mod==3)?3:24); + cycles-=((cpu_mod==3)?3:24); break; case 0x20: /*MUL AX,w*/ setznp16(AX); @@ -3338,7 +3338,7 @@ void execx86(int cycs) } // setznp8(temp2); seteab(temp2); - cycles-=((mod==3)?3:23); + cycles-=((cpu_mod==3)?3:23); break; case 0xFF: @@ -3350,7 +3350,7 @@ void execx86(int cycs) setadd16nc(tempw,1); // setznp16(tempw+1); seteaw(tempw+1); - cycles-=((mod==3)?3:23); + cycles-=((cpu_mod==3)?3:23); break; case 0x08: /*DEC w*/ tempw=geteaw(); @@ -3359,7 +3359,7 @@ void execx86(int cycs) // setznp16(tempw-1); seteaw(tempw-1); // if (output) printf("DEC - %04X\n",tempw); - cycles-=((mod==3)?3:23); + cycles-=((cpu_mod==3)?3:23); break; case 0x10: /*CALL*/ tempw=geteaw(); @@ -3369,7 +3369,7 @@ void execx86(int cycs) cpu_state.last_ea = SP; cpu_state.pc=tempw; // printf("FF 10\n"); - cycles-=((mod==3)?20:29); + cycles-=((cpu_mod==3)?20:29); FETCHCLEAR(); break; case 0x18: /*CALL far*/ @@ -3391,7 +3391,7 @@ void execx86(int cycs) case 0x20: /*JMP*/ cpu_state.pc=geteaw(); // printf("FF 20\n"); - cycles-=((mod==3)?11:18); + cycles-=((cpu_mod==3)?11:18); FETCHCLEAR(); break; case 0x28: /*JMP far*/ @@ -3411,7 +3411,7 @@ void execx86(int cycs) writememw(ss,((SP-2)&0xFFFF),tempw); SP-=2; cpu_state.last_ea = SP; - cycles-=((mod==3)?15:24); + cycles-=((cpu_mod==3)?15:24); break; // default: diff --git a/src/Makefile.mingw b/src/Makefile.mingw index 1739f7830..3da0da7d6 100644 --- a/src/Makefile.mingw +++ b/src/Makefile.mingw @@ -2,10 +2,10 @@ VPATH = . dosbox resid-fp slirp CPP = g++.exe CC = gcc.exe WINDRES = windres.exe -CFLAGS = -O3 -march=native -mtune=native -fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -fomit-frame-pointer -ffast-math -msse -msse2 -msse3 -mssse3 -mfpmath=sse -mstackrealign +CFLAGS = -O3 -march=native -mtune=native -fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -fomit-frame-pointer -ffast-math -msse -msse2 -msse3 -mssse3 -mfpmath=sse -mstackrealign -g OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o acerm3a.o ali1429.o amstrad.o cdrom-ioctl.o cdrom-iso.o \ cdrom-null.o codegen.o codegen_ops.o codegen_timing_486.o codegen_timing_686.o codegen_timing_pentium.o codegen_timing_winchip.o codegen_x86.o compaq.o config.o cpu.o dac.o \ - device.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o fdc.o fdc37c665.o fdc37c932fr.o fdd.o fdi2raw.o gameport.o headland.o i430hx.o i430lx.o i430fx.o \ + device.o disc.o disc_fdi.o disc_img.o disc_sector_86box.o dma.o fdc.o fdc37c665.o fdc37c932fr.o fdd.o fdi2raw.o gameport.o headland.o i430hx.o i430lx.o i430fx.o \ i430nx.o i430vx.o i440fx.o ide.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \ keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o lpt.o mcr.o mem.o memregs.o model.o mouse.o mouse_ps2.o \ mouse_serial.o ne2000.o neat.o nethandler.o nmi.o nvr.o olivetti_m24.o opti.o pc.o pc87306.o pci.o pic.o piix.o pit.o ppi.o ps1.o rom.o rtc.o \ @@ -30,7 +30,9 @@ LIBS = -mwindows -lwinmm -lopenal.dll -lopenal -lddraw -ldinput8 -ldxguid -ld3d9 PCem.exe: $(OBJ) $(DBOBJ) $(SIDOBJ) $(SLIRPOBJ) $(CC) $(OBJ) $(DBOBJ) $(SIDOBJ) $(SLIRPOBJ) -o "PCem.exe" $(LIBS) - strip "PCem.exe" + + +a.exe: strip "PCem.exe" all : PCem.exe diff --git a/src/Makefile.mingw64 b/src/Makefile.mingw64 index dfdd06db8..4a88abf60 100644 --- a/src/Makefile.mingw64 +++ b/src/Makefile.mingw64 @@ -5,7 +5,7 @@ WINDRES = windres.exe CFLAGS = -O3 -march=native -mtune=native -fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -fomit-frame-pointer -ffast-math -msse -msse2 -msse3 -mssse3 -mfpmath=sse -mstackrealign OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o acerm3a.o ali1429.o amstrad.o cdrom-ioctl.o cdrom-iso.o \ cdrom-null.o codegen.o codegen_ops.o codegen_timing_486.o codegen_timing_686.o codegen_timing_pentium.o codegen_timing_winchip.o codegen_x86-64.o compaq.o config.o cpu.o dac.o \ - device.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o fdc.o fdc37c665.o fdc37c932fr.o fdd.o fdi2raw.o gameport.o headland.o i430hx.o i430lx.o i430fx.o \ + device.o disc.o disc_fdi.o disc_img.o disc_sector_86box.o dma.o fdc.o fdc37c665.o fdc37c932fr.o fdd.o fdi2raw.o gameport.o headland.o i430hx.o i430lx.o i430fx.o \ i430nx.o i430vx.o i440fx.o ide.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \ keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o lpt.o mcr.o mem.o memregs.o model.o mouse.o mouse_ps2.o \ mouse_serial.o ne2000.o neat.o nethandler.o nmi.o nvr.o olivetti_m24.o opti.o pc.o pc87306.o pci.o pic.o piix.o pit.o ppi.o ps1.o rom.o rtc.o \ diff --git a/src/codegen_ops_x86.h b/src/codegen_ops_x86.h index 3e077f24a..02fbf5230 100644 --- a/src/codegen_ops_x86.h +++ b/src/codegen_ops_x86.h @@ -136,7 +136,7 @@ static int LOAD_REG_L(int reg) static int LOAD_VAR_W(uintptr_t addr) { int host_reg = find_host_reg(); - host_reg_mapping[host_reg] = reg; + host_reg_mapping[host_reg] = 0; addbyte(0x66); /*MOVL host_reg,[reg]*/ addbyte(0x8b); @@ -148,7 +148,7 @@ static int LOAD_VAR_W(uintptr_t addr) static int LOAD_VAR_L(uintptr_t addr) { int host_reg = find_host_reg(); - host_reg_mapping[host_reg] = reg; + host_reg_mapping[host_reg] = 0; addbyte(0x8b); /*MOVL host_reg,[reg]*/ addbyte(0x05 | (host_reg << 3)); @@ -160,7 +160,7 @@ static int LOAD_VAR_L(uintptr_t addr) static int LOAD_REG_IMM(uint32_t imm) { int host_reg = find_host_reg(); - host_reg_mapping[host_reg] = reg; + host_reg_mapping[host_reg] = 0; addbyte(0xc7); /*MOVL host_reg, imm*/ addbyte(0xc0 | host_reg); @@ -172,7 +172,7 @@ static int LOAD_REG_IMM(uint32_t imm) static int LOAD_HOST_REG(int host_reg) { int new_host_reg = find_host_reg(); - host_reg_mapping[new_host_reg] = reg; + host_reg_mapping[new_host_reg] = 0; addbyte(0x89); /*MOV new_host_reg, host_reg*/ addbyte(0xc0 | (host_reg << 3) | new_host_reg); diff --git a/src/codegen_x86-64.c b/src/codegen_x86-64.c index d234147ab..468029366 100644 --- a/src/codegen_x86-64.c +++ b/src/codegen_x86-64.c @@ -285,7 +285,7 @@ void codegen_block_init(uint32_t phys_addr) block->was_recompiled = 0; recomp_page = block->phys & ~0xfff; - + codeblock_tree_add(block); } @@ -530,29 +530,6 @@ void codegen_flush() return; } -static int opcode_needs_tempc[256] = -{ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*00*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/ - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*20*/ - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*30*/ - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*40*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*60*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*70*/ - - 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*80*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*90*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*a0*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*b0*/ - - 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*c0*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*d0*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*e0*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*f0*/ -}; - static int opcode_conditional_jump[256] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*00*/ @@ -631,7 +608,7 @@ void codegen_debug() static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc) { - if (!mod && rm == 6) + if (!cpu_mod && cpu_rm == 6) { addbyte(0xC7); /*MOVL $0,(ssegs)*/ addbyte(0x04); @@ -644,7 +621,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, { int base_reg, index_reg; - switch (rm) + switch (cpu_rm) { case 0: case 1: case 7: base_reg = LOAD_REG_W(REG_BX); @@ -659,9 +636,9 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, base_reg = LOAD_REG_W(REG_DI); break; } - if (!(rm & 4)) + if (!(cpu_rm & 4)) { - if (rm & 1) + if (cpu_rm & 1) index_reg = LOAD_REG_W(REG_DI); else index_reg = LOAD_REG_W(REG_SI); @@ -669,10 +646,10 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, base_reg &= 7; index_reg &= 7; - switch (mod) + switch (cpu_mod) { case 0: - if (rm & 4) + if (cpu_rm & 4) { addbyte(0x41); /*MOVZX EAX, base_reg*/ addbyte(0x0f); @@ -698,7 +675,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, } break; case 1: - if (rm & 4) + if (cpu_rm & 4) { addbyte(0x67); /*LEA EAX, base_reg+imm8*/ addbyte(0x41); @@ -718,7 +695,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, (*op_pc)++; break; case 2: - if (rm & 4) + if (cpu_rm & 4) { addbyte(0x67); /*LEA EAX, base_reg+imm8*/ addbyte(0x41); @@ -739,7 +716,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, break; } - if (mod || !(rm & 4)) + if (cpu_mod || !(cpu_rm & 4)) { addbyte(0x25); /*ANDL $0xffff, %eax*/ addlong(0xffff); @@ -749,7 +726,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, addbyte(0x25); addlong((uint32_t)&eaaddr); - if (mod1seg[rm] == &ss && !op_ssegs) + if (mod1seg[cpu_rm] == &ss && !op_ssegs) op_ea_seg = &_ss; } return op_ea_seg; @@ -759,14 +736,14 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, { uint32_t new_eaaddr; - if (rm == 4) + if (cpu_rm == 4) { uint8_t sib = fetchdat >> 8; int base_reg = -1, index_reg = -1; (*op_pc)++; - if (mod || (sib & 7) != 5) + if (cpu_mod || (sib & 7) != 5) base_reg = LOAD_REG_L(sib & 7) & 7; if (((sib >> 3) & 7) != 4) @@ -774,7 +751,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, if (index_reg == -1) { - switch (mod) + switch (cpu_mod) { case 0: if ((sib & 7) == 5) @@ -828,7 +805,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, } else { - switch (mod) + switch (cpu_mod) { case 0: if ((sib & 7) == 5) @@ -892,12 +869,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, break; } } - if (stack_offset && (sib & 7) == 4 && (mod || (sib & 7) != 5)) /*ESP*/ + if (stack_offset && (sib & 7) == 4 && (cpu_mod || (sib & 7) != 5)) /*ESP*/ { addbyte(0x05); addlong(stack_offset); } - if (((sib & 7) == 4 || (mod && (sib & 7) == 5)) && !op_ssegs) + if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs) op_ea_seg = &_ss; addbyte(0x89); /*MOV eaaddr, EAX*/ @@ -909,7 +886,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, { int base_reg; - if (!mod && rm == 5) + if (!cpu_mod && cpu_rm == 5) { new_eaaddr = fastreadl(cs + (*op_pc) + 1); addbyte(0xC7); /*MOVL $new_eaaddr,(eaaddr)*/ @@ -920,12 +897,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, (*op_pc) += 4; return op_ea_seg; } - base_reg = LOAD_REG_L(rm) & 7; - if (mod) + base_reg = LOAD_REG_L(cpu_rm) & 7; + if (cpu_mod) { - if (rm == 5 && !op_ssegs) + if (cpu_rm == 5 && !op_ssegs) op_ea_seg = &_ss; - if (mod == 1) + if (cpu_mod == 1) { addbyte(0x67); /*LEA EAX, base_reg+imm8*/ addbyte(0x41); @@ -1171,20 +1148,6 @@ generate_call: op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask]; // if (output) // pclog("Generate call at %08X %02X %08X %02X %08X %08X %08X %08X %08X %02X %02X %02X %02X\n", &codeblock[block_current][block_pos], opcode, new_pc, ram[old_pc], EAX, EBX, ECX, EDX, ESI, ram[0x7bd2+6],ram[0x7bd2+7],ram[0x7bd2+8],ram[0x7bd2+9]); - if (opcode_needs_tempc[opcode]) - { - addbyte(0x8b); /*MOVL (flags), %eax*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&flags); - addbyte(0x83); /*ANDL $1, %eax*/ - addbyte(0xe0); - addbyte(0x01); - addbyte(0x89); /*MOVL %eax, (tempc)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&tempc); - } if (op_ssegs != last_ssegs) { last_ssegs = op_ssegs; @@ -1204,30 +1167,19 @@ generate_call: if (op_table == x86_dynarec_opcodes && opcode == 0x8f) /*POP*/ stack_offset = (op_32 & 0x100) ? 4 : 2; - mod = (fetchdat >> 6) & 3; - reg = (fetchdat >> 3) & 7; - rm = fetchdat & 7; + cpu_mod = (fetchdat >> 6) & 3; + cpu_reg = (fetchdat >> 3) & 7; + cpu_rm = fetchdat & 7; - addbyte(0xC7); /*MOVL $mod,(mod)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&mod); - addlong(mod); - addbyte(0xC7); /*MOVL $reg,(reg)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)®); - addlong(reg); - addbyte(0xC7); /*MOVL $rm,(rm)*/ - addbyte(0x04); - addbyte(0x25); - addlong((uint32_t)&rm); - addlong(rm); + addbyte(0xC7); /*MOVL $rm | mod | reg,(rm_mod_reg_data)*/ + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.rm_data.rm_mod_reg_data - (uintptr_t)&cpu_state); + addlong(cpu_rm | (cpu_mod << 8) | (cpu_reg << 16)); op_pc += pc_off; - if (mod != 3 && !(op_32 & 0x200)) + if (cpu_mod != 3 && !(op_32 & 0x200)) op_ea_seg = codegen_generate_ea_16_long(op_ea_seg, fetchdat, op_ssegs, &op_pc); - if (mod != 3 && (op_32 & 0x200)) + if (cpu_mod != 3 && (op_32 & 0x200)) op_ea_seg = codegen_generate_ea_32_long(op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset); op_pc -= pc_off; } diff --git a/src/codegen_x86.c b/src/codegen_x86.c index cbedb7073..cd60b25da 100644 --- a/src/codegen_x86.c +++ b/src/codegen_x86.c @@ -491,29 +491,6 @@ void codegen_flush() return; } -static int opcode_needs_tempc[256] = -{ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*00*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/ - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*20*/ - 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*30*/ - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*40*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*60*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*70*/ - - 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*80*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*90*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*a0*/ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*b0*/ - - 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*c0*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*d0*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*e0*/ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*f0*/ -}; - static int opcode_conditional_jump[256] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*00*/ @@ -592,7 +569,7 @@ void codegen_debug() static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc) { - if (!mod && rm == 6) + if (!cpu_mod && cpu_rm == 6) { addbyte(0xC7); /*MOVL $0,(ssegs)*/ addbyte(0x05); @@ -602,35 +579,35 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, } else { - switch (mod) + switch (cpu_mod) { case 0: - addbyte(0xa1); /*MOVL *mod1add[0][rm], %eax*/ - addlong((uint32_t)mod1add[0][rm]); - addbyte(0x03); /*ADDL *mod1add[1][rm], %eax*/ + addbyte(0xa1); /*MOVL *mod1add[0][cpu_rm], %eax*/ + addlong((uint32_t)mod1add[0][cpu_rm]); + addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/ addbyte(0x05); - addlong((uint32_t)mod1add[1][rm]); + addlong((uint32_t)mod1add[1][cpu_rm]); break; case 1: addbyte(0xb8); /*MOVL ,%eax*/ addlong((uint32_t)(int8_t)(rmdat >> 8));// pc++; - addbyte(0x03); /*ADDL *mod1add[0][rm], %eax*/ + addbyte(0x03); /*ADDL *mod1add[0][cpu_rm], %eax*/ addbyte(0x05); - addlong((uint32_t)mod1add[0][rm]); - addbyte(0x03); /*ADDL *mod1add[1][rm], %eax*/ + addlong((uint32_t)mod1add[0][cpu_rm]); + addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/ addbyte(0x05); - addlong((uint32_t)mod1add[1][rm]); + addlong((uint32_t)mod1add[1][cpu_rm]); (*op_pc)++; break; case 2: addbyte(0xb8); /*MOVL ,%eax*/ addlong((fetchdat >> 8) & 0xffff);// pc++; - addbyte(0x03); /*ADDL *mod1add[0][rm], %eax*/ + addbyte(0x03); /*ADDL *mod1add[0][cpu_rm], %eax*/ addbyte(0x05); - addlong((uint32_t)mod1add[0][rm]); - addbyte(0x03); /*ADDL *mod1add[1][rm], %eax*/ + addlong((uint32_t)mod1add[0][cpu_rm]); + addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/ addbyte(0x05); - addlong((uint32_t)mod1add[1][rm]); + addlong((uint32_t)mod1add[1][cpu_rm]); (*op_pc) += 2; break; } @@ -639,7 +616,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, addbyte(0xa3); addlong((uint32_t)&eaaddr); - if (mod1seg[rm] == &ss && !op_ssegs) + if (mod1seg[cpu_rm] == &ss && !op_ssegs) op_ea_seg = &_ss; } return op_ea_seg; @@ -649,12 +626,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, { uint32_t new_eaaddr; - if (rm == 4) + if (cpu_rm == 4) { uint8_t sib = fetchdat >> 8; (*op_pc)++; - switch (mod) + switch (cpu_mod) { case 0: if ((sib & 7) == 5) @@ -690,12 +667,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, (*op_pc) += 4; break; } - if (stack_offset && (sib & 7) == 4 && (mod || (sib & 7) != 5)) /*ESP*/ + if (stack_offset && (sib & 7) == 4 && (cpu_mod || (sib & 7) != 5)) /*ESP*/ { addbyte(0x05); addlong(stack_offset); } - if (((sib & 7) == 4 || (mod && (sib & 7) == 5)) && !op_ssegs) + if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs) op_ea_seg = &_ss; if (((sib >> 3) & 7) != 4) { @@ -728,7 +705,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, } else { - if (!mod && rm == 5) + if (!cpu_mod && cpu_rm == 5) { new_eaaddr = fastreadl(cs + (*op_pc) + 1); addbyte(0xC7); /*MOVL $new_eaaddr,(eaaddr)*/ @@ -740,15 +717,15 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, } addbyte(0x8b); /*MOVL regs[sib&7].l, %eax*/ addbyte(0x45); - addbyte((uintptr_t)&cpu_state.regs[rm].l - (uintptr_t)&cpu_state); -// addbyte(0xa1); /*MOVL regs[rm].l, %eax*/ -// addlong((uint32_t)&cpu_state.regs[rm].l); - eaaddr = cpu_state.regs[rm].l; - if (mod) + addbyte((uintptr_t)&cpu_state.regs[cpu_rm].l - (uintptr_t)&cpu_state); +// addbyte(0xa1); /*MOVL regs[cpu_rm].l, %eax*/ +// addlong((uint32_t)&cpu_state.regs[cpu_rm].l); + eaaddr = cpu_state.regs[cpu_rm].l; + if (cpu_mod) { - if (rm == 5 && !op_ssegs) + if (cpu_rm == 5 && !op_ssegs) op_ea_seg = &_ss; - if (mod == 1) + if (cpu_mod == 1) { addbyte(0x05); addlong((uint32_t)(int8_t)(fetchdat >> 8)); @@ -978,16 +955,6 @@ generate_call: op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask]; // if (output) // pclog("Generate call at %08X %02X %08X %02X %08X %08X %08X %08X %08X %02X %02X %02X %02X\n", &codeblock[block_current][block_pos], opcode, new_pc, ram[old_pc], EAX, EBX, ECX, EDX, ESI, ram[0x7bd2+6],ram[0x7bd2+7],ram[0x7bd2+8],ram[0x7bd2+9]); - if (opcode_needs_tempc[opcode]) - { - addbyte(0xa1); /*MOVL (flags), %eax*/ - addlong((uint32_t)&flags); - addbyte(0x83); /*ANDL $1, %eax*/ - addbyte(0xe0); - addbyte(0x01); - addbyte(0xa3); /*MOVL %eax, (tempc)*/ - addlong((uint32_t)&tempc); - } if (op_ssegs != last_ssegs) { last_ssegs = op_ssegs; @@ -1006,27 +973,19 @@ generate_call: if (op_table == x86_dynarec_opcodes && opcode == 0x8f) /*POP*/ stack_offset = (op_32 & 0x100) ? 4 : 2; - mod = (fetchdat >> 6) & 3; - reg = (fetchdat >> 3) & 7; - rm = fetchdat & 7; + cpu_mod = (fetchdat >> 6) & 3; + cpu_reg = (fetchdat >> 3) & 7; + cpu_rm = fetchdat & 7; - addbyte(0xC7); /*MOVL $mod,(mod)*/ - addbyte(0x05); - addlong((uint32_t)&mod); - addlong(mod); - addbyte(0xC7); /*MOVL $reg,(reg)*/ - addbyte(0x05); - addlong((uint32_t)®); - addlong(reg); - addbyte(0xC7); /*MOVL $rm,(rm)*/ - addbyte(0x05); - addlong((uint32_t)&rm); - addlong(rm); + addbyte(0xC7); /*MOVL $rm | mod | reg,(rm_mod_reg_data)*/ + addbyte(0x45); + addbyte((uintptr_t)&cpu_state.rm_data.rm_mod_reg_data - (uintptr_t)&cpu_state); + addlong(cpu_rm | (cpu_mod << 8) | (cpu_reg << 16)); op_pc += pc_off; - if (mod != 3 && !(op_32 & 0x200)) + if (cpu_mod != 3 && !(op_32 & 0x200)) op_ea_seg = codegen_generate_ea_16_long(op_ea_seg, fetchdat, op_ssegs, &op_pc); - if (mod != 3 && (op_32 & 0x200)) + if (cpu_mod != 3 && (op_32 & 0x200)) op_ea_seg = codegen_generate_ea_32_long(op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset); op_pc -= pc_off; } diff --git a/src/cpu.c b/src/cpu.c index b6d78f5e1..c7dd2ca80 100644 --- a/src/cpu.c +++ b/src/cpu.c @@ -229,9 +229,9 @@ CPU cpus_i386[] = {"i386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0}, {"i386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0}, {"i386DX/40", CPU_386DX, 4, 40000000, 1, 0, 0x0308, 0, 0, 0}, - {"RapidCAD/25", CPU_RAPIDCAD, 2, 25000000, 1, 0, 0x404, 0, 0, 0}, - {"RapidCAD/33", CPU_RAPIDCAD, 3, 33333333, 1, 0, 0x404, 0, 0, 0}, - {"RapidCAD/40", CPU_RAPIDCAD, 4, 40000000, 1, 0, 0x404, 0, 0, 0}, + {"RapidCAD/25", CPU_RAPIDCAD, 2, 25000000, 1, 0, 0x430, 0, 0, 0}, + {"RapidCAD/33", CPU_RAPIDCAD, 3, 33333333, 1, 0, 0x430, 0, 0, 0}, + {"RapidCAD/40", CPU_RAPIDCAD, 4, 40000000, 1, 0, 0x430, 0, 0, 0}, {"", -1, 0, 0, 0} }; @@ -508,11 +508,18 @@ CPU cpus_K56[] = CPU cpus_PentiumPro[] = { /*Intel Pentium Pro and II Overdrive*/ + {"Pentium Pro 50", CPU_PENTIUMPRO, 5, 50000000, 1, 25000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, + {"Pentium Pro 60" , CPU_PENTIUMPRO, 6, 60000000, 1, 30000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, + {"Pentium Pro 66" , CPU_PENTIUMPRO, 6, 66666666, 1, 33333333, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium Pro 75", CPU_PENTIUMPRO, 9, 75000000, 2, 25000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium Pro 150", CPU_PENTIUMPRO, 17, 150000000, 3, 30000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium Pro 166", CPU_PENTIUMPRO, 19, 166666666, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium Pro 180", CPU_PENTIUMPRO, 20, 180000000, 3, 30000000, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium Pro 200", CPU_PENTIUMPRO, 21, 200000000, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, + {"Pentium II Overdrive 50", CPU_PENTIUM2D, 5, 50000000, 1, 25000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, + {"Pentium II Overdrive 60", CPU_PENTIUM2D, 6, 60000000, 1, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, + {"Pentium II Overdrive 66", CPU_PENTIUM2D, 6, 66666666, 1, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, + {"Pentium II Overdrive 75", CPU_PENTIUM2D, 9, 75000000, 2, 25000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium II Overdrive 210", CPU_PENTIUM2D, 22, 210000000, 4, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium II Overdrive 233", CPU_PENTIUM2D, 24, 233333333, 4, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, {"Pentium II Overdrive 240", CPU_PENTIUM2D, 25, 240000000, 4, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC}, @@ -576,7 +583,7 @@ void cpu_set() is386 = (cpu_s->cpu_type >= CPU_386SX); israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD); is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD); - hasfpu = (cpu_s->cpu_type >= CPU_i486DX); + hasfpu = (cpu_s->cpu_type >= CPU_i486DX) || (cpu_s->cpu_type == CPU_RAPIDCAD); cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86 || cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86MX || cpu_s->cpu_type == CPU_Cx6x86L || cpu_s->cpu_type == CPU_CxGX1); cpu_16bitbus = (cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC); if (cpu_s->multi) diff --git a/src/disc_img.c b/src/disc_img.c index 254a803f1..5d09fceba 100644 --- a/src/disc_img.c +++ b/src/disc_img.c @@ -726,7 +726,12 @@ void img_seek(int drive, int track) &img[drive].track_data[side][sector * img[drive].sector_size]); } } + for (side = img[drive].sides - 1; side >= 0; side--) + { + disc_sector_prepare_track_layout(drive, side); + } } + void img_writeback(int drive, int track) { if (!img[drive].f) diff --git a/src/disc_sector.c b/src/disc_sector.c index 0ea1a0814..e94cc97ce 100644 --- a/src/disc_sector.c +++ b/src/disc_sector.c @@ -91,28 +91,27 @@ static int get_bitcell_period(int drive) void disc_sector_readsector(int drive, int sector, int track, int side, int rate, int sector_size) { -// pclog("disc_sector_readsector: fdc_period=%i img_period=%i rate=%i sector=%i track=%i side=%i\n", fdc_get_bitcell_period(), get_bitcell_period(), rate, sector, track, side); + pclog("disc_sector_readsector: fdc_period=%i img_period=%i rate=%i sector=%i track=%i side=%i\n", fdc_get_bitcell_period(), get_bitcell_period(drive), rate, sector, track, side); + disc_sector_track[drive] = track; + disc_sector_side[drive] = side; + disc_sector_drive = drive; + disc_sector_sector[drive] = sector; + disc_sector_n[drive] = sector_size; + if ((cur_sector[drive] == 0) && (cur_byte[drive] == 0) && !disc_track_delay[drive]) disc_track_delay[drive] = pre_track; + index_count[drive] = 0; if (sector == SECTOR_FIRST) disc_sector_state[drive] = STATE_READ_FIND_FIRST_SECTOR; else if (sector == SECTOR_NEXT) disc_sector_state[drive] = STATE_READ_FIND_NEXT_SECTOR; else disc_sector_state[drive] = STATE_READ_FIND_SECTOR; - disc_sector_track[drive] = track; - disc_sector_side[drive] = side; - disc_sector_drive = drive; - disc_sector_sector[drive] = sector; - disc_sector_n[drive] = sector_size; - if ((cur_sector[drive] == 0) && (cur_byte[drive] == 0) && !disc_track_delay[drive]) disc_track_delay[drive] = pre_track; - index_count[drive] = 0; } void disc_sector_writesector(int drive, int sector, int track, int side, int rate, int sector_size) { // pclog("disc_sector_writesector: fdc_period=%i img_period=%i rate=%i\n", fdc_get_bitcell_period(), get_bitcell_period(), rate); - disc_sector_state[drive] = STATE_WRITE_FIND_SECTOR; disc_sector_track[drive] = track; disc_sector_side[drive] = side; disc_sector_drive = drive; @@ -120,13 +119,13 @@ void disc_sector_writesector(int drive, int sector, int track, int side, int rat disc_sector_n[drive] = sector_size; if ((cur_sector[drive] == 0) && (cur_byte[drive] == 0) && !disc_track_delay[drive]) disc_track_delay[drive] = pre_track; index_count[drive] = 0; + disc_sector_state[drive] = STATE_WRITE_FIND_SECTOR; } void disc_sector_readaddress(int drive, int track, int side, int rate) { // pclog("disc_sector_readaddress: fdc_period=%i img_period=%i rate=%i track=%i side=%i\n", fdc_get_bitcell_period(), get_bitcell_period(), rate, track, side); - disc_sector_state[drive] = STATE_READ_FIND_ADDRESS; disc_sector_track[drive] = track; disc_sector_side[drive] = side; disc_sector_drive = drive; @@ -137,16 +136,17 @@ void disc_sector_readaddress(int drive, int track, int side, int rate) } else index_count[drive] = 0; + disc_sector_state[drive] = STATE_READ_FIND_ADDRESS; } void disc_sector_format(int drive, int track, int side, int rate, uint8_t fill) { - disc_sector_state[drive] = STATE_FORMAT_FIND; disc_sector_track[drive] = track; disc_sector_side[drive] = side; disc_sector_drive = drive; disc_sector_fill[drive] = fill; index_count[drive] = 0; + disc_sector_state[drive] = STATE_FORMAT_FIND; } void disc_sector_stop(int drive) @@ -154,267 +154,15 @@ void disc_sector_stop(int drive) disc_sector_state[drive] = STATE_IDLE; } -#if 0 -static void advance_byte() -{ - if (disc_intersector_delay) - { - disc_intersector_delay--; - return; - } - cur_byte++; - if (cur_byte >= (128 << disc_sector_data[disc_sector_drive][disc_sector_side][cur_sector].n)) - { - cur_byte = 0; - cur_sector++; - if (cur_sector >= disc_sector_count[disc_sector_drive][disc_sector_side]) - { - cur_sector = 0; - fdc_indexpulse(); - index_count++; - } - disc_intersector_delay = 40; - } -} - -void disc_sector_poll() -{ - sector_t *s; - int data; - - if (cur_sector >= disc_sector_count[disc_sector_drive][disc_sector_side]) - cur_sector = 0; - if (cur_byte >= (128 << disc_sector_data[disc_sector_drive][disc_sector_side][cur_sector].n)) - cur_byte = 0; - - s = &disc_sector_data[disc_sector_drive][disc_sector_side][cur_sector]; - switch (disc_sector_state) - { - case STATE_IDLE: - break; - - case STATE_READ_FIND_SECTOR: -/* pclog("STATE_READ_FIND_SECTOR: cur_sector=%i cur_byte=%i sector=%i,%i side=%i,%i track=%i,%i period=%i,%i\n", - cur_sector, cur_byte, - disc_sector_sector, s->r, - disc_sector_side, s->h, - disc_sector_track, s->c, - fdc_get_bitcell_period(), get_bitcell_period());*/ - if (index_count > 1) - { -// pclog("Find sector not found\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } -/* pclog("%i %i %i %i %i\n", cur_byte, disc_sector_track != s->c, - disc_sector_side != s->h, - disc_sector_sector != s->r, - fdc_get_bitcell_period() != get_bitcell_period());*/ - if (cur_byte || disc_sector_track != s->c || - disc_sector_side != s->h || - disc_sector_sector != s->r || - disc_sector_n != s->n || - fdc_get_bitcell_period() != get_bitcell_period() || - !fdd_can_read_medium(disc_sector_drive ^ fdd_swap) || - disc_intersector_delay) - { - advance_byte(); - break; - } - disc_sector_state = STATE_READ_SECTOR; - case STATE_READ_SECTOR: -// pclog("STATE_READ_SECTOR: cur_byte=%i %i\n", cur_byte, disc_intersector_delay); - if (fdc_data(s->data[cur_byte])) - { -// pclog("fdc_data failed\n"); - return; - } - advance_byte(); - if (!cur_byte) - { - disc_sector_state = STATE_IDLE; - fdc_finishread(); - } - break; - - case STATE_READ_FIND_FIRST_SECTOR: - if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap))) - { -// pclog("Medium is of a density not supported by the drive\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (cur_byte || !index_count || fdc_get_bitcell_period() != get_bitcell_period() || - disc_intersector_delay) - { - advance_byte(); - break; - } - disc_sector_state = STATE_READ_FIRST_SECTOR; - case STATE_READ_FIRST_SECTOR: - if (fdc_data(s->data[cur_byte])) - return; - advance_byte(); - if (!cur_byte) - { - disc_sector_state = STATE_IDLE; - fdc_finishread(); - } - break; - - case STATE_READ_FIND_NEXT_SECTOR: - if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap))) - { -// pclog("Medium is of a density not supported by the drive\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (index_count) - { -// pclog("Find next sector hit end of track\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (cur_byte || fdc_get_bitcell_period() != get_bitcell_period() || - disc_intersector_delay) - { - advance_byte(); - break; - } - disc_sector_state = STATE_READ_NEXT_SECTOR; - case STATE_READ_NEXT_SECTOR: - if (fdc_data(s->data[cur_byte])) - break; - advance_byte(); - if (!cur_byte) - { - disc_sector_state = STATE_IDLE; - fdc_finishread(); - } - break; - - case STATE_WRITE_FIND_SECTOR: - if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap))) - { -// pclog("Medium is of a density not supported by the drive\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (writeprot[disc_sector_drive]) - { - fdc_writeprotect(); - return; - } - if (index_count > 1) - { -// pclog("Write find sector not found\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (cur_byte || disc_sector_track != s->c || - disc_sector_side != s->h || - disc_sector_sector != s->r || - disc_sector_n != s->n || - fdc_get_bitcell_period() != get_bitcell_period() || - disc_intersector_delay) - { - advance_byte(); - break; - } - disc_sector_state = STATE_WRITE_SECTOR; - case STATE_WRITE_SECTOR: - data = fdc_getdata(cur_byte == ((128 << s->n) - 1)); - if (data == -1) - break; - s->data[cur_byte] = data; - advance_byte(); - if (!cur_byte) - { - disc_sector_state = STATE_IDLE; - disc_sector_writeback[disc_sector_drive](disc_sector_drive, disc_sector_track); - fdc_finishread(); - } - break; - - case STATE_READ_FIND_ADDRESS: - if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap))) - { -// pclog("Medium is of a density not supported by the drive\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (index_count) - { -// pclog("Find next sector hit end of track\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (cur_byte || fdc_get_bitcell_period() != get_bitcell_period() || - disc_intersector_delay) - { - advance_byte(); - break; - } - disc_sector_state = STATE_READ_ADDRESS; - case STATE_READ_ADDRESS: - fdc_sectorid(s->c, s->h, s->r, s->n, 0, 0); - disc_sector_state = STATE_IDLE; - break; - - case STATE_FORMAT_FIND: - if (writeprot[disc_sector_drive]) - { - fdc_writeprotect(); - return; - } - if (!index_count || fdc_get_bitcell_period() != get_bitcell_period() || - disc_intersector_delay) - { - advance_byte(); - break; - } - if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap))) - { -// pclog("Medium is of a density not supported by the drive\n"); - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - if (fdc_get_bitcell_period() != get_bitcell_period()) - { - fdc_notfound(); - disc_sector_state = STATE_IDLE; - break; - } - disc_sector_state = STATE_FORMAT; - case STATE_FORMAT: - if (!disc_intersector_delay && fdc_get_bitcell_period() == get_bitcell_period()) - s->data[cur_byte] = disc_sector_fill; - advance_byte(); - if (index_count == 2) - { - disc_sector_writeback[disc_sector_drive](disc_sector_drive, disc_sector_track); - fdc_finishread(); - disc_sector_state = STATE_IDLE; - } - break; - } -} -#endif - static void index_pulse(int drive) { if (disc_sector_state[drive] != STATE_IDLE) fdc_indexpulse(); } +void disc_sector_prepare_track_layout(int drive, int side) +{ +} + static void advance_byte() { int drive = disc_sector_drive; @@ -434,7 +182,7 @@ static void advance_byte() if (disc_track_delay[drive] == pre_track) { index_pulse(drive); - index_count[drive]++; + if (disc_sector_state[drive] != STATE_IDLE) index_count[drive]++; } disc_track_delay[drive]--; return; @@ -467,6 +215,11 @@ static void advance_byte() return; } +int disc_gap_has_ended(int drive) +{ + return (disc_postdata_delay[drive] == (post_gap + (gap3_size[drive]) - fdc_get_gap() - length_crc)); +} + void disc_sector_poll() { sector_t *s; @@ -475,8 +228,16 @@ void disc_sector_poll() if (cur_sector[drive] >= disc_sector_count[drive][disc_sector_side[drive]]) cur_sector[drive] = 0; - if (cur_byte[drive] >= (128 << disc_sector_data[drive][disc_sector_side[drive]][cur_sector[drive]].n)) - cur_byte[drive] = 0; + if (disc_sector_n[drive]) + { + if (cur_byte[drive] >= (128 << disc_sector_data[drive][disc_sector_side[drive]][cur_sector[drive]].n)) + cur_byte[drive] = 0; + } + else + { + if (cur_byte[drive] >= fdc_get_dtl()) + cur_byte[drive] = 0; + } /* Note: Side to read from should be chosen from FDC head select rather than from the sector ID. */ s = &disc_sector_data[drive][disc_sector_side[drive]][cur_sector[drive]]; @@ -490,15 +251,15 @@ void disc_sector_poll() case STATE_READ_FIND_SECTOR: if (index_count[drive] > 1) { - pclog("READ: Sector (%i %i %i %i) not found (last: %i %i %i) (period=%i,%i)\n", s->c, s->h, s->r, s->n, disc_sector_track, disc_sector_side, disc_sector_sector, fdc_get_bitcell_period(), get_bitcell_period(drive)); + pclog("READ: Sector (%i %i %i %i) not found (last: %i %i %i %i) (period=%i,%i) (ic=%i)\n", s->c, s->h, s->r, s->n, disc_sector_track[drive], disc_sector_side[drive], disc_sector_sector[drive], disc_sector_n[drive], fdc_get_bitcell_period(), get_bitcell_period(drive), index_count[drive]); fdc_notfound(); disc_sector_state[drive] = STATE_IDLE; break; } - if (cur_byte[drive] || disc_sector_track[drive] != s->c || + if (/*cur_byte[drive] || */ disc_sector_track[drive] != s->c || disc_sector_side[drive] != s->h || disc_sector_sector[drive] != s->r || - disc_sector_n[drive] != s->n || + ((disc_sector_n[drive] != s->n) && (disc_sector_n[drive])) || (fdc_get_bitcell_period() != get_bitcell_period(drive)) || !fdd_can_read_medium(drive ^ fdd_swap) || disc_intersector_delay[drive] || disc_postdata_delay[drive] || disc_track_delay[drive] || disc_gap4_delay[drive]) @@ -509,12 +270,15 @@ void disc_sector_poll() disc_sector_state[drive] = STATE_READ_SECTOR; case STATE_READ_SECTOR: - if (fdc_data(s->data[cur_byte[drive]])) - { - return; - } + if (!disc_postdata_delay[drive]) + { + if (fdc_data(s->data[cur_byte[drive]])) + { + return; + } + } advance_byte(); - if (!cur_byte[drive]) + if (!cur_byte[drive] && disc_gap_has_ended(drive)) { disc_sector_state[drive] = STATE_IDLE; fdc_finishread(drive); @@ -537,10 +301,13 @@ void disc_sector_poll() disc_sector_state[drive] = STATE_READ_FIRST_SECTOR; case STATE_READ_FIRST_SECTOR: - if (fdc_data(s->data[cur_byte[drive]])) - return; + if (!disc_postdata_delay[drive]) + { + if (fdc_data(s->data[cur_byte[drive]])) + return; + } advance_byte(); - if (!cur_byte[drive]) + if (!cur_byte[drive] && disc_gap_has_ended(drive)) { disc_sector_state[drive] = STATE_IDLE; fdc_finishread(drive); @@ -569,10 +336,13 @@ void disc_sector_poll() disc_sector_state[drive] = STATE_READ_NEXT_SECTOR; case STATE_READ_NEXT_SECTOR: - if (fdc_data(s->data[cur_byte[drive]])) - break; + if (!disc_postdata_delay[drive]) + { + if (fdc_data(s->data[cur_byte[drive]])) + break; + } advance_byte(); - if (!cur_byte[drive]) + if (!cur_byte[drive] && disc_gap_has_ended(drive)) { disc_sector_state[drive] = STATE_IDLE; fdc_finishread(drive); @@ -599,7 +369,7 @@ void disc_sector_poll() if (cur_byte[drive] || disc_sector_track[drive] != s->c || disc_sector_side[drive] != s->h || disc_sector_sector[drive] != s->r || - disc_sector_n[drive] != s->n || + ((disc_sector_n[drive] != s->n) && (disc_sector_n[drive])) || (fdc_get_bitcell_period() != get_bitcell_period(drive)) || disc_intersector_delay[drive] || disc_postdata_delay[drive] || disc_track_delay[drive] || disc_gap4_delay[drive]) { @@ -609,12 +379,15 @@ void disc_sector_poll() disc_sector_state[drive] = STATE_WRITE_SECTOR; case STATE_WRITE_SECTOR: - data = fdc_getdata(cur_byte[drive] == ((128 << s->n) - 1)); - if (data == -1) - break; - if (!disable_write) s->data[cur_byte[drive]] = data; + if (!disc_postdata_delay[drive]) + { + data = fdc_getdata(cur_byte[drive] == ((128 << s->n) - 1)); + if (data == -1) + break; + if (!disable_write) s->data[cur_byte[drive]] = data; + } advance_byte(); - if (!cur_byte[drive]) + if (!cur_byte[drive] && disc_gap_has_ended(drive)) { disc_sector_state[drive] = STATE_IDLE; if (!disable_write) disc_sector_writeback[drive](drive, disc_sector_track[drive]); diff --git a/src/disc_sector.h b/src/disc_sector.h index 4e116dee7..72a485525 100644 --- a/src/disc_sector.h +++ b/src/disc_sector.h @@ -9,6 +9,7 @@ void disc_sector_poll(); void disc_sector_stop(); extern void (*disc_sector_writeback[2])(int drive, int track); +void disc_sector_prepare_track_layout(int drive, int side); #define length_gap0 80 #define length_gap1 50 diff --git a/src/disc_sector_86box.c b/src/disc_sector_86box.c new file mode 100644 index 000000000..f1c21b8af --- /dev/null +++ b/src/disc_sector_86box.c @@ -0,0 +1,592 @@ +#include "ibm.h" +#include "disc.h" +#include "disc_sector.h" +#include "fdd.h" + +/*Handling for 'sector based' image formats (like .IMG) as opposed to 'stream based' formats (eg .FDI)*/ + +#define MAX_SECTORS 256 + +typedef struct +{ + uint8_t c, h, r, n; + int rate; + uint8_t *data; +} sector_t; + +static sector_t disc_sector_data[2][2][MAX_SECTORS]; +static int disc_sector_count[2][2]; +void (*disc_sector_writeback[2])(int drive, int track); + +int cur_track_pos[2] = {0, 0}; +int id_counter[2] = {0, 0}; +int data_counter[2] = {0, 0}; +int gap3_counter[2] = {0, 0}; +int cur_rate[2] = {0, 0}; + +sector_t *last_sector[2]; + +enum +{ + STATE_IDLE, + STATE_READ_FIND_SECTOR, + STATE_READ_SECTOR, + STATE_READ_FIND_FIRST_SECTOR, + STATE_READ_FIRST_SECTOR, + STATE_READ_FIND_NEXT_SECTOR, + STATE_READ_NEXT_SECTOR, + STATE_WRITE_FIND_SECTOR, + STATE_WRITE_SECTOR, + STATE_READ_FIND_ADDRESS, + STATE_READ_ADDRESS, + STATE_FORMAT_FIND, + STATE_FORMAT, + STATE_SEEK +}; + +static int disc_sector_state[2] = {0, 0}; +static int disc_sector_track[2] = {0, 0}; +static int disc_sector_side[2] = {0, 0}; +static int disc_sector_drive; +static int disc_sector_sector[2] = {0, 0}; +static int disc_sector_n[2] = {0, 0}; +static int disc_intersector_delay[2] = {0, 0}; +static int disc_postdata_delay[2] = {0, 0}; +static int disc_track_delay[2] = {0, 0}; +static int disc_gap4_delay[2] = {0, 0}; +static uint8_t disc_sector_fill[2] = {0, 0}; +static int cur_sector[2], cur_byte[2]; +static int index_count[2]; + +int raw_tsize[2] = {6250, 6250}; +int gap2_size[2] = {22, 22}; +int gap3_size[2] = {0, 0}; +int gap4_size[2] = {0, 0}; + +int disc_sector_reset_state(int drive); + +void disc_sector_reset(int drive, int side) +{ + disc_sector_count[drive][side] = 0; + + if (side == 0) + { + disc_sector_reset_state(drive); + // cur_track_pos[drive] = 0; + disc_sector_state[drive] = STATE_SEEK; + } +} + +void disc_sector_add(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n, int rate, uint8_t *data) +{ + sector_t *s = &disc_sector_data[drive][side][disc_sector_count[drive][side]]; +//pclog("disc_sector_add: drive=%i side=%i %i r=%i\n", drive, side, disc_sector_count[drive][side],r ); + if (disc_sector_count[drive][side] >= MAX_SECTORS) + return; + + s->c = c; + s->h = h; + s->r = r; + s->n = n; + // pclog("Adding sector: %i %i %i %i\n", c, h, r, n); + s->rate = rate; + s->data = data; + + disc_sector_count[drive][side]++; +} + +static int get_bitcell_period(int drive) +{ + // return (disc_sector_data[drive][disc_sector_side[drive]][cur_sector[drive]].rate * 300) / fdd_getrpm(drive); + return ((&disc_sector_data[drive][0][0])->rate * 300) / fdd_getrpm(drive); + return (cur_rate[drive] * 300) / fdd_getrpm(drive); +} + +void disc_sector_readsector(int drive, int sector, int track, int side, int rate, int sector_size) +{ + // pclog("disc_sector_readsector: fdc_period=%i img_period=%i rate=%i sector=%i track=%i side=%i\n", fdc_get_bitcell_period(), get_bitcell_period(drive), rate, sector, track, side); + + disc_sector_track[drive] = track; + disc_sector_side[drive] = side; + disc_sector_drive = drive; + disc_sector_sector[drive] = sector; + disc_sector_n[drive] = sector_size; + disc_sector_reset_state(drive); + if (sector == SECTOR_FIRST) + disc_sector_state[drive] = STATE_READ_FIND_FIRST_SECTOR; + else if (sector == SECTOR_NEXT) + disc_sector_state[drive] = STATE_READ_FIND_NEXT_SECTOR; + else + disc_sector_state[drive] = STATE_READ_FIND_SECTOR; +} + +void disc_sector_writesector(int drive, int sector, int track, int side, int rate, int sector_size) +{ +// pclog("disc_sector_writesector: fdc_period=%i img_period=%i rate=%i\n", fdc_get_bitcell_period(), get_bitcell_period(), rate); + + disc_sector_track[drive] = track; + disc_sector_side[drive] = side; + disc_sector_drive = drive; + disc_sector_sector[drive] = sector; + disc_sector_n[drive] = sector_size; + disc_sector_reset_state(drive); + disc_sector_state[drive] = STATE_WRITE_FIND_SECTOR; +} + +void disc_sector_readaddress(int drive, int track, int side, int rate) +{ +// pclog("disc_sector_readaddress: fdc_period=%i img_period=%i rate=%i track=%i side=%i\n", fdc_get_bitcell_period(), get_bitcell_period(), rate, track, side); + + disc_sector_track[drive] = track; + disc_sector_side[drive] = side; + disc_sector_drive = drive; + disc_sector_reset_state(drive); + disc_sector_state[drive] = STATE_READ_FIND_ADDRESS; +} + +void disc_sector_format(int drive, int track, int side, int rate, uint8_t fill) +{ + disc_sector_track[drive] = track; + disc_sector_side[drive] = side; + disc_sector_drive = drive; + disc_sector_fill[drive] = fill; + disc_sector_reset_state(drive); + disc_sector_state[drive] = STATE_FORMAT_FIND; +} + +void disc_sector_stop(int drive) +{ + disc_sector_state[drive] = STATE_IDLE; +} + +static void index_pulse(int drive) +{ + if (disc_sector_state[drive] != STATE_IDLE) fdc_indexpulse(); +} + +// char *track_buffer[2][2][25512]; +char track_layout[2][2][25512]; + +int id_positions[2][2][MAX_SECTORS]; + +/* 0 = MFM, 1 = FM, 2 = MFM perpendicular, 3 = reserved */ +/* 4 = ISO, 0 = IBM */ +int media_type = 0; + +#define BYTE_GAP 0 +#define BYTE_SYNC 1 +#define BYTE_IAM 2 +#define BYTE_IDAM 3 +#define BYTE_ID 4 +#define BYTE_ID_CRC 5 +#define BYTE_DATA_AM 6 +#define BYTE_DATA 7 +#define BYTE_DATA_CRC 8 +#define BYTE_SECTOR_GAP 9 +#define BYTE_GAP3 10 +#define BYTE_AM_SYNC 11 +#define BYTE_INDEX_HOLE 12 + +void disc_sector_prepare_track_layout(int drive, int side) +{ + sector_t *s; + int i = 0; + int j = 0; + int real_gap0_len = ((media_type & 3) == 1) ? 40 : 80; + int sync_len = ((media_type & 3) == 1) ? 6 : 12; + int am_len = ((media_type & 3) == 1) ? 1 : 4; + int real_gap1_len = ((media_type & 3) == 1) ? 26 : 50; + // track_layout[drive][side] = (char *) malloc(raw_tsize[drive]); + // id_positions[drive][side] = (int *) malloc(disc_sector_count[drive][side] * 4); + memset(track_layout[drive][side], BYTE_GAP, raw_tsize[drive]); + memset(id_positions[drive][side], 0, 1024); + i = 0; + if (!(media_type & 4)) + { + memset(track_layout[drive][side] + i, BYTE_INDEX_HOLE, 1); + i++; + memset(track_layout[drive][side] + i, BYTE_GAP, real_gap0_len - 1); + i += real_gap0_len - 1; + memset(track_layout[drive][side] + i, BYTE_SYNC, sync_len); + i += sync_len; + if ((media_type & 3) != 1) + { + memset(track_layout[drive][side] + i, BYTE_AM_SYNC, 3); + i += 3; + } + memset(track_layout[drive][side] + i, BYTE_IAM, 1); + i++; + memset(track_layout[drive][side] + i, BYTE_GAP, real_gap1_len); + i += real_gap1_len; + } + else + { + memset(track_layout[drive][side] + i, BYTE_INDEX_HOLE, 1); + i++; + memset(track_layout[drive][side] + i, BYTE_GAP, real_gap1_len - 1); + i += real_gap1_len - 1; + } + for (j = 0; j < disc_sector_count[drive][side]; j++) + { + s = &disc_sector_data[drive][side][j]; + // pclog("Sector %i (%i)\n", j, s->n); + memset(track_layout[drive][side] + i, BYTE_SYNC, sync_len); + i += sync_len; + if ((media_type & 3) != 1) + { + memset(track_layout[drive][side] + i, BYTE_AM_SYNC, 3); + i += 3; + } + id_positions[drive][side][j] = i; + memset(track_layout[drive][side] + i, BYTE_IDAM, 1); + i++; + memset(track_layout[drive][side] + i, BYTE_ID, 4); + i += 4; + memset(track_layout[drive][side] + i, BYTE_ID_CRC, 2); + i += 2; + memset(track_layout[drive][side] + i, BYTE_SECTOR_GAP, gap2_size[drive]); + i += gap2_size[drive]; + memset(track_layout[drive][side] + i, BYTE_SYNC, sync_len); + i += sync_len; + if ((media_type & 3) != 1) + { + memset(track_layout[drive][side] + i, BYTE_AM_SYNC, 3); + i += 3; + } + memset(track_layout[drive][side] + i, BYTE_DATA_AM, 1); + i++; + memset(track_layout[drive][side] + i, BYTE_DATA, (128 << ((int) s->n))); + i += (128 << ((int) s->n)); + memset(track_layout[drive][side] + i, BYTE_DATA_CRC, 2); + i += 2; + memset(track_layout[drive][side] + i, BYTE_GAP3, gap3_size[drive]); + i += gap3_size[drive]; + } + + if (side == 0) disc_sector_state[drive] = STATE_IDLE; + +#if 0 + FILE *f = fopen("layout.dmp", "wb"); + fwrite(track_layout[drive][side], 1, raw_tsize[drive], f); + fclose(f); + fatal("good getpccache!\n"); +#endif +} + +int disc_sector_reset_state(int drive) +{ + id_counter[drive] = data_counter[drive] = index_count[drive] = gap3_counter[drive] = cur_rate[drive] = 0; + last_sector[drive] = NULL; +} + +int disc_sector_find_sector(int drive) +{ + int side = disc_sector_side[drive]; + int i = 0; + for (i = 0; i < disc_sector_count[drive][side]; i++) + { + if (id_positions[drive][side][i] == cur_track_pos[drive]) + { + return i; + } + } + return -1; +} + +int disc_sector_match(int drive) +{ + int temp; + if (last_sector[drive] == NULL) return 0; + temp = (disc_sector_track[drive] == last_sector[drive]->c); + temp = temp && (disc_sector_side[drive] == last_sector[drive]->h); + temp = temp && (disc_sector_sector[drive] == last_sector[drive]->r); + if (disc_sector_n[drive]) + { + temp = temp && (disc_sector_n[drive] == last_sector[drive]->n); + } + return temp; +} + +int disc_sector_can_read_address(int drive) +{ + int temp; + temp = (fdc_get_bitcell_period() == get_bitcell_period(drive)); + temp = temp && fdd_can_read_medium(drive ^ fdd_swap); + return temp; +} + +int disc_sector_can_format(int drive) +{ + int temp; + temp = !writeprot[drive]; + temp = temp && !swwp; + temp = temp && disc_sector_can_read_address(drive); + temp = temp && (fdc_get_format_sectors() == disc_sector_count[drive][disc_sector_side[drive]]); + return temp; +} + +int disc_sector_find_state(int drive) +{ + int temp; + temp = (disc_sector_state[drive] == STATE_READ_FIND_SECTOR); + temp = temp || (disc_sector_state[drive] == STATE_READ_FIND_FIRST_SECTOR); + temp = temp || (disc_sector_state[drive] == STATE_READ_FIND_NEXT_SECTOR); + temp = temp || (disc_sector_state[drive] == STATE_WRITE_FIND_SECTOR); + temp = temp || (disc_sector_state[drive] == STATE_READ_FIND_ADDRESS); + temp = temp || (disc_sector_state[drive] == STATE_FORMAT_FIND); + return temp; +} + +int disc_sector_read_state(int drive) +{ + int temp; + temp = (disc_sector_state[drive] == STATE_READ_SECTOR); + temp = temp || (disc_sector_state[drive] == STATE_READ_FIRST_SECTOR); + temp = temp || (disc_sector_state[drive] == STATE_READ_NEXT_SECTOR); + return temp; +} + +void disc_sector_poll() +{ + sector_t *s; + int data; + int drive = disc_sector_drive; + int side = disc_sector_side[drive]; + int found_sector = 0; + int b = 0; + + if (disc_sector_state[drive] == STATE_SEEK) + { + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + + if (disc_sector_state[drive] == STATE_FORMAT_FIND) + { + if (!(disc_sector_can_format(drive))) + { + if (disc_sector_can_read_address(drive)) + { + pclog("disc_sector_poll(): Disk is write protected or attempting to format wrong number of sectors per track\n"); + fdc_writeprotect(); + } + else + { + pclog("disc_sector_poll(): Unable to format at the requested density or bitcell period\n"); + fdc_notfound(); + } + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + } + // if (disc_sector_state[drive] != STATE_IDLE) pclog("%04X: %01X\n", cur_track_pos[drive], track_layout[drive][side][cur_track_pos[drive]]); + if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_GAP) + { + if (disc_sector_read_state(drive) || (disc_sector_state[drive] == STATE_WRITE_SECTOR) || (disc_sector_state[drive] == STATE_FORMAT)) + { + /* We're at GAP4b or even GAP4a and still in a read, write, or format state, this means we've overrun the gap. + Return with sector not found. */ + // pclog("disc_sector_poll(): Gap overrun at GAP4\n"); + fdc_notfound(); + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_INDEX_HOLE) + { + index_pulse(drive); + if (disc_sector_state[drive] != STATE_IDLE) index_count[drive]++; + if (disc_sector_read_state(drive) || (disc_sector_state[drive] == STATE_WRITE_SECTOR) || (disc_sector_state[drive] == STATE_FORMAT)) + { + /* We're at the index address mark and still in a read, write, or format state, this means we've overrun the gap. + Return with sector not found. */ + // pclog("disc_sector_poll(): Gap overrun at IAM\n"); + fdc_notfound(); + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_IDAM) + { + found_sector = disc_sector_find_sector(drive); + // pclog("Found sector: %i\n", found_sector); + cur_sector[drive] = found_sector; + last_sector[drive] = &disc_sector_data[drive][disc_sector_side[drive]][found_sector]; + cur_rate[drive] = last_sector[drive]->rate; + if (!(disc_sector_can_read_address(drive))) last_sector[drive] = NULL; + if (disc_sector_read_state(drive) || (disc_sector_state[drive] == STATE_WRITE_SECTOR) || (disc_sector_state[drive] == STATE_FORMAT)) + { + /* We're at a sector ID address mark and still in a read, write, or format state, this means we've overrun the gap. + Return with sector not found. */ + pclog("disc_sector_poll(): Gap (%i) overrun at IDAM\n", fdc_get_gap()); + fdc_notfound(); + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + if ((disc_sector_state[drive] == STATE_FORMAT_FIND) && disc_sector_can_read_address(drive)) disc_sector_state[drive] = STATE_FORMAT; + id_counter[drive] = 0; + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_ID) + { + id_counter[drive]++; + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_ID_CRC) + { + id_counter[drive]++; + if (id_counter[drive] == 6) + { + /* ID CRC read, if state is read address, return address */ + if ((disc_sector_state[drive] == STATE_READ_FIND_ADDRESS) && !(disc_sector_can_read_address(drive))) + { + if (fdc_get_bitcell_period() != get_bitcell_period(drive)) + { + pclog("Unable to read sector ID: Bitcell period mismatch (%i != %i)...\n", fdc_get_bitcell_period(), get_bitcell_period(drive)); + } + else + { + pclog("Unable to read sector ID: Media type not supported by the drive...\n"); + } + } + if ((disc_sector_state[drive] == STATE_READ_FIND_ADDRESS) && disc_sector_can_read_address(drive)) + { + // pclog("Reading sector ID...\n"); + fdc_sectorid(last_sector[drive]->c, last_sector[drive]->h, last_sector[drive]->r, last_sector[drive]->n, 0, 0); + disc_sector_state[drive] = STATE_IDLE; + } + id_counter[drive] = 0; + } + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_DATA_AM) + { + data_counter[drive] = 0; + switch (disc_sector_state[drive]) + { + case STATE_READ_FIND_SECTOR: + if (disc_sector_match(drive) && disc_sector_can_read_address(drive)) disc_sector_state[drive] = STATE_READ_SECTOR; + break; + case STATE_READ_FIND_FIRST_SECTOR: + if ((cur_sector[drive] == 0) && disc_sector_can_read_address(drive)) disc_sector_state[drive] = STATE_READ_FIRST_SECTOR; + break; + case STATE_READ_FIND_NEXT_SECTOR: + if (disc_sector_can_read_address(drive)) disc_sector_state[drive] = STATE_READ_NEXT_SECTOR; + break; + case STATE_WRITE_FIND_SECTOR: + if (disc_sector_match(drive) && disc_sector_can_read_address(drive)) disc_sector_state[drive] = STATE_WRITE_SECTOR; + break; + } + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_DATA) + { + if (disc_sector_read_state(drive) && (last_sector[drive] != NULL)) + { + if (fdc_data(last_sector[drive]->data[data_counter[drive]])) + { + /* Data failed to be sent to the FDC, abort. */ + pclog("disc_sector_poll(): Unable to send further data to the FDC\n"); + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + } + if ((disc_sector_state[drive] == STATE_WRITE_SECTOR) && (last_sector[drive] != NULL)) + { + data = fdc_getdata(cur_byte[drive] == ((128 << ((uint32_t) last_sector[drive]->n)) - 1)); + if (data == -1) + { + /* Data failed to be sent from the FDC, abort. */ + pclog("disc_sector_poll(): Unable to receive further data from the FDC\n"); + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + return; + } + if (!disable_write) last_sector[drive]->data[data_counter[drive]] = data; + } + if ((disc_sector_state[drive] == STATE_FORMAT) && (last_sector[drive] != NULL)) + { + if (!disable_write) last_sector[drive]->data[data_counter[drive]] = disc_sector_fill[drive]; + } + data_counter[drive]++; + if (last_sector[drive] == NULL) + { + data_counter[drive] = 0; + } + else + { + data_counter[drive] %= (128 << ((uint32_t) last_sector[drive]->n)); + if (!data_counter[drive]) + { + if (disc_sector_read_state(drive) && (last_sector[drive] != NULL)) + { + disc_sector_state[drive] = STATE_IDLE; + fdc_finishread(drive); + } + if ((disc_sector_state[drive] == STATE_WRITE_SECTOR) && (last_sector[drive] != NULL)) + { + disc_sector_state[drive] = STATE_IDLE; + if (!disable_write) disc_sector_writeback[drive](drive, disc_sector_track[drive]); + fdc_finishread(drive); + } + if ((disc_sector_state[drive] == STATE_FORMAT) && (last_sector[drive] != NULL)) + { + disc_sector_state[drive] = STATE_IDLE; + if (!disable_write) disc_sector_writeback[drive](drive, disc_sector_track[drive]); + fdc_finishread(drive); + } + } + } + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_GAP3) + { + if (gap3_counter[drive] == fdc_get_gap()) + { + } + gap3_counter[drive]++; + gap3_counter[drive] %= gap3_size[drive]; + // pclog("GAP3 counter = %i\n", gap3_counter[drive]); + } + else if (track_layout[drive][side][cur_track_pos[drive]] == BYTE_GAP) + { + if (last_sector[drive] != NULL) last_sector[drive] = NULL; + } + b = track_layout[drive][side][cur_track_pos[drive]]; + cur_track_pos[drive]++; + cur_track_pos[drive] %= raw_tsize[drive]; + if ((disc_sector_state[drive] != STATE_IDLE) && (disc_sector_state[drive] != STATE_SEEK)) + { + if (index_count[drive] > 1) + { + if (disc_sector_find_state(drive)) + { + /* The index hole has been hit twice and we're still in a find state. + This means sector finding has failed for whatever reason. + Abort with sector not found and set state to idle. */ + // pclog("disc_sector_poll(): Sector not found (%i %i %i %i)\n", disc_sector_track[drive], disc_sector_side[drive], disc_sector_sector[drive], disc_sector_n[drive]); + fdc_notfound(); + disc_sector_state[drive] = STATE_IDLE; + disc_sector_reset_state(drive); + return; + } + } + } + if ((b != BYTE_GAP3) && (track_layout[drive][side][cur_track_pos[drive]] == BYTE_GAP3)) + { + gap3_counter[drive] = 0; + } +} diff --git a/src/fdc.c b/src/fdc.c index 5b38105ca..d71f5e4a8 100644 --- a/src/fdc.c +++ b/src/fdc.c @@ -63,6 +63,9 @@ typedef struct FDC uint8_t fifobuf[16]; int seek_params; /* Needed for relative seek. */ + + int gap, dtl; + int format_sectors; } FDC; static FDC fdc; @@ -92,8 +95,24 @@ void fdc_reset() } // pclog("Reset FDC\n"); } + int ins; +int fdc_get_gap() +{ + return fdc.gap; +} + +int fdc_get_dtl() +{ + return fdc.dtl; +} + +int fdc_get_format_sectors() +{ + return fdc.format_sectors; +} + void fdc_reset_fifo_buf() { int i = 0; @@ -588,11 +607,13 @@ bad_command: fdd_set_head(fdc.drive, (fdc.params[0] & 4) ? 1 : 0); fdc.sector=fdc.params[3]; fdc.eot[fdc.drive] = fdc.params[5]; + fdc.gap = fdc.params[6]; + fdc.dtl = fdc.params[7]; if (fdc.config & 0x40) { if (fdc.params[1] != fdc.track[fdc.drive]) { - fdc_seek(fdc.drive, fdc.params[1] - fdc.track[fdc.drive]); + fdc_seek(fdc.drive, ((int) fdc.params[1]) - ((int) fdc.track[fdc.drive])); fdc.track[fdc.drive] = fdc.params[1]; } } @@ -618,11 +639,13 @@ bad_command: fdd_set_head(fdc.drive, (fdc.params[0] & 4) ? 1 : 0); fdc.sector=fdc.params[3]; fdc.eot[fdc.drive] = fdc.params[5]; + fdc.gap = fdc.params[6]; + fdc.dtl = fdc.params[7]; if (fdc.config & 0x40) { if (fdc.params[1] != fdc.track[fdc.drive]) { - fdc_seek(fdc.drive, fdc.params[1] - fdc.track[fdc.drive]); + fdc_seek(fdc.drive, ((int) fdc.params[1]) - ((int) fdc.track[fdc.drive])); fdc.track[fdc.drive] = fdc.params[1]; } } @@ -644,11 +667,13 @@ bad_command: fdd_set_head(fdc.drive, (fdc.params[0] & 4) ? 1 : 0); fdc.sector=fdc.params[3]; fdc.eot[fdc.drive] = fdc.params[5]; + fdc.gap = fdc.params[6]; + fdc.dtl = fdc.params[7]; if (fdc.config & 0x40) { if (fdc.params[1] != fdc.track[fdc.drive]) { - fdc_seek(fdc.drive, fdc.params[1] - fdc.track[fdc.drive]); + fdc_seek(fdc.drive, ((int) fdc.params[1]) - ((int) fdc.track[fdc.drive])); fdc.track[fdc.drive] = fdc.params[1]; } } @@ -675,6 +700,9 @@ bad_command: case 0x0d: /*Format*/ fdc_rate(fdc.drive); fdc.head = (fdc.params[0] & 4) ? 1 : 0; + fdc.gap = fdc.params[3]; + fdc.dtl = 4000000; + fdc.format_sectors = fdc.params[2]; fdc.format_state = 1; fdc.pos = 0; fdc.stat = 0x30; diff --git a/src/ibm.h b/src/ibm.h index 0188d960e..369387b43 100644 --- a/src/ibm.h +++ b/src/ibm.h @@ -109,6 +109,15 @@ struct uint32_t pc; uint32_t last_ea; + + union + { + struct + { + int8_t rm, mod, reg; + } rm_mod_reg; + uint32_t rm_mod_reg_data; + } rm_data; } cpu_state; /*x86reg regs[8];*/ @@ -240,6 +249,10 @@ int pitcount; float pit_timer0_freq(); +#define cpu_rm cpu_state.rm_data.rm_mod_reg.rm +#define cpu_mod cpu_state.rm_data.rm_mod_reg.mod +#define cpu_reg cpu_state.rm_data.rm_mod_reg.reg + /*DMA*/ @@ -513,6 +526,8 @@ extern int cdrom_enabled; extern uint32_t atapi_get_cd_channel(int channel); extern uint32_t atapi_get_cd_volume(int channel); +extern int ide_ter_enabled; + void pclog(const char *format, ...); extern int nmi; diff --git a/src/ide.c b/src/ide.c index ff5a12d31..ddad8a9da 100644 --- a/src/ide.c +++ b/src/ide.c @@ -259,6 +259,8 @@ int readcdmode = 0; int cdrom_channel = 2; +int ide_ter_enabled = 0; + /* Mode sense/select stuff. */ uint8_t mode_pages_in[256][256]; #define PAGE_CHANGEABLE 1 @@ -3316,12 +3318,16 @@ void ide_ter_enable() { io_sethandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL); io_sethandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL); + + ide_ter_enabled = 1; } void ide_ter_disable() { io_removehandler(0x0168, 0x0008, ide_read_ter, ide_read_ter_w, ide_read_ter_l, ide_write_ter, ide_write_ter_w, ide_write_ter_l, NULL); io_removehandler(0x036e, 0x0001, ide_read_ter, NULL, NULL, ide_write_ter, NULL, NULL , NULL); + + ide_ter_enabled = 0; } void ide_ter_init() diff --git a/src/mem.c b/src/mem.c index 72faa3f48..39d0e039c 100644 --- a/src/mem.c +++ b/src/mem.c @@ -1165,7 +1165,7 @@ uint8_t readmemb386l(uint32_t seg, uint32_t addr) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! rb %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! rb %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return -1; } mem_logical_addr = addr = addr + seg; @@ -1192,7 +1192,7 @@ void writememb386l(uint32_t seg, uint32_t addr, uint8_t val) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! wb %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! wb %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return; } @@ -1233,7 +1233,7 @@ uint16_t readmemwl(uint32_t seg, uint32_t addr) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! rw %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! rw %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return -1; } if (cr0>>31) @@ -1281,7 +1281,7 @@ void writememwl(uint32_t seg, uint32_t addr, uint16_t val) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! ww %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! ww %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return; } if (page_lookup[addr2>>12]) @@ -1331,7 +1331,7 @@ uint32_t readmemll(uint32_t seg, uint32_t addr) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! rl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! rl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return -1; } @@ -1371,7 +1371,7 @@ void writememll(uint32_t seg, uint32_t addr, uint32_t val) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! wl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! wl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return; } if (page_lookup[addr2>>12]) @@ -1428,7 +1428,7 @@ uint64_t readmemql(uint32_t seg, uint32_t addr) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! rl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! rl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return -1; } @@ -1465,7 +1465,7 @@ void writememql(uint32_t seg, uint32_t addr, uint64_t val) if (seg==-1) { x86gpf("NULL segment", 0); - printf("NULL segment! wl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); + // printf("NULL segment! wl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr); return; } if (page_lookup[addr2>>12]) diff --git a/src/model.c b/src/model.c index e60d43cc3..dc4c924d5 100644 --- a/src/model.c +++ b/src/model.c @@ -625,5 +625,6 @@ void model_init() io_init(); fdc_update_is_nsc(0); + ide_ter_enabled = 0; models[model].init(); } diff --git a/src/ne2000.c b/src/ne2000.c index 0e33d1829..fcfc7b6c8 100644 --- a/src/ne2000.c +++ b/src/ne2000.c @@ -1573,11 +1573,11 @@ void ne2000_io_set(uint16_t addr, ne2000_t *ne2000) io_sethandler(addr+0x1f, 0x0001, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); } -void ne2000_io_remove(ne2000_t *ne2000) +void ne2000_io_remove(int16_t addr, ne2000_t *ne2000) { - io_removehandler(old_base_addr, 0x0010, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); - io_removehandler(old_base_addr+0x10, 0x0010, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); - io_removehandler(old_base_addr+0x1f, 0x0001, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); + io_removehandler(addr, 0x0010, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); + io_removehandler(addr+0x10, 0x0010, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); + io_removehandler(addr+0x1f, 0x0001, ne2000_readb, ne2000_readw, ne2000_readl, ne2000_writeb, ne2000_writew, ne2000_writel, ne2000); } uint8_t ne2000_pci_read(int func, int addr, void *p) @@ -1658,13 +1658,14 @@ void ne2000_pci_write(int func, int addr, uint8_t val, void *p) case 0x04: if (val & PCI_COMMAND_IO) { - ne2000_io_remove(ne2000); + ne2000_io_remove(ne2000->base_address, ne2000); ne2000_io_set(ne2000->base_address, ne2000); } else { - ne2000_io_remove(ne2000); + ne2000_io_remove(ne2000->base_address, ne2000); } + ne2000_pci_regs[addr] = val; break; case 0x10: @@ -1673,7 +1674,7 @@ void ne2000_pci_write(int func, int addr, uint8_t val, void *p) case 0x11: case 0x12: case 0x13: /* I/O Base set. */ /* First, remove the old I/O, if old base was >= 0x280. */ - ne2000_io_remove(ne2000); + ne2000_io_remove(ne2000->base_address, ne2000); /* Then let's set the PCI regs. */ ne2000_pci_bar[0].addr_regs[addr & 3] = val; /* Then let's calculate the new I/O base. */ @@ -1919,7 +1920,7 @@ void *rtl8029as_init() memset(ne2000, 0, sizeof(ne2000_t)); disable_netbios = device_get_config_int("disable_netbios"); - ne2000_setirq(ne2000, 10); + ne2000_setirq(ne2000, (ide_ter_enabled ? 11 : 10)); //net_type //0 pcap @@ -1972,7 +1973,7 @@ void *rtl8029as_init() bios_addr = 0xD0000; } - ne2000_pci_regs[0x3C] = 10; + ne2000_pci_regs[0x3C] = ide_ter_enabled ? 11 : 10; ne2000_pci_regs[0x3D] = 1; memset(rtl8029as_eeprom, 0, 128); @@ -2127,7 +2128,7 @@ return ne2000; void ne2000_close(void *p) { ne2000_t *ne2000 = (ne2000_t *)p; - ne2000_io_remove(ne2000); + ne2000_io_remove(ne2000->base_address, ne2000); free(ne2000); if(net_is_slirp) { diff --git a/src/sound.c b/src/sound.c index 8714cf4e8..f3669816e 100644 --- a/src/sound.c +++ b/src/sound.c @@ -38,6 +38,7 @@ static SOUND_CARD sound_cards[] = {"Sound Blaster Pro v2", &sb_pro_v2_device}, {"Sound Blaster 16", &sb_16_device}, {"Sound Blaster AWE32", &sb_awe32_device}, + // {"Sound Blaster AWE64 PCI",&sb_awe64pci_device}, {"Adlib Gold", &adgold_device}, {"Windows Sound System", &wss_device}, {"Pro Audio Spectrum 16", &pas16_device}, diff --git a/src/sound_mpu401_uart.c b/src/sound_mpu401_uart.c index 3ff22de61..8e2b2d14a 100644 --- a/src/sound_mpu401_uart.c +++ b/src/sound_mpu401_uart.c @@ -55,3 +55,13 @@ void mpu401_uart_init(mpu401_uart_t *mpu, uint16_t addr) io_sethandler(addr, 0x0002, mpu401_uart_read, NULL, NULL, mpu401_uart_write, NULL, NULL, mpu); } + +void mpu401_uart_set(mpu401_uart_t *mpu, uint16_t addr) +{ + io_sethandler(addr, 0x0002, mpu401_uart_read, NULL, NULL, mpu401_uart_write, NULL, NULL, mpu); +} + +void mpu401_uart_remove(mpu401_uart_t *mpu, uint16_t addr) +{ + io_sethandler(addr, 0x0002, mpu401_uart_read, NULL, NULL, mpu401_uart_write, NULL, NULL, mpu); +} diff --git a/src/sound_mpu401_uart.h b/src/sound_mpu401_uart.h index 893c53fc4..f13a4bf0f 100644 --- a/src/sound_mpu401_uart.h +++ b/src/sound_mpu401_uart.h @@ -7,3 +7,5 @@ typedef struct mpu401_uart_t } mpu401_uart_t; void mpu401_uart_init(mpu401_uart_t *mpu, uint16_t addr); +void mpu401_uart_set(mpu401_uart_t *mpu, uint16_t addr); +void mpu401_uart_remove(mpu401_uart_t *mpu, uint16_t addr); diff --git a/src/sound_sb.c b/src/sound_sb.c index 740797c0b..14e0c39ad 100644 --- a/src/sound_sb.c +++ b/src/sound_sb.c @@ -1,6 +1,8 @@ #include #include "ibm.h" #include "device.h" +#include "io.h" +#include "pci.h" #include "sound_emu8k.h" #include "sound_mpu401_uart.h" #include "sound_opl.h" @@ -520,6 +522,175 @@ void *sb_awe32_init() return sb; } +typedef union +{ + uint16_t word; + uint8_t byte_regs[2]; +} word_t; + +typedef union +{ + uint32_t addr; + uint8_t addr_regs[4]; +} bar_t; + +uint8_t sb_awe64_pci_regs[256]; + +word_t sb_awe64_pci_words[6]; + +bar_t sb_awe64_pci_bar[6]; + +uint8_t sb_awe64_pci_read(int func, int addr, void *p) +{ + switch (addr) + { + case 0: case 1: + return sb_awe64_pci_words[0].byte_regs[addr & 1]; + case 2: case 3: + return sb_awe64_pci_words[1].byte_regs[addr & 1]; + case 8: case 9: + return sb_awe64_pci_words[2].byte_regs[addr & 1]; + case 0xA: case 0xB: + return sb_awe64_pci_words[3].byte_regs[addr & 1]; + case 0x10: case 0x11: case 0x12: case 0x13: + case 0x14: case 0x15: case 0x16: case 0x17: + case 0x18: case 0x19: case 0x1A: case 0x1B: + case 0x1C: case 0x1D: case 0x1E: case 0x1F: + case 0x20: case 0x21: case 0x22: case 0x23: + case 0x24: case 0x25: case 0x26: case 0x27: + return sb_awe64_pci_bar[(addr - 0x10) >> 2].addr_regs[addr & 3]; + case 0x2C: case 0x2D: + return sb_awe64_pci_words[4].byte_regs[addr & 1]; + case 0x2E: case 0x2F: + return sb_awe64_pci_words[5].byte_regs[addr & 1]; + default: + return sb_awe64_pci_regs[addr]; + } + return 0; +} + +uint32_t sb_base_addr, old_base_addr; + +void sb_awe64_io_remove(uint32_t base_addr, sb_t *sb) +{ + io_removehandler(base_addr, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); + io_removehandler(base_addr + 4, 0x0002, sb_16_mixer_read, NULL, NULL, sb_16_mixer_write, NULL, NULL, sb); + io_removehandler(base_addr + 8, 0x0002, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); + mpu401_uart_remove(&sb->mpu, base_addr + 8); +} + +void sb_awe64_io_set(uint32_t base_addr, sb_t *sb) +{ + sb_dsp_setaddr(&sb->dsp, base_addr); + + io_sethandler(base_addr, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); + io_sethandler(base_addr + 4, 0x0002, sb_16_mixer_read, NULL, NULL, sb_16_mixer_write, NULL, NULL, sb); + io_sethandler(base_addr + 8, 0x0002, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); + mpu401_uart_set(&sb->mpu, base_addr + 8); + + old_base_addr = base_addr; +} + +void sb_awe64_pci_write(int func, int addr, uint8_t val, void *p) +{ + sb_t *sb = (sb_t *) p; + + switch (addr) + { + case 4: + if (val & PCI_COMMAND_IO) + { + sb_awe64_io_remove(sb_base_addr, sb); + sb_awe64_io_set(sb_base_addr, sb); + } + else + { + sb_awe64_io_remove(sb_base_addr, sb); + } + sb_awe64_pci_regs[addr] = val; + return; + case 0x10: + val &= 0xfc; + val |= 1; + case 0x11: case 0x12: case 0x13: + /* case 0x14: case 0x15: case 0x16: case 0x17: + case 0x18: case 0x19: case 0x1A: case 0x1B: + case 0x1C: case 0x1D: case 0x1E: case 0x1F: + case 0x20: case 0x21: case 0x22: case 0x23: + case 0x24: case 0x25: case 0x26: case 0x27: */ + sb_awe64_pci_bar[(addr - 0x10) >> 2].addr_regs[addr & 3] = val; + sb_awe64_pci_bar[(addr - 0x10) >> 2].addr &= 0xffc0; + sb_awe64_pci_bar[(addr - 0x10) >> 2].addr |= 1; + if ((addr & 0x14) == 0x10) + { + sb_awe64_io_remove(sb_base_addr, sb); + sb_base_addr = sb_awe64_pci_bar[0].addr & 0xffc0; + pclog("SB AWE64 PCI: New I/O base %i is %04X\n" , ((addr - 0x10) >> 2), sb_base_addr); + } + return; + case 0x3C: + sb_awe64_pci_regs[addr] = val; + if (val != 0xFF) + { + pclog("SB AWE64 PCI IRQ now: %i\n", val); + sb_dsp_setirq(&sb->dsp, val); + } + return; + default: + return; + } + return 0; +} + +void *sb_awe64pci_init() +{ + sb_t *sb = malloc(sizeof(sb_t)); + uint16_t i = 0; + int onboard_ram = device_get_config_int("onboard_ram"); + memset(sb, 0, sizeof(sb_t)); + + opl3_init(&sb->opl); + sb_dsp_init(&sb->dsp, SB16 + 1); + sb_dsp_setirq(&sb->dsp, 5); + sb_dsp_setdma8(&sb->dsp, 1); + mpu401_uart_init(&sb->mpu, 0x228); + mpu401_uart_remove(&sb->mpu, 0x228); + sb_awe64_io_set(0x220, sb); + sb_mixer_init(&sb->mixer); + io_sethandler(0x0388, 0x0002, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); + sound_add_handler(sb_get_buffer_emu8k, sb); + emu8k_init(&sb->emu8k, onboard_ram); + + sb->mixer.regs[0x30] = 31 << 3; + sb->mixer.regs[0x31] = 31 << 3; + sb->mixer.regs[0x32] = 31 << 3; + sb->mixer.regs[0x33] = 31 << 3; + sb->mixer.regs[0x34] = 31 << 3; + sb->mixer.regs[0x35] = 31 << 3; + sb->mixer.regs[0x44] = 8 << 4; + sb->mixer.regs[0x45] = 8 << 4; + sb->mixer.regs[0x46] = 8 << 4; + sb->mixer.regs[0x47] = 8 << 4; + sb->mixer.regs[0x22] = (sb->mixer.regs[0x30] & 0xf0) | (sb->mixer.regs[0x31] >> 4); + sb->mixer.regs[0x04] = (sb->mixer.regs[0x32] & 0xf0) | (sb->mixer.regs[0x33] >> 4); + sb->mixer.regs[0x26] = (sb->mixer.regs[0x34] & 0xf0) | (sb->mixer.regs[0x35] >> 4); + + pci_add(sb_awe64_pci_read, sb_awe64_pci_write, sb); + + sb_awe64_pci_words[0].word = 0x1102; /* Creative Labs */ + sb_awe64_pci_words[1].word = 0x0003; /* CT-8800-SAT chip (EMU8008) */ + sb_awe64_pci_words[3].word = 0x0401; /* Multimedia device, audio device */ + sb_awe64_pci_words[4].word = 0x1102; /* Creative Labs */ + sb_awe64_pci_words[5].word = device_get_config_int("revision"); /* Revision */ + sb_awe64_pci_bar[0].addr = 1; + sb_awe64_pci_regs[0x3C] = 5; + sb_awe64_pci_regs[0x3D] = 1; + sb_awe64_pci_regs[0x3E] = 0x0c; + sb_awe64_pci_regs[0x3F] = 0x80; + + return sb; +} + void sb_close(void *p) { sb_t *sb = (sb_t *)p; @@ -898,6 +1069,72 @@ static device_config_t sb_awe32_config[] = } }; +static device_config_t sb_awe64pci_config[] = +{ + { + .name = "revision", + .description = "Revision", + .type = CONFIG_BINARY, + .type = CONFIG_SELECTION, + .selection = + { + { + .description = "CT4600", + .value = 0x0010 + }, + { + .description = "CT4650", + .value = 0x0030 + }, + { + .description = "" + } + }, + .default_int = 0x0010 + }, + { + .name = "midi", + .description = "MIDI out device", + .type = CONFIG_MIDI, + .default_int = 0 + }, + { + .name = "onboard_ram", + .description = "Onboard RAM", + .type = CONFIG_SELECTION, + .selection = + { + { + .description = "None", + .value = 0 + }, + { + .description = "512 KB", + .value = 512 + }, + { + .description = "2 MB", + .value = 2048 + }, + { + .description = "8 MB", + .value = 8192 + }, + { + .description = "28 MB", + .value = 28*1024 + }, + { + .description = "" + } + }, + .default_int = 512 + }, + { + .type = -1 + } +}; + device_t sb_1_device = { "Sound Blaster v1.0", @@ -982,3 +1219,15 @@ device_t sb_awe32_device = sb_add_status_info, sb_awe32_config }; +device_t sb_awe64pci_device = +{ + "Sound Blaster AWE64 PCI", + 0, + sb_awe64pci_init, + sb_close, + sb_awe32_available, + sb_speed_changed, + NULL, + sb_add_status_info, + sb_awe64pci_config +}; diff --git a/src/sound_sb.h b/src/sound_sb.h index 81130fecd..16bfeec97 100644 --- a/src/sound_sb.h +++ b/src/sound_sb.h @@ -5,3 +5,4 @@ extern device_t sb_pro_v1_device; extern device_t sb_pro_v2_device; extern device_t sb_16_device; extern device_t sb_awe32_device; +extern device_t sb_awe64pci_device; diff --git a/src/x86.h b/src/x86.h index ecd929faf..0a2fe0b9f 100644 --- a/src/x86.h +++ b/src/x86.h @@ -11,7 +11,6 @@ int ssegs; int firstrepcycle; uint32_t easeg,eaaddr,ealimit,ealimitw; -int rm,reg,mod,rmdat; int skipnextprint; int inhlt; diff --git a/src/x86_ops.h b/src/x86_ops.h index 3bca88270..a49fbc7dc 100644 --- a/src/x86_ops.h +++ b/src/x86_ops.h @@ -36,12 +36,11 @@ extern OpFn dynarec_ops_winchip_0f[1024]; extern OpFn dynarec_ops_pentium_0f[1024]; extern OpFn dynarec_ops_pentiummmx_0f[1024]; +extern OpFn dynarec_ops_c6x86mx_0f[1024]; extern OpFn dynarec_ops_k6_0f[1024]; -extern OpFn dynarec_ops_c6x86mx_0f[1024]; extern OpFn dynarec_ops_pentiumpro_0f[1024]; -// extern OpFn dynarec_ops_pentium2_0f[1024]; extern OpFn dynarec_ops_pentium2d_0f[1024]; extern OpFn dynarec_ops_fpu_d8_a16[32]; @@ -102,11 +101,11 @@ extern OpFn ops_winchip_0f[1024]; extern OpFn ops_pentium_0f[1024]; extern OpFn ops_pentiummmx_0f[1024]; +extern OpFn ops_c6x86mx_0f[1024]; + extern OpFn ops_k6_0f[1024]; -extern OpFn ops_c6x86mx_0f[1024]; extern OpFn ops_pentiumpro_0f[1024]; -// extern OpFn ops_pentium2_0f[1024]; extern OpFn ops_pentium2d_0f[1024]; extern OpFn ops_fpu_d8_a16[32]; diff --git a/src/x86_ops_arith.h b/src/x86_ops_arith.h index 2d225e01e..17ec1119b 100644 --- a/src/x86_ops_arith.h +++ b/src/x86_ops_arith.h @@ -1,22 +1,20 @@ #define OP_ARITH(name, operation, setflags, flagops, gettempc) \ static int op ## name ## _b_rmw_a16(uint32_t fetchdat) \ { \ - uint8_t dst; \ - uint8_t src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_16(fetchdat); \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - dst = getr8(rm); \ - src = getr8(reg); \ + uint8_t dst = getr8(cpu_rm); \ + uint8_t src = getr8(cpu_reg); \ setflags ## 8 flagops; \ - setr8(rm, operation); \ + setr8(cpu_rm, operation); \ CLOCK_CYCLES(timing_rr); \ } \ else \ { \ - dst = geteab(); if (abrt) return 1; \ - src = getr8(reg); \ + uint8_t dst = geteab(); if (abrt) return 1; \ + uint8_t src = getr8(cpu_reg); \ seteab(operation); if (abrt) return 1; \ setflags ## 8 flagops; \ CLOCK_CYCLES(timing_mr); \ @@ -25,22 +23,20 @@ } \ static int op ## name ## _b_rmw_a32(uint32_t fetchdat) \ { \ - uint8_t dst; \ - uint8_t src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_32(fetchdat); \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - dst = getr8(rm); \ - src = getr8(reg); \ + uint8_t dst = getr8(cpu_rm); \ + uint8_t src = getr8(cpu_reg); \ setflags ## 8 flagops; \ - setr8(rm, operation); \ + setr8(cpu_rm, operation); \ CLOCK_CYCLES(timing_rr); \ } \ else \ { \ - dst = geteab(); if (abrt) return 1; \ - src = getr8(reg); \ + uint8_t dst = geteab(); if (abrt) return 1; \ + uint8_t src = getr8(cpu_reg); \ seteab(operation); if (abrt) return 1; \ setflags ## 8 flagops; \ CLOCK_CYCLES(timing_mr); \ @@ -50,22 +46,20 @@ \ static int op ## name ## _w_rmw_a16(uint32_t fetchdat) \ { \ - uint16_t dst; \ - uint16_t src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_16(fetchdat); \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - dst = cpu_state.regs[rm].w; \ - src = cpu_state.regs[reg].w; \ + uint16_t dst = cpu_state.regs[cpu_rm].w; \ + uint16_t src = cpu_state.regs[cpu_reg].w; \ setflags ## 16 flagops; \ - cpu_state.regs[rm].w = operation; \ + cpu_state.regs[cpu_rm].w = operation; \ CLOCK_CYCLES(timing_rr); \ } \ else \ { \ - dst = geteaw(); if (abrt) return 1; \ - src = cpu_state.regs[reg].w; \ + uint16_t dst = geteaw(); if (abrt) return 1; \ + uint16_t src = cpu_state.regs[cpu_reg].w; \ seteaw(operation); if (abrt) return 1; \ setflags ## 16 flagops; \ CLOCK_CYCLES(timing_mr); \ @@ -74,22 +68,20 @@ } \ static int op ## name ## _w_rmw_a32(uint32_t fetchdat) \ { \ - uint16_t dst; \ - uint16_t src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_32(fetchdat); \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - dst = cpu_state.regs[rm].w; \ - src = cpu_state.regs[reg].w; \ + uint16_t dst = cpu_state.regs[cpu_rm].w; \ + uint16_t src = cpu_state.regs[cpu_reg].w; \ setflags ## 16 flagops; \ - cpu_state.regs[rm].w = operation; \ + cpu_state.regs[cpu_rm].w = operation; \ CLOCK_CYCLES(timing_rr); \ } \ else \ { \ - dst = geteaw(); if (abrt) return 1; \ - src = cpu_state.regs[reg].w; \ + uint16_t dst = geteaw(); if (abrt) return 1; \ + uint16_t src = cpu_state.regs[cpu_reg].w; \ seteaw(operation); if (abrt) return 1; \ setflags ## 16 flagops; \ CLOCK_CYCLES(timing_mr); \ @@ -99,22 +91,20 @@ \ static int op ## name ## _l_rmw_a16(uint32_t fetchdat) \ { \ - uint32_t dst; \ - uint32_t src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_16(fetchdat); \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - dst = cpu_state.regs[rm].l; \ - src = cpu_state.regs[reg].l; \ + uint32_t dst = cpu_state.regs[cpu_rm].l; \ + uint32_t src = cpu_state.regs[cpu_reg].l; \ setflags ## 32 flagops; \ - cpu_state.regs[rm].l = operation; \ + cpu_state.regs[cpu_rm].l = operation; \ CLOCK_CYCLES(timing_rr); \ } \ else \ { \ - dst = geteal(); if (abrt) return 1; \ - src = cpu_state.regs[reg].l; \ + uint32_t dst = geteal(); if (abrt) return 1; \ + uint32_t src = cpu_state.regs[cpu_reg].l; \ seteal(operation); if (abrt) return 1; \ setflags ## 32 flagops; \ CLOCK_CYCLES(timing_mrl); \ @@ -123,22 +113,20 @@ } \ static int op ## name ## _l_rmw_a32(uint32_t fetchdat) \ { \ - uint32_t dst; \ - uint32_t src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_32(fetchdat); \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - dst = cpu_state.regs[rm].l; \ - src = cpu_state.regs[reg].l; \ + uint32_t dst = cpu_state.regs[cpu_rm].l; \ + uint32_t src = cpu_state.regs[cpu_reg].l; \ setflags ## 32 flagops; \ - cpu_state.regs[rm].l = operation; \ + cpu_state.regs[cpu_rm].l = operation; \ CLOCK_CYCLES(timing_rr); \ } \ else \ { \ - dst = geteal(); if (abrt) return 1; \ - src = cpu_state.regs[reg].l; \ + uint32_t dst = geteal(); if (abrt) return 1; \ + uint32_t src = cpu_state.regs[cpu_reg].l; \ seteal(operation); if (abrt) return 1; \ setflags ## 32 flagops; \ CLOCK_CYCLES(timing_mrl); \ @@ -151,11 +139,11 @@ uint8_t dst, src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_16(fetchdat); \ - dst = getr8(reg); \ + dst = getr8(cpu_reg); \ src = geteab(); if (abrt) return 1; \ setflags ## 8 flagops; \ - setr8(reg, operation); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ + setr8(cpu_reg, operation); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ static int op ## name ## _b_rm_a32(uint32_t fetchdat) \ @@ -163,11 +151,11 @@ uint8_t dst, src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_32(fetchdat); \ - dst = getr8(reg); \ + dst = getr8(cpu_reg); \ src = geteab(); if (abrt) return 1; \ setflags ## 8 flagops; \ - setr8(reg, operation); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ + setr8(cpu_reg, operation); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ \ @@ -176,11 +164,11 @@ uint16_t dst, src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_16(fetchdat); \ - dst = cpu_state.regs[reg].w; \ + dst = cpu_state.regs[cpu_reg].w; \ src = geteaw(); if (abrt) return 1; \ setflags ## 16 flagops; \ - cpu_state.regs[reg].w = operation; \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ + cpu_state.regs[cpu_reg].w = operation; \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ static int op ## name ## _w_rm_a32(uint32_t fetchdat) \ @@ -188,11 +176,11 @@ uint16_t dst, src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_32(fetchdat); \ - dst = cpu_state.regs[reg].w; \ + dst = cpu_state.regs[cpu_reg].w; \ src = geteaw(); if (abrt) return 1; \ setflags ## 16 flagops; \ - cpu_state.regs[reg].w = operation; \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ + cpu_state.regs[cpu_reg].w = operation; \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ \ @@ -201,11 +189,11 @@ uint32_t dst, src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_16(fetchdat); \ - dst = cpu_state.regs[reg].l; \ + dst = cpu_state.regs[cpu_reg].l; \ src = geteal(); if (abrt) return 1; \ setflags ## 32 flagops; \ - cpu_state.regs[reg].l = operation; \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); \ + cpu_state.regs[cpu_reg].l = operation; \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml); \ return 0; \ } \ static int op ## name ## _l_rm_a32(uint32_t fetchdat) \ @@ -213,11 +201,11 @@ uint32_t dst, src; \ if (gettempc) tempc = CF_SET() ? 1 : 0; \ fetch_ea_32(fetchdat); \ - dst = cpu_state.regs[reg].l; \ + dst = cpu_state.regs[cpu_reg].l; \ src = geteal(); if (abrt) return 1; \ setflags ## 32 flagops; \ - cpu_state.regs[reg].l = operation; \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); \ + cpu_state.regs[cpu_reg].l = operation; \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml); \ return 0; \ } \ \ @@ -267,9 +255,9 @@ static int opCMP_b_rmw_a16(uint32_t fetchdat) uint8_t dst; fetch_ea_16(fetchdat); dst = geteab(); if (abrt) return 1; - setsub8(dst, getr8(reg)); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + setsub8(dst, getr8(cpu_reg)); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } static int opCMP_b_rmw_a32(uint32_t fetchdat) @@ -277,9 +265,9 @@ static int opCMP_b_rmw_a32(uint32_t fetchdat) uint8_t dst; fetch_ea_32(fetchdat); dst = geteab(); if (abrt) return 1; - setsub8(dst, getr8(reg)); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + setsub8(dst, getr8(cpu_reg)); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } @@ -288,9 +276,9 @@ static int opCMP_w_rmw_a16(uint32_t fetchdat) uint16_t dst; fetch_ea_16(fetchdat); dst = geteaw(); if (abrt) return 1; - setsub16(dst, cpu_state.regs[reg].w); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + setsub16(dst, cpu_state.regs[cpu_reg].w); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } static int opCMP_w_rmw_a32(uint32_t fetchdat) @@ -298,9 +286,9 @@ static int opCMP_w_rmw_a32(uint32_t fetchdat) uint16_t dst; fetch_ea_32(fetchdat); dst = geteaw(); if (abrt) return 1; - setsub16(dst, cpu_state.regs[reg].w); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + setsub16(dst, cpu_state.regs[cpu_reg].w); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } @@ -309,9 +297,9 @@ static int opCMP_l_rmw_a16(uint32_t fetchdat) uint32_t dst; fetch_ea_16(fetchdat); dst = geteal(); if (abrt) return 1; - setsub32(dst, cpu_state.regs[reg].l); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + setsub32(dst, cpu_state.regs[cpu_reg].l); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } static int opCMP_l_rmw_a32(uint32_t fetchdat) @@ -319,9 +307,9 @@ static int opCMP_l_rmw_a32(uint32_t fetchdat) uint32_t dst; fetch_ea_32(fetchdat); dst = geteal(); if (abrt) return 1; - setsub32(dst, cpu_state.regs[reg].l); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + setsub32(dst, cpu_state.regs[cpu_reg].l); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } @@ -330,8 +318,8 @@ static int opCMP_b_rm_a16(uint32_t fetchdat) uint8_t src; fetch_ea_16(fetchdat); src = geteab(); if (abrt) return 1; - setsub8(getr8(reg), src); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); + setsub8(getr8(cpu_reg), src); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); return 0; } static int opCMP_b_rm_a32(uint32_t fetchdat) @@ -339,8 +327,8 @@ static int opCMP_b_rm_a32(uint32_t fetchdat) uint8_t src; fetch_ea_32(fetchdat); src = geteab(); if (abrt) return 1; - setsub8(getr8(reg), src); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); + setsub8(getr8(cpu_reg), src); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); return 0; } @@ -349,8 +337,8 @@ static int opCMP_w_rm_a16(uint32_t fetchdat) uint16_t src; fetch_ea_16(fetchdat); src = geteaw(); if (abrt) return 1; - setsub16(cpu_state.regs[reg].w, src); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); + setsub16(cpu_state.regs[cpu_reg].w, src); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); return 0; } static int opCMP_w_rm_a32(uint32_t fetchdat) @@ -358,8 +346,8 @@ static int opCMP_w_rm_a32(uint32_t fetchdat) uint16_t src; fetch_ea_32(fetchdat); src = geteaw(); if (abrt) return 1; - setsub16(cpu_state.regs[reg].w, src); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); + setsub16(cpu_state.regs[cpu_reg].w, src); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); return 0; } @@ -368,8 +356,8 @@ static int opCMP_l_rm_a16(uint32_t fetchdat) uint32_t src; fetch_ea_16(fetchdat); src = geteal(); if (abrt) return 1; - setsub32(cpu_state.regs[reg].l, src); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); + setsub32(cpu_state.regs[cpu_reg].l, src); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml); return 0; } static int opCMP_l_rm_a32(uint32_t fetchdat) @@ -377,8 +365,8 @@ static int opCMP_l_rm_a32(uint32_t fetchdat) uint32_t src; fetch_ea_32(fetchdat); src = geteal(); if (abrt) return 1; - setsub32(cpu_state.regs[reg].l, src); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); + setsub32(cpu_state.regs[cpu_reg].l, src); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml); return 0; } @@ -411,10 +399,10 @@ static int opTEST_b_a16(uint32_t fetchdat) uint8_t temp, temp2; fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - temp2 = getr8(reg); + temp2 = getr8(cpu_reg); setznp8(temp & temp2); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } static int opTEST_b_a32(uint32_t fetchdat) @@ -422,10 +410,10 @@ static int opTEST_b_a32(uint32_t fetchdat) uint8_t temp, temp2; fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - temp2 = getr8(reg); + temp2 = getr8(cpu_reg); setznp8(temp & temp2); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } @@ -434,10 +422,10 @@ static int opTEST_w_a16(uint32_t fetchdat) uint16_t temp, temp2; fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - temp2 = cpu_state.regs[reg].w; + temp2 = cpu_state.regs[cpu_reg].w; setznp16(temp & temp2); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } static int opTEST_w_a32(uint32_t fetchdat) @@ -445,10 +433,10 @@ static int opTEST_w_a32(uint32_t fetchdat) uint16_t temp, temp2; fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - temp2 = cpu_state.regs[reg].w; + temp2 = cpu_state.regs[cpu_reg].w; setznp16(temp & temp2); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } @@ -457,10 +445,10 @@ static int opTEST_l_a16(uint32_t fetchdat) uint32_t temp, temp2; fetch_ea_16(fetchdat); temp = geteal(); if (abrt) return 1; - temp2 = cpu_state.regs[reg].l; + temp2 = cpu_state.regs[cpu_reg].l; setznp32(temp & temp2); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } static int opTEST_l_a32(uint32_t fetchdat) @@ -468,10 +456,10 @@ static int opTEST_l_a32(uint32_t fetchdat) uint32_t temp, temp2; fetch_ea_32(fetchdat); temp = geteal(); if (abrt) return 1; - temp2 = cpu_state.regs[reg].l; + temp2 = cpu_state.regs[cpu_reg].l; setznp32(temp & temp2); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return 0; } @@ -505,47 +493,47 @@ static int opTEST_EAX(uint32_t fetchdat) case 0x00: /*ADD ea, #*/ \ setea ## ea_width(dst + src); if (abrt) return 1; \ setadd ## flag_width(dst, src); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x08: /*OR ea, #*/ \ dst |= src; \ setea ## ea_width(dst); if (abrt) return 1; \ setznp ## flag_width(dst); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x10: /*ADC ea, #*/ \ tempc = CF_SET() ? 1 : 0; \ setea ## ea_width(dst + src + tempc); if (abrt) return 1; \ setadc ## flag_width(dst, src); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x18: /*SBB ea, #*/ \ tempc = CF_SET() ? 1 : 0; \ setea ## ea_width(dst - (src + tempc)); if (abrt) return 1; \ setsbc ## flag_width(dst, src); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x20: /*AND ea, #*/ \ dst &= src; \ setea ## ea_width(dst); if (abrt) return 1; \ setznp ## flag_width(dst); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x28: /*SUB ea, #*/ \ setea ## ea_width(dst - src); if (abrt) return 1; \ setsub ## flag_width(dst, src); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x30: /*XOR ea, #*/ \ dst ^= src; \ setea ## ea_width(dst); if (abrt) return 1; \ setznp ## flag_width(dst); \ - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x38: /*CMP ea, #*/ \ setsub ## flag_width(dst, src); \ - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); \ - else CLOCK_CYCLES((mod == 3) ? 2 : 7); \ + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); \ + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 7); \ break; \ } diff --git a/src/x86_ops_atomic.h b/src/x86_ops_atomic.h index 74b161909..49177a4df 100644 --- a/src/x86_ops_atomic.h +++ b/src/x86_ops_atomic.h @@ -9,11 +9,11 @@ static int opCMPXCHG_b_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - if (AL == temp) seteab(getr8(reg)); + if (AL == temp) seteab(getr8(cpu_reg)); else AL = temp; if (abrt) return 1; setsub8(temp2, temp); - CLOCK_CYCLES((mod == 3) ? 6 : 10); + CLOCK_CYCLES((cpu_mod == 3) ? 6 : 10); return 0; } static int opCMPXCHG_b_a32(uint32_t fetchdat) @@ -27,11 +27,11 @@ static int opCMPXCHG_b_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - if (AL == temp) seteab(getr8(reg)); + if (AL == temp) seteab(getr8(cpu_reg)); else AL = temp; if (abrt) return 1; setsub8(temp2, temp); - CLOCK_CYCLES((mod == 3) ? 6 : 10); + CLOCK_CYCLES((cpu_mod == 3) ? 6 : 10); return 0; } @@ -46,11 +46,11 @@ static int opCMPXCHG_w_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - if (AX == temp) seteaw(cpu_state.regs[reg].w); + if (AX == temp) seteaw(cpu_state.regs[cpu_reg].w); else AX = temp; if (abrt) return 1; setsub16(temp2, temp); - CLOCK_CYCLES((mod == 3) ? 6 : 10); + CLOCK_CYCLES((cpu_mod == 3) ? 6 : 10); return 0; } static int opCMPXCHG_w_a32(uint32_t fetchdat) @@ -64,11 +64,11 @@ static int opCMPXCHG_w_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - if (AX == temp) seteaw(cpu_state.regs[reg].w); + if (AX == temp) seteaw(cpu_state.regs[cpu_reg].w); else AX = temp; if (abrt) return 1; setsub16(temp2, temp); - CLOCK_CYCLES((mod == 3) ? 6 : 10); + CLOCK_CYCLES((cpu_mod == 3) ? 6 : 10); return 0; } @@ -83,11 +83,11 @@ static int opCMPXCHG_l_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); temp = geteal(); if (abrt) return 1; - if (EAX == temp) seteal(cpu_state.regs[reg].l); + if (EAX == temp) seteal(cpu_state.regs[cpu_reg].l); else EAX = temp; if (abrt) return 1; setsub32(temp2, temp); - CLOCK_CYCLES((mod == 3) ? 6 : 10); + CLOCK_CYCLES((cpu_mod == 3) ? 6 : 10); return 0; } static int opCMPXCHG_l_a32(uint32_t fetchdat) @@ -101,11 +101,11 @@ static int opCMPXCHG_l_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); temp = geteal(); if (abrt) return 1; - if (EAX == temp) seteal(cpu_state.regs[reg].l); + if (EAX == temp) seteal(cpu_state.regs[cpu_reg].l); else EAX = temp; if (abrt) return 1; setsub32(temp2, temp); - CLOCK_CYCLES((mod == 3) ? 6 : 10); + CLOCK_CYCLES((cpu_mod == 3) ? 6 : 10); return 0; } @@ -137,7 +137,7 @@ static int opCMPXCHG8B_a16(uint32_t fetchdat) flags |= Z_FLAG; else flags &= ~Z_FLAG; - cycles -= (mod == 3) ? 6 : 10; + cycles -= (cpu_mod == 3) ? 6 : 10; return 0; } static int opCMPXCHG8B_a32(uint32_t fetchdat) @@ -168,7 +168,7 @@ static int opCMPXCHG8B_a32(uint32_t fetchdat) flags |= Z_FLAG; else flags &= ~Z_FLAG; - cycles -= (mod == 3) ? 6 : 10; + cycles -= (cpu_mod == 3) ? 6 : 10; return 0; } @@ -183,10 +183,10 @@ static int opXADD_b_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - seteab(temp + getr8(reg)); if (abrt) return 1; - setadd8(temp, getr8(reg)); - setr8(reg, temp); - CLOCK_CYCLES((mod == 3) ? 3 : 4); + seteab(temp + getr8(cpu_reg)); if (abrt) return 1; + setadd8(temp, getr8(cpu_reg)); + setr8(cpu_reg, temp); + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 4); return 0; } static int opXADD_b_a32(uint32_t fetchdat) @@ -200,10 +200,10 @@ static int opXADD_b_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - seteab(temp + getr8(reg)); if (abrt) return 1; - setadd8(temp, getr8(reg)); - setr8(reg, temp); - CLOCK_CYCLES((mod == 3) ? 3 : 4); + seteab(temp + getr8(cpu_reg)); if (abrt) return 1; + setadd8(temp, getr8(cpu_reg)); + setr8(cpu_reg, temp); + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 4); return 0; } @@ -218,10 +218,10 @@ static int opXADD_w_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - seteaw(temp + cpu_state.regs[reg].w); if (abrt) return 1; - setadd16(temp, cpu_state.regs[reg].w); - cpu_state.regs[reg].w = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 4); + seteaw(temp + cpu_state.regs[cpu_reg].w); if (abrt) return 1; + setadd16(temp, cpu_state.regs[cpu_reg].w); + cpu_state.regs[cpu_reg].w = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 4); return 0; } static int opXADD_w_a32(uint32_t fetchdat) @@ -235,10 +235,10 @@ static int opXADD_w_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - seteaw(temp + cpu_state.regs[reg].w); if (abrt) return 1; - setadd16(temp, cpu_state.regs[reg].w); - cpu_state.regs[reg].w = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 4); + seteaw(temp + cpu_state.regs[cpu_reg].w); if (abrt) return 1; + setadd16(temp, cpu_state.regs[cpu_reg].w); + cpu_state.regs[cpu_reg].w = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 4); return 0; } @@ -253,10 +253,10 @@ static int opXADD_l_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); temp = geteal(); if (abrt) return 1; - seteal(temp + cpu_state.regs[reg].l); if (abrt) return 1; - setadd32(temp, cpu_state.regs[reg].l); - cpu_state.regs[reg].l = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 4); + seteal(temp + cpu_state.regs[cpu_reg].l); if (abrt) return 1; + setadd32(temp, cpu_state.regs[cpu_reg].l); + cpu_state.regs[cpu_reg].l = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 4); return 0; } static int opXADD_l_a32(uint32_t fetchdat) @@ -270,9 +270,9 @@ static int opXADD_l_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); temp = geteal(); if (abrt) return 1; - seteal(temp + cpu_state.regs[reg].l); if (abrt) return 1; - setadd32(temp, cpu_state.regs[reg].l); - cpu_state.regs[reg].l = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 4); + seteal(temp + cpu_state.regs[cpu_reg].l); if (abrt) return 1; + setadd32(temp, cpu_state.regs[cpu_reg].l); + cpu_state.regs[cpu_reg].l = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 4); return 0; } diff --git a/src/x86_ops_bit.h b/src/x86_ops_bit.h index c5da6967c..d802cd6d7 100644 --- a/src/x86_ops_bit.h +++ b/src/x86_ops_bit.h @@ -4,10 +4,10 @@ static int opBT_w_r_a16(uint32_t fetchdat) uint16_t temp; fetch_ea_16(fetchdat); - eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = 0; + eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; temp = geteaw(); if (abrt) return 1; flags_rebuild(); - if (temp & (1 << (cpu_state.regs[reg].w & 15))) flags |= C_FLAG; + if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG; else flags &= ~C_FLAG; CLOCK_CYCLES(3); @@ -18,10 +18,10 @@ static int opBT_w_r_a32(uint32_t fetchdat) uint16_t temp; fetch_ea_32(fetchdat); - eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = 0; + eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; temp = geteaw(); if (abrt) return 1; flags_rebuild(); - if (temp & (1 << (cpu_state.regs[reg].w & 15))) flags |= C_FLAG; + if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG; else flags &= ~C_FLAG; CLOCK_CYCLES(3); @@ -32,10 +32,10 @@ static int opBT_l_r_a16(uint32_t fetchdat) uint32_t temp; fetch_ea_16(fetchdat); - eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = 0; + eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; temp = geteal(); if (abrt) return 1; flags_rebuild(); - if (temp & (1 << (cpu_state.regs[reg].l & 31))) flags |= C_FLAG; + if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG; else flags &= ~C_FLAG; CLOCK_CYCLES(3); @@ -46,10 +46,10 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint32_t temp; fetch_ea_32(fetchdat); - eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = 0; + eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; temp = geteal(); if (abrt) return 1; flags_rebuild(); - if (temp & (1 << (cpu_state.regs[reg].l & 31))) flags |= C_FLAG; + if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG; else flags &= ~C_FLAG; CLOCK_CYCLES(3); @@ -63,10 +63,10 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint16_t temp; \ \ fetch_ea_16(fetchdat); \ - eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = eal_w = 0; \ + eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \ temp = geteaw(); if (abrt) return 1; \ - tempc = (temp & (1 << (cpu_state.regs[reg].w & 15))) ? 1 : 0; \ - temp operation (1 << (cpu_state.regs[reg].w & 15)); \ + tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \ + temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \ seteaw(temp); if (abrt) return 1; \ flags_rebuild(); \ if (tempc) flags |= C_FLAG; \ @@ -81,10 +81,10 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint16_t temp; \ \ fetch_ea_32(fetchdat); \ - eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = eal_w = 0; \ + eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \ temp = geteaw(); if (abrt) return 1; \ - tempc = (temp & (1 << (cpu_state.regs[reg].w & 15))) ? 1 : 0; \ - temp operation (1 << (cpu_state.regs[reg].w & 15)); \ + tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \ + temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \ seteaw(temp); if (abrt) return 1; \ flags_rebuild(); \ if (tempc) flags |= C_FLAG; \ @@ -99,10 +99,10 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint32_t temp; \ \ fetch_ea_16(fetchdat); \ - eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = eal_w = 0; \ + eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \ temp = geteal(); if (abrt) return 1; \ - tempc = (temp & (1 << (cpu_state.regs[reg].l & 31))) ? 1 : 0; \ - temp operation (1 << (cpu_state.regs[reg].l & 31)); \ + tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \ + temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \ seteal(temp); if (abrt) return 1; \ flags_rebuild(); \ if (tempc) flags |= C_FLAG; \ @@ -117,10 +117,10 @@ static int opBT_l_r_a32(uint32_t fetchdat) uint32_t temp; \ \ fetch_ea_32(fetchdat); \ - eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = eal_w = 0; \ + eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \ temp = geteal(); if (abrt) return 1; \ - tempc = (temp & (1 << (cpu_state.regs[reg].l & 31))) ? 1 : 0; \ - temp operation (1 << (cpu_state.regs[reg].l & 31)); \ + tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \ + temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \ seteal(temp); if (abrt) return 1; \ flags_rebuild(); \ if (tempc) flags |= C_FLAG; \ diff --git a/src/x86_ops_bitscan.h b/src/x86_ops_bitscan.h index 90dc6e8bf..bf7ef97ac 100644 --- a/src/x86_ops_bitscan.h +++ b/src/x86_ops_bitscan.h @@ -24,7 +24,7 @@ static int opBSF_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - BS_common(0, 16, 1, cpu_state.regs[reg].w, (is486) ? 1 : 3); + BS_common(0, 16, 1, cpu_state.regs[cpu_reg].w, (is486) ? 1 : 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -36,7 +36,7 @@ static int opBSF_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - BS_common(0, 16, 1, cpu_state.regs[reg].w, (is486) ? 1 : 3); + BS_common(0, 16, 1, cpu_state.regs[cpu_reg].w, (is486) ? 1 : 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -48,7 +48,7 @@ static int opBSF_l_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteal(); if (abrt) return 1; - BS_common(0, 32, 1, cpu_state.regs[reg].l, (is486) ? 1 : 3); + BS_common(0, 32, 1, cpu_state.regs[cpu_reg].l, (is486) ? 1 : 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -60,7 +60,7 @@ static int opBSF_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteal(); if (abrt) return 1; - BS_common(0, 32, 1, cpu_state.regs[reg].l, (is486) ? 1 : 3); + BS_common(0, 32, 1, cpu_state.regs[cpu_reg].l, (is486) ? 1 : 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -73,7 +73,7 @@ static int opBSR_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - BS_common(15, -1, -1, cpu_state.regs[reg].w, 3); + BS_common(15, -1, -1, cpu_state.regs[cpu_reg].w, 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -85,7 +85,7 @@ static int opBSR_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - BS_common(15, -1, -1, cpu_state.regs[reg].w, 3); + BS_common(15, -1, -1, cpu_state.regs[cpu_reg].w, 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -97,7 +97,7 @@ static int opBSR_l_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteal(); if (abrt) return 1; - BS_common(31, -1, -1, cpu_state.regs[reg].l, 3); + BS_common(31, -1, -1, cpu_state.regs[cpu_reg].l, 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; @@ -109,7 +109,7 @@ static int opBSR_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteal(); if (abrt) return 1; - BS_common(31, -1, -1, cpu_state.regs[reg].l, 3); + BS_common(31, -1, -1, cpu_state.regs[cpu_reg].l, 3); CLOCK_CYCLES((is486) ? 6 : 10); return 0; diff --git a/src/x86_ops_call.h b/src/x86_ops_call.h index ecc0a303b..43a9a1612 100644 --- a/src/x86_ops_call.h +++ b/src/x86_ops_call.h @@ -100,13 +100,13 @@ static int opFF_w_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; seteaw(temp + 1); if (abrt) return 1; setadd16nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC w*/ temp = geteaw(); if (abrt) return 1; seteaw(temp - 1); if (abrt) return 1; setsub16nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteaw(); if (abrt) return 1; @@ -114,7 +114,7 @@ static int opFF_w_a16(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmemw(easeg, eaaddr); @@ -128,7 +128,7 @@ static int opFF_w_a16(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; @@ -141,7 +141,7 @@ static int opFF_w_a16(uint32_t fetchdat) case 0x30: /*PUSH w*/ temp = geteaw(); if (abrt) return 1; PUSH_W(temp); - CLOCK_CYCLES((mod == 3) ? 2 : 5); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; default: @@ -165,13 +165,13 @@ static int opFF_w_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; seteaw(temp + 1); if (abrt) return 1; setadd16nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC w*/ temp = geteaw(); if (abrt) return 1; seteaw(temp - 1); if (abrt) return 1; setsub16nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteaw(); if (abrt) return 1; @@ -179,7 +179,7 @@ static int opFF_w_a32(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmemw(easeg, eaaddr); @@ -193,7 +193,7 @@ static int opFF_w_a32(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; @@ -206,7 +206,7 @@ static int opFF_w_a32(uint32_t fetchdat) case 0x30: /*PUSH w*/ temp = geteaw(); if (abrt) return 1; PUSH_W(temp); - CLOCK_CYCLES((mod == 3) ? 2 : 5); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; default: @@ -231,13 +231,13 @@ static int opFF_l_a16(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; seteal(temp + 1); if (abrt) return 1; setadd32nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC l*/ temp = geteal(); if (abrt) return 1; seteal(temp - 1); if (abrt) return 1; setsub32nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteal(); if (abrt) return 1; @@ -245,7 +245,7 @@ static int opFF_l_a16(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmeml(easeg, eaaddr); @@ -259,7 +259,7 @@ static int opFF_l_a16(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; @@ -272,7 +272,7 @@ static int opFF_l_a16(uint32_t fetchdat) case 0x30: /*PUSH l*/ temp = geteal(); if (abrt) return 1; PUSH_L(temp); - CLOCK_CYCLES((mod == 3) ? 2 : 5); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; default: @@ -296,13 +296,13 @@ static int opFF_l_a32(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; seteal(temp + 1); if (abrt) return 1; setadd32nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC l*/ temp = geteal(); if (abrt) return 1; seteal(temp - 1); if (abrt) return 1; setsub32nc(temp, 1); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteal(); if (abrt) return 1; @@ -310,7 +310,7 @@ static int opFF_l_a32(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmeml(easeg, eaaddr); @@ -324,7 +324,7 @@ static int opFF_l_a32(uint32_t fetchdat) cpu_state.pc = new_pc; CPU_BLOCK_END(); if (is486) CLOCK_CYCLES(5); - else CLOCK_CYCLES((mod == 3) ? 7 : 10); + else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = cpu_state.pc; @@ -337,7 +337,7 @@ static int opFF_l_a32(uint32_t fetchdat) case 0x30: /*PUSH l*/ temp = geteal(); if (abrt) return 1; PUSH_L(temp); - CLOCK_CYCLES((mod == 3) ? 2 : 5); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; default: diff --git a/src/x86_ops_i686.h b/src/x86_ops_i686.h index 7d475956a..7e8413f5a 100644 --- a/src/x86_ops_i686.h +++ b/src/x86_ops_i686.h @@ -2,7 +2,7 @@ static int internal_illegal(char *s) { cpu_state.pc = oldpc; x86gpf(s, 0); - return 1; + return abrt; } /* 0 = Limit 0-15 @@ -150,20 +150,18 @@ static int opFXSAVESTOR_a16(uint32_t fetchdat) { pclog("Effective address %04X not on 16-byte boundary\n", eaaddr); x86gpf(NULL, 0); - return 1; + return abrt; } fxinst = (rmdat >> 3) & 7; - if ((fxinst > 1) || (mod == 3)) + if ((fxinst > 1) || (cpu_mod == 3)) { - if (fxinst > 1) pclog("FX instruction is: %02X\n", fxinst); - if (mod == 3) pclog("MOD is 3\n"); - - cpu_state.pc = oldpc; + // if (fxinst > 1) pclog("FX instruction is: %02X\n", fxinst); + // if (cpu_mod == 3) pclog("MOD is 3\n"); x86illegal(); - return 0; + return abrt; } FP_ENTER(); @@ -328,20 +326,18 @@ static int opFXSAVESTOR_a32(uint32_t fetchdat) { pclog("Effective address %08X not on 16-byte boundary\n", eaaddr); x86gpf(NULL, 0); - return 1; + return abrt; } fxinst = (rmdat >> 3) & 7; - if ((fxinst > 1) || (mod == 3)) + if ((fxinst > 1) || (cpu_mod == 3)) { - if (fxinst > 1) pclog("FX instruction is: %02X\n", fxinst); - if (mod == 3) pclog("MOD is 3\n"); - - cpu_state.pc = oldpc; + // if (fxinst > 1) pclog("FX instruction is: %02X\n", fxinst); + // if (cpu_mod == 3) pclog("MOD is 3\n"); x86illegal(); - return 0; + return abrt; } FP_ENTER(); diff --git a/src/x86_ops_inc_dec.h b/src/x86_ops_inc_dec.h index be4017bf2..4ef60c8f2 100644 --- a/src/x86_ops_inc_dec.h +++ b/src/x86_ops_inc_dec.h @@ -61,7 +61,7 @@ static int opINCDEC_b_a16(uint32_t fetchdat) seteab(temp + 1); if (abrt) return 1; setadd8nc(temp, 1); } - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); return 0; } static int opINCDEC_b_a32(uint32_t fetchdat) @@ -81,6 +81,6 @@ static int opINCDEC_b_a32(uint32_t fetchdat) seteab(temp + 1); if (abrt) return 1; setadd8nc(temp, 1); } - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); return 0; } diff --git a/src/x86_ops_jump.h b/src/x86_ops_jump.h index 51976049b..c2bc1e1ad 100644 --- a/src/x86_ops_jump.h +++ b/src/x86_ops_jump.h @@ -18,8 +18,7 @@ #define opJ(condition) \ static int opJ ## condition(uint32_t fetchdat) \ { \ - int8_t offset; \ - offset = (int8_t)getbytef(); \ + int8_t offset = (int8_t)getbytef(); \ CLOCK_CYCLES(timing_bnt); \ if (cond_ ## condition) \ { \ @@ -33,8 +32,7 @@ \ static int opJ ## condition ## _w(uint32_t fetchdat) \ { \ - int16_t offset; \ - offset = (int16_t)getwordf(); \ + int16_t offset = (int16_t)getwordf(); \ CLOCK_CYCLES(timing_bnt); \ if (cond_ ## condition) \ { \ @@ -48,8 +46,7 @@ \ static int opJ ## condition ## _l(uint32_t fetchdat) \ { \ - uint32_t offset; \ - offset = getlong(); if (abrt) return 1; \ + uint32_t offset = getlong(); if (abrt) return 1; \ CLOCK_CYCLES(timing_bnt); \ if (cond_ ## condition) \ { \ @@ -82,8 +79,7 @@ opJ(NLE) static int opLOOPNE_w(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); CX--; CLOCK_CYCLES((is486) ? 7 : 11); if (CX && !ZF_SET()) @@ -96,8 +92,7 @@ static int opLOOPNE_w(uint32_t fetchdat) } static int opLOOPNE_l(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); ECX--; CLOCK_CYCLES((is486) ? 7 : 11); if (ECX && !ZF_SET()) @@ -111,8 +106,7 @@ static int opLOOPNE_l(uint32_t fetchdat) static int opLOOPE_w(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); CX--; CLOCK_CYCLES((is486) ? 7 : 11); if (CX && ZF_SET()) @@ -125,8 +119,7 @@ static int opLOOPE_w(uint32_t fetchdat) } static int opLOOPE_l(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); ECX--; CLOCK_CYCLES((is486) ? 7 : 11); if (ECX && ZF_SET()) @@ -140,8 +133,7 @@ static int opLOOPE_l(uint32_t fetchdat) static int opLOOP_w(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); CX--; CLOCK_CYCLES((is486) ? 7 : 11); if (CX) @@ -154,8 +146,7 @@ static int opLOOP_w(uint32_t fetchdat) } static int opLOOP_l(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); ECX--; CLOCK_CYCLES((is486) ? 7 : 11); if (ECX) @@ -169,8 +160,7 @@ static int opLOOP_l(uint32_t fetchdat) static int opJCXZ(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); CLOCK_CYCLES(5); if (!CX) { @@ -183,8 +173,7 @@ static int opJCXZ(uint32_t fetchdat) } static int opJECXZ(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); CLOCK_CYCLES(5); if (!ECX) { @@ -199,8 +188,7 @@ static int opJECXZ(uint32_t fetchdat) static int opJMP_r8(uint32_t fetchdat) { - int8_t offset; - offset = (int8_t)getbytef(); + int8_t offset = (int8_t)getbytef(); cpu_state.pc += offset; CPU_BLOCK_END(); CLOCK_CYCLES((is486) ? 3 : 7); @@ -208,8 +196,7 @@ static int opJMP_r8(uint32_t fetchdat) } static int opJMP_r16(uint32_t fetchdat) { - int16_t offset; - offset = (int16_t)getwordf(); + int16_t offset = (int16_t)getwordf(); cpu_state.pc += offset; CPU_BLOCK_END(); CLOCK_CYCLES((is486) ? 3 : 7); @@ -217,8 +204,7 @@ static int opJMP_r16(uint32_t fetchdat) } static int opJMP_r32(uint32_t fetchdat) { - int32_t offset; - offset = (int32_t)getlong(); if (abrt) return 1; + int32_t offset = (int32_t)getlong(); if (abrt) return 1; cpu_state.pc += offset; CPU_BLOCK_END(); CLOCK_CYCLES((is486) ? 3 : 7); @@ -227,12 +213,9 @@ static int opJMP_r32(uint32_t fetchdat) static int opJMP_far_a16(uint32_t fetchdat) { - uint16_t addr; - uint16_t seg; - uint32_t oxpc; - addr = getwordf(); - seg = getword(); if (abrt) return 1; - oxpc = cpu_state.pc; + uint16_t addr = getwordf(); + uint16_t seg = getword(); if (abrt) return 1; + uint32_t oxpc = cpu_state.pc; cpu_state.pc = addr; loadcsjmp(seg, oxpc); CPU_BLOCK_END(); @@ -240,12 +223,9 @@ static int opJMP_far_a16(uint32_t fetchdat) } static int opJMP_far_a32(uint32_t fetchdat) { - uint32_t addr; - uint16_t seg; - uint32_t oxpc; - addr = getlong(); - seg = getword(); if (abrt) return 1; - oxpc = cpu_state.pc; + uint32_t addr = getlong(); + uint16_t seg = getword(); if (abrt) return 1; + uint32_t oxpc = cpu_state.pc; cpu_state.pc = addr; loadcsjmp(seg, oxpc); CPU_BLOCK_END(); @@ -254,8 +234,7 @@ static int opJMP_far_a32(uint32_t fetchdat) static int opCALL_r16(uint32_t fetchdat) { - int16_t addr; - addr = (int16_t)getwordf(); + int16_t addr = (int16_t)getwordf(); PUSH_W(cpu_state.pc); cpu_state.pc += addr; CPU_BLOCK_END(); @@ -264,8 +243,7 @@ static int opCALL_r16(uint32_t fetchdat) } static int opCALL_r32(uint32_t fetchdat) { - int32_t addr; - addr = getlong(); if (abrt) return 1; + int32_t addr = getlong(); if (abrt) return 1; PUSH_L(cpu_state.pc); cpu_state.pc += addr; CPU_BLOCK_END(); @@ -298,9 +276,8 @@ static int opRET_l(uint32_t fetchdat) static int opRET_w_imm(uint32_t fetchdat) { - uint16_t offset; + uint16_t offset = getwordf(); uint16_t ret; - offset = getwordf(); ret = POP_W(); if (abrt) return 1; if (stack32) ESP += offset; @@ -313,9 +290,8 @@ static int opRET_w_imm(uint32_t fetchdat) } static int opRET_l_imm(uint32_t fetchdat) { - uint16_t offset; + uint16_t offset = getwordf(); uint32_t ret; - offset = getwordf(); ret = POP_L(); if (abrt) return 1; if (stack32) ESP += offset; diff --git a/src/x86_ops_misc.h b/src/x86_ops_misc.h index b93d7cc85..3bf3a4e9c 100644 --- a/src/x86_ops_misc.h +++ b/src/x86_ops_misc.h @@ -52,17 +52,17 @@ static int opF6_a16(uint32_t fetchdat) case 0x00: /*TEST b,#8*/ src = readmemb(cs, cpu_state.pc); cpu_state.pc++; if (abrt) return 1; setznp8(src & dst); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; case 0x10: /*NOT b*/ seteab(~dst); if (abrt) return 1; - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG b*/ seteab(0 - dst); if (abrt) return 1; setsub8(0, dst); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AL,b*/ AX = AL * dst; @@ -142,17 +142,17 @@ static int opF6_a32(uint32_t fetchdat) case 0x00: /*TEST b,#8*/ src = readmemb(cs, cpu_state.pc); cpu_state.pc++; if (abrt) return 1; setznp8(src & dst); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; case 0x10: /*NOT b*/ seteab(~dst); if (abrt) return 1; - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG b*/ seteab(0 - dst); if (abrt) return 1; setsub8(0, dst); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AL,b*/ AX = AL * dst; @@ -235,17 +235,17 @@ static int opF7_w_a16(uint32_t fetchdat) case 0x00: /*TEST w*/ src = getword(); if (abrt) return 1; setznp16(src & dst); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; case 0x10: /*NOT w*/ seteaw(~dst); if (abrt) return 1; - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG w*/ seteaw(0 - dst); if (abrt) return 1; setsub16(0, dst); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AX,w*/ templ = AX * dst; @@ -321,17 +321,17 @@ static int opF7_w_a32(uint32_t fetchdat) case 0x00: /*TEST w*/ src = getword(); if (abrt) return 1; setznp16(src & dst); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; case 0x10: /*NOT w*/ seteaw(~dst); if (abrt) return 1; - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG w*/ seteaw(0 - dst); if (abrt) return 1; setsub16(0, dst); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AX,w*/ templ = AX * dst; @@ -407,17 +407,17 @@ static int opF7_l_a16(uint32_t fetchdat) case 0x00: /*TEST l*/ src = getlong(); if (abrt) return 1; setznp32(src & dst); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; case 0x10: /*NOT l*/ seteal(~dst); if (abrt) return 1; - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mml); break; case 0x18: /*NEG l*/ seteal(0 - dst); if (abrt) return 1; setsub32(0, dst); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mml); break; case 0x20: /*MUL EAX,l*/ temp64 = (uint64_t)EAX * (uint64_t)dst; @@ -469,17 +469,17 @@ static int opF7_l_a32(uint32_t fetchdat) case 0x00: /*TEST l*/ src = getlong(); if (abrt) return 1; setznp32(src & dst); - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); - else CLOCK_CYCLES((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2); + else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); break; case 0x10: /*NOT l*/ seteal(~dst); if (abrt) return 1; - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mml); break; case 0x18: /*NEG l*/ seteal(0 - dst); if (abrt) return 1; setsub32(0, dst); - CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); + CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mml); break; case 0x20: /*MUL EAX,l*/ temp64 = (uint64_t)EAX * (uint64_t)dst; @@ -558,11 +558,11 @@ static int opBOUND_w_a16(uint32_t fetchdat) int16_t low, high; fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); low = geteaw(); high = readmemw(easeg, eaaddr + 2); if (abrt) return 1; - if (((int16_t)cpu_state.regs[reg].w < low) || ((int16_t)cpu_state.regs[reg].w > high)) + if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high)) { x86_int(5); return 1; @@ -576,11 +576,11 @@ static int opBOUND_w_a32(uint32_t fetchdat) int16_t low, high; fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); low = geteaw(); high = readmemw(easeg, eaaddr + 2); if (abrt) return 1; - if (((int16_t)cpu_state.regs[reg].w < low) || ((int16_t)cpu_state.regs[reg].w > high)) + if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high)) { x86_int(5); return 1; @@ -595,11 +595,11 @@ static int opBOUND_l_a16(uint32_t fetchdat) int32_t low, high; fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); low = geteal(); high = readmeml(easeg, eaaddr + 4); if (abrt) return 1; - if (((int32_t)cpu_state.regs[reg].l < low) || ((int32_t)cpu_state.regs[reg].l > high)) + if (((int32_t)cpu_state.regs[cpu_reg].l < low) || ((int32_t)cpu_state.regs[cpu_reg].l > high)) { x86_int(5); return 1; @@ -613,11 +613,11 @@ static int opBOUND_l_a32(uint32_t fetchdat) int32_t low, high; fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); low = geteal(); high = readmeml(easeg, eaaddr + 4); if (abrt) return 1; - if (((int32_t)cpu_state.regs[reg].l < low) || ((int32_t)cpu_state.regs[reg].l > high)) + if (((int32_t)cpu_state.regs[cpu_reg].l < low) || ((int32_t)cpu_state.regs[cpu_reg].l > high)) { x86_int(5); return 1; @@ -723,16 +723,6 @@ static int opLOADALL386(uint32_t fetchdat) { uint32_t la_addr = es + EDI; - if (is486 || israpidcad) - { - cpu_state.pc = oldpc; - - // fatal("Illegal instruction %08X\n", fetchdat); - pclog("Illegal instruction %08X\n", fetchdat); - x86illegal(); - return 0; - } - cr0 = readmeml(0, la_addr); flags = readmemw(0, la_addr + 4); eflags = readmemw(0, la_addr + 6); diff --git a/src/x86_ops_mmx.h b/src/x86_ops_mmx.h index c83c0a145..079824571 100644 --- a/src/x86_ops_mmx.h +++ b/src/x86_ops_mmx.h @@ -4,9 +4,9 @@ #define USATW(val) (((val) < 0) ? 0 : (((val) > 65535) ? 65535 : (val))) #define MMX_GETSRC() \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - src = MM[rm]; \ + src = MM[cpu_rm]; \ CLOCK_CYCLES(1); \ } \ else \ diff --git a/src/x86_ops_mmx_arith.h b/src/x86_ops_mmx_arith.h index 14299621b..7cdafa712 100644 --- a/src/x86_ops_mmx_arith.h +++ b/src/x86_ops_mmx_arith.h @@ -6,14 +6,14 @@ static int opPADDB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] += src.b[0]; - MM[reg].b[1] += src.b[1]; - MM[reg].b[2] += src.b[2]; - MM[reg].b[3] += src.b[3]; - MM[reg].b[4] += src.b[4]; - MM[reg].b[5] += src.b[5]; - MM[reg].b[6] += src.b[6]; - MM[reg].b[7] += src.b[7]; + MM[cpu_reg].b[0] += src.b[0]; + MM[cpu_reg].b[1] += src.b[1]; + MM[cpu_reg].b[2] += src.b[2]; + MM[cpu_reg].b[3] += src.b[3]; + MM[cpu_reg].b[4] += src.b[4]; + MM[cpu_reg].b[5] += src.b[5]; + MM[cpu_reg].b[6] += src.b[6]; + MM[cpu_reg].b[7] += src.b[7]; return 0; } @@ -25,14 +25,14 @@ static int opPADDB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] += src.b[0]; - MM[reg].b[1] += src.b[1]; - MM[reg].b[2] += src.b[2]; - MM[reg].b[3] += src.b[3]; - MM[reg].b[4] += src.b[4]; - MM[reg].b[5] += src.b[5]; - MM[reg].b[6] += src.b[6]; - MM[reg].b[7] += src.b[7]; + MM[cpu_reg].b[0] += src.b[0]; + MM[cpu_reg].b[1] += src.b[1]; + MM[cpu_reg].b[2] += src.b[2]; + MM[cpu_reg].b[3] += src.b[3]; + MM[cpu_reg].b[4] += src.b[4]; + MM[cpu_reg].b[5] += src.b[5]; + MM[cpu_reg].b[6] += src.b[6]; + MM[cpu_reg].b[7] += src.b[7]; return 0; } @@ -45,10 +45,10 @@ static int opPADDW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] += src.w[0]; - MM[reg].w[1] += src.w[1]; - MM[reg].w[2] += src.w[2]; - MM[reg].w[3] += src.w[3]; + MM[cpu_reg].w[0] += src.w[0]; + MM[cpu_reg].w[1] += src.w[1]; + MM[cpu_reg].w[2] += src.w[2]; + MM[cpu_reg].w[3] += src.w[3]; return 0; } @@ -60,10 +60,10 @@ static int opPADDW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] += src.w[0]; - MM[reg].w[1] += src.w[1]; - MM[reg].w[2] += src.w[2]; - MM[reg].w[3] += src.w[3]; + MM[cpu_reg].w[0] += src.w[0]; + MM[cpu_reg].w[1] += src.w[1]; + MM[cpu_reg].w[2] += src.w[2]; + MM[cpu_reg].w[3] += src.w[3]; return 0; } @@ -76,8 +76,8 @@ static int opPADDD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] += src.l[0]; - MM[reg].l[1] += src.l[1]; + MM[cpu_reg].l[0] += src.l[0]; + MM[cpu_reg].l[1] += src.l[1]; return 0; } @@ -89,8 +89,8 @@ static int opPADDD_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].l[0] += src.l[0]; - MM[reg].l[1] += src.l[1]; + MM[cpu_reg].l[0] += src.l[0]; + MM[cpu_reg].l[1] += src.l[1]; return 0; } @@ -103,14 +103,14 @@ static int opPADDSB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].sb[0] = SSATB(MM[reg].sb[0] + src.sb[0]); - MM[reg].sb[1] = SSATB(MM[reg].sb[1] + src.sb[1]); - MM[reg].sb[2] = SSATB(MM[reg].sb[2] + src.sb[2]); - MM[reg].sb[3] = SSATB(MM[reg].sb[3] + src.sb[3]); - MM[reg].sb[4] = SSATB(MM[reg].sb[4] + src.sb[4]); - MM[reg].sb[5] = SSATB(MM[reg].sb[5] + src.sb[5]); - MM[reg].sb[6] = SSATB(MM[reg].sb[6] + src.sb[6]); - MM[reg].sb[7] = SSATB(MM[reg].sb[7] + src.sb[7]); + MM[cpu_reg].sb[0] = SSATB(MM[cpu_reg].sb[0] + src.sb[0]); + MM[cpu_reg].sb[1] = SSATB(MM[cpu_reg].sb[1] + src.sb[1]); + MM[cpu_reg].sb[2] = SSATB(MM[cpu_reg].sb[2] + src.sb[2]); + MM[cpu_reg].sb[3] = SSATB(MM[cpu_reg].sb[3] + src.sb[3]); + MM[cpu_reg].sb[4] = SSATB(MM[cpu_reg].sb[4] + src.sb[4]); + MM[cpu_reg].sb[5] = SSATB(MM[cpu_reg].sb[5] + src.sb[5]); + MM[cpu_reg].sb[6] = SSATB(MM[cpu_reg].sb[6] + src.sb[6]); + MM[cpu_reg].sb[7] = SSATB(MM[cpu_reg].sb[7] + src.sb[7]); return 0; } @@ -122,14 +122,14 @@ static int opPADDSB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].sb[0] = SSATB(MM[reg].sb[0] + src.sb[0]); - MM[reg].sb[1] = SSATB(MM[reg].sb[1] + src.sb[1]); - MM[reg].sb[2] = SSATB(MM[reg].sb[2] + src.sb[2]); - MM[reg].sb[3] = SSATB(MM[reg].sb[3] + src.sb[3]); - MM[reg].sb[4] = SSATB(MM[reg].sb[4] + src.sb[4]); - MM[reg].sb[5] = SSATB(MM[reg].sb[5] + src.sb[5]); - MM[reg].sb[6] = SSATB(MM[reg].sb[6] + src.sb[6]); - MM[reg].sb[7] = SSATB(MM[reg].sb[7] + src.sb[7]); + MM[cpu_reg].sb[0] = SSATB(MM[cpu_reg].sb[0] + src.sb[0]); + MM[cpu_reg].sb[1] = SSATB(MM[cpu_reg].sb[1] + src.sb[1]); + MM[cpu_reg].sb[2] = SSATB(MM[cpu_reg].sb[2] + src.sb[2]); + MM[cpu_reg].sb[3] = SSATB(MM[cpu_reg].sb[3] + src.sb[3]); + MM[cpu_reg].sb[4] = SSATB(MM[cpu_reg].sb[4] + src.sb[4]); + MM[cpu_reg].sb[5] = SSATB(MM[cpu_reg].sb[5] + src.sb[5]); + MM[cpu_reg].sb[6] = SSATB(MM[cpu_reg].sb[6] + src.sb[6]); + MM[cpu_reg].sb[7] = SSATB(MM[cpu_reg].sb[7] + src.sb[7]); return 0; } @@ -142,14 +142,14 @@ static int opPADDUSB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = USATB(MM[reg].b[0] + src.b[0]); - MM[reg].b[1] = USATB(MM[reg].b[1] + src.b[1]); - MM[reg].b[2] = USATB(MM[reg].b[2] + src.b[2]); - MM[reg].b[3] = USATB(MM[reg].b[3] + src.b[3]); - MM[reg].b[4] = USATB(MM[reg].b[4] + src.b[4]); - MM[reg].b[5] = USATB(MM[reg].b[5] + src.b[5]); - MM[reg].b[6] = USATB(MM[reg].b[6] + src.b[6]); - MM[reg].b[7] = USATB(MM[reg].b[7] + src.b[7]); + MM[cpu_reg].b[0] = USATB(MM[cpu_reg].b[0] + src.b[0]); + MM[cpu_reg].b[1] = USATB(MM[cpu_reg].b[1] + src.b[1]); + MM[cpu_reg].b[2] = USATB(MM[cpu_reg].b[2] + src.b[2]); + MM[cpu_reg].b[3] = USATB(MM[cpu_reg].b[3] + src.b[3]); + MM[cpu_reg].b[4] = USATB(MM[cpu_reg].b[4] + src.b[4]); + MM[cpu_reg].b[5] = USATB(MM[cpu_reg].b[5] + src.b[5]); + MM[cpu_reg].b[6] = USATB(MM[cpu_reg].b[6] + src.b[6]); + MM[cpu_reg].b[7] = USATB(MM[cpu_reg].b[7] + src.b[7]); return 0; } @@ -161,14 +161,14 @@ static int opPADDUSB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = USATB(MM[reg].b[0] + src.b[0]); - MM[reg].b[1] = USATB(MM[reg].b[1] + src.b[1]); - MM[reg].b[2] = USATB(MM[reg].b[2] + src.b[2]); - MM[reg].b[3] = USATB(MM[reg].b[3] + src.b[3]); - MM[reg].b[4] = USATB(MM[reg].b[4] + src.b[4]); - MM[reg].b[5] = USATB(MM[reg].b[5] + src.b[5]); - MM[reg].b[6] = USATB(MM[reg].b[6] + src.b[6]); - MM[reg].b[7] = USATB(MM[reg].b[7] + src.b[7]); + MM[cpu_reg].b[0] = USATB(MM[cpu_reg].b[0] + src.b[0]); + MM[cpu_reg].b[1] = USATB(MM[cpu_reg].b[1] + src.b[1]); + MM[cpu_reg].b[2] = USATB(MM[cpu_reg].b[2] + src.b[2]); + MM[cpu_reg].b[3] = USATB(MM[cpu_reg].b[3] + src.b[3]); + MM[cpu_reg].b[4] = USATB(MM[cpu_reg].b[4] + src.b[4]); + MM[cpu_reg].b[5] = USATB(MM[cpu_reg].b[5] + src.b[5]); + MM[cpu_reg].b[6] = USATB(MM[cpu_reg].b[6] + src.b[6]); + MM[cpu_reg].b[7] = USATB(MM[cpu_reg].b[7] + src.b[7]); return 0; } @@ -181,10 +181,10 @@ static int opPADDSW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].sw[0] = SSATW(MM[reg].sw[0] + src.sw[0]); - MM[reg].sw[1] = SSATW(MM[reg].sw[1] + src.sw[1]); - MM[reg].sw[2] = SSATW(MM[reg].sw[2] + src.sw[2]); - MM[reg].sw[3] = SSATW(MM[reg].sw[3] + src.sw[3]); + MM[cpu_reg].sw[0] = SSATW(MM[cpu_reg].sw[0] + src.sw[0]); + MM[cpu_reg].sw[1] = SSATW(MM[cpu_reg].sw[1] + src.sw[1]); + MM[cpu_reg].sw[2] = SSATW(MM[cpu_reg].sw[2] + src.sw[2]); + MM[cpu_reg].sw[3] = SSATW(MM[cpu_reg].sw[3] + src.sw[3]); return 0; } @@ -196,10 +196,10 @@ static int opPADDSW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].sw[0] = SSATW(MM[reg].sw[0] + src.sw[0]); - MM[reg].sw[1] = SSATW(MM[reg].sw[1] + src.sw[1]); - MM[reg].sw[2] = SSATW(MM[reg].sw[2] + src.sw[2]); - MM[reg].sw[3] = SSATW(MM[reg].sw[3] + src.sw[3]); + MM[cpu_reg].sw[0] = SSATW(MM[cpu_reg].sw[0] + src.sw[0]); + MM[cpu_reg].sw[1] = SSATW(MM[cpu_reg].sw[1] + src.sw[1]); + MM[cpu_reg].sw[2] = SSATW(MM[cpu_reg].sw[2] + src.sw[2]); + MM[cpu_reg].sw[3] = SSATW(MM[cpu_reg].sw[3] + src.sw[3]); return 0; } @@ -212,10 +212,10 @@ static int opPADDUSW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = USATW(MM[reg].w[0] + src.w[0]); - MM[reg].w[1] = USATW(MM[reg].w[1] + src.w[1]); - MM[reg].w[2] = USATW(MM[reg].w[2] + src.w[2]); - MM[reg].w[3] = USATW(MM[reg].w[3] + src.w[3]); + MM[cpu_reg].w[0] = USATW(MM[cpu_reg].w[0] + src.w[0]); + MM[cpu_reg].w[1] = USATW(MM[cpu_reg].w[1] + src.w[1]); + MM[cpu_reg].w[2] = USATW(MM[cpu_reg].w[2] + src.w[2]); + MM[cpu_reg].w[3] = USATW(MM[cpu_reg].w[3] + src.w[3]); return 0; } @@ -227,10 +227,10 @@ static int opPADDUSW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = USATW(MM[reg].w[0] + src.w[0]); - MM[reg].w[1] = USATW(MM[reg].w[1] + src.w[1]); - MM[reg].w[2] = USATW(MM[reg].w[2] + src.w[2]); - MM[reg].w[3] = USATW(MM[reg].w[3] + src.w[3]); + MM[cpu_reg].w[0] = USATW(MM[cpu_reg].w[0] + src.w[0]); + MM[cpu_reg].w[1] = USATW(MM[cpu_reg].w[1] + src.w[1]); + MM[cpu_reg].w[2] = USATW(MM[cpu_reg].w[2] + src.w[2]); + MM[cpu_reg].w[3] = USATW(MM[cpu_reg].w[3] + src.w[3]); return 0; } @@ -243,15 +243,15 @@ static int opPMADDWD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - if (MM[reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) - MM[reg].l[0] = 0x80000000; + if (MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) + MM[cpu_reg].l[0] = 0x80000000; else - MM[reg].sl[0] = ((int32_t)MM[reg].sw[0] * (int32_t)src.sw[0]) + ((int32_t)MM[reg].sw[1] * (int32_t)src.sw[1]); + MM[cpu_reg].sl[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)src.sw[0]) + ((int32_t)MM[cpu_reg].sw[1] * (int32_t)src.sw[1]); - if (MM[reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) - MM[reg].l[1] = 0x80000000; + if (MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) + MM[cpu_reg].l[1] = 0x80000000; else - MM[reg].sl[1] = ((int32_t)MM[reg].sw[2] * (int32_t)src.sw[2]) + ((int32_t)MM[reg].sw[3] * (int32_t)src.sw[3]); + MM[cpu_reg].sl[1] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)src.sw[2]) + ((int32_t)MM[cpu_reg].sw[3] * (int32_t)src.sw[3]); return 0; } @@ -263,15 +263,15 @@ static int opPMADDWD_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - if (MM[reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) - MM[reg].l[0] = 0x80000000; + if (MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) + MM[cpu_reg].l[0] = 0x80000000; else - MM[reg].sl[0] = ((int32_t)MM[reg].sw[0] * (int32_t)src.sw[0]) + ((int32_t)MM[reg].sw[1] * (int32_t)src.sw[1]); + MM[cpu_reg].sl[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)src.sw[0]) + ((int32_t)MM[cpu_reg].sw[1] * (int32_t)src.sw[1]); - if (MM[reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) - MM[reg].l[1] = 0x80000000; + if (MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) + MM[cpu_reg].l[1] = 0x80000000; else - MM[reg].sl[1] = ((int32_t)MM[reg].sw[2] * (int32_t)src.sw[2]) + ((int32_t)MM[reg].sw[3] * (int32_t)src.sw[3]); + MM[cpu_reg].sl[1] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)src.sw[2]) + ((int32_t)MM[cpu_reg].sw[3] * (int32_t)src.sw[3]); return 0; } @@ -282,12 +282,12 @@ static int opPMULLW_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].w[0] *= MM[rm].w[0]; - MM[reg].w[1] *= MM[rm].w[1]; - MM[reg].w[2] *= MM[rm].w[2]; - MM[reg].w[3] *= MM[rm].w[3]; + MM[cpu_reg].w[0] *= MM[cpu_rm].w[0]; + MM[cpu_reg].w[1] *= MM[cpu_rm].w[1]; + MM[cpu_reg].w[2] *= MM[cpu_rm].w[2]; + MM[cpu_reg].w[3] *= MM[cpu_rm].w[3]; CLOCK_CYCLES(1); } else @@ -296,10 +296,10 @@ static int opPMULLW_a16(uint32_t fetchdat) src.l[0] = readmeml(easeg, eaaddr); src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; - MM[reg].w[0] *= src.w[0]; - MM[reg].w[1] *= src.w[1]; - MM[reg].w[2] *= src.w[2]; - MM[reg].w[3] *= src.w[3]; + MM[cpu_reg].w[0] *= src.w[0]; + MM[cpu_reg].w[1] *= src.w[1]; + MM[cpu_reg].w[2] *= src.w[2]; + MM[cpu_reg].w[3] *= src.w[3]; CLOCK_CYCLES(2); } return 0; @@ -309,12 +309,12 @@ static int opPMULLW_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].w[0] *= MM[rm].w[0]; - MM[reg].w[1] *= MM[rm].w[1]; - MM[reg].w[2] *= MM[rm].w[2]; - MM[reg].w[3] *= MM[rm].w[3]; + MM[cpu_reg].w[0] *= MM[cpu_rm].w[0]; + MM[cpu_reg].w[1] *= MM[cpu_rm].w[1]; + MM[cpu_reg].w[2] *= MM[cpu_rm].w[2]; + MM[cpu_reg].w[3] *= MM[cpu_rm].w[3]; CLOCK_CYCLES(1); } else @@ -323,10 +323,10 @@ static int opPMULLW_a32(uint32_t fetchdat) src.l[0] = readmeml(easeg, eaaddr); src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; - MM[reg].w[0] *= src.w[0]; - MM[reg].w[1] *= src.w[1]; - MM[reg].w[2] *= src.w[2]; - MM[reg].w[3] *= src.w[3]; + MM[cpu_reg].w[0] *= src.w[0]; + MM[cpu_reg].w[1] *= src.w[1]; + MM[cpu_reg].w[2] *= src.w[2]; + MM[cpu_reg].w[3] *= src.w[3]; CLOCK_CYCLES(2); } return 0; @@ -337,12 +337,12 @@ static int opPMULHW_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].w[0] = ((int32_t)MM[reg].sw[0] * (int32_t)MM[rm].sw[0]) >> 16; - MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)MM[rm].sw[1]) >> 16; - MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)MM[rm].sw[2]) >> 16; - MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)MM[rm].sw[3]) >> 16; + MM[cpu_reg].w[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)MM[cpu_rm].sw[0]) >> 16; + MM[cpu_reg].w[1] = ((int32_t)MM[cpu_reg].sw[1] * (int32_t)MM[cpu_rm].sw[1]) >> 16; + MM[cpu_reg].w[2] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)MM[cpu_rm].sw[2]) >> 16; + MM[cpu_reg].w[3] = ((int32_t)MM[cpu_reg].sw[3] * (int32_t)MM[cpu_rm].sw[3]) >> 16; CLOCK_CYCLES(1); } else @@ -351,10 +351,10 @@ static int opPMULHW_a16(uint32_t fetchdat) src.l[0] = readmeml(easeg, eaaddr); src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; - MM[reg].w[0] = ((int32_t)MM[reg].sw[0] * (int32_t)src.sw[0]) >> 16; - MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)src.sw[1]) >> 16; - MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)src.sw[2]) >> 16; - MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)src.sw[3]) >> 16; + MM[cpu_reg].w[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)src.sw[0]) >> 16; + MM[cpu_reg].w[1] = ((int32_t)MM[cpu_reg].sw[1] * (int32_t)src.sw[1]) >> 16; + MM[cpu_reg].w[2] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)src.sw[2]) >> 16; + MM[cpu_reg].w[3] = ((int32_t)MM[cpu_reg].sw[3] * (int32_t)src.sw[3]) >> 16; CLOCK_CYCLES(2); } return 0; @@ -364,12 +364,12 @@ static int opPMULHW_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].w[0] = ((int32_t)MM[reg].sw[0] * (int32_t)MM[rm].sw[0]) >> 16; - MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)MM[rm].sw[1]) >> 16; - MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)MM[rm].sw[2]) >> 16; - MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)MM[rm].sw[3]) >> 16; + MM[cpu_reg].w[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)MM[cpu_rm].sw[0]) >> 16; + MM[cpu_reg].w[1] = ((int32_t)MM[cpu_reg].sw[1] * (int32_t)MM[cpu_rm].sw[1]) >> 16; + MM[cpu_reg].w[2] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)MM[cpu_rm].sw[2]) >> 16; + MM[cpu_reg].w[3] = ((int32_t)MM[cpu_reg].sw[3] * (int32_t)MM[cpu_rm].sw[3]) >> 16; CLOCK_CYCLES(1); } else @@ -378,10 +378,10 @@ static int opPMULHW_a32(uint32_t fetchdat) src.l[0] = readmeml(easeg, eaaddr); src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 0; - MM[reg].w[0] = ((int32_t)MM[reg].sw[0] * (int32_t)src.sw[0]) >> 16; - MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)src.sw[1]) >> 16; - MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)src.sw[2]) >> 16; - MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)src.sw[3]) >> 16; + MM[cpu_reg].w[0] = ((int32_t)MM[cpu_reg].sw[0] * (int32_t)src.sw[0]) >> 16; + MM[cpu_reg].w[1] = ((int32_t)MM[cpu_reg].sw[1] * (int32_t)src.sw[1]) >> 16; + MM[cpu_reg].w[2] = ((int32_t)MM[cpu_reg].sw[2] * (int32_t)src.sw[2]) >> 16; + MM[cpu_reg].w[3] = ((int32_t)MM[cpu_reg].sw[3] * (int32_t)src.sw[3]) >> 16; CLOCK_CYCLES(2); } return 0; @@ -395,14 +395,14 @@ static int opPSUBB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] -= src.b[0]; - MM[reg].b[1] -= src.b[1]; - MM[reg].b[2] -= src.b[2]; - MM[reg].b[3] -= src.b[3]; - MM[reg].b[4] -= src.b[4]; - MM[reg].b[5] -= src.b[5]; - MM[reg].b[6] -= src.b[6]; - MM[reg].b[7] -= src.b[7]; + MM[cpu_reg].b[0] -= src.b[0]; + MM[cpu_reg].b[1] -= src.b[1]; + MM[cpu_reg].b[2] -= src.b[2]; + MM[cpu_reg].b[3] -= src.b[3]; + MM[cpu_reg].b[4] -= src.b[4]; + MM[cpu_reg].b[5] -= src.b[5]; + MM[cpu_reg].b[6] -= src.b[6]; + MM[cpu_reg].b[7] -= src.b[7]; return 0; } @@ -414,14 +414,14 @@ static int opPSUBB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] -= src.b[0]; - MM[reg].b[1] -= src.b[1]; - MM[reg].b[2] -= src.b[2]; - MM[reg].b[3] -= src.b[3]; - MM[reg].b[4] -= src.b[4]; - MM[reg].b[5] -= src.b[5]; - MM[reg].b[6] -= src.b[6]; - MM[reg].b[7] -= src.b[7]; + MM[cpu_reg].b[0] -= src.b[0]; + MM[cpu_reg].b[1] -= src.b[1]; + MM[cpu_reg].b[2] -= src.b[2]; + MM[cpu_reg].b[3] -= src.b[3]; + MM[cpu_reg].b[4] -= src.b[4]; + MM[cpu_reg].b[5] -= src.b[5]; + MM[cpu_reg].b[6] -= src.b[6]; + MM[cpu_reg].b[7] -= src.b[7]; return 0; } @@ -434,10 +434,10 @@ static int opPSUBW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] -= src.w[0]; - MM[reg].w[1] -= src.w[1]; - MM[reg].w[2] -= src.w[2]; - MM[reg].w[3] -= src.w[3]; + MM[cpu_reg].w[0] -= src.w[0]; + MM[cpu_reg].w[1] -= src.w[1]; + MM[cpu_reg].w[2] -= src.w[2]; + MM[cpu_reg].w[3] -= src.w[3]; return 0; } @@ -449,10 +449,10 @@ static int opPSUBW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] -= src.w[0]; - MM[reg].w[1] -= src.w[1]; - MM[reg].w[2] -= src.w[2]; - MM[reg].w[3] -= src.w[3]; + MM[cpu_reg].w[0] -= src.w[0]; + MM[cpu_reg].w[1] -= src.w[1]; + MM[cpu_reg].w[2] -= src.w[2]; + MM[cpu_reg].w[3] -= src.w[3]; return 0; } @@ -465,8 +465,8 @@ static int opPSUBD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] -= src.l[0]; - MM[reg].l[1] -= src.l[1]; + MM[cpu_reg].l[0] -= src.l[0]; + MM[cpu_reg].l[1] -= src.l[1]; return 0; } @@ -478,8 +478,8 @@ static int opPSUBD_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].l[0] -= src.l[0]; - MM[reg].l[1] -= src.l[1]; + MM[cpu_reg].l[0] -= src.l[0]; + MM[cpu_reg].l[1] -= src.l[1]; return 0; } @@ -492,14 +492,14 @@ static int opPSUBSB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].sb[0] = SSATB(MM[reg].sb[0] - src.sb[0]); - MM[reg].sb[1] = SSATB(MM[reg].sb[1] - src.sb[1]); - MM[reg].sb[2] = SSATB(MM[reg].sb[2] - src.sb[2]); - MM[reg].sb[3] = SSATB(MM[reg].sb[3] - src.sb[3]); - MM[reg].sb[4] = SSATB(MM[reg].sb[4] - src.sb[4]); - MM[reg].sb[5] = SSATB(MM[reg].sb[5] - src.sb[5]); - MM[reg].sb[6] = SSATB(MM[reg].sb[6] - src.sb[6]); - MM[reg].sb[7] = SSATB(MM[reg].sb[7] - src.sb[7]); + MM[cpu_reg].sb[0] = SSATB(MM[cpu_reg].sb[0] - src.sb[0]); + MM[cpu_reg].sb[1] = SSATB(MM[cpu_reg].sb[1] - src.sb[1]); + MM[cpu_reg].sb[2] = SSATB(MM[cpu_reg].sb[2] - src.sb[2]); + MM[cpu_reg].sb[3] = SSATB(MM[cpu_reg].sb[3] - src.sb[3]); + MM[cpu_reg].sb[4] = SSATB(MM[cpu_reg].sb[4] - src.sb[4]); + MM[cpu_reg].sb[5] = SSATB(MM[cpu_reg].sb[5] - src.sb[5]); + MM[cpu_reg].sb[6] = SSATB(MM[cpu_reg].sb[6] - src.sb[6]); + MM[cpu_reg].sb[7] = SSATB(MM[cpu_reg].sb[7] - src.sb[7]); return 0; } @@ -511,14 +511,14 @@ static int opPSUBSB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].sb[0] = SSATB(MM[reg].sb[0] - src.sb[0]); - MM[reg].sb[1] = SSATB(MM[reg].sb[1] - src.sb[1]); - MM[reg].sb[2] = SSATB(MM[reg].sb[2] - src.sb[2]); - MM[reg].sb[3] = SSATB(MM[reg].sb[3] - src.sb[3]); - MM[reg].sb[4] = SSATB(MM[reg].sb[4] - src.sb[4]); - MM[reg].sb[5] = SSATB(MM[reg].sb[5] - src.sb[5]); - MM[reg].sb[6] = SSATB(MM[reg].sb[6] - src.sb[6]); - MM[reg].sb[7] = SSATB(MM[reg].sb[7] - src.sb[7]); + MM[cpu_reg].sb[0] = SSATB(MM[cpu_reg].sb[0] - src.sb[0]); + MM[cpu_reg].sb[1] = SSATB(MM[cpu_reg].sb[1] - src.sb[1]); + MM[cpu_reg].sb[2] = SSATB(MM[cpu_reg].sb[2] - src.sb[2]); + MM[cpu_reg].sb[3] = SSATB(MM[cpu_reg].sb[3] - src.sb[3]); + MM[cpu_reg].sb[4] = SSATB(MM[cpu_reg].sb[4] - src.sb[4]); + MM[cpu_reg].sb[5] = SSATB(MM[cpu_reg].sb[5] - src.sb[5]); + MM[cpu_reg].sb[6] = SSATB(MM[cpu_reg].sb[6] - src.sb[6]); + MM[cpu_reg].sb[7] = SSATB(MM[cpu_reg].sb[7] - src.sb[7]); return 0; } @@ -531,14 +531,14 @@ static int opPSUBUSB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = USATB(MM[reg].b[0] - src.b[0]); - MM[reg].b[1] = USATB(MM[reg].b[1] - src.b[1]); - MM[reg].b[2] = USATB(MM[reg].b[2] - src.b[2]); - MM[reg].b[3] = USATB(MM[reg].b[3] - src.b[3]); - MM[reg].b[4] = USATB(MM[reg].b[4] - src.b[4]); - MM[reg].b[5] = USATB(MM[reg].b[5] - src.b[5]); - MM[reg].b[6] = USATB(MM[reg].b[6] - src.b[6]); - MM[reg].b[7] = USATB(MM[reg].b[7] - src.b[7]); + MM[cpu_reg].b[0] = USATB(MM[cpu_reg].b[0] - src.b[0]); + MM[cpu_reg].b[1] = USATB(MM[cpu_reg].b[1] - src.b[1]); + MM[cpu_reg].b[2] = USATB(MM[cpu_reg].b[2] - src.b[2]); + MM[cpu_reg].b[3] = USATB(MM[cpu_reg].b[3] - src.b[3]); + MM[cpu_reg].b[4] = USATB(MM[cpu_reg].b[4] - src.b[4]); + MM[cpu_reg].b[5] = USATB(MM[cpu_reg].b[5] - src.b[5]); + MM[cpu_reg].b[6] = USATB(MM[cpu_reg].b[6] - src.b[6]); + MM[cpu_reg].b[7] = USATB(MM[cpu_reg].b[7] - src.b[7]); return 0; } @@ -550,14 +550,14 @@ static int opPSUBUSB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = USATB(MM[reg].b[0] - src.b[0]); - MM[reg].b[1] = USATB(MM[reg].b[1] - src.b[1]); - MM[reg].b[2] = USATB(MM[reg].b[2] - src.b[2]); - MM[reg].b[3] = USATB(MM[reg].b[3] - src.b[3]); - MM[reg].b[4] = USATB(MM[reg].b[4] - src.b[4]); - MM[reg].b[5] = USATB(MM[reg].b[5] - src.b[5]); - MM[reg].b[6] = USATB(MM[reg].b[6] - src.b[6]); - MM[reg].b[7] = USATB(MM[reg].b[7] - src.b[7]); + MM[cpu_reg].b[0] = USATB(MM[cpu_reg].b[0] - src.b[0]); + MM[cpu_reg].b[1] = USATB(MM[cpu_reg].b[1] - src.b[1]); + MM[cpu_reg].b[2] = USATB(MM[cpu_reg].b[2] - src.b[2]); + MM[cpu_reg].b[3] = USATB(MM[cpu_reg].b[3] - src.b[3]); + MM[cpu_reg].b[4] = USATB(MM[cpu_reg].b[4] - src.b[4]); + MM[cpu_reg].b[5] = USATB(MM[cpu_reg].b[5] - src.b[5]); + MM[cpu_reg].b[6] = USATB(MM[cpu_reg].b[6] - src.b[6]); + MM[cpu_reg].b[7] = USATB(MM[cpu_reg].b[7] - src.b[7]); return 0; } @@ -570,10 +570,10 @@ static int opPSUBSW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].sw[0] = SSATW(MM[reg].sw[0] - src.sw[0]); - MM[reg].sw[1] = SSATW(MM[reg].sw[1] - src.sw[1]); - MM[reg].sw[2] = SSATW(MM[reg].sw[2] - src.sw[2]); - MM[reg].sw[3] = SSATW(MM[reg].sw[3] - src.sw[3]); + MM[cpu_reg].sw[0] = SSATW(MM[cpu_reg].sw[0] - src.sw[0]); + MM[cpu_reg].sw[1] = SSATW(MM[cpu_reg].sw[1] - src.sw[1]); + MM[cpu_reg].sw[2] = SSATW(MM[cpu_reg].sw[2] - src.sw[2]); + MM[cpu_reg].sw[3] = SSATW(MM[cpu_reg].sw[3] - src.sw[3]); return 0; } @@ -585,10 +585,10 @@ static int opPSUBSW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].sw[0] = SSATW(MM[reg].sw[0] - src.sw[0]); - MM[reg].sw[1] = SSATW(MM[reg].sw[1] - src.sw[1]); - MM[reg].sw[2] = SSATW(MM[reg].sw[2] - src.sw[2]); - MM[reg].sw[3] = SSATW(MM[reg].sw[3] - src.sw[3]); + MM[cpu_reg].sw[0] = SSATW(MM[cpu_reg].sw[0] - src.sw[0]); + MM[cpu_reg].sw[1] = SSATW(MM[cpu_reg].sw[1] - src.sw[1]); + MM[cpu_reg].sw[2] = SSATW(MM[cpu_reg].sw[2] - src.sw[2]); + MM[cpu_reg].sw[3] = SSATW(MM[cpu_reg].sw[3] - src.sw[3]); return 0; } @@ -601,10 +601,10 @@ static int opPSUBUSW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = USATW(MM[reg].w[0] - src.w[0]); - MM[reg].w[1] = USATW(MM[reg].w[1] - src.w[1]); - MM[reg].w[2] = USATW(MM[reg].w[2] - src.w[2]); - MM[reg].w[3] = USATW(MM[reg].w[3] - src.w[3]); + MM[cpu_reg].w[0] = USATW(MM[cpu_reg].w[0] - src.w[0]); + MM[cpu_reg].w[1] = USATW(MM[cpu_reg].w[1] - src.w[1]); + MM[cpu_reg].w[2] = USATW(MM[cpu_reg].w[2] - src.w[2]); + MM[cpu_reg].w[3] = USATW(MM[cpu_reg].w[3] - src.w[3]); return 0; } @@ -616,10 +616,10 @@ static int opPSUBUSW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = USATW(MM[reg].w[0] - src.w[0]); - MM[reg].w[1] = USATW(MM[reg].w[1] - src.w[1]); - MM[reg].w[2] = USATW(MM[reg].w[2] - src.w[2]); - MM[reg].w[3] = USATW(MM[reg].w[3] - src.w[3]); + MM[cpu_reg].w[0] = USATW(MM[cpu_reg].w[0] - src.w[0]); + MM[cpu_reg].w[1] = USATW(MM[cpu_reg].w[1] - src.w[1]); + MM[cpu_reg].w[2] = USATW(MM[cpu_reg].w[2] - src.w[2]); + MM[cpu_reg].w[3] = USATW(MM[cpu_reg].w[3] - src.w[3]); return 0; } diff --git a/src/x86_ops_mmx_cmp.h b/src/x86_ops_mmx_cmp.h index 5fe3fc5ab..04c16bf1d 100644 --- a/src/x86_ops_mmx_cmp.h +++ b/src/x86_ops_mmx_cmp.h @@ -7,14 +7,14 @@ static int opPCMPEQB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = (MM[reg].b[0] == src.b[0]) ? 0xff : 0; - MM[reg].b[1] = (MM[reg].b[1] == src.b[1]) ? 0xff : 0; - MM[reg].b[2] = (MM[reg].b[2] == src.b[2]) ? 0xff : 0; - MM[reg].b[3] = (MM[reg].b[3] == src.b[3]) ? 0xff : 0; - MM[reg].b[4] = (MM[reg].b[4] == src.b[4]) ? 0xff : 0; - MM[reg].b[5] = (MM[reg].b[5] == src.b[5]) ? 0xff : 0; - MM[reg].b[6] = (MM[reg].b[6] == src.b[6]) ? 0xff : 0; - MM[reg].b[7] = (MM[reg].b[7] == src.b[7]) ? 0xff : 0; + MM[cpu_reg].b[0] = (MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; + MM[cpu_reg].b[1] = (MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; + MM[cpu_reg].b[2] = (MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; + MM[cpu_reg].b[3] = (MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; + MM[cpu_reg].b[4] = (MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; + MM[cpu_reg].b[5] = (MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; + MM[cpu_reg].b[6] = (MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; + MM[cpu_reg].b[7] = (MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; return 0; } @@ -27,14 +27,14 @@ static int opPCMPEQB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = (MM[reg].b[0] == src.b[0]) ? 0xff : 0; - MM[reg].b[1] = (MM[reg].b[1] == src.b[1]) ? 0xff : 0; - MM[reg].b[2] = (MM[reg].b[2] == src.b[2]) ? 0xff : 0; - MM[reg].b[3] = (MM[reg].b[3] == src.b[3]) ? 0xff : 0; - MM[reg].b[4] = (MM[reg].b[4] == src.b[4]) ? 0xff : 0; - MM[reg].b[5] = (MM[reg].b[5] == src.b[5]) ? 0xff : 0; - MM[reg].b[6] = (MM[reg].b[6] == src.b[6]) ? 0xff : 0; - MM[reg].b[7] = (MM[reg].b[7] == src.b[7]) ? 0xff : 0; + MM[cpu_reg].b[0] = (MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; + MM[cpu_reg].b[1] = (MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; + MM[cpu_reg].b[2] = (MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; + MM[cpu_reg].b[3] = (MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; + MM[cpu_reg].b[4] = (MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; + MM[cpu_reg].b[5] = (MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; + MM[cpu_reg].b[6] = (MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; + MM[cpu_reg].b[7] = (MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; return 0; } @@ -48,14 +48,14 @@ static int opPCMPGTB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = (MM[reg].sb[0] > src.sb[0]) ? 0xff : 0; - MM[reg].b[1] = (MM[reg].sb[1] > src.sb[1]) ? 0xff : 0; - MM[reg].b[2] = (MM[reg].sb[2] > src.sb[2]) ? 0xff : 0; - MM[reg].b[3] = (MM[reg].sb[3] > src.sb[3]) ? 0xff : 0; - MM[reg].b[4] = (MM[reg].sb[4] > src.sb[4]) ? 0xff : 0; - MM[reg].b[5] = (MM[reg].sb[5] > src.sb[5]) ? 0xff : 0; - MM[reg].b[6] = (MM[reg].sb[6] > src.sb[6]) ? 0xff : 0; - MM[reg].b[7] = (MM[reg].sb[7] > src.sb[7]) ? 0xff : 0; + MM[cpu_reg].b[0] = (MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0; + MM[cpu_reg].b[1] = (MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0; + MM[cpu_reg].b[2] = (MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0; + MM[cpu_reg].b[3] = (MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0; + MM[cpu_reg].b[4] = (MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0; + MM[cpu_reg].b[5] = (MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0; + MM[cpu_reg].b[6] = (MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0; + MM[cpu_reg].b[7] = (MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0; return 0; } @@ -68,14 +68,14 @@ static int opPCMPGTB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = (MM[reg].sb[0] > src.sb[0]) ? 0xff : 0; - MM[reg].b[1] = (MM[reg].sb[1] > src.sb[1]) ? 0xff : 0; - MM[reg].b[2] = (MM[reg].sb[2] > src.sb[2]) ? 0xff : 0; - MM[reg].b[3] = (MM[reg].sb[3] > src.sb[3]) ? 0xff : 0; - MM[reg].b[4] = (MM[reg].sb[4] > src.sb[4]) ? 0xff : 0; - MM[reg].b[5] = (MM[reg].sb[5] > src.sb[5]) ? 0xff : 0; - MM[reg].b[6] = (MM[reg].sb[6] > src.sb[6]) ? 0xff : 0; - MM[reg].b[7] = (MM[reg].sb[7] > src.sb[7]) ? 0xff : 0; + MM[cpu_reg].b[0] = (MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0; + MM[cpu_reg].b[1] = (MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0; + MM[cpu_reg].b[2] = (MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0; + MM[cpu_reg].b[3] = (MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0; + MM[cpu_reg].b[4] = (MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0; + MM[cpu_reg].b[5] = (MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0; + MM[cpu_reg].b[6] = (MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0; + MM[cpu_reg].b[7] = (MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0; return 0; } @@ -89,10 +89,10 @@ static int opPCMPEQW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = (MM[reg].w[0] == src.w[0]) ? 0xffff : 0; - MM[reg].w[1] = (MM[reg].w[1] == src.w[1]) ? 0xffff : 0; - MM[reg].w[2] = (MM[reg].w[2] == src.w[2]) ? 0xffff : 0; - MM[reg].w[3] = (MM[reg].w[3] == src.w[3]) ? 0xffff : 0; + MM[cpu_reg].w[0] = (MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0; + MM[cpu_reg].w[1] = (MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0; + MM[cpu_reg].w[2] = (MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0; + MM[cpu_reg].w[3] = (MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0; return 0; } @@ -105,10 +105,10 @@ static int opPCMPEQW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = (MM[reg].w[0] == src.w[0]) ? 0xffff : 0; - MM[reg].w[1] = (MM[reg].w[1] == src.w[1]) ? 0xffff : 0; - MM[reg].w[2] = (MM[reg].w[2] == src.w[2]) ? 0xffff : 0; - MM[reg].w[3] = (MM[reg].w[3] == src.w[3]) ? 0xffff : 0; + MM[cpu_reg].w[0] = (MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0; + MM[cpu_reg].w[1] = (MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0; + MM[cpu_reg].w[2] = (MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0; + MM[cpu_reg].w[3] = (MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0; return 0; } @@ -122,10 +122,10 @@ static int opPCMPGTW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = (MM[reg].sw[0] > src.sw[0]) ? 0xffff : 0; - MM[reg].w[1] = (MM[reg].sw[1] > src.sw[1]) ? 0xffff : 0; - MM[reg].w[2] = (MM[reg].sw[2] > src.sw[2]) ? 0xffff : 0; - MM[reg].w[3] = (MM[reg].sw[3] > src.sw[3]) ? 0xffff : 0; + MM[cpu_reg].w[0] = (MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0; + MM[cpu_reg].w[1] = (MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0; + MM[cpu_reg].w[2] = (MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0; + MM[cpu_reg].w[3] = (MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0; return 0; } @@ -138,10 +138,10 @@ static int opPCMPGTW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = (MM[reg].sw[0] > src.sw[0]) ? 0xffff : 0; - MM[reg].w[1] = (MM[reg].sw[1] > src.sw[1]) ? 0xffff : 0; - MM[reg].w[2] = (MM[reg].sw[2] > src.sw[2]) ? 0xffff : 0; - MM[reg].w[3] = (MM[reg].sw[3] > src.sw[3]) ? 0xffff : 0; + MM[cpu_reg].w[0] = (MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0; + MM[cpu_reg].w[1] = (MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0; + MM[cpu_reg].w[2] = (MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0; + MM[cpu_reg].w[3] = (MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0; return 0; } @@ -155,8 +155,8 @@ static int opPCMPEQD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] = (MM[reg].l[0] == src.l[0]) ? 0xffffffff : 0; - MM[reg].l[1] = (MM[reg].l[1] == src.l[1]) ? 0xffffffff : 0; + MM[cpu_reg].l[0] = (MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0; + MM[cpu_reg].l[1] = (MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0; return 0; } @@ -169,8 +169,8 @@ static int opPCMPEQD_a32(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] = (MM[reg].l[0] == src.l[0]) ? 0xffffffff : 0; - MM[reg].l[1] = (MM[reg].l[1] == src.l[1]) ? 0xffffffff : 0; + MM[cpu_reg].l[0] = (MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0; + MM[cpu_reg].l[1] = (MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0; return 0; } @@ -184,8 +184,8 @@ static int opPCMPGTD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] = (MM[reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; - MM[reg].l[1] = (MM[reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; + MM[cpu_reg].l[0] = (MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; + MM[cpu_reg].l[1] = (MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; return 0; } @@ -198,8 +198,8 @@ static int opPCMPGTD_a32(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] = (MM[reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; - MM[reg].l[1] = (MM[reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; + MM[cpu_reg].l[0] = (MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; + MM[cpu_reg].l[1] = (MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; return 0; } diff --git a/src/x86_ops_mmx_logic.h b/src/x86_ops_mmx_logic.h index f6bb880b7..002a7bec8 100644 --- a/src/x86_ops_mmx_logic.h +++ b/src/x86_ops_mmx_logic.h @@ -6,7 +6,7 @@ static int opPAND_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].q &= src.q; + MM[cpu_reg].q &= src.q; return 0; } static int opPAND_a32(uint32_t fetchdat) @@ -17,7 +17,7 @@ static int opPAND_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].q &= src.q; + MM[cpu_reg].q &= src.q; return 0; } @@ -29,7 +29,7 @@ static int opPANDN_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].q = ~MM[reg].q & src.q; + MM[cpu_reg].q = ~MM[cpu_reg].q & src.q; return 0; } static int opPANDN_a32(uint32_t fetchdat) @@ -40,7 +40,7 @@ static int opPANDN_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].q = ~MM[reg].q & src.q; + MM[cpu_reg].q = ~MM[cpu_reg].q & src.q; return 0; } @@ -52,7 +52,7 @@ static int opPOR_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].q |= src.q; + MM[cpu_reg].q |= src.q; return 0; } static int opPOR_a32(uint32_t fetchdat) @@ -63,7 +63,7 @@ static int opPOR_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].q |= src.q; + MM[cpu_reg].q |= src.q; return 0; } @@ -75,7 +75,7 @@ static int opPXOR_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].q ^= src.q; + MM[cpu_reg].q ^= src.q; return 0; } static int opPXOR_a32(uint32_t fetchdat) @@ -86,6 +86,6 @@ static int opPXOR_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].q ^= src.q; + MM[cpu_reg].q ^= src.q; return 0; } diff --git a/src/x86_ops_mmx_mov.h b/src/x86_ops_mmx_mov.h index 4779ff6a3..cc4fc85a4 100644 --- a/src/x86_ops_mmx_mov.h +++ b/src/x86_ops_mmx_mov.h @@ -3,10 +3,10 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].l[0] = cpu_state.regs[rm].l; - MM[reg].l[1] = 0; + MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; + MM[cpu_reg].l[1] = 0; CLOCK_CYCLES(1); } else @@ -14,8 +14,8 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) uint32_t dst; dst = readmeml(easeg, eaaddr); if (abrt) return 1; - MM[reg].l[0] = dst; - MM[reg].l[1] = 0; + MM[cpu_reg].l[0] = dst; + MM[cpu_reg].l[1] = 0; CLOCK_CYCLES(2); } @@ -26,10 +26,10 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].l[0] = cpu_state.regs[rm].l; - MM[reg].l[1] = 0; + MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; + MM[cpu_reg].l[1] = 0; CLOCK_CYCLES(1); } else @@ -37,8 +37,8 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat) uint32_t dst; dst = readmeml(easeg, eaaddr); if (abrt) return 1; - MM[reg].l[0] = dst; - MM[reg].l[1] = 0; + MM[cpu_reg].l[0] = dst; + MM[cpu_reg].l[1] = 0; CLOCK_CYCLES(2); } @@ -50,15 +50,15 @@ static int opMOVD_mm_l_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[rm].l = MM[reg].l[0]; + cpu_state.regs[cpu_rm].l = MM[cpu_reg].l[0]; CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3); - writememl(easeg, eaaddr, MM[reg].l[0]); if (abrt) return 1; + writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; @@ -68,15 +68,15 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[rm].l = MM[reg].l[0]; + cpu_state.regs[cpu_rm].l = MM[cpu_reg].l[0]; CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3); - writememl(easeg, eaaddr, MM[reg].l[0]); if (abrt) return 1; + writememl(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; @@ -87,9 +87,9 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].q = MM[rm].q; + MM[cpu_reg].q = MM[cpu_rm].q; CLOCK_CYCLES(1); } else @@ -97,7 +97,7 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat) uint64_t dst; dst = readmemq(easeg, eaaddr); if (abrt) return 1; - MM[reg].q = dst; + MM[cpu_reg].q = dst; CLOCK_CYCLES(2); } return 0; @@ -107,9 +107,9 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].q = MM[rm].q; + MM[cpu_reg].q = MM[cpu_rm].q; CLOCK_CYCLES(1); } else @@ -117,7 +117,7 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat) uint64_t dst; dst = readmemq(easeg, eaaddr); if (abrt) return 1; - MM[reg].q = dst; + MM[cpu_reg].q = dst; CLOCK_CYCLES(2); } return 0; @@ -128,15 +128,15 @@ static int opMOVQ_mm_q_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[rm].q = MM[reg].q; + MM[cpu_rm].q = MM[cpu_reg].q; CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); - writememq(easeg, eaaddr, MM[reg].l[0]); if (abrt) return 1; + writememq(easeg, eaaddr, MM[cpu_reg].l[0]); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; @@ -146,15 +146,15 @@ static int opMOVQ_mm_q_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[rm].q = MM[reg].q; + MM[cpu_rm].q = MM[cpu_reg].q; CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); - writememq(easeg, eaaddr, MM[reg].q); if (abrt) return 1; + writememq(easeg, eaaddr, MM[cpu_reg].q); if (abrt) return 1; CLOCK_CYCLES(2); } return 0; diff --git a/src/x86_ops_mmx_pack.h b/src/x86_ops_mmx_pack.h index e9b84fbd3..55a7d2e85 100644 --- a/src/x86_ops_mmx_pack.h +++ b/src/x86_ops_mmx_pack.h @@ -3,9 +3,9 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) MMX_ENTER(); fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].l[1] = MM[rm].l[0]; + MM[cpu_reg].l[1] = MM[cpu_rm].l[0]; CLOCK_CYCLES(1); } else @@ -13,7 +13,7 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) uint32_t src; src = readmeml(easeg, eaaddr); if (abrt) return 0; - MM[reg].l[1] = src; + MM[cpu_reg].l[1] = src; CLOCK_CYCLES(2); } @@ -24,9 +24,9 @@ static int opPUNPCKLDQ_a32(uint32_t fetchdat) MMX_ENTER(); fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - MM[reg].l[1] = MM[rm].l[0]; + MM[cpu_reg].l[1] = MM[cpu_rm].l[0]; CLOCK_CYCLES(1); } else @@ -34,7 +34,7 @@ static int opPUNPCKLDQ_a32(uint32_t fetchdat) uint32_t src; src = readmeml(easeg, eaaddr); if (abrt) return 0; - MM[reg].l[1] = src; + MM[cpu_reg].l[1] = src; CLOCK_CYCLES(2); } @@ -49,8 +49,8 @@ static int opPUNPCKHDQ_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].l[0] = MM[reg].l[1]; - MM[reg].l[1] = src.l[1]; + MM[cpu_reg].l[0] = MM[cpu_reg].l[1]; + MM[cpu_reg].l[1] = src.l[1]; return 0; } @@ -62,8 +62,8 @@ static int opPUNPCKHDQ_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].l[0] = MM[reg].l[1]; - MM[reg].l[1] = src.l[1]; + MM[cpu_reg].l[0] = MM[cpu_reg].l[1]; + MM[cpu_reg].l[1] = src.l[1]; return 0; } @@ -76,14 +76,14 @@ static int opPUNPCKLBW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[7] = src.b[3]; - MM[reg].b[6] = MM[reg].b[3]; - MM[reg].b[5] = src.b[2]; - MM[reg].b[4] = MM[reg].b[2]; - MM[reg].b[3] = src.b[1]; - MM[reg].b[2] = MM[reg].b[1]; - MM[reg].b[1] = src.b[0]; - MM[reg].b[0] = MM[reg].b[0]; + MM[cpu_reg].b[7] = src.b[3]; + MM[cpu_reg].b[6] = MM[cpu_reg].b[3]; + MM[cpu_reg].b[5] = src.b[2]; + MM[cpu_reg].b[4] = MM[cpu_reg].b[2]; + MM[cpu_reg].b[3] = src.b[1]; + MM[cpu_reg].b[2] = MM[cpu_reg].b[1]; + MM[cpu_reg].b[1] = src.b[0]; + MM[cpu_reg].b[0] = MM[cpu_reg].b[0]; return 0; } @@ -95,14 +95,14 @@ static int opPUNPCKLBW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[7] = src.b[3]; - MM[reg].b[6] = MM[reg].b[3]; - MM[reg].b[5] = src.b[2]; - MM[reg].b[4] = MM[reg].b[2]; - MM[reg].b[3] = src.b[1]; - MM[reg].b[2] = MM[reg].b[1]; - MM[reg].b[1] = src.b[0]; - MM[reg].b[0] = MM[reg].b[0]; + MM[cpu_reg].b[7] = src.b[3]; + MM[cpu_reg].b[6] = MM[cpu_reg].b[3]; + MM[cpu_reg].b[5] = src.b[2]; + MM[cpu_reg].b[4] = MM[cpu_reg].b[2]; + MM[cpu_reg].b[3] = src.b[1]; + MM[cpu_reg].b[2] = MM[cpu_reg].b[1]; + MM[cpu_reg].b[1] = src.b[0]; + MM[cpu_reg].b[0] = MM[cpu_reg].b[0]; return 0; } @@ -115,14 +115,14 @@ static int opPUNPCKHBW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = MM[reg].b[4]; - MM[reg].b[1] = src.b[4]; - MM[reg].b[2] = MM[reg].b[5]; - MM[reg].b[3] = src.b[5]; - MM[reg].b[4] = MM[reg].b[6]; - MM[reg].b[5] = src.b[6]; - MM[reg].b[6] = MM[reg].b[7]; - MM[reg].b[7] = src.b[7]; + MM[cpu_reg].b[0] = MM[cpu_reg].b[4]; + MM[cpu_reg].b[1] = src.b[4]; + MM[cpu_reg].b[2] = MM[cpu_reg].b[5]; + MM[cpu_reg].b[3] = src.b[5]; + MM[cpu_reg].b[4] = MM[cpu_reg].b[6]; + MM[cpu_reg].b[5] = src.b[6]; + MM[cpu_reg].b[6] = MM[cpu_reg].b[7]; + MM[cpu_reg].b[7] = src.b[7]; return 0; } @@ -134,14 +134,14 @@ static int opPUNPCKHBW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].b[0] = MM[reg].b[4]; - MM[reg].b[1] = src.b[4]; - MM[reg].b[2] = MM[reg].b[5]; - MM[reg].b[3] = src.b[5]; - MM[reg].b[4] = MM[reg].b[6]; - MM[reg].b[5] = src.b[6]; - MM[reg].b[6] = MM[reg].b[7]; - MM[reg].b[7] = src.b[7]; + MM[cpu_reg].b[0] = MM[cpu_reg].b[4]; + MM[cpu_reg].b[1] = src.b[4]; + MM[cpu_reg].b[2] = MM[cpu_reg].b[5]; + MM[cpu_reg].b[3] = src.b[5]; + MM[cpu_reg].b[4] = MM[cpu_reg].b[6]; + MM[cpu_reg].b[5] = src.b[6]; + MM[cpu_reg].b[6] = MM[cpu_reg].b[7]; + MM[cpu_reg].b[7] = src.b[7]; return 0; } @@ -154,10 +154,10 @@ static int opPUNPCKLWD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[3] = src.w[1]; - MM[reg].w[2] = MM[reg].w[1]; - MM[reg].w[1] = src.w[0]; - MM[reg].w[0] = MM[reg].w[0]; + MM[cpu_reg].w[3] = src.w[1]; + MM[cpu_reg].w[2] = MM[cpu_reg].w[1]; + MM[cpu_reg].w[1] = src.w[0]; + MM[cpu_reg].w[0] = MM[cpu_reg].w[0]; return 0; } @@ -169,10 +169,10 @@ static int opPUNPCKLWD_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[3] = src.w[1]; - MM[reg].w[2] = MM[reg].w[1]; - MM[reg].w[1] = src.w[0]; - MM[reg].w[0] = MM[reg].w[0]; + MM[cpu_reg].w[3] = src.w[1]; + MM[cpu_reg].w[2] = MM[cpu_reg].w[1]; + MM[cpu_reg].w[1] = src.w[0]; + MM[cpu_reg].w[0] = MM[cpu_reg].w[0]; return 0; } @@ -185,10 +185,10 @@ static int opPUNPCKHWD_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = MM[reg].w[2]; - MM[reg].w[1] = src.w[2]; - MM[reg].w[2] = MM[reg].w[3]; - MM[reg].w[3] = src.w[3]; + MM[cpu_reg].w[0] = MM[cpu_reg].w[2]; + MM[cpu_reg].w[1] = src.w[2]; + MM[cpu_reg].w[2] = MM[cpu_reg].w[3]; + MM[cpu_reg].w[3] = src.w[3]; return 0; } @@ -200,10 +200,10 @@ static int opPUNPCKHWD_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - MM[reg].w[0] = MM[reg].w[2]; - MM[reg].w[1] = src.w[2]; - MM[reg].w[2] = MM[reg].w[3]; - MM[reg].w[3] = src.w[3]; + MM[cpu_reg].w[0] = MM[cpu_reg].w[2]; + MM[cpu_reg].w[1] = src.w[2]; + MM[cpu_reg].w[2] = MM[cpu_reg].w[3]; + MM[cpu_reg].w[3] = src.w[3]; return 0; } @@ -215,16 +215,16 @@ static int opPACKSSWB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - dst = MM[reg]; + dst = MM[cpu_reg]; - MM[reg].sb[0] = SSATB(dst.sw[0]); - MM[reg].sb[1] = SSATB(dst.sw[1]); - MM[reg].sb[2] = SSATB(dst.sw[2]); - MM[reg].sb[3] = SSATB(dst.sw[3]); - MM[reg].sb[4] = SSATB(src.sw[0]); - MM[reg].sb[5] = SSATB(src.sw[1]); - MM[reg].sb[6] = SSATB(src.sw[2]); - MM[reg].sb[7] = SSATB(src.sw[3]); + MM[cpu_reg].sb[0] = SSATB(dst.sw[0]); + MM[cpu_reg].sb[1] = SSATB(dst.sw[1]); + MM[cpu_reg].sb[2] = SSATB(dst.sw[2]); + MM[cpu_reg].sb[3] = SSATB(dst.sw[3]); + MM[cpu_reg].sb[4] = SSATB(src.sw[0]); + MM[cpu_reg].sb[5] = SSATB(src.sw[1]); + MM[cpu_reg].sb[6] = SSATB(src.sw[2]); + MM[cpu_reg].sb[7] = SSATB(src.sw[3]); return 0; } @@ -235,16 +235,16 @@ static int opPACKSSWB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - dst = MM[reg]; + dst = MM[cpu_reg]; - MM[reg].sb[0] = SSATB(dst.sw[0]); - MM[reg].sb[1] = SSATB(dst.sw[1]); - MM[reg].sb[2] = SSATB(dst.sw[2]); - MM[reg].sb[3] = SSATB(dst.sw[3]); - MM[reg].sb[4] = SSATB(src.sw[0]); - MM[reg].sb[5] = SSATB(src.sw[1]); - MM[reg].sb[6] = SSATB(src.sw[2]); - MM[reg].sb[7] = SSATB(src.sw[3]); + MM[cpu_reg].sb[0] = SSATB(dst.sw[0]); + MM[cpu_reg].sb[1] = SSATB(dst.sw[1]); + MM[cpu_reg].sb[2] = SSATB(dst.sw[2]); + MM[cpu_reg].sb[3] = SSATB(dst.sw[3]); + MM[cpu_reg].sb[4] = SSATB(src.sw[0]); + MM[cpu_reg].sb[5] = SSATB(src.sw[1]); + MM[cpu_reg].sb[6] = SSATB(src.sw[2]); + MM[cpu_reg].sb[7] = SSATB(src.sw[3]); return 0; } @@ -256,16 +256,16 @@ static int opPACKUSWB_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - dst = MM[reg]; + dst = MM[cpu_reg]; - MM[reg].b[0] = USATB(dst.sw[0]); - MM[reg].b[1] = USATB(dst.sw[1]); - MM[reg].b[2] = USATB(dst.sw[2]); - MM[reg].b[3] = USATB(dst.sw[3]); - MM[reg].b[4] = USATB(src.sw[0]); - MM[reg].b[5] = USATB(src.sw[1]); - MM[reg].b[6] = USATB(src.sw[2]); - MM[reg].b[7] = USATB(src.sw[3]); + MM[cpu_reg].b[0] = USATB(dst.sw[0]); + MM[cpu_reg].b[1] = USATB(dst.sw[1]); + MM[cpu_reg].b[2] = USATB(dst.sw[2]); + MM[cpu_reg].b[3] = USATB(dst.sw[3]); + MM[cpu_reg].b[4] = USATB(src.sw[0]); + MM[cpu_reg].b[5] = USATB(src.sw[1]); + MM[cpu_reg].b[6] = USATB(src.sw[2]); + MM[cpu_reg].b[7] = USATB(src.sw[3]); return 0; } @@ -276,16 +276,16 @@ static int opPACKUSWB_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - dst = MM[reg]; + dst = MM[cpu_reg]; - MM[reg].b[0] = USATB(dst.sw[0]); - MM[reg].b[1] = USATB(dst.sw[1]); - MM[reg].b[2] = USATB(dst.sw[2]); - MM[reg].b[3] = USATB(dst.sw[3]); - MM[reg].b[4] = USATB(src.sw[0]); - MM[reg].b[5] = USATB(src.sw[1]); - MM[reg].b[6] = USATB(src.sw[2]); - MM[reg].b[7] = USATB(src.sw[3]); + MM[cpu_reg].b[0] = USATB(dst.sw[0]); + MM[cpu_reg].b[1] = USATB(dst.sw[1]); + MM[cpu_reg].b[2] = USATB(dst.sw[2]); + MM[cpu_reg].b[3] = USATB(dst.sw[3]); + MM[cpu_reg].b[4] = USATB(src.sw[0]); + MM[cpu_reg].b[5] = USATB(src.sw[1]); + MM[cpu_reg].b[6] = USATB(src.sw[2]); + MM[cpu_reg].b[7] = USATB(src.sw[3]); return 0; } @@ -297,12 +297,12 @@ static int opPACKSSDW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); MMX_GETSRC(); - dst = MM[reg]; + dst = MM[cpu_reg]; - MM[reg].sw[0] = SSATW(dst.sl[0]); - MM[reg].sw[1] = SSATW(dst.sl[1]); - MM[reg].sw[2] = SSATW(src.sl[0]); - MM[reg].sw[3] = SSATW(src.sl[1]); + MM[cpu_reg].sw[0] = SSATW(dst.sl[0]); + MM[cpu_reg].sw[1] = SSATW(dst.sl[1]); + MM[cpu_reg].sw[2] = SSATW(src.sl[0]); + MM[cpu_reg].sw[3] = SSATW(src.sl[1]); return 0; } @@ -313,12 +313,12 @@ static int opPACKSSDW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); MMX_GETSRC(); - dst = MM[reg]; + dst = MM[cpu_reg]; - MM[reg].sw[0] = SSATW(dst.sl[0]); - MM[reg].sw[1] = SSATW(dst.sl[1]); - MM[reg].sw[2] = SSATW(src.sl[0]); - MM[reg].sw[3] = SSATW(src.sl[1]); + MM[cpu_reg].sw[0] = SSATW(dst.sl[0]); + MM[cpu_reg].sw[1] = SSATW(dst.sl[1]); + MM[cpu_reg].sw[2] = SSATW(src.sl[0]); + MM[cpu_reg].sw[3] = SSATW(src.sl[1]); return 0; } diff --git a/src/x86_ops_mmx_shift.h b/src/x86_ops_mmx_shift.h index 760998a7d..d2bf45393 100644 --- a/src/x86_ops_mmx_shift.h +++ b/src/x86_ops_mmx_shift.h @@ -1,7 +1,7 @@ #define MMX_GETSHIFT() \ - if (mod == 3) \ + if (cpu_mod == 3) \ { \ - shift = MM[rm].b[0]; \ + shift = MM[cpu_rm].b[0]; \ CLOCK_CYCLES(1); \ } \ else \ @@ -72,13 +72,13 @@ static int opPSLLW_a16(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 15) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].w[0] <<= shift; - MM[reg].w[1] <<= shift; - MM[reg].w[2] <<= shift; - MM[reg].w[3] <<= shift; + MM[cpu_reg].w[0] <<= shift; + MM[cpu_reg].w[1] <<= shift; + MM[cpu_reg].w[2] <<= shift; + MM[cpu_reg].w[3] <<= shift; } return 0; @@ -93,13 +93,13 @@ static int opPSLLW_a32(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 15) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].w[0] <<= shift; - MM[reg].w[1] <<= shift; - MM[reg].w[2] <<= shift; - MM[reg].w[3] <<= shift; + MM[cpu_reg].w[0] <<= shift; + MM[cpu_reg].w[1] <<= shift; + MM[cpu_reg].w[2] <<= shift; + MM[cpu_reg].w[3] <<= shift; } return 0; @@ -115,13 +115,13 @@ static int opPSRLW_a16(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 15) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].w[0] >>= shift; - MM[reg].w[1] >>= shift; - MM[reg].w[2] >>= shift; - MM[reg].w[3] >>= shift; + MM[cpu_reg].w[0] >>= shift; + MM[cpu_reg].w[1] >>= shift; + MM[cpu_reg].w[2] >>= shift; + MM[cpu_reg].w[3] >>= shift; } return 0; @@ -136,13 +136,13 @@ static int opPSRLW_a32(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 15) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].w[0] >>= shift; - MM[reg].w[1] >>= shift; - MM[reg].w[2] >>= shift; - MM[reg].w[3] >>= shift; + MM[cpu_reg].w[0] >>= shift; + MM[cpu_reg].w[1] >>= shift; + MM[cpu_reg].w[2] >>= shift; + MM[cpu_reg].w[3] >>= shift; } return 0; @@ -160,10 +160,10 @@ static int opPSRAW_a16(uint32_t fetchdat) if (shift > 15) shift = 15; - MM[reg].sw[0] >>= shift; - MM[reg].sw[1] >>= shift; - MM[reg].sw[2] >>= shift; - MM[reg].sw[3] >>= shift; + MM[cpu_reg].sw[0] >>= shift; + MM[cpu_reg].sw[1] >>= shift; + MM[cpu_reg].sw[2] >>= shift; + MM[cpu_reg].sw[3] >>= shift; return 0; } @@ -179,10 +179,10 @@ static int opPSRAW_a32(uint32_t fetchdat) if (shift > 15) shift = 15; - MM[reg].sw[0] >>= shift; - MM[reg].sw[1] >>= shift; - MM[reg].sw[2] >>= shift; - MM[reg].sw[3] >>= shift; + MM[cpu_reg].sw[0] >>= shift; + MM[cpu_reg].sw[1] >>= shift; + MM[cpu_reg].sw[2] >>= shift; + MM[cpu_reg].sw[3] >>= shift; return 0; } @@ -243,11 +243,11 @@ static int opPSLLD_a16(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 31) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].l[0] <<= shift; - MM[reg].l[1] <<= shift; + MM[cpu_reg].l[0] <<= shift; + MM[cpu_reg].l[1] <<= shift; } return 0; @@ -262,11 +262,11 @@ static int opPSLLD_a32(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 31) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].l[0] <<= shift; - MM[reg].l[1] <<= shift; + MM[cpu_reg].l[0] <<= shift; + MM[cpu_reg].l[1] <<= shift; } return 0; @@ -282,11 +282,11 @@ static int opPSRLD_a16(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 31) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].l[0] >>= shift; - MM[reg].l[1] >>= shift; + MM[cpu_reg].l[0] >>= shift; + MM[cpu_reg].l[1] >>= shift; } return 0; @@ -301,11 +301,11 @@ static int opPSRLD_a32(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 31) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else { - MM[reg].l[0] >>= shift; - MM[reg].l[1] >>= shift; + MM[cpu_reg].l[0] >>= shift; + MM[cpu_reg].l[1] >>= shift; } return 0; @@ -323,8 +323,8 @@ static int opPSRAD_a16(uint32_t fetchdat) if (shift > 31) shift = 31; - MM[reg].sl[0] >>= shift; - MM[reg].sl[1] >>= shift; + MM[cpu_reg].sl[0] >>= shift; + MM[cpu_reg].sl[1] >>= shift; return 0; } @@ -340,8 +340,8 @@ static int opPSRAD_a32(uint32_t fetchdat) if (shift > 31) shift = 31; - MM[reg].sl[0] >>= shift; - MM[reg].sl[1] >>= shift; + MM[cpu_reg].sl[0] >>= shift; + MM[cpu_reg].sl[1] >>= shift; return 0; } @@ -395,9 +395,9 @@ static int opPSLLQ_a16(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 63) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else - MM[reg].q <<= shift; + MM[cpu_reg].q <<= shift; return 0; } @@ -411,9 +411,9 @@ static int opPSLLQ_a32(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 63) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else - MM[reg].q <<= shift; + MM[cpu_reg].q <<= shift; return 0; } @@ -428,9 +428,9 @@ static int opPSRLQ_a16(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 63) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else - MM[reg].q >>= shift; + MM[cpu_reg].q >>= shift; return 0; } @@ -444,9 +444,9 @@ static int opPSRLQ_a32(uint32_t fetchdat) MMX_GETSHIFT(); if (shift > 63) - MM[reg].q = 0; + MM[cpu_reg].q = 0; else - MM[reg].q >>= shift; + MM[cpu_reg].q >>= shift; return 0; } diff --git a/src/x86_ops_mov.h b/src/x86_ops_mov.h index d5efd5a46..71d2f2d78 100644 --- a/src/x86_ops_mov.h +++ b/src/x86_ops_mov.h @@ -213,62 +213,48 @@ static int opMOV_l_imm_a32(uint32_t fetchdat) static int opMOV_AL_a16(uint32_t fetchdat) { - uint16_t addr; - uint8_t temp; - addr = getwordf(); - temp = readmemb(ea_seg->base, addr); - if (abrt) return 1; + uint16_t addr = getwordf(); + uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_AL_a32(uint32_t fetchdat) { - uint32_t addr; - uint8_t temp; - addr = getlong(); - temp = readmemb(ea_seg->base, addr); - if (abrt) return 1; + uint32_t addr = getlong(); + uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_AX_a16(uint32_t fetchdat) { - uint16_t addr; - uint16_t temp; - addr = getwordf(); - temp = readmemw(ea_seg->base, addr); if (abrt) return 1; + uint16_t addr = getwordf(); + uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1; AX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_AX_a32(uint32_t fetchdat) { - uint32_t addr; - uint16_t temp; - addr = getlong(); - temp = readmemw(ea_seg->base, addr); if (abrt) return 1; + uint32_t addr = getlong(); + uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1; AX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_EAX_a16(uint32_t fetchdat) { - uint16_t addr; - uint32_t temp; - addr = getwordf(); - temp = readmeml(ea_seg->base, addr); if (abrt) return 1; + uint16_t addr = getwordf(); + uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1; EAX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_EAX_a32(uint32_t fetchdat) { - uint32_t addr; - uint32_t temp; - addr = getlong(); - temp = readmeml(ea_seg->base, addr); if (abrt) return 1; + uint32_t addr = getlong(); + uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1; EAX = temp; CLOCK_CYCLES((is486) ? 1 : 4); return 0; @@ -276,50 +262,42 @@ static int opMOV_EAX_a32(uint32_t fetchdat) static int opMOV_a16_AL(uint32_t fetchdat) { - uint16_t addr; - addr = getwordf(); + uint16_t addr = getwordf(); writememb(ea_seg->base, addr, AL); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_AL(uint32_t fetchdat) { - uint32_t addr; - addr = getlong(); + uint32_t addr = getlong(); writememb(ea_seg->base, addr, AL); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a16_AX(uint32_t fetchdat) { - uint16_t addr; - addr = getwordf(); + uint16_t addr = getwordf(); writememw(ea_seg->base, addr, AX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_AX(uint32_t fetchdat) { - uint32_t addr; - addr = getlong(); - if (abrt) return 1; + uint32_t addr = getlong(); if (abrt) return 1; writememw(ea_seg->base, addr, AX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a16_EAX(uint32_t fetchdat) { - uint16_t addr; - addr = getwordf(); + uint16_t addr = getwordf(); writememl(ea_seg->base, addr, EAX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_EAX(uint32_t fetchdat) { - uint32_t addr; - addr = getlong(); - if (abrt) return 1; + uint32_t addr = getlong(); if (abrt) return 1; writememl(ea_seg->base, addr, EAX); CLOCK_CYCLES((is486) ? 1 : 2); return abrt; @@ -329,16 +307,16 @@ static int opMOV_a32_EAX(uint32_t fetchdat) static int opLEA_w_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); - cpu_state.regs[reg].w = eaaddr; + ILLEGAL_ON(cpu_mod == 3); + cpu_state.regs[cpu_reg].w = eaaddr; CLOCK_CYCLES(timing_rr); return 0; } static int opLEA_w_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); - cpu_state.regs[reg].w = eaaddr; + ILLEGAL_ON(cpu_mod == 3); + cpu_state.regs[cpu_reg].w = eaaddr; CLOCK_CYCLES(timing_rr); return 0; } @@ -346,16 +324,16 @@ static int opLEA_w_a32(uint32_t fetchdat) static int opLEA_l_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); - cpu_state.regs[reg].l = eaaddr & 0xffff; + ILLEGAL_ON(cpu_mod == 3); + cpu_state.regs[cpu_reg].l = eaaddr & 0xffff; CLOCK_CYCLES(timing_rr); return 0; } static int opLEA_l_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); - cpu_state.regs[reg].l = eaaddr; + ILLEGAL_ON(cpu_mod == 3); + cpu_state.regs[cpu_reg].l = eaaddr; CLOCK_CYCLES(timing_rr); return 0; } @@ -365,10 +343,7 @@ static int opLEA_l_a32(uint32_t fetchdat) static int opXLAT_a16(uint32_t fetchdat) { uint32_t addr = (BX + AL)&0xFFFF; - uint8_t temp; - cpu_state.last_ea = addr; - temp = readmemb(ea_seg->base, addr); - if (abrt) return 1; + uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES(5); return 0; @@ -376,10 +351,7 @@ static int opXLAT_a16(uint32_t fetchdat) static int opXLAT_a32(uint32_t fetchdat) { uint32_t addr = EBX + AL; - uint8_t temp; - cpu_state.last_ea = addr; - temp = readmemb(ea_seg->base, addr); - if (abrt) return 1; + uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; CLOCK_CYCLES(5); return 0; @@ -388,15 +360,15 @@ static int opXLAT_a32(uint32_t fetchdat) static int opMOV_b_r_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - setr8(rm, getr8(reg)); + setr8(cpu_rm, getr8(cpu_reg)); CLOCK_CYCLES(timing_rr); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr); - seteab(getr8(reg)); + seteab(getr8(cpu_reg)); CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; @@ -404,15 +376,15 @@ static int opMOV_b_r_a16(uint32_t fetchdat) static int opMOV_b_r_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - setr8(rm, getr8(reg)); + setr8(cpu_rm, getr8(cpu_reg)); CLOCK_CYCLES(timing_rr); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr); - seteab(getr8(reg)); + seteab(getr8(cpu_reg)); CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; @@ -420,15 +392,15 @@ static int opMOV_b_r_a32(uint32_t fetchdat) static int opMOV_w_r_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[rm].w = cpu_state.regs[reg].w; + cpu_state.regs[cpu_rm].w = cpu_state.regs[cpu_reg].w; CLOCK_CYCLES(timing_rr); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr+1); - seteaw(cpu_state.regs[reg].w); + seteaw(cpu_state.regs[cpu_reg].w); CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; @@ -436,15 +408,15 @@ static int opMOV_w_r_a16(uint32_t fetchdat) static int opMOV_w_r_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[rm].w = cpu_state.regs[reg].w; + cpu_state.regs[cpu_rm].w = cpu_state.regs[cpu_reg].w; CLOCK_CYCLES(timing_rr); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr+1); - seteaw(cpu_state.regs[reg].w); + seteaw(cpu_state.regs[cpu_reg].w); CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; @@ -452,15 +424,15 @@ static int opMOV_w_r_a32(uint32_t fetchdat) static int opMOV_l_r_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[rm].l = cpu_state.regs[reg].l; + cpu_state.regs[cpu_rm].l = cpu_state.regs[cpu_reg].l; CLOCK_CYCLES(timing_rr); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr+3); - seteal(cpu_state.regs[reg].l); + seteal(cpu_state.regs[cpu_reg].l); CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; @@ -468,15 +440,15 @@ static int opMOV_l_r_a16(uint32_t fetchdat) static int opMOV_l_r_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[rm].l = cpu_state.regs[reg].l; + cpu_state.regs[cpu_rm].l = cpu_state.regs[cpu_reg].l; CLOCK_CYCLES(timing_rr); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr+3); - seteal(cpu_state.regs[reg].l); + seteal(cpu_state.regs[cpu_reg].l); CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; @@ -485,9 +457,9 @@ static int opMOV_l_r_a32(uint32_t fetchdat) static int opMOV_r_b_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - setr8(reg, getr8(rm)); + setr8(cpu_reg, getr8(cpu_rm)); CLOCK_CYCLES(timing_rr); } else @@ -495,7 +467,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat) uint8_t temp; CHECK_READ(ea_seg, eaaddr, eaaddr); temp = geteab(); if (abrt) return 1; - setr8(reg, temp); + setr8(cpu_reg, temp); CLOCK_CYCLES(is486 ? 1 : 4); } return 0; @@ -503,9 +475,9 @@ static int opMOV_r_b_a16(uint32_t fetchdat) static int opMOV_r_b_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - setr8(reg, getr8(rm)); + setr8(cpu_reg, getr8(cpu_rm)); CLOCK_CYCLES(timing_rr); } else @@ -513,7 +485,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat) uint8_t temp; CHECK_READ(ea_seg, eaaddr, eaaddr); temp = geteab(); if (abrt) return 1; - setr8(reg, temp); + setr8(cpu_reg, temp); CLOCK_CYCLES(is486 ? 1 : 4); } return 0; @@ -521,9 +493,9 @@ static int opMOV_r_b_a32(uint32_t fetchdat) static int opMOV_r_w_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[reg].w = cpu_state.regs[rm].w; + cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; CLOCK_CYCLES(timing_rr); } else @@ -531,7 +503,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat) uint16_t temp; CHECK_READ(ea_seg, eaaddr, eaaddr+1); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].w = temp; + cpu_state.regs[cpu_reg].w = temp; CLOCK_CYCLES((is486) ? 1 : 4); } return 0; @@ -539,9 +511,9 @@ static int opMOV_r_w_a16(uint32_t fetchdat) static int opMOV_r_w_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[reg].w = cpu_state.regs[rm].w; + cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; CLOCK_CYCLES(timing_rr); } else @@ -549,7 +521,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat) uint16_t temp; CHECK_READ(ea_seg, eaaddr, eaaddr+1); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].w = temp; + cpu_state.regs[cpu_reg].w = temp; CLOCK_CYCLES((is486) ? 1 : 4); } return 0; @@ -557,9 +529,9 @@ static int opMOV_r_w_a32(uint32_t fetchdat) static int opMOV_r_l_a16(uint32_t fetchdat) { fetch_ea_16(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[reg].l = cpu_state.regs[rm].l; + cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; CLOCK_CYCLES(timing_rr); } else @@ -567,7 +539,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat) uint32_t temp; CHECK_READ(ea_seg, eaaddr, eaaddr+3); temp = geteal(); if (abrt) return 1; - cpu_state.regs[reg].l = temp; + cpu_state.regs[cpu_reg].l = temp; CLOCK_CYCLES(is486 ? 1 : 4); } return 0; @@ -575,9 +547,9 @@ static int opMOV_r_l_a16(uint32_t fetchdat) static int opMOV_r_l_a32(uint32_t fetchdat) { fetch_ea_32(fetchdat); - if (mod == 3) + if (cpu_mod == 3) { - cpu_state.regs[reg].l = cpu_state.regs[rm].l; + cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; CLOCK_CYCLES(timing_rr); } else @@ -585,7 +557,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) uint32_t temp; CHECK_READ(ea_seg, eaaddr, eaaddr+3); temp = geteal(); if (abrt) return 1; - cpu_state.regs[reg].l = temp; + cpu_state.regs[cpu_reg].l = temp; CLOCK_CYCLES(is486 ? 1 : 4); } return 0; @@ -597,14 +569,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat) fetch_ea_16(fetchdat); \ if (cond_ ## condition) \ { \ - if (mod == 3) \ - cpu_state.regs[reg].w = cpu_state.regs[rm].w; \ + if (cpu_mod == 3) \ + cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; \ else \ { \ uint16_t temp; \ CHECK_READ(ea_seg, eaaddr, eaaddr+1); \ temp = geteaw(); if (abrt) return 1; \ - cpu_state.regs[reg].w = temp; \ + cpu_state.regs[cpu_reg].w = temp; \ } \ } \ CLOCK_CYCLES(1); \ @@ -615,14 +587,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); \ if (cond_ ## condition) \ { \ - if (mod == 3) \ - cpu_state.regs[reg].w = cpu_state.regs[rm].w; \ + if (cpu_mod == 3) \ + cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; \ else \ { \ uint16_t temp; \ CHECK_READ(ea_seg, eaaddr, eaaddr+1); \ temp = geteaw(); if (abrt) return 1; \ - cpu_state.regs[reg].w = temp; \ + cpu_state.regs[cpu_reg].w = temp; \ } \ } \ CLOCK_CYCLES(1); \ @@ -633,14 +605,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat) fetch_ea_16(fetchdat); \ if (cond_ ## condition) \ { \ - if (mod == 3) \ - cpu_state.regs[reg].l = cpu_state.regs[rm].l; \ + if (cpu_mod == 3) \ + cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; \ else \ { \ uint32_t temp; \ CHECK_READ(ea_seg, eaaddr, eaaddr+3); \ temp = geteal(); if (abrt) return 1; \ - cpu_state.regs[reg].l = temp; \ + cpu_state.regs[cpu_reg].l = temp; \ } \ } \ CLOCK_CYCLES(1); \ @@ -651,14 +623,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); \ if (cond_ ## condition) \ { \ - if (mod == 3) \ - cpu_state.regs[reg].l = cpu_state.regs[rm].l; \ + if (cpu_mod == 3) \ + cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; \ else \ { \ uint32_t temp; \ CHECK_READ(ea_seg, eaaddr, eaaddr+3); \ temp = geteal(); if (abrt) return 1; \ - cpu_state.regs[reg].l = temp; \ + cpu_state.regs[cpu_reg].l = temp; \ } \ } \ CLOCK_CYCLES(1); \ diff --git a/src/x86_ops_mov_ctrl.h b/src/x86_ops_mov_ctrl.h index 633173417..6f13c3120 100644 --- a/src/x86_ops_mov_ctrl.h +++ b/src/x86_ops_mov_ctrl.h @@ -7,27 +7,27 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - switch (reg) + switch (cpu_reg) { case 0: - cpu_state.regs[rm].l = cr0; + cpu_state.regs[cpu_rm].l = cr0; if (is486) - cpu_state.regs[rm].l |= 0x10; /*ET hardwired on 486*/ + cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/ break; case 2: - cpu_state.regs[rm].l = cr2; + cpu_state.regs[cpu_rm].l = cr2; break; case 3: - cpu_state.regs[rm].l = cr3; + cpu_state.regs[cpu_rm].l = cr3; break; case 4: if (cpu_hasCR4) { - cpu_state.regs[rm].l = cr4; + cpu_state.regs[cpu_rm].l = cr4; break; } default: - pclog("Bad read of CR%i %i\n",rmdat&7,reg); + pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg); cpu_state.pc = oldpc; x86illegal(); break; @@ -44,27 +44,27 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat) return 1; } fetch_ea_32(fetchdat); - switch (reg) + switch (cpu_reg) { case 0: - cpu_state.regs[rm].l = cr0; + cpu_state.regs[cpu_rm].l = cr0; if (is486) - cpu_state.regs[rm].l |= 0x10; /*ET hardwired on 486*/ + cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/ break; case 2: - cpu_state.regs[rm].l = cr2; + cpu_state.regs[cpu_rm].l = cr2; break; case 3: - cpu_state.regs[rm].l = cr3; + cpu_state.regs[cpu_rm].l = cr3; break; case 4: if (cpu_hasCR4) { - cpu_state.regs[rm].l = cr4; + cpu_state.regs[cpu_rm].l = cr4; break; } default: - pclog("Bad read of CR%i %i\n",rmdat&7,reg); + pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg); cpu_state.pc = oldpc; x86illegal(); break; @@ -82,7 +82,7 @@ static int opMOV_r_DRx_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cpu_state.regs[rm].l = dr[reg]; + cpu_state.regs[cpu_rm].l = dr[cpu_reg]; CLOCK_CYCLES(6); return 0; } @@ -95,7 +95,7 @@ static int opMOV_r_DRx_a32(uint32_t fetchdat) return 1; } fetch_ea_32(fetchdat); - cpu_state.regs[rm].l = dr[reg]; + cpu_state.regs[cpu_rm].l = dr[cpu_reg]; CLOCK_CYCLES(6); return 0; } @@ -109,33 +109,33 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - switch (reg) + switch (cpu_reg) { case 0: - if ((cpu_state.regs[rm].l ^ cr0) & 0x80000001) + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001) flushmmucache(); - cr0 = cpu_state.regs[rm].l; + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) mmu_perm=4; break; case 2: - cr2 = cpu_state.regs[rm].l; + cr2 = cpu_state.regs[cpu_rm].l; break; case 3: - cr3 = cpu_state.regs[rm].l; + cr3 = cpu_state.regs[cpu_rm].l; flushmmucache(); break; case 4: if (cpu_hasCR4) { - cr4 = cpu_state.regs[rm].l & cpu_CR4_mask; + cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask; break; } default: - pclog("Bad load CR%i\n", reg); + pclog("Bad load CR%i\n", cpu_reg); cpu_state.pc = oldpc; x86illegal(); break; @@ -152,33 +152,33 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat) return 1; } fetch_ea_32(fetchdat); - switch (reg) + switch (cpu_reg) { case 0: - if ((cpu_state.regs[rm].l ^ cr0) & 0x80000001) + if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001) flushmmucache(); - cr0 = cpu_state.regs[rm].l; + cr0 = cpu_state.regs[cpu_rm].l; if (cpu_16bitbus) cr0 |= 0x10; if (!(cr0 & 0x80000000)) mmu_perm=4; break; case 2: - cr2 = cpu_state.regs[rm].l; + cr2 = cpu_state.regs[cpu_rm].l; break; case 3: - cr3 = cpu_state.regs[rm].l; + cr3 = cpu_state.regs[cpu_rm].l; flushmmucache(); break; case 4: if (cpu_hasCR4) { - cr4 = cpu_state.regs[rm].l & cpu_CR4_mask; + cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask; break; } default: - pclog("Bad load CR%i\n", reg); + pclog("Bad load CR%i\n", cpu_reg); cpu_state.pc = oldpc; x86illegal(); break; @@ -196,7 +196,7 @@ static int opMOV_DRx_r_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - dr[reg] = cpu_state.regs[rm].l; + dr[cpu_reg] = cpu_state.regs[cpu_rm].l; CLOCK_CYCLES(6); return 0; } @@ -209,7 +209,7 @@ static int opMOV_DRx_r_a32(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - dr[reg] = cpu_state.regs[rm].l; + dr[cpu_reg] = cpu_state.regs[cpu_rm].l; CLOCK_CYCLES(6); return 0; } @@ -223,7 +223,7 @@ static int opMOV_r_TRx_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cpu_state.regs[rm].l = 0; + cpu_state.regs[cpu_rm].l = 0; CLOCK_CYCLES(6); return 0; } @@ -236,7 +236,7 @@ static int opMOV_r_TRx_a32(uint32_t fetchdat) return 1; } fetch_ea_32(fetchdat); - cpu_state.regs[rm].l = 0; + cpu_state.regs[cpu_rm].l = 0; CLOCK_CYCLES(6); return 0; } diff --git a/src/x86_ops_mov_seg.h b/src/x86_ops_mov_seg.h index d728423a6..6cf7fe252 100644 --- a/src/x86_ops_mov_seg.h +++ b/src/x86_ops_mov_seg.h @@ -24,7 +24,7 @@ static int opMOV_w_seg_a16(uint32_t fetchdat) break; } - CLOCK_CYCLES((mod == 3) ? 2 : 3); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 3); return abrt; } static int opMOV_w_seg_a32(uint32_t fetchdat) @@ -53,7 +53,7 @@ static int opMOV_w_seg_a32(uint32_t fetchdat) break; } - CLOCK_CYCLES((mod == 3) ? 2 : 3); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 3); return abrt; } @@ -64,32 +64,32 @@ static int opMOV_l_seg_a16(uint32_t fetchdat) switch (rmdat & 0x38) { case 0x00: /*ES*/ - if (mod == 3) cpu_state.regs[rm].l = ES; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = ES; else seteaw(ES); break; case 0x08: /*CS*/ - if (mod == 3) cpu_state.regs[rm].l = CS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = CS; else seteaw(CS); break; case 0x18: /*DS*/ - if (mod == 3) cpu_state.regs[rm].l = DS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = DS; else seteaw(DS); break; case 0x10: /*SS*/ - if (mod == 3) cpu_state.regs[rm].l = SS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = SS; else seteaw(SS); break; case 0x20: /*FS*/ - if (mod == 3) cpu_state.regs[rm].l = FS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = FS; else seteaw(FS); break; case 0x28: /*GS*/ - if (mod == 3) cpu_state.regs[rm].l = GS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = GS; else seteaw(GS); break; } - CLOCK_CYCLES((mod == 3) ? 2 : 3); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 3); return abrt; } static int opMOV_l_seg_a32(uint32_t fetchdat) @@ -99,32 +99,32 @@ static int opMOV_l_seg_a32(uint32_t fetchdat) switch (rmdat & 0x38) { case 0x00: /*ES*/ - if (mod == 3) cpu_state.regs[rm].l = ES; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = ES; else seteaw(ES); break; case 0x08: /*CS*/ - if (mod == 3) cpu_state.regs[rm].l = CS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = CS; else seteaw(CS); break; case 0x18: /*DS*/ - if (mod == 3) cpu_state.regs[rm].l = DS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = DS; else seteaw(DS); break; case 0x10: /*SS*/ - if (mod == 3) cpu_state.regs[rm].l = SS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = SS; else seteaw(SS); break; case 0x20: /*FS*/ - if (mod == 3) cpu_state.regs[rm].l = FS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = FS; else seteaw(FS); break; case 0x28: /*GS*/ - if (mod == 3) cpu_state.regs[rm].l = GS; + if (cpu_mod == 3) cpu_state.regs[cpu_rm].l = GS; else seteaw(GS); break; } - CLOCK_CYCLES((mod == 3) ? 2 : 3); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 3); return abrt; } @@ -164,7 +164,7 @@ static int opMOV_seg_w_a16(uint32_t fetchdat) break; } - CLOCK_CYCLES((mod == 3) ? 2 : 5); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return abrt; } static int opMOV_seg_w_a32(uint32_t fetchdat) @@ -203,7 +203,7 @@ static int opMOV_seg_w_a32(uint32_t fetchdat) break; } - CLOCK_CYCLES((mod == 3) ? 2 : 5); + CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5); return abrt; } @@ -213,11 +213,11 @@ static int opLDS_w_a16(uint32_t fetchdat) uint16_t addr, seg; fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmemw(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; - cpu_state.regs[reg].w = addr; + cpu_state.regs[cpu_reg].w = addr; CLOCK_CYCLES(7); return 0; @@ -227,11 +227,11 @@ static int opLDS_w_a32(uint32_t fetchdat) uint16_t addr, seg; fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmemw(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; - cpu_state.regs[reg].w = addr; + cpu_state.regs[cpu_reg].w = addr; CLOCK_CYCLES(7); return 0; @@ -242,11 +242,11 @@ static int opLDS_l_a16(uint32_t fetchdat) uint16_t seg; fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmeml(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; - cpu_state.regs[reg].l = addr; + cpu_state.regs[cpu_reg].l = addr; CLOCK_CYCLES(7); return 0; @@ -257,11 +257,11 @@ static int opLDS_l_a32(uint32_t fetchdat) uint16_t seg; fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmeml(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ds); if (abrt) return 1; - cpu_state.regs[reg].l = addr; + cpu_state.regs[cpu_reg].l = addr; CLOCK_CYCLES(7); return 0; @@ -272,11 +272,11 @@ static int opLSS_w_a16(uint32_t fetchdat) uint16_t addr, seg; fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmemw(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; - cpu_state.regs[reg].w = addr; + cpu_state.regs[cpu_reg].w = addr; CLOCK_CYCLES(7); return 1; @@ -286,11 +286,11 @@ static int opLSS_w_a32(uint32_t fetchdat) uint16_t addr, seg; fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmemw(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; - cpu_state.regs[reg].w = addr; + cpu_state.regs[cpu_reg].w = addr; CLOCK_CYCLES(7); return 1; @@ -301,11 +301,11 @@ static int opLSS_l_a16(uint32_t fetchdat) uint16_t seg; fetch_ea_16(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmeml(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; - cpu_state.regs[reg].l = addr; + cpu_state.regs[cpu_reg].l = addr; CLOCK_CYCLES(7); return 1; @@ -316,11 +316,11 @@ static int opLSS_l_a32(uint32_t fetchdat) uint16_t seg; fetch_ea_32(fetchdat); - ILLEGAL_ON(mod == 3); + ILLEGAL_ON(cpu_mod == 3); addr = readmeml(easeg, eaaddr); seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; loadseg(seg, &_ss); if (abrt) return 1; - cpu_state.regs[reg].l = addr; + cpu_state.regs[cpu_reg].l = addr; CLOCK_CYCLES(7); return 1; @@ -332,11 +332,11 @@ static int opLSS_l_a32(uint32_t fetchdat) uint16_t addr, seg; \ \ fetch_ea_16(fetchdat); \ - ILLEGAL_ON(mod == 3); \ + ILLEGAL_ON(cpu_mod == 3); \ addr = readmemw(easeg, eaaddr); \ seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ - cpu_state.regs[reg].w = addr; \ + cpu_state.regs[cpu_reg].w = addr; \ \ CLOCK_CYCLES(7); \ return 0; \ @@ -347,11 +347,11 @@ static int opLSS_l_a32(uint32_t fetchdat) uint16_t addr, seg; \ \ fetch_ea_32(fetchdat); \ - ILLEGAL_ON(mod == 3); \ + ILLEGAL_ON(cpu_mod == 3); \ addr = readmemw(easeg, eaaddr); \ seg = readmemw(easeg, eaaddr + 2); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ - cpu_state.regs[reg].w = addr; \ + cpu_state.regs[cpu_reg].w = addr; \ \ CLOCK_CYCLES(7); \ return 0; \ @@ -363,11 +363,11 @@ static int opLSS_l_a32(uint32_t fetchdat) uint16_t seg; \ \ fetch_ea_16(fetchdat); \ - ILLEGAL_ON(mod == 3); \ + ILLEGAL_ON(cpu_mod == 3); \ addr = readmeml(easeg, eaaddr); \ seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ - cpu_state.regs[reg].l = addr; \ + cpu_state.regs[cpu_reg].l = addr; \ \ CLOCK_CYCLES(7); \ return 0; \ @@ -379,11 +379,11 @@ static int opLSS_l_a32(uint32_t fetchdat) uint16_t seg; \ \ fetch_ea_32(fetchdat); \ - ILLEGAL_ON(mod == 3); \ + ILLEGAL_ON(cpu_mod == 3); \ addr = readmeml(easeg, eaaddr); \ seg = readmemw(easeg, eaaddr + 4); if (abrt) return 1; \ loadseg(seg, &sel); if (abrt) return 1; \ - cpu_state.regs[reg].l = addr; \ + cpu_state.regs[cpu_reg].l = addr; \ \ CLOCK_CYCLES(7); \ return 0; \ diff --git a/src/x86_ops_movx.h b/src/x86_ops_movx.h index ac5ff45e1..0b578f993 100644 --- a/src/x86_ops_movx.h +++ b/src/x86_ops_movx.h @@ -4,7 +4,7 @@ static int opMOVZX_w_b_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].w = (uint16_t)temp; + cpu_state.regs[cpu_reg].w = (uint16_t)temp; CLOCK_CYCLES(3); return 0; @@ -15,7 +15,7 @@ static int opMOVZX_w_b_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].w = (uint16_t)temp; + cpu_state.regs[cpu_reg].w = (uint16_t)temp; CLOCK_CYCLES(3); return 0; @@ -26,7 +26,7 @@ static int opMOVZX_l_b_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; CLOCK_CYCLES(3); return 0; @@ -37,7 +37,7 @@ static int opMOVZX_l_b_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; CLOCK_CYCLES(3); return 0; @@ -48,7 +48,7 @@ static int opMOVZX_w_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].w = temp; + cpu_state.regs[cpu_reg].w = temp; CLOCK_CYCLES(3); return 0; @@ -59,7 +59,7 @@ static int opMOVZX_w_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].w = temp; + cpu_state.regs[cpu_reg].w = temp; CLOCK_CYCLES(3); return 0; @@ -70,7 +70,7 @@ static int opMOVZX_l_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; CLOCK_CYCLES(3); return 0; @@ -81,7 +81,7 @@ static int opMOVZX_l_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; CLOCK_CYCLES(3); return 0; @@ -93,9 +93,9 @@ static int opMOVSX_w_b_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].w = (uint16_t)temp; + cpu_state.regs[cpu_reg].w = (uint16_t)temp; if (temp & 0x80) - cpu_state.regs[reg].w |= 0xff00; + cpu_state.regs[cpu_reg].w |= 0xff00; CLOCK_CYCLES(3); return 0; @@ -106,9 +106,9 @@ static int opMOVSX_w_b_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].w = (uint16_t)temp; + cpu_state.regs[cpu_reg].w = (uint16_t)temp; if (temp & 0x80) - cpu_state.regs[reg].w |= 0xff00; + cpu_state.regs[cpu_reg].w |= 0xff00; CLOCK_CYCLES(3); return 0; @@ -119,9 +119,9 @@ static int opMOVSX_l_b_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; if (temp & 0x80) - cpu_state.regs[reg].l |= 0xffffff00; + cpu_state.regs[cpu_reg].l |= 0xffffff00; CLOCK_CYCLES(3); return 0; @@ -132,9 +132,9 @@ static int opMOVSX_l_b_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; if (temp & 0x80) - cpu_state.regs[reg].l |= 0xffffff00; + cpu_state.regs[cpu_reg].l |= 0xffffff00; CLOCK_CYCLES(3); return 0; @@ -145,9 +145,9 @@ static int opMOVSX_l_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; if (temp & 0x8000) - cpu_state.regs[reg].l |= 0xffff0000; + cpu_state.regs[cpu_reg].l |= 0xffff0000; CLOCK_CYCLES(3); return 0; @@ -158,9 +158,9 @@ static int opMOVSX_l_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - cpu_state.regs[reg].l = (uint32_t)temp; + cpu_state.regs[cpu_reg].l = (uint32_t)temp; if (temp & 0x8000) - cpu_state.regs[reg].l |= 0xffff0000; + cpu_state.regs[cpu_reg].l |= 0xffff0000; CLOCK_CYCLES(3); return 0; diff --git a/src/x86_ops_mul.h b/src/x86_ops_mul.h index b64276789..a54fd99a3 100644 --- a/src/x86_ops_mul.h +++ b/src/x86_ops_mul.h @@ -12,9 +12,9 @@ static int opIMUL_w_iw_a16(uint32_t fetchdat) flags_rebuild(); if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].w = templ & 0xffff; + cpu_state.regs[cpu_reg].w = templ & 0xffff; - CLOCK_CYCLES((mod == 3) ? 14 : 17); + CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17); return 0; } static int opIMUL_w_iw_a32(uint32_t fetchdat) @@ -31,9 +31,9 @@ static int opIMUL_w_iw_a32(uint32_t fetchdat) flags_rebuild(); if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].w = templ & 0xffff; + cpu_state.regs[cpu_reg].w = templ & 0xffff; - CLOCK_CYCLES((mod == 3) ? 14 : 17); + CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17); return 0; } @@ -51,7 +51,7 @@ static int opIMUL_l_il_a16(uint32_t fetchdat) flags_rebuild(); if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].l = temp64 & 0xffffffff; + cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff; CLOCK_CYCLES(25); return 0; @@ -70,7 +70,7 @@ static int opIMUL_l_il_a32(uint32_t fetchdat) flags_rebuild(); if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].l = temp64 & 0xffffffff; + cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff; CLOCK_CYCLES(25); return 0; @@ -91,9 +91,9 @@ static int opIMUL_w_ib_a16(uint32_t fetchdat) flags_rebuild(); if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].w = templ & 0xffff; + cpu_state.regs[cpu_reg].w = templ & 0xffff; - CLOCK_CYCLES((mod == 3) ? 14 : 17); + CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17); return 0; } static int opIMUL_w_ib_a32(uint32_t fetchdat) @@ -111,9 +111,9 @@ static int opIMUL_w_ib_a32(uint32_t fetchdat) flags_rebuild(); if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].w = templ & 0xffff; + cpu_state.regs[cpu_reg].w = templ & 0xffff; - CLOCK_CYCLES((mod == 3) ? 14 : 17); + CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17); return 0; } @@ -131,7 +131,7 @@ static int opIMUL_l_ib_a16(uint32_t fetchdat) flags_rebuild(); if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].l = temp64 & 0xffffffff; + cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff; CLOCK_CYCLES(20); return 0; @@ -150,7 +150,7 @@ static int opIMUL_l_ib_a32(uint32_t fetchdat) flags_rebuild(); if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cpu_state.regs[reg].l = temp64 & 0xffffffff; + cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff; CLOCK_CYCLES(20); return 0; @@ -163,9 +163,9 @@ static int opIMUL_w_w_a16(uint32_t fetchdat) int32_t templ; fetch_ea_16(fetchdat); - templ = (int32_t)(int16_t)cpu_state.regs[reg].w * (int32_t)(int16_t)geteaw(); + templ = (int32_t)(int16_t)cpu_state.regs[cpu_reg].w * (int32_t)(int16_t)geteaw(); if (abrt) return 1; - cpu_state.regs[reg].w = templ & 0xFFFF; + cpu_state.regs[cpu_reg].w = templ & 0xFFFF; flags_rebuild(); if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); @@ -178,9 +178,9 @@ static int opIMUL_w_w_a32(uint32_t fetchdat) int32_t templ; fetch_ea_32(fetchdat); - templ = (int32_t)(int16_t)cpu_state.regs[reg].w * (int32_t)(int16_t)geteaw(); + templ = (int32_t)(int16_t)cpu_state.regs[cpu_reg].w * (int32_t)(int16_t)geteaw(); if (abrt) return 1; - cpu_state.regs[reg].w = templ & 0xFFFF; + cpu_state.regs[cpu_reg].w = templ & 0xFFFF; flags_rebuild(); if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); @@ -194,9 +194,9 @@ static int opIMUL_l_l_a16(uint32_t fetchdat) int64_t temp64; fetch_ea_16(fetchdat); - temp64 = (int64_t)(int32_t)cpu_state.regs[reg].l * (int64_t)(int32_t)geteal(); + temp64 = (int64_t)(int32_t)cpu_state.regs[cpu_reg].l * (int64_t)(int32_t)geteal(); if (abrt) return 1; - cpu_state.regs[reg].l = temp64 & 0xFFFFFFFF; + cpu_state.regs[cpu_reg].l = temp64 & 0xFFFFFFFF; flags_rebuild(); if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); @@ -209,9 +209,9 @@ static int opIMUL_l_l_a32(uint32_t fetchdat) int64_t temp64; fetch_ea_32(fetchdat); - temp64 = (int64_t)(int32_t)cpu_state.regs[reg].l * (int64_t)(int32_t)geteal(); + temp64 = (int64_t)(int32_t)cpu_state.regs[cpu_reg].l * (int64_t)(int32_t)geteal(); if (abrt) return 1; - cpu_state.regs[reg].l = temp64 & 0xFFFFFFFF; + cpu_state.regs[cpu_reg].l = temp64 & 0xFFFFFFFF; flags_rebuild(); if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); diff --git a/src/x86_ops_pmode.h b/src/x86_ops_pmode.h index bdda2f3f0..0bc66aef0 100644 --- a/src/x86_ops_pmode.h +++ b/src/x86_ops_pmode.h @@ -8,9 +8,9 @@ static int opARPL_a16(uint32_t fetchdat) temp_seg = geteaw(); if (abrt) return 1; flags_rebuild(); - if ((temp_seg & 3) < (cpu_state.regs[reg].w & 3)) + if ((temp_seg & 3) < (cpu_state.regs[cpu_reg].w & 3)) { - temp_seg = (temp_seg & 0xfffc) | (cpu_state.regs[reg].w & 3); + temp_seg = (temp_seg & 0xfffc) | (cpu_state.regs[cpu_reg].w & 3); seteaw(temp_seg); if (abrt) return 1; flags |= Z_FLAG; } @@ -30,9 +30,9 @@ static int opARPL_a32(uint32_t fetchdat) temp_seg = geteaw(); if (abrt) return 1; flags_rebuild(); - if ((temp_seg & 3) < (cpu_state.regs[reg].w & 3)) + if ((temp_seg & 3) < (cpu_state.regs[cpu_reg].w & 3)) { - temp_seg = (temp_seg & 0xfffc) | (cpu_state.regs[reg].w & 3); + temp_seg = (temp_seg & 0xfffc) | (cpu_state.regs[cpu_reg].w & 3); seteaw(temp_seg); if (abrt) return 1; flags |= Z_FLAG; } @@ -78,9 +78,9 @@ static int opARPL_a32(uint32_t fetchdat) flags |= Z_FLAG; \ cpl_override = 1; \ if (is32) \ - cpu_state.regs[reg].l = readmeml(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xffff00; \ + cpu_state.regs[cpu_reg].l = readmeml(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xffff00; \ else \ - cpu_state.regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xff00; \ + cpu_state.regs[cpu_reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xff00; \ cpl_override = 0; \ } \ CLOCK_CYCLES(11); \ @@ -126,16 +126,16 @@ opLAR(l_a32, fetch_ea_32, 1) cpl_override = 1; \ if (is32) \ { \ - cpu_state.regs[reg].l = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \ - cpu_state.regs[reg].l |= (readmemb(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 6) & 0xF) << 16; \ + cpu_state.regs[cpu_reg].l = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \ + cpu_state.regs[cpu_reg].l |= (readmemb(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 6) & 0xF) << 16; \ if (readmemb(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 6) & 0x80) \ { \ - cpu_state.regs[reg].l <<= 12; \ - cpu_state.regs[reg].l |= 0xFFF; \ + cpu_state.regs[cpu_reg].l <<= 12; \ + cpu_state.regs[cpu_reg].l |= 0xFFF; \ } \ } \ else \ - cpu_state.regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \ + cpu_state.regs[cpu_reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \ cpl_override = 0; \ } \ CLOCK_CYCLES(10); \ diff --git a/src/x86_ops_shift.h b/src/x86_ops_shift.h index 6b1968277..698c51e6b 100644 --- a/src/x86_ops_shift.h +++ b/src/x86_ops_shift.h @@ -16,7 +16,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 7)) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x08: /*ROR b,CL*/ \ while (c > 0) \ @@ -30,7 +30,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x10: /*RCL b,CL*/ \ temp2 = flags & C_FLAG; \ @@ -46,7 +46,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 7)) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((cpu_mod == 3) ? 9 : 10); \ break; \ case 0x18: /*RCR b,CL*/ \ temp2 = flags & C_FLAG; \ @@ -62,23 +62,23 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((cpu_mod == 3) ? 9 : 10); \ break; \ case 0x20: case 0x30: /*SHL b,CL*/ \ seteab(temp << c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHL8, temp_orig, c, (temp << c) & 0xff); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x28: /*SHR b,CL*/ \ seteab(temp >> c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHR8, temp_orig, c, temp >> c); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x38: /*SAR b,CL*/ \ temp = (int8_t)temp >> c; \ seteab(temp); if (abrt) return 1; \ set_flags_shift(FLAGS_SAR8, temp_orig, c, temp); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ } \ } @@ -101,7 +101,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 15)) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x08: /*ROR w, c*/ \ while (c > 0) \ @@ -115,7 +115,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x4000) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x10: /*RCL w, c*/ \ temp2 = flags & C_FLAG; \ @@ -131,7 +131,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 15)) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((cpu_mod == 3) ? 9 : 10); \ break; \ case 0x18: /*RCR w, c*/ \ temp2 = flags & C_FLAG; \ @@ -147,23 +147,23 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x4000) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((cpu_mod == 3) ? 9 : 10); \ break; \ case 0x20: case 0x30: /*SHL w, c*/ \ seteaw(temp << c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHL16, temp_orig, c, (temp << c) & 0xffff); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x28: /*SHR w, c*/ \ seteaw(temp >> c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHR16, temp_orig, c, temp >> c); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x38: /*SAR w, c*/ \ temp = (int16_t)temp >> c; \ seteaw(temp); if (abrt) return 1; \ set_flags_shift(FLAGS_SAR16, temp_orig, c, temp); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ } \ } @@ -186,7 +186,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 31)) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x08: /*ROR l, c*/ \ while (c > 0) \ @@ -200,7 +200,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40000000) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x10: /*RCL l, c*/ \ temp2 = CF_SET(); \ @@ -216,7 +216,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 31)) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((cpu_mod == 3) ? 9 : 10); \ break; \ case 0x18: /*RCR l, c*/ \ temp2 = flags & C_FLAG; \ @@ -232,23 +232,23 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40000000) flags |= V_FLAG; \ - CLOCK_CYCLES((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((cpu_mod == 3) ? 9 : 10); \ break; \ case 0x20: case 0x30: /*SHL l, c*/ \ seteal(temp << c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHL32, temp_orig, c, temp << c); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x28: /*SHR l, c*/ \ seteal(temp >> c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHR32, temp_orig, c, temp >> c); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ case 0x38: /*SAR l, c*/ \ temp = (int32_t)temp >> c; \ seteal(temp); if (abrt) return 1; \ set_flags_shift(FLAGS_SAR32, temp_orig, c, temp); \ - CLOCK_CYCLES((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 7); \ break; \ } \ } @@ -470,11 +470,9 @@ static int opD3_l_a32(uint32_t fetchdat) #define SHLD_w() \ if (count) \ { \ - uint16_t tempw = geteaw(); \ - int tempc; uint32_t templ; \ - if (abrt) return 1; \ - tempc = ((tempw << (count - 1)) & (1 << 15)) ? 1 : 0; \ - templ = (tempw << 16) | cpu_state.regs[reg].w; \ + uint16_t tempw = geteaw(); if (abrt) return 1; \ + int tempc = ((tempw << (count - 1)) & (1 << 15)) ? 1 : 0; \ + uint32_t templ = (tempw << 16) | cpu_state.regs[cpu_reg].w; \ if (count <= 16) tempw = templ >> (16 - count); \ else tempw = (templ << count) >> 16; \ seteaw(tempw); if (abrt) return 1; \ @@ -486,11 +484,9 @@ static int opD3_l_a32(uint32_t fetchdat) #define SHLD_l() \ if (count) \ { \ - uint32_t templ = geteal(); \ - int tempc; \ - if (abrt) return 1; \ - tempc = ((templ << (count - 1)) & (1 << 31)) ? 1 : 0; \ - templ = (templ << count) | (cpu_state.regs[reg].l >> (32 - count)); \ + uint32_t templ = geteal(); if (abrt) return 1; \ + int tempc = ((templ << (count - 1)) & (1 << 31)) ? 1 : 0; \ + templ = (templ << count) | (cpu_state.regs[cpu_reg].l >> (32 - count)); \ seteal(templ); if (abrt) return 1; \ setznp32(templ); \ flags_rebuild(); \ @@ -501,11 +497,9 @@ static int opD3_l_a32(uint32_t fetchdat) #define SHRD_w() \ if (count) \ { \ - uint16_t tempw = geteaw(); \ - int tempc; uint32_t templ; \ - if (abrt) return 1; \ - tempc = (tempw >> (count - 1)) & 1; \ - templ = tempw | (cpu_state.regs[reg].w << 16); \ + uint16_t tempw = geteaw(); if (abrt) return 1; \ + int tempc = (tempw >> (count - 1)) & 1; \ + uint32_t templ = tempw | (cpu_state.regs[cpu_reg].w << 16); \ tempw = templ >> count; \ seteaw(tempw); if (abrt) return 1; \ setznp16(tempw); \ @@ -516,11 +510,9 @@ static int opD3_l_a32(uint32_t fetchdat) #define SHRD_l() \ if (count) \ { \ - uint32_t templ = geteal(); \ - int tempc; \ - if (abrt) return 1; \ - tempc = (templ >> (count - 1)) & 1; \ - templ = (templ >> count) | (cpu_state.regs[reg].l << (32 - count)); \ + uint32_t templ = geteal(); if (abrt) return 1; \ + int tempc = (templ >> (count - 1)) & 1; \ + templ = (templ >> count) | (cpu_state.regs[cpu_reg].l << (32 - count)); \ seteal(templ); if (abrt) return 1; \ setznp32(templ); \ flags_rebuild(); \ diff --git a/src/x86_ops_stack.h b/src/x86_ops_stack.h index ee3a4d6d2..eda58894f 100644 --- a/src/x86_ops_stack.h +++ b/src/x86_ops_stack.h @@ -231,8 +231,8 @@ static int opPOPW_a16(uint32_t fetchdat) else SP -= 2; } - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); - else CLOCK_CYCLES((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6); + else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5); return abrt; } static int opPOPW_a32(uint32_t fetchdat) @@ -249,8 +249,8 @@ static int opPOPW_a32(uint32_t fetchdat) else SP -= 2; } - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); - else CLOCK_CYCLES((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6); + else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5); return abrt; } @@ -268,8 +268,8 @@ static int opPOPL_a16(uint32_t fetchdat) else SP -= 4; } - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); - else CLOCK_CYCLES((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6); + else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5); return abrt; } static int opPOPL_a32(uint32_t fetchdat) @@ -286,21 +286,17 @@ static int opPOPL_a32(uint32_t fetchdat) else SP -= 4; } - if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); - else CLOCK_CYCLES((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6); + else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5); return abrt; } static int opENTER_w(uint32_t fetchdat) { - uint16_t offset; - int count; - uint32_t tempEBP, tempESP, frame_ptr; - offset = getwordf(); - count = (fetchdat >> 16) & 0xff; - tempEBP = EBP, tempESP = ESP; - cpu_state.pc++; + uint16_t offset = getwordf(); + int count = (fetchdat >> 16) & 0xff; cpu_state.pc++; + uint32_t tempEBP = EBP, tempESP = ESP, frame_ptr; PUSH_W(BP); if (abrt) return 1; frame_ptr = ESP; @@ -331,13 +327,9 @@ static int opENTER_w(uint32_t fetchdat) } static int opENTER_l(uint32_t fetchdat) { - uint16_t offset; - int count; - uint32_t tempEBP, tempESP, frame_ptr; - offset = getwordf(); - count = (fetchdat >> 16) & 0xff; - tempEBP = EBP, tempESP = ESP; - cpu_state.pc++; + uint16_t offset = getwordf(); + int count = (fetchdat >> 16) & 0xff; cpu_state.pc++; + uint32_t tempEBP = EBP, tempESP = ESP, frame_ptr; PUSH_L(EBP); if (abrt) return 1; frame_ptr = ESP; diff --git a/src/x86_ops_xchg.h b/src/x86_ops_xchg.h index 55a3d4a58..d4852983b 100644 --- a/src/x86_ops_xchg.h +++ b/src/x86_ops_xchg.h @@ -3,9 +3,9 @@ static int opXCHG_b_a16(uint32_t fetchdat) uint8_t temp; fetch_ea_16(fetchdat); temp = geteab(); if (abrt) return 1; - seteab(getr8(reg)); if (abrt) return 1; - setr8(reg, temp); - CLOCK_CYCLES((mod == 3) ? 3 : 5); + seteab(getr8(cpu_reg)); if (abrt) return 1; + setr8(cpu_reg, temp); + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5); return 0; } static int opXCHG_b_a32(uint32_t fetchdat) @@ -13,9 +13,9 @@ static int opXCHG_b_a32(uint32_t fetchdat) uint8_t temp; fetch_ea_32(fetchdat); temp = geteab(); if (abrt) return 1; - seteab(getr8(reg)); if (abrt) return 1; - setr8(reg, temp); - CLOCK_CYCLES((mod == 3) ? 3 : 5); + seteab(getr8(cpu_reg)); if (abrt) return 1; + setr8(cpu_reg, temp); + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5); return 0; } @@ -24,9 +24,9 @@ static int opXCHG_w_a16(uint32_t fetchdat) uint16_t temp; fetch_ea_16(fetchdat); temp = geteaw(); if (abrt) return 1; - seteaw(cpu_state.regs[reg].w); if (abrt) return 1; - cpu_state.regs[reg].w = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 5); + seteaw(cpu_state.regs[cpu_reg].w); if (abrt) return 1; + cpu_state.regs[cpu_reg].w = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5); return 0; } static int opXCHG_w_a32(uint32_t fetchdat) @@ -34,9 +34,9 @@ static int opXCHG_w_a32(uint32_t fetchdat) uint16_t temp; fetch_ea_32(fetchdat); temp = geteaw(); if (abrt) return 1; - seteaw(cpu_state.regs[reg].w); if (abrt) return 1; - cpu_state.regs[reg].w = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 5); + seteaw(cpu_state.regs[cpu_reg].w); if (abrt) return 1; + cpu_state.regs[cpu_reg].w = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5); return 0; } @@ -45,9 +45,9 @@ static int opXCHG_l_a16(uint32_t fetchdat) uint32_t temp; fetch_ea_16(fetchdat); temp = geteal(); if (abrt) return 1; - seteal(cpu_state.regs[reg].l); if (abrt) return 1; - cpu_state.regs[reg].l = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 5); + seteal(cpu_state.regs[cpu_reg].l); if (abrt) return 1; + cpu_state.regs[cpu_reg].l = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5); return 0; } static int opXCHG_l_a32(uint32_t fetchdat) @@ -55,9 +55,9 @@ static int opXCHG_l_a32(uint32_t fetchdat) uint32_t temp; fetch_ea_32(fetchdat); temp = geteal(); if (abrt) return 1; - seteal(cpu_state.regs[reg].l); if (abrt) return 1; - cpu_state.regs[reg].l = temp; - CLOCK_CYCLES((mod == 3) ? 3 : 5); + seteal(cpu_state.regs[cpu_reg].l); if (abrt) return 1; + cpu_state.regs[cpu_reg].l = temp; + CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5); return 0; }