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Finished the ALi M15xx and removed from Dev branch.

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This commit is contained in:
OBattler
2021-07-01 01:43:59 +02:00
parent fd4817a87b
commit 15279e4964
13 changed files with 236 additions and 213 deletions
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13
src/chipset/CMakeLists.txt
View File

@@ -13,10 +13,10 @@
# Copyright 2020,2021 David Hrdlička.
#
add_library(chipset OBJECT acc2168.c cs8230.c ali1217.c ali1429.c ali1489.c headland.c
intel_82335.c cs4031.c intel_420ex.c intel_4x0.c intel_sio.c intel_piix.c ../ioapic.c
neat.c opti283.c opti291.c opti391.c opti495.c opti822.c opti895.c opti5x7.c scamp.c
scat.c sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c
add_library(chipset OBJECT acc2168.c cs8230.c ali1217.c ali1429.c ali1489.c ali1531.c ali1543.c
headland.c intel_82335.c cs4031.c intel_420ex.c intel_4x0.c intel_sio.c intel_piix.c
../ioapic.c neat.c opti283.c opti291.c opti391.c opti495.c opti822.c opti895.c opti5x7.c
scamp.c scat.c sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c
via_vt82c49x.c via_vt82c505.c sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c
gc100.c stpc.c
via_apollo.c via_pipc.c vl82c480.c wd76c10.c)
@@ -25,11 +25,6 @@ if(I450KX)
target_sources(chipset PRIVATE intel_i450kx.c)
endif()
if(M154X)
target_sources(chipset PRIVATE ali1531.c)
target_sources(chipset PRIVATE ali1543.c)
endif()
if(M6117)
target_sources(chipset PRIVATE ali6117.c)
endif()

31
src/chipset/ali1531.c
View File

@@ -34,6 +34,7 @@
#include <86box/chipset.h>
typedef struct ali1531_t
{
uint8_t pci_conf[256];
@@ -42,24 +43,46 @@ typedef struct ali1531_t
} ali1531_t;
#ifdef ENABLE_ALI1531_LOG
int ali1531_do_log = ENABLE_ALI1531_LOG;
static void
ali1531_smm_recalc(uint8_t val, ali1531_t *dev)
ali1531_log(const char *fmt, ...)
{
va_list ap;
if (ali1531_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define ali1531_log(fmt, ...)
#endif
static void
ali1531_smram_recalc(uint8_t val, ali1531_t *dev)
{
smram_disable_all();
if (val & 1) {
switch (val & 0x0c) {
case 0x00:
ali1531_log("SMRAM: D0000 -> B0000 (%i)\n", val & 2);
smram_enable(dev->smram, 0xd0000, 0xb0000, 0x10000, val & 2, 1);
if (val & 0x10)
mem_set_mem_state_smram_ex(1, 0xd0000, 0x10000, 0x02);
break;
case 0x04:
ali1531_log("SMRAM: A0000 -> A0000 (%i)\n", val & 2);
smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, val & 2, 1);
if (val & 0x10)
mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02);
break;
case 0x08:
ali1531_log("SMRAM: 30000 -> B0000 (%i)\n", val & 2);
smram_enable(dev->smram, 0x30000, 0xb0000, 0x10000, val & 2, 1);
if (val & 0x10)
mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02);
@@ -95,8 +118,8 @@ ali1531_shadow_recalc(int cur_reg, ali1531_t *dev)
shadowbios_write |= 1;
}
pclog("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff,
(dev->pci_conf[r_reg] & (1 << bit)) ? 'I' : 'E', (dev->pci_conf[w_reg] & (1 << bit)) ? 'I' : 'E');
ali1531_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff,
(dev->pci_conf[r_reg] & (1 << bit)) ? 'I' : 'E', (dev->pci_conf[w_reg] & (1 << bit)) ? 'I' : 'E');
mem_set_mem_state_both(base, 0x00004000, flags);
}
@@ -181,7 +204,7 @@ ali1531_write(int func, int addr, uint8_t val, void *priv)
case 0x48: /* SMRAM */
dev->pci_conf[addr] = val;
ali1531_smm_recalc((val >> 1) & 7, dev);
ali1531_smram_recalc(val, dev);
break;
case 0x49:

225
src/chipset/ali1543.c
View File

@@ -50,25 +50,6 @@
#include <86box/chipset.h>
#ifdef ENABLE_ALI1543_LOG
int ali1543_do_log = ENABLE_ALI1543_LOG;
static void
ali1543_log(const char *fmt, ...)
{
va_list ap;
if (ali1543_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define ali1543_log(fmt, ...)
#endif
typedef struct ali1543_t
{
uint8_t pci_conf[256], pmu_conf[256], usb_conf[256], ide_conf[256],
@@ -103,6 +84,25 @@ int ali1533_irq_routing[16] = { PCI_IRQ_DISABLED, 9, 3, 10,
1, 11, PCI_IRQ_DISABLED, 12, PCI_IRQ_DISABLED, 14, PCI_IRQ_DISABLED, 15 };
#ifdef ENABLE_ALI1543_LOG
int ali1543_do_log = ENABLE_ALI1543_LOG;
static void
ali1543_log(const char *fmt, ...)
{
va_list ap;
if (ali1543_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define ali1543_log(fmt, ...)
#endif
static void
ali1533_ddma_handler(ali1543_t *dev)
{
@@ -124,6 +124,9 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
ali1543_log("M1533: dev->pci_conf[%02x] = %02x\n", addr, val);
if (func > 0)
return;
switch (addr) {
case 0x04: /* Command Register */
if (!(dev->pci_conf[0x5f] & 0x08))
@@ -186,7 +189,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
soft_reset_pci = !!(val & 0x80);
sff_set_irq_level(dev->ide_controller[0], 0, !(val & 0x10));
sff_set_irq_level(dev->ide_controller[1], 0, !(val & 0x10));
pclog("INTAJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]);
ali1543_log("INTAJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]);
pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[val & 0x0f]);
pci_set_mirq_routing(PCI_MIRQ2, ali1533_irq_routing[val & 0x0f]);
break;
@@ -221,7 +224,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
case 0x4d: /* MBIRQ0(SIRQI#), MBIRQ1(SIRQII#) Interrupt to ISA IRQ routing table */
dev->pci_conf[addr] = val;
pclog("SIRQI = IRQ %i; SIRQII = IRQ %i\n", ali1533_irq_routing[(val >> 4) & 0x0f], ali1533_irq_routing[val & 0x0f]);
ali1543_log("SIRQI = IRQ %i; SIRQII = IRQ %i\n", ali1533_irq_routing[(val >> 4) & 0x0f], ali1533_irq_routing[val & 0x0f]);
// pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]);
// pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]);
break;
@@ -258,6 +261,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
TODO: What is IDSEL address? */
case 0x58:
dev->pci_conf[addr] = val & 0x7f;
ali1543_log("PCI58: %02X\n", val);
dev->ide_dev_enable = !!(val & 0x40);
switch (val & 0x30) {
case 0x00:
@@ -273,8 +277,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
dev->ide_slot = 0x0d; /* A24 = slot 13 */
break;
}
pclog("IDE slot = %02X (A%0i)\n", dev->ide_slot, dev->ide_slot + 11 - 5);
// ali5229_ide_handler(dev);
ali1543_log("IDE slot = %02X (A%0i)\n", dev->ide_slot, dev->ide_slot + 11 - 5);
ali5229_ide_irq_handler(dev);
break;
@@ -340,7 +343,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
dev->pmu_slot = 0x04; /* A15 = slot 04 */
break;
}
pclog("PMU slot = %02X (A%0i)\n", dev->pmu_slot, dev->pmu_slot + 11 - 5);
ali1543_log("PMU slot = %02X (A%0i)\n", dev->pmu_slot, dev->pmu_slot + 11 - 5);
switch (val & 0x03) {
case 0x00:
dev->usb_slot = 0x14; /* A31 = slot 20 */
@@ -355,7 +358,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
dev->usb_slot = 0x01; /* A12 = slot 01 */
break;
}
pclog("USB slot = %02X (A%0i)\n", dev->usb_slot, dev->usb_slot + 11 - 5);
ali1543_log("USB slot = %02X (A%0i)\n", dev->usb_slot, dev->usb_slot + 11 - 5);
break;
case 0x73: /* DDMA Base Address */
@@ -373,7 +376,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv)
dev->pci_conf[addr] = val & 0x1f;
sff_set_irq_level(dev->ide_controller[0], 1, !(val & 0x10));
sff_set_irq_level(dev->ide_controller[1], 1, !(val & 0x10));
pclog("INTBJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]);
ali1543_log("INTBJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]);
pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]);
pci_set_mirq_routing(PCI_MIRQ3, ali1533_irq_routing[val & 0x0f]);
break;
@@ -399,12 +402,16 @@ ali1533_read(int func, int addr, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
uint8_t ret = 0xff;
if (((dev->pci_conf[0x42] & 0x80) && (addr >= 0x40)) || ((dev->pci_conf[0x5f] & 8) && (addr == 4)))
ret = 0x00;
else {
ret = dev->pci_conf[addr];
if (addr == 0x41)
ret |= (keyboard_at_get_mouse_scan() << 2);
if (func == 0) {
if (((dev->pci_conf[0x42] & 0x80) && (addr >= 0x40)) || ((dev->pci_conf[0x5f] & 8) && (addr == 4)))
ret = 0x00;
else {
ret = dev->pci_conf[addr];
if (addr == 0x41)
ret |= (keyboard_at_get_mouse_scan() << 2);
else if (addr == 0x58)
ret = (ret & 0xbf) | (dev->ide_dev_enable ? 0x40 : 0x00);
}
}
return ret;
@@ -425,7 +432,7 @@ ali5229_ide_irq_handler(ali1543_t *dev)
if (dev->ide_conf[0x09] & (1 ^ bit)) {
/* Primary IDE is native. */
pclog("Primary IDE IRQ mode: Native, Native\n");
ali1543_log("Primary IDE IRQ mode: Native, Native\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 4);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 4);
} else {
@@ -433,25 +440,25 @@ ali5229_ide_irq_handler(ali1543_t *dev)
switch (dev->pci_conf[0x58] & 0x03) {
case 0x00:
/* SIRQI, SIRQII */
pclog("Primary IDE IRQ mode: SIRQI, SIRQII\n");
ali1543_log("Primary IDE IRQ mode: SIRQI, SIRQII\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 2);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5);
break;
case 0x01:
/* IRQ14, IRQ15 */
pclog("Primary IDE IRQ mode: IRQ14, IRQ15\n");
ali1543_log("Primary IDE IRQ mode: IRQ14, IRQ15\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 0);
break;
case 0x02:
/* IRQ14, SIRQII */
pclog("Primary IDE IRQ mode: IRQ14, SIRQII\n");
ali1543_log("Primary IDE IRQ mode: IRQ14, SIRQII\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5);
break;
case 0x03:
/* IRQ14, SIRQI */
pclog("Primary IDE IRQ mode: IRQ14, SIRQI\n");
ali1543_log("Primary IDE IRQ mode: IRQ14, SIRQI\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2);
break;
@@ -462,7 +469,7 @@ ali5229_ide_irq_handler(ali1543_t *dev)
if (dev->ide_conf[0x09] & (4 ^ bit)) {
/* Secondary IDE is native. */
pclog("Secondary IDE IRQ mode: Native, Native\n");
ali1543_log("Secondary IDE IRQ mode: Native, Native\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 4);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 4);
} else {
@@ -470,25 +477,25 @@ ali5229_ide_irq_handler(ali1543_t *dev)
switch (dev->pci_conf[0x58] & 0x03) {
case 0x00:
/* SIRQI, SIRQII */
pclog("Secondary IDE IRQ mode: SIRQI, SIRQII\n");
ali1543_log("Secondary IDE IRQ mode: SIRQI, SIRQII\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 2);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5);
break;
case 0x01:
/* IRQ14, IRQ15 */
pclog("Secondary IDE IRQ mode: IRQ14, IRQ15\n");
ali1543_log("Secondary IDE IRQ mode: IRQ14, IRQ15\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 0);
break;
case 0x02:
/* IRQ14, SIRQII */
pclog("Secondary IDE IRQ mode: IRQ14, SIRQII\n");
ali1543_log("Secondary IDE IRQ mode: IRQ14, SIRQII\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5);
break;
case 0x03:
/* IRQ14, SIRQI */
pclog("Secondary IDE IRQ mode: IRQ14, SIRQI\n");
ali1543_log("Secondary IDE IRQ mode: IRQ14, SIRQI\n");
sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0);
sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2);
break;
@@ -535,33 +542,20 @@ ali5229_ide_handler(ali1543_t *dev)
if (dev->ide_conf[0x52] & 0x10)
ch ^= 8;
#if 0
/* Both channels use one port */
if (dev->ide_conf[0x52] & 0x40) {
current_pri_base = current_sec_base;
current_pri_side = current_sec_side;
}
if (dev->ide_conf[0x52] & 0x20) {
current_sec_base = current_pri_base;
current_sec_side = current_pri_side;
}
#endif
pclog("ali5229_ide_handler(): Disabling primary IDE...\n");
ali1543_log("ali5229_ide_handler(): Disabling primary IDE...\n");
ide_pri_disable();
pclog("ali5229_ide_handler(): Disabling secondary IDE...\n");
ali1543_log("ali5229_ide_handler(): Disabling secondary IDE...\n");
ide_sec_disable();
if ((dev->ide_conf[0x04] & 0x01) && (dev->ide_conf[0x50] & 0x01)) {
if (dev->ide_conf[0x04] & 0x01) {
/* Primary Channel Setup */
if (dev->ide_conf[0x09] & 0x20) {
pclog("ali5229_ide_handler(): Primary IDE base now %04X...\n", current_pri_base);
ali1543_log("ali5229_ide_handler(): Primary IDE base now %04X...\n", current_pri_base);
ide_set_base(0, current_pri_base);
pclog("ali5229_ide_handler(): Primary IDE side now %04X...\n", current_pri_side);
ali1543_log("ali5229_ide_handler(): Primary IDE side now %04X...\n", current_pri_side);
ide_set_side(0, current_pri_side);
pclog("ali5229_ide_handler(): Enabling primary IDE...\n");
ali1543_log("ali5229_ide_handler(): Enabling primary IDE...\n");
ide_pri_enable();
sff_bus_master_handler(dev->ide_controller[0], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + (0 ^ ch));
@@ -570,12 +564,12 @@ ali5229_ide_handler(ali1543_t *dev)
/* Secondary Channel Setup */
if (dev->ide_conf[0x09] & 0x10) {
pclog("ali5229_ide_handler(): Secondary IDE base now %04X...\n", current_sec_base);
ali1543_log("ali5229_ide_handler(): Secondary IDE base now %04X...\n", current_sec_base);
ide_set_base(1, current_sec_base);
pclog("ali5229_ide_handler(): Secondary IDE side now %04X...\n", current_sec_side);
ali1543_log("ali5229_ide_handler(): Secondary IDE side now %04X...\n", current_sec_side);
ide_set_side(1, current_sec_side);
pclog("ali5229_ide_handler(): Enabling secondary IDE...\n");
ali1543_log("ali5229_ide_handler(): Enabling secondary IDE...\n");
ide_sec_enable();
sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, (((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8))) + (8 ^ ch));
@@ -623,7 +617,7 @@ ali5229_chip_reset(ali1543_t *dev)
dev->ide_conf[0x67] = 0x01;
dev->ide_conf[0x78] = 0x21;
ali5229_write(0, 0x04, 0x00, dev);
ali5229_write(0, 0x04, 0x01, dev);
ali5229_write(0, 0x10, 0xf1, dev);
ali5229_write(0, 0x11, 0x01, dev);
ali5229_write(0, 0x14, 0xf5, dev);
@@ -635,10 +629,12 @@ ali5229_chip_reset(ali1543_t *dev)
ali5229_write(0, 0x20, 0x01, dev);
ali5229_write(0, 0x21, 0xf0, dev);
ali5229_write(0, 0x4d, 0x00, dev);
dev->ide_conf[0x09] = 0xfa;
ali5229_write(0, 0x09, 0xfa, dev);
ali5229_write(0, 0x50, 0x00, dev);
ali5229_write(0, 0x52, 0x00, dev);
ali5229_write(0, 0x50, 0x00, dev);
sff_set_slot(dev->ide_controller[0], dev->ide_slot);
sff_set_slot(dev->ide_controller[1], dev->ide_slot);
sff_bus_master_reset(dev->ide_controller[0], (dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8));
@@ -653,16 +649,29 @@ ali5229_write(int func, int addr, uint8_t val, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
ali1543_log("M5229: dev->ide_conf[%02x] = %02x\n", addr, val);
if (func > 0)
return;
if (!dev->ide_dev_enable)
return;
switch (addr) {
case 0x04: /* COM - Command Register */
dev->ide_conf[addr] = val;
ali1543_log("IDE04: %02X\n", val);
dev->ide_conf[addr] = val & 0x45;
ali5229_ide_handler(dev);
break;
case 0x05:
dev->ide_conf[addr] = val & 0x01;
break;
case 0x07:
dev->ide_conf[addr] &= ~(val & 0xf1);
break;
case 0x09: /* Control */
ali1543_log("IDE09: %02X\n", val);
#ifdef M1543_C
val &= ~(dev->ide_conf[0x43]);
val |= (dev->ide_conf[addr] & dev->ide_conf[0x43]);
@@ -716,7 +725,9 @@ ali5229_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x50: /* Configuration */
ali1543_log("IDE50: %02X\n", val);
dev->ide_conf[addr] = val & 0x2b;
dev->ide_dev_enable = !!(val & 0x01);
break;
case 0x51:
@@ -774,10 +785,12 @@ ali5229_read(int func, int addr, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
uint8_t ret = 0xff;
if (dev->ide_dev_enable) {
if (dev->ide_dev_enable && (func == 0)) {
ret = dev->ide_conf[addr];
if ((addr == 0x09) && !(dev->ide_conf[0x50] & 0x02))
ret &= 0x0f;
else if (addr == 0x50)
ret = (ret & 0xfe) | (dev->ide_dev_enable ? 0x01 : 0x00);
else if (addr == 0x75)
ret = ide_read_ali_75();
else if (addr == 0x76)
@@ -794,6 +807,9 @@ ali5237_write(int func, int addr, uint8_t val, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
ali1543_log("M5237: dev->usb_conf[%02x] = %02x\n", addr, val);
if (func > 0)
return;
if (!dev->usb_dev_enable)
return;
@@ -845,7 +861,7 @@ ali5237_read(int func, int addr, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
uint8_t ret = 0xff;
if (dev->usb_dev_enable)
if (dev->usb_dev_enable && (func == 0))
ret = dev->usb_conf[addr];
return ret;
@@ -858,11 +874,18 @@ ali7101_write(int func, int addr, uint8_t val, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
ali1543_log("M7101: dev->pmu_conf[%02x] = %02x\n", addr, val);
if (func > 0)
return;
if (!dev->pmu_dev_enable)
return;
if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9))
return;
switch (addr) {
case 0x04: /* Enable PMU */
ali1543_log("PMU04: %02X\n", val);
dev->pmu_conf[addr] = val & 0x01;
acpi_update_io_mapping(dev->acpi, (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0), dev->pmu_conf[0x04] & 1);
smbus_piix4_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1));
@@ -904,9 +927,8 @@ ali7101_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x41:
dev->pmu_conf[addr] = val & 0x10;
pclog("PMU41: %02X\n", val);
// apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10));
apm_set_do_smi(dev->acpi->apm, dev->pmu_conf[0x41] & 0x10);
ali1543_log("PMU41: %02X\n", val);
apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10));
break;
/* TODO: Is the status R/W or R/WC? */
@@ -1031,8 +1053,8 @@ ali7101_write(int func, int addr, uint8_t val, void *priv)
/* TODO: If bit 1 is clear, then status bit is set even if SMI is disabled. */
dev->pmu_conf[addr] = val;
pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03));
pclog("PMU77: %02X\n", val);
// apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10));
ali1543_log("PMU77: %02X\n", val);
apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10));
break;
case 0x78:
@@ -1172,7 +1194,10 @@ ali7101_read(int func, int addr, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
uint8_t ret = 0xff;
if (dev->pmu_dev_enable) {
if (dev->pmu_dev_enable && (func == 0)) {
if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9))
return 0xff;
/* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
if (addr == 0x43)
ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
@@ -1225,7 +1250,7 @@ ali1533_sio_fdc_handler(ali1543_t *dev)
fdc_remove(dev->fdc_controller);
if (dev->device_regs[0][0x30] & 1) {
pclog("New FDC base address: %04X\n", dev->device_regs[0][0x61] | (dev->device_regs[0][0x60] << 8));
ali1543_log("New FDC base address: %04X\n", dev->device_regs[0][0x61] | (dev->device_regs[0][0x60] << 8));
fdc_set_base(dev->fdc_controller, dev->device_regs[0][0x61] | (dev->device_regs[0][0x60] << 8));
fdc_set_irq(dev->fdc_controller, dev->device_regs[0][0x70] & 0xf);
fdc_set_dma_ch(dev->fdc_controller, dev->device_regs[0][0x74] & 0x07);
@@ -1348,26 +1373,10 @@ ali1543_reset(void *priv)
ali1543_t *dev = (ali1543_t *)priv;
int i;
/* M1533 */
dev->pci_conf[0x00] = 0xb9;
dev->pci_conf[0x01] = 0x10;
dev->pci_conf[0x02] = 0x33;
dev->pci_conf[0x03] = 0x15;
dev->pci_conf[0x04] = 0x0f;
dev->pci_conf[0x07] = 0x02;
dev->pci_conf[0x0a] = 0x01;
dev->pci_conf[0x0b] = 0x06;
ali1533_write(0, 0x48, 0x00, dev); // Disables all IRQ's
ali1533_write(0, 0x44, 0x00, dev);
ali1533_write(0, 0x4d, 0x00, dev);
ali1533_write(0, 0x53, 0x00, dev);
ali1533_write(0, 0x58, 0x00, dev);
ali1533_write(0, 0x5f, 0x00, dev);
ali1533_write(0, 0x72, 0x00, dev);
ali1533_write(0, 0x74, 0x00, dev);
ali1533_write(0, 0x75, 0x00, dev);
ali1533_write(0, 0x76, 0x00, dev);
/* Temporarily enable everything. Register writes will disable the devices. */
dev->ide_dev_enable = 1;
dev->usb_dev_enable = 1;
dev->pmu_dev_enable = 1;
/* M5229 */
ali5229_chip_reset(dev);
@@ -1427,6 +1436,28 @@ ali1543_reset(void *priv)
ali7101_write(0, 0xc3, 0x00, dev);
ali7101_write(0, 0xe0, 0x00, dev);
/* Do the bridge last due to device deactivations. */
/* M1533 */
dev->pci_conf[0x00] = 0xb9;
dev->pci_conf[0x01] = 0x10;
dev->pci_conf[0x02] = 0x33;
dev->pci_conf[0x03] = 0x15;
dev->pci_conf[0x04] = 0x0f;
dev->pci_conf[0x07] = 0x02;
dev->pci_conf[0x0a] = 0x01;
dev->pci_conf[0x0b] = 0x06;
ali1533_write(0, 0x48, 0x00, dev); // Disables all IRQ's
ali1533_write(0, 0x44, 0x00, dev);
ali1533_write(0, 0x4d, 0x00, dev);
ali1533_write(0, 0x53, 0x00, dev);
ali1533_write(0, 0x58, 0x00, dev);
ali1533_write(0, 0x5f, 0x00, dev);
ali1533_write(0, 0x72, 0x00, dev);
ali1533_write(0, 0x74, 0x00, dev);
ali1533_write(0, 0x75, 0x00, dev);
ali1533_write(0, 0x76, 0x00, dev);
/* M1543 Super I/O */
memset(dev->sio_regs, 0x00, sizeof(dev->sio_regs));
for (i = 0; i < 8; i++)
@@ -1464,6 +1495,8 @@ ali1543_reset(void *priv)
ali1533_sio_uart_handler(0, dev);
ali1533_sio_uart_handler(1, dev);
ali1533_sio_lpt_handler(dev);
unmask_a20_in_smm = 1;
}