Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch.
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@@ -71,7 +71,7 @@ w83787_log(const char *fmt, ...)
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#define HEFERE ((dev->regs[0xC] >> 5) & 1)
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#define HAS_IDE_FUNCTIONALITY dev->ide_function
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#define HAS_IDE_FUNCTIONALITY dev->ide_function
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typedef struct {
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uint8_t tries, regs[42];
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@@ -91,9 +91,9 @@ static uint8_t w83787f_read(uint16_t port, void *priv);
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static void
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w83787f_remap(w83787f_t *dev)
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{
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io_removehandler(0x250, 0x0003,
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io_removehandler(0x250, 0x0004,
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w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev);
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io_sethandler(0x250, 0x0003,
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io_sethandler(0x250, 0x0004,
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w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev);
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dev->key = 0x88 | HEFERE;
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}
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@@ -207,18 +207,28 @@ w83787f_fdc_handler(w83787f_t *dev)
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fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? 0x03f0 : 0x0370);
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}
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static void
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w83787f_ide_handler(w83787f_t *dev)
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{
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ide_pri_disable();
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if(dev->regs[0] & 0x80)
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{
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ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170);
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ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376);
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ide_pri_enable();
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}
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if (dev->ide_function & 0x20) {
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ide_sec_disable();
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if (!(dev->regs[0] & 0x80)) {
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ide_set_base(1, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170);
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ide_set_side(1, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376);
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ide_sec_enable();
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}
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} else {
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ide_pri_disable();
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if (!(dev->regs[0] & 0x80)) {
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ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170);
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ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376);
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ide_pri_enable();
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}
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}
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}
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static void
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w83787f_write(uint16_t port, uint8_t val, void *priv)
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{
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@@ -352,18 +362,25 @@ w83787f_reset(w83787f_t *dev)
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lpt1_init(0x378);
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lpt1_irq(7);
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if(HAS_IDE_FUNCTIONALITY)
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{
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ide_pri_disable();
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ide_set_base(0, 0x1f0);
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ide_set_side(0, 0x3f6);
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ide_pri_enable();
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memset(dev->regs, 0, 0x2A);
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if (HAS_IDE_FUNCTIONALITY) {
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if (dev->ide_function & 0x20) {
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dev->regs[0x00] = 0x90;
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ide_sec_disable();
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ide_set_base(1, 0x170);
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ide_set_side(1, 0x376);
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} else {
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dev->regs[0x00] = 0xd0;
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ide_pri_disable();
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ide_set_base(0, 0x1f0);
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ide_set_side(0, 0x3f6);
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}
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} else
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dev->regs[0x00] = 0xd0;
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fdc_reset(dev->fdc);
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memset(dev->regs, 0, 0x2A);
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dev->regs[0x00] = 0x50;
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dev->regs[0x01] = 0x2C;
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dev->regs[0x03] = 0x30;
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dev->regs[0x07] = 0xF5;
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@@ -399,14 +416,14 @@ w83787f_init(const device_t *info)
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w83787f_t *dev = (w83787f_t *) malloc(sizeof(w83787f_t));
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memset(dev, 0, sizeof(w83787f_t));
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HAS_IDE_FUNCTIONALITY = !!(info->local & 0x10);
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HAS_IDE_FUNCTIONALITY = (info->local & 0x30);
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dev->fdc = device_add(&fdc_at_winbond_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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if(HAS_IDE_FUNCTIONALITY)
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if ((dev->ide_function & 0x30) == 0x10)
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device_add(&ide_isa_device);
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dev->reg_init = info->local & 0x0f;
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@@ -426,10 +443,19 @@ const device_t w83787f_device = {
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};
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const device_t w83787f_ide_device = {
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"Winbond W83787F/IF Super I/O with IDE functionality",
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"Winbond W83787F/IF Super I/O (With IDE)",
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0,
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0x19,
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w83787f_init, w83787f_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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const device_t w83787f_ide_sec_device = {
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"Winbond W83787F/IF Super I/O (With Secondary IDE)",
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0,
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0x39,
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w83787f_init, w83787f_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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