diff --git a/src/codegen/codegen_ops_x86-64.h b/src/codegen/codegen_ops_x86-64.h index ab68a535a..452f09937 100644 --- a/src/codegen/codegen_ops_x86-64.h +++ b/src/codegen/codegen_ops_x86-64.h @@ -1026,9 +1026,10 @@ static inline void MEM_LOAD_ADDR_EA_B(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); - call_long((uintptr_t)readmemb386l); + call_long((uintptr_t)readmembl); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -1105,8 +1106,9 @@ static inline void MEM_LOAD_ADDR_EA_W(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); call_long((uintptr_t)readmemwl); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -1190,8 +1192,9 @@ static inline void MEM_LOAD_ADDR_EA_L(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); call_long((uintptr_t)readmemll); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -1269,8 +1272,9 @@ static inline void MEM_LOAD_ADDR_EA_Q(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); call_long((uintptr_t)readmemql); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -1394,10 +1398,11 @@ static inline void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); - load_param_3_reg_32(host_reg); - call_long((uintptr_t)writememb386l); + load_param_2_reg_32(host_reg); + call_long((uintptr_t)writemembl); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -1485,9 +1490,10 @@ static inline void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); - load_param_3_reg_32(host_reg); + load_param_2_reg_32(host_reg); call_long((uintptr_t)writememwl); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -1574,9 +1580,10 @@ static inline void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); - load_param_3_reg_32(host_reg); + load_param_2_reg_32(host_reg); call_long((uintptr_t)writememll); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -1664,9 +1671,10 @@ static inline void MEM_STORE_ADDR_EA_Q(x86seg *seg, int host_reg, int host_reg2) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12+4+6); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); - load_param_3_reg_64(host_reg); + load_param_2_reg_64(host_reg); call_long((uintptr_t)writememql); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -5763,9 +5771,10 @@ static inline int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); - call_long((uintptr_t)readmemb386l); + call_long((uintptr_t)readmembl); addbyte(0x89); /*MOV ECX, EAX*/ addbyte(0xc1); /*done:*/ @@ -5841,8 +5850,9 @@ static inline int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); call_long((uintptr_t)readmemwl); addbyte(0x89); /*MOV ECX, EAX*/ addbyte(0xc1); @@ -5918,8 +5928,9 @@ static inline int MEM_LOAD_ADDR_EA_L_NO_ABRT(x86seg *seg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+12); /*slowpath:*/ + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); load_param_1_reg_32(REG_ECX); - load_param_2_reg_32(REG_EAX); call_long((uintptr_t)readmemll); addbyte(0x89); /*MOV ECX, EAX*/ addbyte(0xc1); @@ -6023,10 +6034,11 @@ static inline void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12); /*slowpath:*/ - load_param_3_reg_32(host_reg); - load_param_1_reg_32(REG_EBX); - load_param_2_reg_32(REG_EAX); - call_long((uintptr_t)writememb386l); + load_param_2_reg_32(host_reg); + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); + load_param_1_reg_32(REG_ECX); + call_long((uintptr_t)writemembl); /*done:*/ } static inline void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg) @@ -6107,9 +6119,10 @@ static inline void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12); /*slowpath:*/ - load_param_3_reg_32(host_reg); - load_param_1_reg_32(REG_EBX); - load_param_2_reg_32(REG_EAX); + load_param_2_reg_32(host_reg); + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); + load_param_1_reg_32(REG_ECX); call_long((uintptr_t)writememwl); /*done:*/ } @@ -6189,9 +6202,10 @@ static inline void MEM_STORE_ADDR_EA_L_NO_ABRT(x86seg *seg, int host_reg) addbyte(0xeb); /*JMP done*/ addbyte(2+2+3+12); /*slowpath:*/ - load_param_3_reg_32(host_reg); - load_param_1_reg_32(REG_EBX); - load_param_2_reg_32(REG_EAX); + load_param_2_reg_32(host_reg); + addbyte(0x01); /*ADD ECX,EAX*/ + addbyte(0xc1); + load_param_1_reg_32(REG_ECX); call_long((uintptr_t)writememll); /*done:*/ } diff --git a/src/codegen/codegen_x86.c b/src/codegen/codegen_x86.c index 4ad608aac..31b3202e6 100644 --- a/src/codegen/codegen_x86.c +++ b/src/codegen/codegen_x86.c @@ -204,13 +204,14 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_W() addbyte(0x3a); addbyte(0xc3); /*RET*/ - addbyte(0x50); /*slowpath: PUSH EAX*/ + addbyte(0x01); /*slowpath: ADD ESI,EAX*/ + addbyte(0xc6); addbyte(0x56); /*PUSH ESI*/ addbyte(0xe8); /*CALL readmemwl*/ addlong((uint32_t)readmemwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 8*/ + addbyte(0x83); /*ADD ESP, 4*/ addbyte(0xc4); - addbyte(8); + addbyte(4); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -258,13 +259,14 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_L() addbyte(0x3a); addbyte(0xc3); /*RET*/ - addbyte(0x50); /*slowpath: PUSH EAX*/ + addbyte(0x01); /*slowpath: ADD ESI,EAX*/ + addbyte(0xc6); addbyte(0x56); /*PUSH ESI*/ addbyte(0xe8); /*CALL readmemll*/ addlong((uint32_t)readmemll - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 8*/ + addbyte(0x83); /*ADD ESP, 4*/ addbyte(0xc4); - addbyte(8); + addbyte(4); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -313,13 +315,14 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_Q() addbyte(4); addbyte(0xc3); /*RET*/ - addbyte(0x50); /*slowpath: PUSH EAX*/ + addbyte(0x01); /*slowpath: ADD ESI,EAX*/ + addbyte(0xc6); addbyte(0x56); /*PUSH ESI*/ addbyte(0xe8); /*CALL readmemql*/ addlong((uint32_t)readmemql - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 8*/ + addbyte(0x83); /*ADD ESP, 4*/ addbyte(0xc4); - addbyte(8); + addbyte(4); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -416,13 +419,14 @@ static uint32_t gen_MEM_STORE_ADDR_EA_W() addbyte(0xc3); /*RET*/ addbyte(0x51); /*slowpath: PUSH ECX*/ - addbyte(0x50); /*PUSH EAX*/ + addbyte(0x01); /*ADD EBX,EAX*/ + addbyte(0xC3); addbyte(0x53); /*PUSH EBX*/ addbyte(0xe8); /*CALL writememwl*/ addlong((uint32_t)writememwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 12*/ + addbyte(0x83); /*ADD ESP, 8*/ addbyte(0xc4); - addbyte(12); + addbyte(8); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -469,13 +473,14 @@ static uint32_t gen_MEM_STORE_ADDR_EA_L() addbyte(0xc3); /*RET*/ addbyte(0x51); /*slowpath: PUSH ECX*/ - addbyte(0x50); /*PUSH EAX*/ + addbyte(0x01); /*ADD EBX,EAX*/ + addbyte(0xC3); addbyte(0x53); /*PUSH EBX*/ addbyte(0xe8); /*CALL writememll*/ addlong((uint32_t)writememll - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 12*/ + addbyte(0x83); /*ADD ESP, 8*/ addbyte(0xc4); - addbyte(12); + addbyte(8); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -527,13 +532,14 @@ static uint32_t gen_MEM_STORE_ADDR_EA_Q() addbyte(0x51); /*slowpath: PUSH ECX*/ addbyte(0x53); /*PUSH EBX*/ - addbyte(0x50); /*PUSH EAX*/ + addbyte(0x01); /*ADD EDX,EAX*/ + addbyte(0xC2); addbyte(0x52); /*PUSH EDX*/ addbyte(0xe8); /*CALL writememql*/ addlong((uint32_t)writememql - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 16*/ + addbyte(0x83); /*ADD ESP, 12*/ addbyte(0xc4); - addbyte(16); + addbyte(12); addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); addbyte((uint8_t)cpu_state_offset(abrt)); @@ -647,13 +653,14 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_W_NO_ABRT() addbyte(0x3a); addbyte(0xc3); /*RET*/ - addbyte(0x50); /*slowpath: PUSH EAX*/ + addbyte(0x01); /*slowpath: ADD ESI,EAX*/ + addbyte(0xc6); addbyte(0x56); /*PUSH ESI*/ addbyte(0xe8); /*CALL readmemwl*/ addlong((uint32_t)readmemwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 8*/ + addbyte(0x83); /*ADD ESP, 4*/ addbyte(0xc4); - addbyte(8); + addbyte(4); #ifndef RELEASE_BUILD addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -715,13 +722,14 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_L_NO_ABRT() addbyte(0x3a); addbyte(0xc3); /*RET*/ - addbyte(0x50); /*slowpath: PUSH EAX*/ + addbyte(0x01); /*slowpath: ADD ESI,EAX*/ + addbyte(0xc6); addbyte(0x56); /*PUSH ESI*/ addbyte(0xe8); /*CALL readmemll*/ addlong((uint32_t)readmemll - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 8*/ + addbyte(0x83); /*ADD ESP, 4*/ addbyte(0xc4); - addbyte(8); + addbyte(4); addbyte(0x89); /*MOV ECX, EAX*/ addbyte(0xc1); #ifndef RELEASE_BUILD @@ -847,13 +855,14 @@ static uint32_t gen_MEM_STORE_ADDR_EA_W_NO_ABRT() addbyte(0xc3); /*RET*/ addbyte(0x51); /*slowpath: PUSH ECX*/ - addbyte(0x50); /*PUSH EAX*/ + addbyte(0x01); /*ADD EBX,EAX*/ + addbyte(0xC3); addbyte(0x53); /*PUSH EBX*/ addbyte(0xe8); /*CALL writememwl*/ addlong((uint32_t)writememwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 12*/ + addbyte(0x83); /*ADD ESP, 8*/ addbyte(0xc4); - addbyte(12); + addbyte(8); #ifndef RELEASE_BUILD addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); @@ -912,13 +921,14 @@ static uint32_t gen_MEM_STORE_ADDR_EA_L_NO_ABRT() addbyte(0xc3); /*RET*/ addbyte(0x51); /*slowpath: PUSH ECX*/ - addbyte(0x50); /*PUSH EAX*/ + addbyte(0x01); /*ADD EBX,EAX*/ + addbyte(0xC3); addbyte(0x53); /*PUSH EBX*/ addbyte(0xe8); /*CALL writememll*/ addlong((uint32_t)writememll - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); - addbyte(0x83); /*ADD ESP, 12*/ + addbyte(0x83); /*ADD ESP, 8*/ addbyte(0xc4); - addbyte(12); + addbyte(8); #ifndef RELEASE_BUILD addbyte(0x80); /*CMP abrt, 0*/ addbyte(0x7d); diff --git a/src/cpu/386_common.h b/src/cpu/386_common.h index 2c7c0eaff..ed4bc84d7 100644 --- a/src/cpu/386_common.h +++ b/src/cpu/386_common.h @@ -21,47 +21,20 @@ #include -#ifdef USE_NEW_DYNAREC -#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV)?readmembl((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uintptr_t)((s) + (a)))) -#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 1))?readmemwl((s)+(a)):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) -#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 3))?readmemll((s)+(a)):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) -#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 7))?readmemql((s)+(a)):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) - -#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV) writemembl((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 1)) writememwl((s)+(a),v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 3)) writememll((s)+(a),v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (((s)+(a)) & 7)) writememql((s)+(a),v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#else #define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF)?readmembl((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uintptr_t)((s) + (a))) ) -#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 1))?readmemwl(s,a):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) -#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 3))?readmemll(s,a):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) -#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 7))?readmemql(s,a):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) +#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 1))?readmemwl((s)+(a)):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) +#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 3))?readmemll((s)+(a)):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) +#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 7))?readmemql((s)+(a)):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uintptr_t)((s)+(a)))) #define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF) writemembl((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 1)) writememwl(s,a,v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 3)) writememll(s,a,v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 7)) writememql(s,a,v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v -#endif +#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 1)) writememwl((s)+(a),v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 3)) writememll((s)+(a),v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v +#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==LOOKUP_INV || (s)==0xFFFFFFFF || (((s)+(a)) & 7)) writememql((s)+(a),v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uintptr_t)((s) + (a))) = v int checkio(int port); -#ifdef USE_NEW_DYNAREC -#define check_io_perm(port) if (!IOPLp || (cpu_state.eflags&VM_FLAG)) \ - { \ - int tempi = checkio(port); \ - if (cpu_state.abrt) return 1; \ - if (tempi) \ - { \ - if (cpu_state.eflags & VM_FLAG) \ - x86gpf_expected(NULL,0); \ - else \ - x86gpf(NULL,0); \ - return 1; \ - } \ - } -#else #define check_io_perm(port) if (msw&1 && ((CPL > IOPL) || (cpu_state.eflags&VM_FLAG))) \ { \ int tempi = checkio(port); \ @@ -75,7 +48,6 @@ int checkio(int port); return 1; \ } \ } -#endif #define SEG_CHECK_READ(seg) \ do \ @@ -344,32 +316,16 @@ static __inline void seteaq(uint64_t v) { if (seteaq_cwc()) return; -#ifdef USE_NEW_DYNAREC writememql(easeg + cpu_state.eaaddr, v); -#else - writememql(easeg, cpu_state.eaaddr, v); -#endif } -#ifdef USE_NEW_DYNAREC #define seteab(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v -#define seteaw(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1); if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].w=v -#define seteal(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].l=v -#else -#define seteab(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); if (eal_w) *(uint8_t *)eal_w=v; else { writemembl(easeg+cpu_state.eaaddr,v); } } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v -#define seteaw(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1); if (eal_w) *(uint16_t *)eal_w=v; else { writememwl(easeg,cpu_state.eaaddr,v); } } else cpu_state.regs[cpu_rm].w=v -#define seteal(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); if (eal_w) *eal_w=v; else { writememll(easeg,cpu_state.eaaddr,v); } } else cpu_state.regs[cpu_rm].l=v -#endif +#define seteaw(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 1); if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].w=v +#define seteal(v) if (cpu_mod!=3) { CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].l=v -#ifdef USE_NEW_DYNAREC #define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v); #define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v); #define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v); -#else -#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v); -#define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,cpu_state.eaaddr,v); -#define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg,cpu_state.eaaddr,v); -#endif #define getbytef() ((uint8_t)(fetchdat)); cpu_state.pc++ #define getwordf() ((uint16_t)(fetchdat)); cpu_state.pc+=2 diff --git a/src/include/86box/mem.h b/src/include/86box/mem.h index 7e7d4a67c..b6718762b 100644 --- a/src/include/86box/mem.h +++ b/src/include/86box/mem.h @@ -240,21 +240,12 @@ extern uint8_t readmembl(uint32_t addr); extern void writemembl(uint32_t addr, uint8_t val); extern void rwmembl(uint32_t raddr, uint32_t waddr, uint8_t val); -#ifndef USE_NEW_DYNAREC -extern uint16_t readmemwl(uint32_t seg, uint32_t addr); -extern void writememwl(uint32_t seg, uint32_t addr, uint16_t val); -extern uint32_t readmemll(uint32_t seg, uint32_t addr); -extern void writememll(uint32_t seg, uint32_t addr, uint32_t val); -extern uint64_t readmemql(uint32_t seg, uint32_t addr); -extern void writememql(uint32_t seg, uint32_t addr, uint64_t val); -#else extern uint16_t readmemwl(uint32_t addr); extern void writememwl(uint32_t addr, uint16_t val); extern uint32_t readmemll(uint32_t addr); extern void writememll(uint32_t addr, uint32_t val); extern uint64_t readmemql(uint32_t addr); extern void writememql(uint32_t addr, uint64_t val); -#endif extern uint8_t *getpccache(uint32_t a); extern uint64_t mmutranslatereal(uint32_t addr, int rw); diff --git a/src/mem/mem.c b/src/mem/mem.c index f416171a6..a448dc1c7 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -296,7 +296,7 @@ mmutranslatereal_normal(uint32_t addr, int rw) if ((temp & 0x80) && (cr4 & CR4_PSE)) { /*4MB page*/ - if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (!is386 && (cr0 & WP_FLAG))))) { + if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) { cr2 = addr; temp &= 1; if (CPL == 3) @@ -317,7 +317,7 @@ mmutranslatereal_normal(uint32_t addr, int rw) temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc)); temp3 = temp & temp2; - if (!(temp&1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (!is386 && (cr0 & WP_FLAG))))) { + if (!(temp&1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) { cr2 = addr; temp &= 1; if (CPL == 3) temp |= 4; @@ -1162,11 +1162,11 @@ writememql(uint32_t addr, uint64_t val) } #else uint16_t -readmemwl(uint32_t seg, uint32_t addr) +readmemwl(uint32_t addr) { uint64_t addr64 = (uint64_t) addr; mem_mapping_t *map; - uint32_t addr2 = mem_logical_addr = seg + addr; + uint32_t addr2 = mem_logical_addr = addr; if (addr2 & 1) { if (!cpu_cyrix_alignment || (addr2 & 7) == 7) @@ -1178,7 +1178,7 @@ readmemwl(uint32_t seg, uint32_t addr) if (mmutranslate_read(addr2+1) == 0xffffffffffffffffULL) return 0xffff; } - return readmembl(seg+addr)|(((uint16_t) readmembl(seg+addr+1))<<8); + return readmembl(addr)|(((uint16_t) readmembl(addr+1))<<8); } else if (readlookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) return *(uint16_t *)(readlookup2[addr2 >> 12] + addr2); } @@ -1200,12 +1200,8 @@ readmemwl(uint32_t seg, uint32_t addr) return map->read_w(addr2, map->p); if (map && map->read_b) { - if (AT) - return map->read_b(addr2, map->p) | - ((uint16_t) (map->read_b(addr2 + 1, map->p)) << 8); - else - return map->read_b(addr2, map->p) | - ((uint16_t) (map->read_b(seg + ((addr + 1) & 0xffff), map->p)) << 8); + return map->read_b(addr2, map->p) | + ((uint16_t) (map->read_b(addr2 + 1, map->p)) << 8); } return 0xffff; @@ -1213,11 +1209,11 @@ readmemwl(uint32_t seg, uint32_t addr) void -writememwl(uint32_t seg, uint32_t addr, uint16_t val) +writememwl(uint32_t addr, uint16_t val) { uint64_t addr64 = (uint64_t) addr; mem_mapping_t *map; - uint32_t addr2 = mem_logical_addr = seg + addr; + uint32_t addr2 = mem_logical_addr = addr; if (addr2 & 1) { if (!cpu_cyrix_alignment || (addr2 & 7) == 7) @@ -1227,8 +1223,8 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val) if (mmutranslate_write(addr2) == 0xffffffffffffffffULL) return; if (mmutranslate_write(addr2+1) == 0xffffffffffffffffULL) return; } - writemembl(seg+addr,val); - writemembl(seg+addr+1,val>>8); + writemembl(addr,val); + writemembl(addr+1,val>>8); return; } else if (writelookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) { *(uint16_t *)(writelookup2[addr2 >> 12] + addr2) = val; @@ -1268,11 +1264,11 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val) uint32_t -readmemll(uint32_t seg, uint32_t addr) +readmemll(uint32_t addr) { uint64_t addr64 = (uint64_t) addr; mem_mapping_t *map; - uint32_t addr2 = mem_logical_addr = seg + addr; + uint32_t addr2 = mem_logical_addr = addr; if (addr2 & 3) { if (!cpu_cyrix_alignment || (addr2 & 7) > 4) @@ -1282,7 +1278,7 @@ readmemll(uint32_t seg, uint32_t addr) if (mmutranslate_read(addr2) == 0xffffffffffffffffULL) return 0xffffffff; if (mmutranslate_read(addr2+3) == 0xffffffffffffffffULL) return 0xffffffff; } - return readmemwl(seg,addr)|(readmemwl(seg,addr+2)<<16); + return readmemwl(addr)|(readmemwl(addr+2)<<16); } else if (readlookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) return *(uint32_t *)(readlookup2[addr2 >> 12] + addr2); } @@ -1318,11 +1314,11 @@ readmemll(uint32_t seg, uint32_t addr) void -writememll(uint32_t seg, uint32_t addr, uint32_t val) +writememll(uint32_t addr, uint32_t val) { uint64_t addr64 = (uint64_t) addr; mem_mapping_t *map; - uint32_t addr2 = mem_logical_addr = seg + addr; + uint32_t addr2 = mem_logical_addr = addr; if (addr2 & 3) { if (!cpu_cyrix_alignment || (addr2 & 7) > 4) @@ -1332,8 +1328,8 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val) if (mmutranslate_write(addr2) == 0xffffffffffffffffULL) return; if (mmutranslate_write(addr2+3) == 0xffffffffffffffffULL) return; } - writememwl(seg,addr,val); - writememwl(seg,addr+2,val>>16); + writememwl(addr,val); + writememwl(addr+2,val>>16); return; } else if (writelookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) { *(uint32_t *)(writelookup2[addr2 >> 12] + addr2) = val; @@ -1379,11 +1375,11 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val) uint64_t -readmemql(uint32_t seg, uint32_t addr) +readmemql(uint32_t addr) { uint64_t addr64 = (uint64_t) addr; mem_mapping_t *map; - uint32_t addr2 = mem_logical_addr = seg + addr; + uint32_t addr2 = mem_logical_addr = addr; if (addr2 & 7) { cycles -= timing_misaligned; @@ -1392,7 +1388,7 @@ readmemql(uint32_t seg, uint32_t addr) if (mmutranslate_read(addr2) == 0xffffffffffffffffULL) return 0xffffffffffffffffULL; if (mmutranslate_read(addr2+7) == 0xffffffffffffffffULL) return 0xffffffffffffffffULL; } - return readmemll(seg,addr)|((uint64_t)readmemll(seg,addr+4)<<32); + return readmemll(addr)|((uint64_t)readmemll(addr+4)<<32); } else if (readlookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) return *(uint64_t *)(readlookup2[addr2 >> 12] + addr2); } @@ -1412,16 +1408,16 @@ readmemql(uint32_t seg, uint32_t addr) if (map && map->read_l) return map->read_l(addr2, map->p) | ((uint64_t)map->read_l(addr2 + 4, map->p) << 32); - return readmemll(seg,addr) | ((uint64_t)readmemll(seg,addr+4)<<32); + return readmemll(addr) | ((uint64_t)readmemll(addr+4)<<32); } void -writememql(uint32_t seg, uint32_t addr, uint64_t val) +writememql(uint32_t addr, uint64_t val) { uint64_t addr64 = (uint64_t) addr; mem_mapping_t *map; - uint32_t addr2 = mem_logical_addr = seg + addr; + uint32_t addr2 = mem_logical_addr = addr; if (addr2 & 7) { cycles -= timing_misaligned; @@ -1430,8 +1426,8 @@ writememql(uint32_t seg, uint32_t addr, uint64_t val) if (mmutranslate_write(addr2) == 0xffffffffffffffffULL) return; if (mmutranslate_write(addr2+7) == 0xffffffffffffffffULL) return; } - writememll(seg, addr, val); - writememll(seg, addr+4, val >> 32); + writememll(addr, val); + writememll(addr+4, val >> 32); return; } else if (writelookup2[addr2 >> 12] != (uintptr_t) LOOKUP_INV) { *(uint64_t *)(writelookup2[addr2 >> 12] + addr2) = val;