claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions 3 Packages Projects Releases Wiki Activity

Removed all model-based one-line header files and moved their info to model.h. Added static to handler functions where needed.

Browse Source
This commit is contained in:
waltje
2017-06-16 16:00:44 -04:00
parent 743c8f3680
commit 2019183c29
49 changed files with 539 additions and 538 deletions
Download Patch File Download Diff File Expand all files Collapse all files

123
src/opti495.c
View File

@@ -1,63 +1,7 @@
/*OPTi 82C495 emulation
This is the chipset used in the AMI386 model*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
This is the chipset used in the AMI386 model
static uint8_t optiregs[0x10];
static int optireg;
static void opti495_write(uint16_t addr, uint8_t val, void *p)
{
switch (addr)
{
case 0x22:
optireg=val;
break;
case 0x24:
printf("Writing OPTI reg %02X %02X\n",optireg,val);
if (optireg>=0x20 && optireg<=0x2C)
{
optiregs[optireg-0x20]=val;
if (optireg == 0x21)
{
cpu_cache_ext_enabled = val & 0x10;
cpu_update_waitstates();
}
if (optireg == 0x22)
{
shadowbios = !(val & 0x80);
shadowbios_write = val & 0x80;
if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
}
}
break;
}
}
static uint8_t opti495_read(uint16_t addr, void *p)
{
switch (addr)
{
case 0x24:
if (optireg>=0x20 && optireg<=0x2C) return optiregs[optireg-0x20];
break;
}
return 0xFF;
}
void opti495_init()
{
io_sethandler(0x0022, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
io_sethandler(0x0024, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
optiregs[0x22-0x20] = 0x80;
}
/*Details for the chipset from Ralph Brown's interrupt list
Details for the chipset from Ralph Brown's interrupt list
This describes the OPTi 82C493, the 82C495 seems similar except there is one
more register (2C)
@@ -306,5 +250,66 @@ Bit(s) Description (Table P0188)
Note: the block address is forced to be a multiple of the block size by
ignoring the appropriate number of the least-significant bits
SeeAlso: #P0178,#P0187
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "device.h"
#include "model.h"
static uint8_t optiregs[0x10];
static int optireg;
static void opti495_write(uint16_t addr, uint8_t val, void *p)
{
switch (addr)
{
case 0x22:
optireg=val;
break;
case 0x24:
printf("Writing OPTI reg %02X %02X\n",optireg,val);
if (optireg>=0x20 && optireg<=0x2C)
{
optiregs[optireg-0x20]=val;
if (optireg == 0x21)
{
cpu_cache_ext_enabled = val & 0x10;
cpu_update_waitstates();
}
if (optireg == 0x22)
{
shadowbios = !(val & 0x80);
shadowbios_write = val & 0x80;
if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
}
}
break;
}
}
static uint8_t opti495_read(uint16_t addr, void *p)
{
switch (addr)
{
case 0x24:
if (optireg>=0x20 && optireg<=0x2C) return optiregs[optireg-0x20];
break;
}
return 0xFF;
}
void opti495_init(void)
{
io_sethandler(0x0022, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
io_sethandler(0x0024, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
optiregs[0x22-0x20] = 0x80;
}