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Removed all model-based one-line header files and moved their info to model.h. Added static to handler functions where needed.

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This commit is contained in:
waltje
2017-06-16 16:00:44 -04:00
parent 743c8f3680
commit 2019183c29
49 changed files with 539 additions and 538 deletions
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72
src/Makefile.mingw
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@@ -8,12 +8,10 @@
#
# Modified Makefile for Win32 (MinGW32) environment.
#
# Version: @(#)Makefile.mingw 1.0.29 2017/06/16
# Version: @(#)Makefile.mingw 1.0.30 2017/06/17
#
# Authors: Miran Grca, <mgrca8@gmail.com>
# Fred N. van Kempen, <decwiz@yahoo.com>
# Sarah Walker,
# Richard G.,
#
# Name of the executable.
@@ -274,13 +272,13 @@ pcap_if.res: pcap_if.rc
# Module dependencies.
acer386sx.o: ibm.h cpu/cpu.h io.h acer386sx.h
acer386sx.o: ibm.h cpu/cpu.h io.h device.h model.h
acerm3a.o: ibm.h io.h acerm3a.h
acerm3a.o: ibm.h cpu/cpu.h io.h device.h model.h
ali1429.o: ibm.h cpu/cpu.h io.h mem.h ali1429.h
ali1429.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
amstrad.o: ibm.h io.h keyboard.h lpt.h mouse.h amstrad.h
amstrad.o: ibm.h cpu/cpu.h io.h device.h model.h keyboard.h lpt.h mouse.h
bugger.o: ibm.h io.h bugger.h
@@ -291,7 +289,7 @@ cdrom_ioctl.o: ibm.h cdrom.h cdrom_ioctl.h scsi.h
cdrom_null.o: ibm.h cdrom.h cdrom_ioctl.h
compaq.o: ibm.h mem.h
compaq.o: ibm.h cpu/cpu.h mem.h device.h model.h
config.o: cdrom.h config.h device.h disc.h fdc.h fdd.h ibm.h \
cpu/cpu.h gameport.h ide.h hdd.h model.h mouse.h \
@@ -343,19 +341,19 @@ hdd_image.o: ibm.h ide.h hdd_image.h
hdd_esdi.o: ibm.h device.h dma.h hdd_image.h io.h mca.h mem.h \
pic.h rom.h timer.h hdd_esdi.h
headland.o: ibm.h cpu/cpu.h io.h mem.h headland.h
headland.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
i430fx.o: ibm.h mem.h pci.h i430fx.h
i430fx.o: ibm.h cpu/cpu.h mem.h pci.h device.h model.h
i430hx.o: ibm.h io.h mem.h pci.h i430hx.h
i430hx.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
i430lx.o: ibm.h mem.h pci.h i430lx.h
i430lx.o: ibm.h cpu/cpu.h mem.h pci.h device.h model.h
i430nx.o: ibm.h mem.h pci.h i430nx.h
i430nx.o: ibm.h cpu/cpu.h mem.h pci.h device.h model.h
i430vx.o: ibm.h io.h mem.h pci.h i430vx.h
i430vx.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
i440fx.o: ibm.h io.h mem.h pci.h i440fx.h
i440fx.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
i82335.o: ibm.h io.h mem.h
@@ -367,7 +365,7 @@ intel_flash.o: ibm.h cpu/cpu.h device.h mem.h model.h rom.h
io.o: ibm.h io.h
jim.o: ibm.h io.h
jim.o: ibm.h cpu/cpu.h io.h device.h model.h
joystick_ch_flightstick_pro.o: ibm.h device.h timer.h gameport.h \
joystick_standard.h plat_joystick.h
@@ -399,7 +397,7 @@ keyboard_pcjr.o: ibm.h io.h mem.h nmi.h pic.h pit.h timer.h \
keyboard_xt.o: ibm.h io.h mem.h pic.h pit.h timer.h device.h tandy_eeprom.h \
sound/sound.h sound/snd_speaker.h keyboard.h keyboard_xt.h
laserxt.o: ibm.h io.h mem.h
laserxt.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
lpt.o: ibm.h io.h lpt.h
@@ -416,22 +414,20 @@ mfm_at.o: ibm.h device.h hdd_image.h io.h pic.h timer.h mfm_at.h
mfm_xebec.o: ibm.h device.h dma.h hdd_image.h io.h mem.h pic.h rom.h timer.h mfm_xebec.h
model.o: ibm.h cpu/cpu.h io.h mem.h rom.h device.h model.h mouse.h \
mouse_ps2.h cdrom.h acerm3a.h ali1429.h amstrad.h compaq.h \
disc.h dma.h fdc.h fdc37c665.h fdc37c669.h fdc37c932fr.h \
gameport.h headland.h i430fx.h i430hx.h i430lx.h i430nx.h \
i430vx.h i440fx.h i82335.h ide.h intel.h intel_flash.h jim.h \
model.o: ibm.h io.h mem.h rom.h device.h model.h cpu/cpu.h \
mouse.h mouse_ps2.h cdrom.h disc.h dma.h fdc.h \
fdc37c665.h fdc37c669.h fdc37c932fr.h \
gameport.h i82335.h ide.h intel.h intel_flash.h \
keyboard_amstrad.h keyboard_at.h keyboard_olim24.h \
keyboard_pcjr.h keyboard_xt.h laserxt.h lpt.h mem.h memregs.h \
neat.h nmi.h nvr.h olivetti_m24.h opti495.h pc87306.h pci.h \
pic.h piix.h pit.h ps1.h ps2.h ps2_mca.h scat.h serial.h \
sis496.h sis85c471.h sio.h sound/snd_ps1.h sound/snd_pssj.h \
keyboard_pcjr.h keyboard_xt.h lpt.h mem.h memregs.h \
nmi.h nvr.h pc87306.h pci.h pic.h piix.h pit.h ps2_mca.h \
serial.h sis85c471.h sio.h sound/snd_ps1.h sound/snd_pssj.h \
sound/snd_sn76489.h tandy_eeprom.h tandy_rom.h \
video/vid_pcjr.h video/vid_tandy.h w83877f.h wd76c10.h \
xtide.h bugger.h
mouse.o: ibm.h mouse.h mouse_serial.h mouse_ps2.h mouse_bus.h \
amstrad.h keyboard_olim24.h
mouse.o: ibm.h cpu/cpu.h device.h model.h \
mouse.h mouse_serial.h mouse_ps2.h mouse_bus.h keyboard_olim24.h
mouse_bus.o: ibm.h io.h pic.h mouse.h mouse_bus.h plat_mouse.h
@@ -439,28 +435,28 @@ mouse_ps2.o: ibm.h keyboard_at.h mouse.h mouse_ps2.h plat_mouse.h
mouse_serial.o: ibm.h timer.h serial.h mouse.h mouse_serial.h
neat.o: ibm.h io.h neat.h
neat.o: ibm.h cpu/cpu.h io.h device.h model.h
nmi.o: ibm.h io.h nmi.h
nvr.o: ibm.h cpu/cpu.h device.h io.h mem.h model.h nvr.h \
pic.h rom.h timer.h rtc.h
olivetti_m24.o: ibm.h io.h olivetti_m24.h
olivetti_m24.o: ibm.h cpu/cpu.h io.h device.h model.h
opti495.o: ibm.h cpu/cpu.h io.h mem.h
opti495.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
pc.o: 86box.h ibm.h mem.h cpu/cpu.h cpu/x86_ops.h cpu/codegen.h \
dma.h nvr.h pic.h pit.h timer.h device.h ali1429.h disc.h \
dma.h nvr.h pic.h pit.h timer.h device.h model.h disc.h \
disc_86f.h disc_fdi.h disc_imd.h disc_img.h disc_td0.h \
disc_random.h config.h fdc.h fdd.h gameport.h plat_joystick.h \
plat_midi.h hdd.h ide.h cdrom.h cdrom_ioctl.h cdrom_image.h \
cdrom_null.h scsi.h keyboard.h plat_keyboard.h keyboard_at.h \
model.h mouse.h plat_mouse.h network/network.h serial.h \
mouse.h plat_mouse.h network/network.h serial.h \
sound/sound.h sound/snd_cms.h sound/snd_dbopl.h \
sound/snd_mpu401.h sound/snd_opl.h sound/snd_gus.h \
sound/snd_sb.h sound/snd_speaker.h sound/snd_ssi2001.h \
video/video.h video/vid_voodoo.h amstrad.h win/plat_ui.h
video/video.h video/vid_voodoo.h win/plat_ui.h
pc87306.o: ibm.h disc.h fdc.h fdd.h ide.h io.h lpt.h serial.h pc87306.h
@@ -475,9 +471,9 @@ pit.o: ibm.h cpu/cpu.h dma.h io.h pic.h pit.h device.h timer.h \
ppi.o: ibm.h pit.h plat_keyboard.h plat_mouse.h
ps1.o: ibm.h io.h mem.h ps1.h rom.h lpt.h serial.h
ps1.o: ibm.h cpu/cpu.h io.h mem.h rom.h device.h model.h lpt.h serial.h
ps2.o: ibm.h io.h mem.h ps2.h rom.h lpt.h serial.h
ps2.o: ibm.h cpu/cpu.h io.h mem.h rom.h device.h model.h lpt.h serial.h
ps2_mca.o: ibm.h cpu/cpu.h cpu/x86.h io.h mca.h mem.h rom.h device.h \
lpt.h ps2_mca.h ps2_nvr.h serial.h
@@ -488,7 +484,7 @@ rom.o: config.h ibm.h mem.h rom.h
rtc.o: nvr.h rtc.h
scat.o: ibm.h io.h scat.h mem.h
scat.o: ibm.h cpu/cpu.h io.h mem.h device.h model.h
scsi.o: 86box.h ibm.h timer.h device.h cdrom.h scsi.h \
scsi_aha154x.h scsi_buslogic.h
@@ -507,7 +503,7 @@ serial.o: ibm.h io.h pic.h timer.h serial.h plat_serial.h
sio.o: ibm.h cdrom.h disc.h dma.h fdc.h keyboard_at.h ide.h \
io.h mem.h pci.h sio.h
sis496.o: ibm.h device.h io.h mem.h pci.h sis496.h
sis496.o: ibm.h cpu/cpu.h io.h mem.h pci.h device.h model.h
sis50x.o: ibm.h device.h io.h mem.h pci.h sis50x.h

11
src/acer386sx.c
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@@ -4,14 +4,15 @@
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "acer386sx.h"
#include "device.h"
#include "model.h"
static int acer_index = 0;
static uint8_t acer_regs[256];
void acer386sx_write(uint16_t addr, uint8_t val, void *priv)
static void acer386sx_write(uint16_t addr, uint8_t val, void *priv)
{
if (addr & 1)
acer_regs[acer_index] = val;
@@ -19,7 +20,8 @@ void acer386sx_write(uint16_t addr, uint8_t val, void *priv)
acer_index = val;
}
uint8_t acer386sx_read(uint16_t addr, void *priv)
static uint8_t acer386sx_read(uint16_t addr, void *priv)
{
if (addr & 1)
{
@@ -31,7 +33,8 @@ uint8_t acer386sx_read(uint16_t addr, void *priv)
return acer_index;
}
void acer386sx_init()
void acer386sx_init(void)
{
io_sethandler(0x0022, 0x0002, acer386sx_read, NULL, NULL, acer386sx_write, NULL, NULL, NULL);
}

4
src/acer386sx.h
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@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void acer386sx_init();

16
src/acerm3a.c
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@@ -2,18 +2,23 @@
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "acerm3a.h"
#include "device.h"
#include "model.h"
static int acerm3a_index;
static void acerm3a_out(uint16_t port, uint8_t val, void *p)
static void acerm3a_write(uint16_t port, uint8_t val, void *p)
{
if (port == 0xea)
acerm3a_index = val;
}
static uint8_t acerm3a_in(uint16_t port, void *p)
static uint8_t acerm3a_read(uint16_t port, void *p)
{
if (port == 0xeb)
{
@@ -26,7 +31,8 @@ static uint8_t acerm3a_in(uint16_t port, void *p)
return 0xff;
}
void acerm3a_io_init()
void acerm3a_io_init(void)
{
io_sethandler(0x00ea, 0x0002, acerm3a_in, NULL, NULL, acerm3a_out, NULL, NULL, NULL);
io_sethandler(0x00ea, 0x0002, acerm3a_read, NULL, NULL, acerm3a_write, NULL, NULL, NULL);
}

4
src/acerm3a.h
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@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void acerm3a_io_init();

11
src/ali1429.c
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@@ -6,13 +6,15 @@
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "device.h"
#include "model.h"
#include "ali1429.h"
static int ali1429_index;
static uint8_t ali1429_regs[256];
static void ali1429_recalc()
static void ali1429_recalc(void)
{
int c;
@@ -75,12 +77,13 @@ uint8_t ali1429_read(uint16_t port, void *priv)
}
void ali1429_reset()
void ali1429_reset(void)
{
memset(ali1429_regs, 0xff, 256);
}
void ali1429_init()
void ali1429_init(void)
{
io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, NULL);
}

5
src/ali1429.h
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@@ -1,5 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void ali1429_init();
void ali1429_reset();

19
src/amstrad.c
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@@ -1,15 +1,18 @@
#include <stdlib.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "device.h"
#include "model.h"
#include "keyboard.h"
#include "lpt.h"
#include "mouse.h"
#include "amstrad.h"
static uint8_t amstrad_dead;
uint8_t amstrad_read(uint16_t port, void *priv)
static uint8_t amstrad_read(uint16_t port, void *priv)
{
pclog("amstrad_read : %04X\n",port);
switch (port)
@@ -26,7 +29,8 @@ uint8_t amstrad_read(uint16_t port, void *priv)
return 0xff;
}
void amstrad_write(uint16_t port, uint8_t val, void *priv)
static void amstrad_write(uint16_t port, uint8_t val, void *priv)
{
switch (port)
{
@@ -36,6 +40,7 @@ void amstrad_write(uint16_t port, uint8_t val, void *priv)
}
}
static uint8_t mousex, mousey;
static void amstrad_mouse_write(uint16_t addr, uint8_t val, void *p)
{
@@ -80,7 +85,8 @@ static uint8_t mouse_amstrad_poll(int x, int y, int z, int b, void *p)
return(0);
}
static void *mouse_amstrad_init()
static void *mouse_amstrad_init(void)
{
mouse_amstrad_t *mouse = (mouse_amstrad_t *)malloc(sizeof(mouse_amstrad_t));
memset(mouse, 0, sizeof(mouse_amstrad_t));
@@ -88,6 +94,7 @@ static void *mouse_amstrad_init()
return mouse;
}
static void mouse_amstrad_close(void *p)
{
mouse_amstrad_t *mouse = (mouse_amstrad_t *)p;
@@ -95,6 +102,7 @@ static void mouse_amstrad_close(void *p)
free(mouse);
}
mouse_t mouse_amstrad =
{
"Amstrad mouse",
@@ -105,7 +113,8 @@ mouse_t mouse_amstrad =
mouse_amstrad_poll
};
void amstrad_init()
void amstrad_init(void)
{
lpt2_remove_ams();

3
src/amstrad.h
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@@ -1,3 +0,0 @@
void amstrad_init();
extern mouse_t mouse_amstrad;

17
src/compaq.c
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@@ -2,7 +2,11 @@
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "mem.h"
#include "device.h"
#include "model.h"
/* Compaq Deskpro 386 remaps RAM from 0xA0000-0xFFFFF to 0xFA0000-0xFFFFFF */
@@ -14,30 +18,40 @@ uint8_t compaq_read_ram(uint32_t addr, void *priv)
addreadlookup(mem_logical_addr, addr);
return ram[addr];
}
uint16_t compaq_read_ramw(uint32_t addr, void *priv)
{
addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr);
return *(uint16_t *)&ram[addr];
}
uint32_t compaq_read_raml(uint32_t addr, void *priv)
{
addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr);
return *(uint32_t *)&ram[addr];
}
void compaq_write_ram(uint32_t addr, uint8_t val, void *priv)
{
addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[addr >> 12]);
}
void compaq_write_ramw(uint32_t addr, uint16_t val, void *priv)
{
addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[addr >> 12]);
}
void compaq_write_raml(uint32_t addr, uint32_t val, void *priv)
{
addr = (addr & 0x7ffff) + 0x80000;
@@ -45,7 +59,8 @@ void compaq_write_raml(uint32_t addr, uint32_t val, void *priv)
mem_write_raml_page(addr, val, &pages[addr >> 12]);
}
void compaq_init()
void compaq_init(void)
{
mem_mapping_add(&compaq_ram_mapping, 0xfa0000, 0x60000,
compaq_read_ram, compaq_read_ramw, compaq_read_raml,

4
src/compaq.h
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@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void compaq_init();

12
src/headland.c
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@@ -5,13 +5,15 @@
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "device.h"
#include "model.h"
#include "headland.h"
static int headland_index;
static uint8_t headland_regs[256];
void headland_write(uint16_t addr, uint8_t val, void *priv)
static void headland_write(uint16_t addr, uint8_t val, void *priv)
{
if (addr & 1)
{
@@ -31,7 +33,8 @@ void headland_write(uint16_t addr, uint8_t val, void *priv)
headland_index = val;
}
uint8_t headland_read(uint16_t addr, void *priv)
static uint8_t headland_read(uint16_t addr, void *priv)
{
if (addr & 1)
{
@@ -42,7 +45,8 @@ uint8_t headland_read(uint16_t addr, void *priv)
return headland_index;
}
void headland_init()
void headland_init(void)
{
io_sethandler(0x0022, 0x0002, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
}

4
src/headland.h
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@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void headland_init();

26
src/i430fx.c
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@@ -8,24 +8,25 @@
*
* Implementation of the Intel 430FX PCISet chip.
*
* Version: @(#)i430fx.c 1.0.0 2017/05/30
* Version: @(#)i430fx.c 1.0.1 2017/06/17
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "i430fx.h"
static uint8_t card_i430fx[256];
static void i430fx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
@@ -46,7 +47,8 @@ static void i430fx_map(uint32_t addr, uint32_t size, int state)
flushmmucache_nopc();
}
void i430fx_write(int func, int addr, uint8_t val, void *priv)
static void i430fx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
@@ -127,7 +129,8 @@ void i430fx_write(int func, int addr, uint8_t val, void *priv)
card_i430fx[addr] = val;
}
uint8_t i430fx_read(int func, int addr, void *priv)
static uint8_t i430fx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
@@ -135,7 +138,8 @@ uint8_t i430fx_read(int func, int addr, void *priv)
return card_i430fx[addr];
}
void i430fx_reset(void)
static void i430fx_reset(void)
{
memset(card_i430fx, 0, 256);
card_i430fx[0x00] = 0x86; card_i430fx[0x01] = 0x80; /*Intel*/
@@ -168,12 +172,14 @@ void i430fx_reset(void)
}
}
void i430fx_pci_reset(void)
static void i430fx_pci_reset(void)
{
i430fx_write(0, 0x59, 0x00, NULL);
}
void i430fx_init()
void i430fx_init(void)
{
pci_add_specific(0, i430fx_read, i430fx_write, NULL);

19
src/i430fx.h
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@@ -1,19 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430FX PCISet chip.
*
* Version: @(#)i430fx.h 1.0.0 2017/05/30
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void i430fx_init();

26
src/i430hx.c
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@@ -8,25 +8,26 @@
*
* Implementation of the Intel 430HX PCISet chip.
*
* Version: @(#)i430hx.c 1.0.0 2017/05/30
* Version: @(#)i430hx.c 1.0.1 2017/06/17
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "i430hx.h"
static uint8_t card_i430hx[256];
static void i430hx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
@@ -47,7 +48,8 @@ static void i430hx_map(uint32_t addr, uint32_t size, int state)
flushmmucache_nopc();
}
void i430hx_write(int func, int addr, uint8_t val, void *priv)
static void i430hx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
@@ -126,7 +128,8 @@ void i430hx_write(int func, int addr, uint8_t val, void *priv)
card_i430hx[addr] = val;
}
uint8_t i430hx_read(int func, int addr, void *priv)
static uint8_t i430hx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
@@ -134,7 +137,8 @@ uint8_t i430hx_read(int func, int addr, void *priv)
return card_i430hx[addr];
}
void i430hx_reset(void)
static void i430hx_reset(void)
{
memset(card_i430hx, 0, 256);
card_i430hx[0x00] = 0x86; card_i430hx[0x01] = 0x80; /*Intel*/
@@ -156,12 +160,14 @@ void i430hx_reset(void)
card_i430hx[0x72] = 0x02;
}
void i430hx_pci_reset(void)
static void i430hx_pci_reset(void)
{
i430hx_write(0, 0x59, 0x00, NULL);
}
void i430hx_init()
void i430hx_init(void)
{
pci_add_specific(0, i430hx_read, i430hx_write, NULL);

19
src/i430hx.h
View File

@@ -1,19 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430HX PCISet chip.
*
* Version: @(#)i430hx.h 1.0.0 2017/05/30
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void i430hx_init();

26
src/i430lx.c
View File

@@ -8,24 +8,25 @@
*
* Implementation of the Intel 430LX PCISet chip.
*
* Version: @(#)i430lx.c 1.0.0 2017/05/30
* Version: @(#)i430lx.c 1.0.1 2017/06/17
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "i430lx.h"
static uint8_t card_i430lx[256];
static void i430lx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
@@ -46,7 +47,8 @@ static void i430lx_map(uint32_t addr, uint32_t size, int state)
flushmmucache_nopc();
}
void i430lx_write(int func, int addr, uint8_t val, void *priv)
static void i430lx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
@@ -130,7 +132,8 @@ void i430lx_write(int func, int addr, uint8_t val, void *priv)
card_i430lx[addr] = val;
}
uint8_t i430lx_read(int func, int addr, void *priv)
static uint8_t i430lx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
@@ -138,7 +141,8 @@ uint8_t i430lx_read(int func, int addr, void *priv)
return card_i430lx[addr];
}
void i430lx_reset(void)
static void i430lx_reset(void)
{
memset(card_i430lx, 0, 256);
card_i430lx[0x00] = 0x86; card_i430lx[0x01] = 0x80; /*Intel*/
@@ -153,12 +157,14 @@ void i430lx_reset(void)
card_i430lx[0x60] = card_i430lx[0x61] = card_i430lx[0x62] = card_i430lx[0x63] = card_i430lx[0x64] = 0x02;
}
void i430lx_pci_reset(void)
static void i430lx_pci_reset(void)
{
i430lx_write(0, 0x59, 0x00, NULL);
}
void i430lx_init()
void i430lx_init(void)
{
pci_add_specific(0, i430lx_read, i430lx_write, NULL);

19
src/i430lx.h
View File

@@ -1,19 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430LX PCISet chip.
*
* Version: @(#)i430lx.h 1.0.0 2017/05/30
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void i430lx_init();

26
src/i430nx.c
View File

@@ -8,24 +8,25 @@
*
* Implementation of the Intel 430NX PCISet chip.
*
* Version: @(#)i430nx.c 1.0.0 2017/05/30
* Version: @(#)i430nx.c 1.0.1 2017/06/17
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "i430nx.h"
static uint8_t card_i430nx[256];
static void i430nx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
@@ -46,7 +47,8 @@ static void i430nx_map(uint32_t addr, uint32_t size, int state)
flushmmucache_nopc();
}
void i430nx_write(int func, int addr, uint8_t val, void *priv)
static void i430nx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
@@ -127,7 +129,8 @@ void i430nx_write(int func, int addr, uint8_t val, void *priv)
card_i430nx[addr] = val;
}
uint8_t i430nx_read(int func, int addr, void *priv)
static uint8_t i430nx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
@@ -135,7 +138,8 @@ uint8_t i430nx_read(int func, int addr, void *priv)
return card_i430nx[addr];
}
void i430nx_reset(void)
static void i430nx_reset(void)
{
memset(card_i430nx, 0, 256);
card_i430nx[0x00] = 0x86; card_i430nx[0x01] = 0x80; /*Intel*/
@@ -151,12 +155,14 @@ void i430nx_reset(void)
card_i430nx[0x66] = card_i430nx[0x67] = 0x02;
}
void i430nx_pci_reset(void)
static void i430nx_pci_reset(void)
{
i430nx_write(0, 0x59, 0x00, NULL);
}
void i430nx_init()
void i430nx_init(void)
{
pci_add_specific(0, i430nx_read, i430nx_write, NULL);

19
src/i430nx.h
View File

@@ -1,19 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430NX PCISet chip.
*
* Version: @(#)i430nx.h 1.0.0 2017/05/30
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void i430nx_init();

26
src/i430vx.c
View File

@@ -8,25 +8,26 @@
*
* Implementation of the Intel 430VX PCISet chip.
*
* Version: @(#)i430vx.c 1.0.1 2017/06/02
* Version: @(#)i430vx.c 1.0.2 2017/06/17
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "i430vx.h"
static uint8_t card_i430vx[256];
static void i430vx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
@@ -47,7 +48,8 @@ static void i430vx_map(uint32_t addr, uint32_t size, int state)
flushmmucache_nopc();
}
void i430vx_write(int func, int addr, uint8_t val, void *priv)
static void i430vx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
@@ -129,7 +131,8 @@ void i430vx_write(int func, int addr, uint8_t val, void *priv)
card_i430vx[addr] = val;
}
uint8_t i430vx_read(int func, int addr, void *priv)
static uint8_t i430vx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
@@ -137,7 +140,8 @@ uint8_t i430vx_read(int func, int addr, void *priv)
return card_i430vx[addr];
}
void i430vx_reset(void)
static void i430vx_reset(void)
{
memset(card_i430vx, 0, 256);
card_i430vx[0x00] = 0x86; card_i430vx[0x01] = 0x80; /*Intel*/
@@ -159,12 +163,14 @@ void i430vx_reset(void)
card_i430vx[0x78] = 0x23;
}
void i430vx_pci_reset(void)
static void i430vx_pci_reset(void)
{
i430vx_write(0, 0x59, 0x00, NULL);
}
void i430vx_init()
void i430vx_init(void)
{
pci_add_specific(0, i430vx_read, i430vx_write, NULL);

19
src/i430vx.h
View File

@@ -1,19 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 430VX PCISet chip.
*
* Version: @(#)i430vx.h 1.0.0 2017/05/30
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void i430vx_init();

26
src/i440fx.c
View File

@@ -8,25 +8,26 @@
*
* Implementation of the Intel 440FX PCISet chip.
*
* Version: @(#)i440fx.c 1.0.0 2017/05/30
* Version: @(#)i440fx.c 1.0.1 2017/06/17
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "i440fx.h"
static uint8_t card_i440fx[256];
static void i440fx_map(uint32_t addr, uint32_t size, int state)
{
switch (state & 3)
@@ -47,7 +48,8 @@ static void i440fx_map(uint32_t addr, uint32_t size, int state)
flushmmucache_nopc();
}
void i440fx_write(int func, int addr, uint8_t val, void *priv)
static void i440fx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
return;
@@ -126,7 +128,8 @@ void i440fx_write(int func, int addr, uint8_t val, void *priv)
card_i440fx[addr] = val;
}
uint8_t i440fx_read(int func, int addr, void *priv)
static uint8_t i440fx_read(int func, int addr, void *priv)
{
if (func)
return 0xff;
@@ -134,7 +137,8 @@ uint8_t i440fx_read(int func, int addr, void *priv)
return card_i440fx[addr];
}
void i440fx_reset(void)
static void i440fx_reset(void)
{
memset(card_i440fx, 0, 256);
card_i440fx[0x00] = 0x86; card_i440fx[0x01] = 0x80; /*Intel*/
@@ -160,12 +164,14 @@ void i440fx_reset(void)
card_i440fx[0x72] = 0x02;
}
void i440fx_pci_reset(void)
static void i440fx_pci_reset(void)
{
i440fx_write(0, 0x59, 0x00, NULL);
}
void i440fx_init()
void i440fx_init(void)
{
pci_add_specific(0, i440fx_read, i440fx_write, NULL);

19
src/i440fx.h
View File

@@ -1,19 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 440FX PCISet chip.
*
* Version: @(#)i440fx.h 1.0.0 2017/05/30
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
*/
void i440fx_init();

14
src/jim.c
View File

@@ -4,9 +4,14 @@
#include <stdio.h>
#include <string.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "device.h"
#include "model.h"
uint8_t europcdat[16];
struct
{
uint8_t dat[16];
@@ -14,7 +19,8 @@ struct
int addr;
} europc_rtc;
void writejim(uint16_t addr, uint8_t val, void *p)
static void writejim(uint16_t addr, uint8_t val, void *p)
{
if ((addr&0xFF0)==0x250) europcdat[addr&0xF]=val;
switch (addr)
@@ -39,7 +45,8 @@ void writejim(uint16_t addr, uint8_t val, void *p)
}
}
uint8_t readjim(uint16_t addr, void *p)
static uint8_t readjim(uint16_t addr, void *p)
{
switch (addr)
{
@@ -61,7 +68,8 @@ uint8_t readjim(uint16_t addr, void *p)
return 0;
}
void jim_init()
void jim_init(void)
{
uint8_t viddat;
memset(europc_rtc.dat,0,16);

4
src/jim.h
View File

@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void jim_init();

2
src/keyboard_olim24.h
View File

@@ -1,5 +1,3 @@
void keyboard_olim24_init();
void keyboard_olim24_reset();
void keyboard_olim24_poll();
extern mouse_t mouse_olim24;

22
src/laserxt.c
View File

@@ -1,14 +1,19 @@
/*This is the chipset used in the LaserXT series model*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "device.h"
#include "model.h"
static int laserxt_emspage[4];
static int laserxt_emscontrol[4];
static mem_mapping_t laserxt_ems_mapping[4];
static int laserxt_ems_baseaddr_index = 0;
uint32_t get_laserxt_ems_addr(uint32_t addr)
static uint32_t get_laserxt_ems_addr(uint32_t addr)
{
if(laserxt_emspage[(addr >> 14) & 3] & 0x80)
{
@@ -17,7 +22,8 @@ uint32_t get_laserxt_ems_addr(uint32_t addr)
return addr;
}
void laserxt_write(uint16_t port, uint8_t val, void *priv)
static void laserxt_write(uint16_t port, uint8_t val, void *priv)
{
int i;
uint32_t paddr, vaddr;
@@ -68,7 +74,8 @@ void laserxt_write(uint16_t port, uint8_t val, void *priv)
}
}
uint8_t laserxt_read(uint16_t port, void *priv)
static uint8_t laserxt_read(uint16_t port, void *priv)
{
switch (port)
{
@@ -82,14 +89,16 @@ uint8_t laserxt_read(uint16_t port, void *priv)
return 0xff;
}
void mem_write_laserxtems(uint32_t addr, uint8_t val, void *priv)
static void mem_write_laserxtems(uint32_t addr, uint8_t val, void *priv)
{
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
ram[addr] = val;
}
uint8_t mem_read_laserxtems(uint32_t addr, void *priv)
static uint8_t mem_read_laserxtems(uint32_t addr, void *priv)
{
uint8_t val = 0xFF;
addr = get_laserxt_ems_addr(addr);
@@ -98,7 +107,8 @@ uint8_t mem_read_laserxtems(uint32_t addr, void *priv)
return val;
}
void laserxt_init()
void laserxt_init(void)
{
int i;

1
src/laserxt.h
View File

@@ -1 +0,0 @@
void laserxt_init();

22
src/model.c
View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)model.c 1.0.1 2017/06/03
* Version: @(#)model.c 1.0.2 2017/06/17
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -29,10 +29,6 @@
#include "mouse_ps2.h"
#include "cdrom.h"
#include "acerm3a.h"
#include "ali1429.h"
#include "amstrad.h"
#include "compaq.h"
#include "disc.h"
#include "dma.h"
#include "fdc.h"
@@ -40,43 +36,27 @@
#include "fdc37c669.h"
#include "fdc37c932fr.h"
#include "gameport.h"
#include "headland.h"
#include "i430fx.h"
#include "i430hx.h"
#include "i430lx.h"
#include "i430nx.h"
#include "i430vx.h"
#include "i440fx.h"
#include "i82335.h"
#include "ide.h"
#include "intel.h"
#include "intel_flash.h"
#include "jim.h"
#include "keyboard_amstrad.h"
#include "keyboard_at.h"
#include "keyboard_olim24.h"
#include "keyboard_pcjr.h"
#include "keyboard_xt.h"
#include "laserxt.h"
#include "lpt.h"
#include "mem.h"
#include "memregs.h"
#include "neat.h"
#include "nmi.h"
#include "nvr.h"
#include "olivetti_m24.h"
#include "opti495.h"
#include "pc87306.h"
#include "pci.h"
#include "pic.h"
#include "piix.h"
#include "pit.h"
#include "ps1.h"
#include "ps2.h"
#include "ps2_mca.h"
#include "scat.h"
#include "serial.h"
#include "sis496.h"
#include "sis85c471.h"
#include "sio.h"
#include "sound/snd_ps1.h"

46
src/model.h
View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)model.h 1.0.1 2017/06/03
* Version: @(#)model.h 1.0.2 2017/06/17
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -50,10 +50,12 @@ typedef struct {
} MODEL;
extern MODEL models[];
extern int model;
/* Global variables. */
extern MODEL models[];
extern int model;
/* Core functions. */
extern int model_count(void);
extern int model_getromset(void);
extern int model_getmodel(int romset);
@@ -66,4 +68,42 @@ extern int model_getromset_ex(int m);
extern char *model_get_internal_name_ex(int m);
extern int model_get_nvrmask(int m);
/* Global variables for boards and systems. */
#ifdef EMU_MOUSE_H
extern mouse_t mouse_amstrad;
extern mouse_t mouse_olim24;
#endif
/* Initialization functions for boards and systems. */
extern void acer386sx_init(void);
extern void acerm3a_io_init(void);
extern void ali1429_init(void);
extern void ali1429_reset(void);
extern void amstrad_init(void);
extern void compaq_init(void);
extern void headland_init(void);
extern void i430fx_init(void);
extern void i430hx_init(void);
extern void i430lx_init(void);
extern void i430nx_init(void);
extern void i430vx_init(void);
extern void i440fx_init(void);
extern void jim_init(void);
extern void laserxt_init(void);
extern void neat_init(void);
extern void olivetti_m24_init(void);
extern void opti495_init(void);
extern void ps1mb_init(void);
extern void ps1mb_m2121_init(void);
extern void ps1mb_m2133_init(void);
extern void ps2board_init(void);
extern void scat_init(void);
extern void sis496_init(void);
#endif /*EMU_MODEL_H*/

6
src/mouse.c
View File

@@ -1,10 +1,12 @@
#include "ibm.h"
#include "cpu/cpu.h"
#include "device.h"
#include "mouse.h"
#include "mouse_serial.h"
#include "mouse_ps2.h"
#include "mouse_bus.h"
#include "amstrad.h"
#include "keyboard_olim24.h"
#include "model.h"
//#include "keyboard_olim24.h"
static mouse_t *mouse_list[] = {

177
src/mouse_serial.c
View File

@@ -10,7 +10,7 @@
*
* Based on the 86Box Serial Mouse driver as a framework.
*
* Version: @(#)mouse_serial.c 1.0.3 2017/05/07
* Version: @(#)mouse_serial.c 1.0.4 2017/06/11
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*/
@@ -22,13 +22,18 @@
#include "mouse_serial.h"
#define SERMOUSE_TYPE_MSYSTEMS 1 /* Mouse Systems */
#define SERMOUSE_TYPE_MICROSOFT 2 /* Microsoft */
#define SERMOUSE_TYPE_LOGITECH 3 /* Logitech */
typedef struct mouse_serial_t {
int port;
int8_t port,
type;
int pos,
delay;
int oldb;
SERIAL *serial;
int is_ms_format;
} mouse_serial_t;
@@ -51,12 +56,16 @@ sermouse_timer(void *priv)
mouse_serial_t *ms = (mouse_serial_t *)priv;
ms->delay = 0;
if (ms->pos == -1)
{
ms->pos = 0;
switch(ms->type) {
case SERMOUSE_TYPE_MICROSOFT:
/* This identifies a two-button Microsoft Serial mouse. */
serial_write_fifo(ms->serial, 'M');
serial_write_fifo(ms->serial, 'M', 1);
break;
default:
/* No action needed. */
break;
}
}
@@ -65,53 +74,63 @@ static uint8_t
sermouse_poll(int x, int y, int z, int b, void *priv)
{
mouse_serial_t *ms = (mouse_serial_t *)priv;
uint8_t data[3];
uint8_t buff[16];
int len;
if (!x && !y && b == ms->oldb) return(1);
ms->oldb = b;
if (ms->type == SERMOUSE_TYPE_MSYSTEMS) y = -y;
if (x>127) x = 127;
if (y>127) y = 127;
if (x<-128) x = -128;
if (y<-128) y = -128;
/* Use Microsoft format. */
data[0] = 0x40;
data[0] |= (((y>>6)&3)<<2);
data[0] |= ((x>>6)&3);
if (b&1) data[0] |= 0x20;
if (b&2) data[0] |= 0x10;
data[1] = x & 0x3F;
data[2] = y & 0x3F;
len = 0;
switch(ms->type) {
case SERMOUSE_TYPE_MSYSTEMS:
buff[0] = 0x80;
buff[0] |= (b&0x01) ? 0x00 : 0x04; /* left button */
buff[0] |= (b&0x02) ? 0x00 : 0x01; /* middle button */
buff[0] |= (b&0x04) ? 0x00 : 0x02; /* right button */
buff[1] = x;
buff[2] = y;
buff[3] = x; /* same as byte 1 */
buff[4] = y; /* same as byte 2 */
len = 5;
break;
case SERMOUSE_TYPE_MICROSOFT:
buff[0] = 0x40;
buff[0] |= (((y>>6)&03)<<2);
buff[0] |= ((x>>6)&03);
if (b&0x01) buff[0] |= 0x20;
if (b&0x02) buff[0] |= 0x10;
buff[1] = x & 0x3F;
buff[2] = y & 0x3F;
len = 3;
break;
case SERMOUSE_TYPE_LOGITECH:
break;
}
#if 0
pclog("Mouse_Serial(%d): [", ms->type);
for (b=0; b<len; b++) pclog(" %02X", buff[b]);
pclog(" ] (%d)\n", len);
#endif
/* Send the packet to the bottom-half of the attached port. */
#if 0
pclog("Mouse_Serial: data %02X %02X %02X\n", data[0], data[1], data[2]);
#endif
serial_write_fifo(ms->serial, data[0]);
serial_write_fifo(ms->serial, data[1]);
serial_write_fifo(ms->serial, data[2]);
for (b=0; b<len; b++)
serial_write_fifo(ms->serial, buff[b], 1);
return(0);
}
static void *
sermouse_init(void)
{
mouse_serial_t *ms = (mouse_serial_t *)malloc(sizeof(mouse_serial_t));
memset(ms, 0x00, sizeof(mouse_serial_t));
ms->port = SERMOUSE_PORT;
/* Attach a serial port to the mouse. */
ms->serial = serial_attach(ms->port, sermouse_callback, ms);
timer_add(sermouse_timer, &ms->delay, &ms->delay, ms);
return(ms);
}
static void
sermouse_close(void *priv)
{
@@ -124,59 +143,14 @@ sermouse_close(void *priv)
}
mouse_t mouse_serial_microsoft = {
"Microsoft 2-button mouse (serial)",
"msserial",
MOUSE_TYPE_SERIAL,
sermouse_init,
sermouse_close,
sermouse_poll
};
static uint8_t
mssystems_mouse_poll(int x, int y, int z, int b, void *priv)
{
mouse_serial_t *ms = (mouse_serial_t *)priv;
uint8_t data[5];
if (!x && !y && b == ms->oldb) return(1);
ms->oldb = b;
y=-y;
if (x>127) x = 127;
if (y>127) y = 127;
if (x<-128) x = -128;
if (y<-128) y = -128;
data[0] = 0x80;
data[0] |= (b & 0x01 ? 0x00 : 0x04); /*Left button*/
data[0] |= (b & 0x02 ? 0x00 : 0x01); /*Middle button*/
data[0] |= (b & 0x04 ? 0x00 : 0x02); /*Right button*/
data[1] = x;
data[2] = y;
data[3] = x;/*Same as byte 1*/
data[4] = y;/*Same as byte 2*/
pclog("Mouse_Systems_Serial: data %02X %02X %02X\n", data[0], data[1], data[2]);
serial_write_fifo(ms->serial, data[0]);
serial_write_fifo(ms->serial, data[1]);
serial_write_fifo(ms->serial, data[2]);
serial_write_fifo(ms->serial, data[3]);
serial_write_fifo(ms->serial, data[4]);
return(0);
}
static void *
mssystems_mouse_init(void)
sermouse_init(int type)
{
mouse_serial_t *ms = (mouse_serial_t *)malloc(sizeof(mouse_serial_t));
memset(ms, 0x00, sizeof(mouse_serial_t));
ms->port = SERMOUSE_PORT;
ms->type = type;
/* Attach a serial port to the mouse. */
ms->serial = serial_attach(ms->port, sermouse_callback, ms);
@@ -185,11 +159,36 @@ mssystems_mouse_init(void)
return(ms);
}
static void *
sermouse_init_microsoft(void)
{
return(sermouse_init(SERMOUSE_TYPE_MICROSOFT));
}
static void *
sermouse_init_msystems(void)
{
return(sermouse_init(SERMOUSE_TYPE_MSYSTEMS));
}
mouse_t mouse_msystems = {
"Mouse Systems Mouse (serial)",
"mssystems",
MOUSE_TYPE_MSYSTEMS,
mssystems_mouse_init,
sermouse_init_msystems,
sermouse_close,
mssystems_mouse_poll
};
sermouse_poll
};
mouse_t mouse_serial_microsoft = {
"Microsoft 2-button mouse (serial)",
"msserial",
MOUSE_TYPE_SERIAL,
sermouse_init_microsoft,
sermouse_close,
sermouse_poll
};

22
src/neat.c
View File

@@ -3,14 +3,18 @@
*/
/*This is the chipset used in the AMI 286 clone model*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "neat.h"
#include "device.h"
#include "model.h"
static uint8_t neat_regs[256];
static int neat_index;
static int neat_emspage[4];
void neat_write(uint16_t port, uint8_t val, void *priv)
static void neat_write(uint16_t port, uint8_t val, void *priv)
{
switch (port)
{
@@ -38,7 +42,8 @@ void neat_write(uint16_t port, uint8_t val, void *priv)
}
}
uint8_t neat_read(uint16_t port, void *priv)
static uint8_t neat_read(uint16_t port, void *priv)
{
switch (port)
{
@@ -51,17 +56,22 @@ uint8_t neat_read(uint16_t port, void *priv)
return 0xff;
}
void neat_writeems(uint32_t addr, uint8_t val)
#if NOT_USED
static void neat_writeems(uint32_t addr, uint8_t val)
{
ram[(neat_emspage[(addr >> 14) & 3] << 14) + (addr & 0x3FFF)] = val;
}
uint8_t neat_readems(uint32_t addr)
static uint8_t neat_readems(uint32_t addr)
{
return ram[(neat_emspage[(addr >> 14) & 3] << 14) + (addr & 0x3FFF)];
}
#endif
void neat_init()
void neat_init(void)
{
io_sethandler(0x0022, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL);
io_sethandler(0x0208, 0x0002, neat_read, NULL, NULL, neat_write, NULL, NULL, NULL);

4
src/neat.h
View File

@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void neat_init();

10
src/olivetti_m24.c
View File

@@ -2,10 +2,13 @@
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "olivetti_m24.h"
#include "device.h"
#include "model.h"
uint8_t olivetti_m24_read(uint16_t port, void *priv)
static uint8_t olivetti_m24_read(uint16_t port, void *priv)
{
switch (port)
{
@@ -17,7 +20,8 @@ uint8_t olivetti_m24_read(uint16_t port, void *priv)
return 0xff;
}
void olivetti_m24_init()
void olivetti_m24_init(void)
{
io_sethandler(0x0066, 0x0002, olivetti_m24_read, NULL, NULL, NULL, NULL, NULL, NULL);
}

4
src/olivetti_m24.h
View File

@@ -1,4 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void olivetti_m24_init();

123
src/opti495.c
View File

@@ -1,63 +1,7 @@
/*OPTi 82C495 emulation
This is the chipset used in the AMI386 model*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
This is the chipset used in the AMI386 model
static uint8_t optiregs[0x10];
static int optireg;
static void opti495_write(uint16_t addr, uint8_t val, void *p)
{
switch (addr)
{
case 0x22:
optireg=val;
break;
case 0x24:
printf("Writing OPTI reg %02X %02X\n",optireg,val);
if (optireg>=0x20 && optireg<=0x2C)
{
optiregs[optireg-0x20]=val;
if (optireg == 0x21)
{
cpu_cache_ext_enabled = val & 0x10;
cpu_update_waitstates();
}
if (optireg == 0x22)
{
shadowbios = !(val & 0x80);
shadowbios_write = val & 0x80;
if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
}
}
break;
}
}
static uint8_t opti495_read(uint16_t addr, void *p)
{
switch (addr)
{
case 0x24:
if (optireg>=0x20 && optireg<=0x2C) return optiregs[optireg-0x20];
break;
}
return 0xFF;
}
void opti495_init()
{
io_sethandler(0x0022, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
io_sethandler(0x0024, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
optiregs[0x22-0x20] = 0x80;
}
/*Details for the chipset from Ralph Brown's interrupt list
Details for the chipset from Ralph Brown's interrupt list
This describes the OPTi 82C493, the 82C495 seems similar except there is one
more register (2C)
@@ -306,5 +250,66 @@ Bit(s) Description (Table P0188)
Note: the block address is forced to be a multiple of the block size by
ignoring the appropriate number of the least-significant bits
SeeAlso: #P0178,#P0187
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "device.h"
#include "model.h"
static uint8_t optiregs[0x10];
static int optireg;
static void opti495_write(uint16_t addr, uint8_t val, void *p)
{
switch (addr)
{
case 0x22:
optireg=val;
break;
case 0x24:
printf("Writing OPTI reg %02X %02X\n",optireg,val);
if (optireg>=0x20 && optireg<=0x2C)
{
optiregs[optireg-0x20]=val;
if (optireg == 0x21)
{
cpu_cache_ext_enabled = val & 0x10;
cpu_update_waitstates();
}
if (optireg == 0x22)
{
shadowbios = !(val & 0x80);
shadowbios_write = val & 0x80;
if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
}
}
break;
}
}
static uint8_t opti495_read(uint16_t addr, void *p)
{
switch (addr)
{
case 0x24:
if (optireg>=0x20 && optireg<=0x2C) return optiregs[optireg-0x20];
break;
}
return 0xFF;
}
void opti495_init(void)
{
io_sethandler(0x0022, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
io_sethandler(0x0024, 0x0001, opti495_read, NULL, NULL, opti495_write, NULL, NULL, NULL);
optiregs[0x22-0x20] = 0x80;
}

1
src/opti495.h
View File

@@ -1 +0,0 @@
void opti495_init();

6
src/pc.c
View File

@@ -8,7 +8,7 @@
*
* Emulation core dispatcher.
*
* Version: @(#)pc.c 1.0.5 2017/06/17
* Version: @(#)pc.c 1.0.6 2017/06/17
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -31,8 +31,8 @@
#include "pit.h"
#include "timer.h"
#include "device.h"
#include "model.h"
#include "ali1429.h"
#include "disc.h"
#include "disc_86f.h"
#include "disc_fdi.h"
@@ -56,7 +56,6 @@
#include "keyboard.h"
#include "plat_keyboard.h"
#include "keyboard_at.h"
#include "model.h"
#include "mouse.h"
#include "plat_mouse.h"
#include "network/network.h"
@@ -72,7 +71,6 @@
#include "sound/snd_ssi2001.h"
#include "video/video.h"
#include "video/vid_voodoo.h"
#include "amstrad.h"
#include "plat_ui.h"
#ifdef WALTJE
# define UNICODE

21
src/ps1.c
View File

@@ -2,25 +2,30 @@
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "ps1.h"
#include "rom.h"
#include "device.h"
#include "model.h"
#include "lpt.h"
#include "serial.h"
static rom_t ps1_high_rom;
static uint8_t ps1_92, ps1_94, ps1_102, ps1_103, ps1_104, ps1_105, ps1_190;
static int ps1_e0_addr;
static uint8_t ps1_e0_regs[256];
static struct
{
uint8_t status, int_status;
uint8_t attention, ctrl;
} ps1_hd;
uint8_t ps1_read(uint16_t port, void *p)
static uint8_t ps1_read(uint16_t port, void *p)
{
uint8_t temp;
@@ -59,7 +64,8 @@ uint8_t ps1_read(uint16_t port, void *p)
return temp;
}
void ps1_write(uint16_t port, uint8_t val, void *p)
static void ps1_write(uint16_t port, uint8_t val, void *p)
{
switch (port)
{
@@ -120,7 +126,8 @@ void ps1_write(uint16_t port, uint8_t val, void *p)
}
}
void ps1mb_init()
void ps1mb_init(void)
{
io_sethandler(0x0091, 0x0001, ps1_read, NULL, NULL, ps1_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps1_read, NULL, NULL, ps1_write, NULL, NULL, NULL);
@@ -207,7 +214,7 @@ static uint8_t ps1_m2121_read(uint16_t port, void *p)
return temp;
}
static void ps1_m2121_recalc_memory()
static void ps1_m2121_recalc_memory(void)
{
/*Enable first 512kb*/
mem_set_mem_state(0x00000, 0x80000, (ps1_e0_regs[0] & 0x01) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
@@ -277,7 +284,7 @@ void ps1_m2121_write(uint16_t port, uint8_t val, void *p)
}
}
void ps1mb_m2121_init()
void ps1mb_m2121_init(void)
{
io_sethandler(0x0091, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
@@ -300,7 +307,7 @@ void ps1mb_m2121_init()
mem_remap_top_384k();
}
void ps1mb_m2133_init()
void ps1mb_m2133_init(void)
{
io_sethandler(0x0091, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps1_m2121_read, NULL, NULL, ps1_m2121_write, NULL, NULL, NULL);

6
src/ps1.h
View File

@@ -1,6 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
void ps1mb_init();
void ps1mb_m2121_init();
void ps1mb_m2133_init();

14
src/ps2.c
View File

@@ -1,20 +1,25 @@
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "ps2.h"
#include "rom.h"
#include "device.h"
#include "model.h"
#include "lpt.h"
#include "serial.h"
static uint8_t ps2_92, ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190;
static struct
{
uint8_t status, int_status;
uint8_t attention, ctrl;
} ps2_hd;
uint8_t ps2_read(uint16_t port, void *p)
static uint8_t ps2_read(uint16_t port, void *p)
{
uint8_t temp;
@@ -53,7 +58,7 @@ uint8_t ps2_read(uint16_t port, void *p)
return temp;
}
void ps2_write(uint16_t port, uint8_t val, void *p)
static void ps2_write(uint16_t port, uint8_t val, void *p)
{
switch (port)
{
@@ -114,7 +119,8 @@ void ps2_write(uint16_t port, uint8_t val, void *p)
}
}
void ps2board_init()
void ps2board_init(void)
{
io_sethandler(0x0091, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0092, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);

1
src/ps2.h
View File

@@ -1 +0,0 @@
void ps2board_init();

67
src/scat.c
View File

@@ -3,9 +3,34 @@
*/
/*This is the chipset used in the Award 286 clone model*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "scat.h"
#include "mem.h"
#include "device.h"
#include "model.h"
#define SCAT_DMA_WAIT_STATE_CONTROL 0x01
#define SCAT_VERSION 0x40
#define SCAT_CLOCK_CONTROL 0x41
#define SCAT_PERIPHERAL_CONTROL 0x44
#define SCAT_MISCELLANEOUS_STATUS 0x45
#define SCAT_POWER_MANAGEMENT 0x46
#define SCAT_ROM_ENABLE 0x48
#define SCAT_RAM_WRITE_PROTECT 0x49
#define SCAT_SHADOW_RAM_ENABLE_1 0x4A
#define SCAT_SHADOW_RAM_ENABLE_2 0x4B
#define SCAT_SHADOW_RAM_ENABLE_3 0x4C
#define SCAT_DRAM_CONFIGURATION 0x4D
#define SCAT_EXTENDED_BOUNDARY 0x4E
#define SCAT_EMS_CONTROL 0x4F
typedef struct {
uint8_t regs_2x8;
uint8_t regs_2x9;
} scat_t;
static uint8_t scat_regs[256];
static int scat_index;
@@ -17,7 +42,8 @@ static uint32_t scat_xms_bound;
static mem_mapping_t scat_shadowram_mapping;
static mem_mapping_t scat_512k_clip_mapping;
void scat_shadow_state_update()
static void scat_shadow_state_update(void)
{
int i, val;
@@ -54,7 +80,8 @@ void scat_shadow_state_update()
flushmmucache();
}
void scat_set_xms_bound(uint8_t val)
static void scat_set_xms_bound(uint8_t val)
{
uint32_t max_xms_size = (mem_size >= 16384) ? 0xFC0000 : mem_size << 10;
@@ -128,7 +155,8 @@ void scat_set_xms_bound(uint8_t val)
}
}
uint32_t get_scat_addr(uint32_t addr, scat_t *p)
static uint32_t get_scat_addr(uint32_t addr, scat_t *p)
{
if (p && (scat_regs[SCAT_EMS_CONTROL] & 0x80) && (p->regs_2x9 & 0x80))
{
@@ -142,7 +170,8 @@ uint32_t get_scat_addr(uint32_t addr, scat_t *p)
return addr;
}
void scat_write(uint16_t port, uint8_t val, void *priv)
static void scat_write(uint16_t port, uint8_t val, void *priv)
{
uint8_t scat_reg_valid = 0, scat_shadow_update = 0, index;
uint32_t base_addr, virt_addr;
@@ -334,7 +363,8 @@ void scat_write(uint16_t port, uint8_t val, void *priv)
}
}
uint8_t scat_read(uint16_t port, void *priv)
static uint8_t scat_read(uint16_t port, void *priv)
{
uint8_t val = 0xff, index;
switch (port)
@@ -407,7 +437,8 @@ uint8_t scat_read(uint16_t port, void *priv)
return val;
}
uint8_t mem_read_scatems(uint32_t addr, void *priv)
static uint8_t mem_read_scatems(uint32_t addr, void *priv)
{
uint8_t val = 0xff;
scat_t *stat = (scat_t *)priv;
@@ -418,7 +449,9 @@ uint8_t mem_read_scatems(uint32_t addr, void *priv)
return val;
}
uint16_t mem_read_scatemsw(uint32_t addr, void *priv)
static uint16_t mem_read_scatemsw(uint32_t addr, void *priv)
{
uint16_t val = 0xffff;
scat_t *stat = (scat_t *)priv;
@@ -429,7 +462,9 @@ uint16_t mem_read_scatemsw(uint32_t addr, void *priv)
return val;
}
uint32_t mem_read_scatemsl(uint32_t addr, void *priv)
static uint32_t mem_read_scatemsl(uint32_t addr, void *priv)
{
uint32_t val = 0xffffffff;
scat_t *stat = (scat_t *)priv;
@@ -441,7 +476,8 @@ uint32_t mem_read_scatemsl(uint32_t addr, void *priv)
return val;
}
void mem_write_scatems(uint32_t addr, uint8_t val, void *priv)
static void mem_write_scatems(uint32_t addr, uint8_t val, void *priv)
{
scat_t *stat = (scat_t *)priv;
@@ -449,7 +485,9 @@ void mem_write_scatems(uint32_t addr, uint8_t val, void *priv)
if (addr < (mem_size << 10))
mem_write_ram(addr, val, priv);
}
void mem_write_scatemsw(uint32_t addr, uint16_t val, void *priv)
static void mem_write_scatemsw(uint32_t addr, uint16_t val, void *priv)
{
scat_t *stat = (scat_t *)priv;
@@ -457,7 +495,9 @@ void mem_write_scatemsw(uint32_t addr, uint16_t val, void *priv)
if (addr < (mem_size << 10))
mem_write_ramw(addr, val, priv);
}
void mem_write_scatemsl(uint32_t addr, uint32_t val, void *priv)
static void mem_write_scatemsl(uint32_t addr, uint32_t val, void *priv)
{
scat_t *stat = (scat_t *)priv;
@@ -466,7 +506,8 @@ void mem_write_scatemsl(uint32_t addr, uint32_t val, void *priv)
mem_write_raml(addr, val, priv);
}
void scat_init()
void scat_init(void)
{
int i;

25
src/scat.h
View File

@@ -1,25 +0,0 @@
/* Copyright holders: Greatpsycho
see COPYING for more details
*/
#define SCAT_DMA_WAIT_STATE_CONTROL 0x01
#define SCAT_VERSION 0x40
#define SCAT_CLOCK_CONTROL 0x41
#define SCAT_PERIPHERAL_CONTROL 0x44
#define SCAT_MISCELLANEOUS_STATUS 0x45
#define SCAT_POWER_MANAGEMENT 0x46
#define SCAT_ROM_ENABLE 0x48
#define SCAT_RAM_WRITE_PROTECT 0x49
#define SCAT_SHADOW_RAM_ENABLE_1 0x4A
#define SCAT_SHADOW_RAM_ENABLE_2 0x4B
#define SCAT_SHADOW_RAM_ENABLE_3 0x4C
#define SCAT_DRAM_CONFIGURATION 0x4D
#define SCAT_EXTENDED_BOUNDARY 0x4E
#define SCAT_EMS_CONTROL 0x4F
typedef struct scat_t
{
uint8_t regs_2x8;
uint8_t regs_2x9;
} scat_t;
void scat_init();

23
src/sis496.c
View File

@@ -3,21 +3,24 @@
*/
#include <stdlib.h>
#include "ibm.h"
#include "device.h"
#include "cpu/cpu.h"
#include "io.h"
#include "mem.h"
#include "pci.h"
#include "device.h"
#include "model.h"
#include "sis496.h"
typedef struct sis496_t
{
uint8_t pci_conf[256];
} sis496_t;
sis496_t sis496;
void sis496_recalcmapping(void)
static void sis496_recalcmapping(void)
{
int c;
@@ -50,7 +53,8 @@ void sis496_recalcmapping(void)
shadowbios = (sis496.pci_conf[0x44] & 0xf0);
}
void sis496_write(int func, int addr, uint8_t val, void *p)
static void sis496_write(int func, int addr, uint8_t val, void *p)
{
switch (addr)
{
@@ -99,12 +103,14 @@ void sis496_write(int func, int addr, uint8_t val, void *p)
sis496.pci_conf[addr] = val;
}
uint8_t sis496_read(int func, int addr, void *p)
static uint8_t sis496_read(int func, int addr, void *p)
{
return sis496.pci_conf[addr];
}
void sis496_reset(void)
static void sis496_reset(void)
{
memset(&sis496, 0, sizeof(sis496_t));
@@ -128,7 +134,8 @@ void sis496_reset(void)
sis496.pci_conf[0x0e] = 0x00; /*Single function device*/
}
void sis496_pci_reset(void)
static void sis496_pci_reset(void)
{
uint8_t val = 0;
@@ -136,6 +143,7 @@ void sis496_pci_reset(void)
sis496_write(0, 0x44, val & 0xf, NULL); /* Turn off shadow BIOS but keep the lower 4 bits. */
}
void sis496_init(void)
{
pci_add_specific(5, sis496_read, sis496_write, NULL);
@@ -149,6 +157,7 @@ void sis496_init(void)
pci_set_card_routing(11, PCI_INTC);
}
void sis496_close(void *p)
{
sis496_t *sis496 = (sis496_t *)p;

4
src/sis496.h
View File

@@ -1,4 +0,0 @@
/* Copyright holders: Kotori
see COPYING for more details
*/
void sis496_init(void);